CN118919602A - Solar cell preparation method and solar cell - Google Patents

Abstract

The invention relates to the technical field of photovoltaic power generation, and discloses a solar cell preparation method and a solar cell, wherein the solar cell preparation method comprises the following steps: providing a silicon substrate; preparing a passivation anti-reflection layer on the front surface of the silicon substrate, and preparing a passivation layer on the back surface of the silicon substrate; slotting the passivation layer; preparing a passivation transmission structure in the slot, wherein the thickness of the passivation transmission structure is smaller than the depth of the slot; screen printing a first electrode on the passivation transmission structure, and screen printing a second electrode on the other surface opposite to the silicon substrate surface where the first electrode is positioned; and sintering to obtain the solar cell. The passivation transmission structure in the groove is protected by firstly preparing the passivation anti-reflection layer and the passivation layer and then grooving the passivation layer and forming the height difference through grooving, so that the passivation transmission structure outside the groove is prevented from being damaged when being etched, and the production reject ratio of the solar cell is reduced.

Description

Solar cell manufacturing method and solar cell

Technical Field

The present invention relates to the technical field of photovoltaic power generation, and in particular to a method for preparing a solar cell and a solar cell.

Background Art

The main principle of photovoltaic power generation is the photoelectric effect of semiconductors. The photoelectric effect is an important and magical phenomenon in physics. Under the irradiation of electromagnetic waves above a certain frequency, the electrons inside certain substances absorb energy and escape to form current, which is photoelectricity. Solar cells are a type of photoelectric semiconductor sheet that uses sunlight to directly generate electricity. They are also called "solar chips" or "photovoltaic cells". As long as they are illuminated by light that meets certain illumination conditions, they can instantly output voltage and generate current in the presence of a circuit.

The existing preparation process for solar cells with local passivation contacts usually involves first preparing a dielectric layer and a conductive transmission layer on the back of a silicon substrate, then coating a corrosion-resistant slurry at a preset position of the conductive transmission layer, and covering the P+ doped layer on the front of the silicon substrate with a borosilicate glass layer. The exposed dielectric layer and conductive transmission layer on the back of the silicon substrate are then removed by etching, and the corrosion-resistant slurry and borosilicate glass layer are removed after the etching is completed. Finally, a passivation anti-reflection layer is prepared on the front and a passivation layer is prepared on the back, and electrodes are screen-printed.

In the existing preparation process of solar cells with local passivation contacts, since the corrosion-resistant slurry can only protect the outer side of the conductive transmission layer, and the etching degree in the etching process is difficult to control, excessive etching often occurs, resulting in etching of the dielectric layer and the periphery of the conductive transmission layer in the area covered by the corrosion-resistant slurry, which in turn leads to reduced power generation efficiency; it is also easy to produce too light etching, which leads to incomplete removal of the dielectric layer and the conductive transmission layer not covered by the corrosion-resistant slurry. Overall, it leads to a high defective rate of solar cell products.

Summary of the invention

The technical problems to be solved by the present invention are:

The degree of etching is difficult to control, resulting in a high rate of defective products in solar cell production.

In order to solve the above technical problems, the present invention provides a method for preparing a solar cell, comprising:

Providing a silicon substrate, wherein the silicon substrate has a front side and a back side opposite to each other;

A passivation anti-reflection layer is prepared on the front side of the silicon substrate, and a passivation layer is prepared on the back side of the silicon substrate;

Grooving the passivation layer, wherein the groove depth reaches the silicon substrate;

preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove;

Screen printing a first electrode on the passivation transmission structure, and screen printing a second electrode on the other side of the silicon substrate opposite to the side where the first electrode is located;

Sintering to produce a solar cell.

In one embodiment, the step of preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove, comprises:

A dielectric layer is prepared on the side of the silicon substrate where the groove is formed, and a conductive transmission layer is prepared on the side of the dielectric layer away from the silicon substrate;

Covering the conductive transmission layer in the groove with a mask;

Removing the conductive transmission layer outside the groove, or removing the conductive transmission layer and the dielectric layer outside the groove;

The mask in the groove is removed.

In one embodiment, the dielectric layer and the conductive transmission layer are prepared by plasma enhanced chemical vapor deposition.

In one embodiment, the dielectric layer material is silicon oxide, and the conductive transmission layer material is doped polysilicon.

In one embodiment, the mask is an alkali-resistant mask.

In one embodiment, in the step of grooving the passivation layer, wherein the grooving depth reaches the silicon substrate:

The grooves are prepared by photolithography or etching.

In one embodiment, the step of providing a silicon substrate having a front side and a back side opposite to each other comprises:

A silicon wafer is provided, and the silicon wafer is subjected to texturing, diffusion, cleaning and plating processes to obtain the silicon substrate.

In one embodiment, performing diffusion processing on a silicon wafer includes:

Put the textured silicon wafer into the diffusion furnace;

A doping source is introduced into the diffusion furnace to form a high-concentration doping layer on the surface of the silicon wafer;

The doping atoms in the high-concentration doping layer are diffused from the high-concentration area on the surface to the low-concentration area deep inside.

In one of the embodiments, the passivation anti-reflection layer is provided with multiple layers, and each layer of the passivation anti-reflection layer is sequentially stacked on the front side of the silicon substrate.

A solar cell is manufactured by using the above-mentioned solar cell manufacturing method.

Compared with the prior art, the above solar cell preparation method has the following beneficial effects:

The passivation anti-reflection layer and the passivation layer are first prepared, and then the passivation layer is grooved, and the passivation transmission structure is prepared in the groove. The groove is formed to form a height difference, and then the groove structure is used to protect the passivation transmission structure in the groove, so that the passivation transmission structure outside the groove is not damaged when etching the passivation transmission structure inside the groove, and the dielectric layer and the conductive transmission layer in the groove are not also etched, which will reduce the power generation efficiency of the battery and avoid leakage, thereby reducing the defective rate of solar cell production.

Furthermore, by preparing a passivation layer in advance, the passivation layer can protect the silicon substrate during the etching process to avoid damage to the back side of the silicon substrate due to excessive etching.

Since the passivation layer in the etched area is separated between the dielectric layer and the silicon substrate, the dielectric layer in the etched area is separated from the dielectric layer in the groove, and the dielectric layer material is silicon oxide, only the conductive transmission layer can be removed during the etching process, and the dielectric layer is retained on the side of the passivation layer away from the silicon substrate to improve the passivation effect on the back of the solar cell and avoid the cost of removing the dielectric layer. In addition, since only the conductive transmission layer needs to be etched, the etching time is effectively reduced, and the production efficiency of solar cells is improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a process flow chart of a method for preparing a solar cell according to an embodiment of the present invention;

FIG2 is a schematic structural diagram of a solar cell according to an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of the solar cell in FIG. 2 during the preparation process, after step S42 but not after step S43.

The meanings of the numbers in the accompanying drawings are:

100. Solar cells;

10. Silicon substrate;

20. Passivation anti-reflection layer;

30. a second electrode;

40. passivation layer; 45. slotting;

50. Dielectric layer;

60. Conductive transmission layer;

70. a first electrode;

80. Mask.

DETAILED DESCRIPTION

In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used herein are for illustrative purposes only and are not intended to be the only implementation method.

Please refer to FIG1 , which is a method for preparing a solar cell according to an embodiment of the present invention, comprising:

S1: providing a silicon substrate, wherein the silicon substrate has a front side and a back side opposite to each other;

S2: preparing a passivation anti-reflection layer on the front side of the silicon substrate, and preparing a passivation layer on the back side of the silicon substrate;

S3: Grooving the passivation layer, wherein the groove depth reaches the silicon substrate;

S4: preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove;

S5: screen-printing a first electrode on the passivation transmission structure, and screen-printing a second electrode on the other side of the silicon substrate opposite to the side where the first electrode is located;

S6: Sintering to produce a solar cell.

By first preparing a passivation anti-reflection layer on the front of the silicon substrate, preparing a passivation layer on the back of the silicon substrate, and then preparing a passivation transmission structure, the passivation transmission structure needs to be processed through an etching process during the preparation process. Since the direct preparation of the passivation transmission structure cannot ensure the connection between the electrode and the silicon substrate, in order to overcome the above technical difficulties, it is necessary to prepare the passivation layer and the passivation anti-reflection layer and then groove them, and then prepare the passivation transmission structure in the groove. The groove is formed by the height difference, and then the groove structure and the mask are used to protect the passivation transmission structure in the groove, ensuring that the passivation transmission structure outside the groove will not be damaged when etching the passivation transmission structure, thereby reducing the defective rate of solar cell production.

Further, step S1 includes: providing a silicon wafer, performing texturing, diffusion, cleaning and plating on the silicon wafer to obtain a silicon substrate. Step S1 includes processing the silicon wafer to obtain the required silicon substrate. It should be noted that the silicon wafer can be an N-type silicon wafer or a P-type silicon wafer.

Furthermore, in step S1, the silicon wafer is subjected to a diffusion process after being subjected to a texturing process. The diffusion process specifically includes:

S11: placing the silicon wafer after texturing into a diffusion furnace;

S12: introducing a doping source into the diffusion furnace to form a high-concentration doping layer on the surface of the silicon wafer;

S13: Diffuse the doping atoms of the high-concentration doping layer from the high-concentration area on the surface to the low-concentration area in the depth.

Wherein, in step S12, the doping source is POCl ₃ or BBr ₃ , POCl ₃ is commonly used for N-type silicon substrates, and BBr ₃ is commonly used for P-type silicon substrates. POCl ₃ reacts with oxygen to generate P ₂ O ₅ , and BBr ₃ reacts with oxygen to generate B ₂ O _3. The generated P ₂ O ₅ or B ₂ O ₃ is similar in structure to SiO ₂ , so it is easier to dissolve in SiO ₂ , thereby forming a high-concentration doped layer. In step S13, the doped atoms of the high-concentration doped layer will advance from the high-concentration area to the low-concentration area at high temperature, so that the doped atom concentration on the surface of the silicon wafer is reduced and diffused into the inside of the silicon wafer, forming a new distribution of doped atoms, forming a PN junction inside the silicon wafer, and ensuring photovoltaic power generation.

Furthermore, after the silicon wafer is diffused in step S1, wrap-around plating will occur, so it is necessary to clean the back and side wrap-around plating. The back wrap-around plating cleaning process is to etch the back and side of the diffused silicon wafer with a mixed solution of _HNO3 and HF to remove the wrap-around plating on the side, so that the front and back of the silicon wafer are insulated from each other.

It should be noted that the doping source in the above step S12 may also be other dopants, and there is no limitation on the specific doping source components, and the diffusion method may also be various.

Further, the passivation layer in step S2 is provided with multiple layers, and each passivation layer is sequentially superimposed on the back side of the silicon substrate. The passivation anti-reflection layer is provided with multiple layers, and each passivation anti-reflection layer is sequentially superimposed on the front side of the silicon substrate. It can be understood that the specific number of layers of the passivation layer and the passivation anti-reflection layer can be set according to actual use requirements, and one layer can be set or multiple layers can be set. The specific number of layers of the passivation layer and the passivation anti-reflection layer is not limited here.

Furthermore, in step S3, the preparation method of the groove is photolithography or etching. Photolithography refers to the use of laser to make grooves at the preset groove positions, and the groove positions correspond to the predetermined installation positions of the electrodes. Etching refers to covering the non-grooved area with corrosion-resistant slurry so that the preset groove positions are exposed, and then placing the workpiece in an etching solution to react and consume the exposed preset groove positions. After etching is completed, the covered corrosion-resistant slurry is removed to achieve the groove processing of the preset positions. It can be understood that according to actual use needs, the grooves can be prepared by photolithography or etching. The specific processing method of the grooves is not limited here, and it is sufficient to ensure that the preset positions can be grooved.

Further, step S4 includes:

S41: preparing a dielectric layer on the side of the silicon substrate where the groove is formed, and preparing a conductive transmission layer on the side of the dielectric layer away from the silicon substrate;

S42: Covering the conductive transmission layer in the groove with a mask;

S43: removing the conductive transmission layer outside the groove, or removing the conductive transmission layer and the dielectric layer outside the groove;

S44: removing the mask in the groove.

By means of vapor deposition, a dielectric layer is grown on the side of the silicon substrate where a groove is opened. Please refer to FIG3. Since it is impossible to control the dielectric layer to grow only in the groove during the vapor deposition process, after vapor deposition, taking the groove opened on the passivation layer as an example, after vapor deposition, the dielectric layer will be attached to the groove in the electrode area, and the dielectric layer will also be attached to the passivation layer outside the electrode area. After the dielectric layer is prepared, a conductive transmission layer will be deposited. During the deposition process, the conductive transmission layer cannot be controlled to be prepared only in the groove, so the conductive transmission layer is distributed on the outside of the dielectric layer in the groove and the outside of the dielectric layer outside the groove. In this embodiment, the preparation method of the dielectric layer and the conductive transmission layer adopts a plasma enhanced chemical vapor deposition (PECVD) process, so that the dielectric layer and the conductive transmission layer can be prepared in the same equipment, thereby improving the processing efficiency.

Furthermore, it is necessary to remove the conductive transmission layer outside the slot, so in step S42, after preparing the dielectric layer and the wire transmission layer, the conductive transmission layer in the slot is first covered by a mask. At this time, the dielectric layer and the conductive transmission layer in the slot are covered and protected by the mask, while the conductive transmission layer outside the slot is exposed. In step S43, the exposed conductive transmission layer is removed by etching, and the dielectric layer and the conductive transmission layer in the slot are covered by the mask. Moreover, due to the height difference of the slot manufacturing, even if the etching is excessive, since the conductive transmission layer and the dielectric layer in the slot will not be exposed, there is no need to worry about the conductive transmission layer and the dielectric layer in the slot being etched, so as to avoid the conductive transmission layer in the slot being etched and reduced, thereby reducing the power generation efficiency of the battery and avoiding leakage, and reducing the defective rate of solar cell production. In this embodiment, the mask is covered on the conductive transmission layer in the slot by printing or coating, and the mask is an alkali-resistant mask, which is convenient for corroding the conductive transmission layer outside the slot by alkali solution. Furthermore, in step S44, the mask is removed by the liquid that reacts only with the mask.

Furthermore, the dielectric layer material is silicon oxide, and the conductive transmission layer material is doped polysilicon. Since the dielectric layer is made of silicon oxide, in step S43, only the conductive transmission layer outside the groove can be removed to retain the dielectric layer outside the passivation layer to improve the passivation effect on the back of the solar cell and avoid the cost of removing the dielectric layer. Of course, the conductive transmission layer and the dielectric layer outside the groove can also be removed together, so as to obtain the battery structure as shown in Figure 2.

Furthermore, during the etching process in step S43, the mask protects the dielectric layer and the conductive transmission layer in the groove, and the passivation layer protects the silicon substrate outside the groove. Therefore, there is no need to worry about the silicon substrate being exposed and damaged due to over-etching, thereby further improving the processing yield.

Furthermore, in step S5 and step S6, an electrode is printed on the conductive transmission layer in the groove, and an electrode is printed on the side of the silicon substrate away from the groove, and then the silicon substrate after printing the electrode is sent as a whole into the sintering furnace to prepare the first electrode and the second electrode, thereby completing the production of the solar cell. In this embodiment, the passivation layer has a first polar region, and the passivation anti-reflection layer has a second polar region; the first polar region and the second polar region correspond to the preset electrode positions, and the first polar region and the second polar region are symmetrically arranged on both sides of the silicon substrate. Please refer to Figure 2, the groove is set on the passivation layer, the first polar region is the position of the preset first electrode, the second polar region is the position of the preset second electrode, and the groove is correspondingly opened at the first polar region.

Referring to FIG. 2 , the present invention further discloses a solar cell 100, comprising a silicon substrate 10, a passivation anti-reflection layer 20, a second electrode 30, a passivation layer 40, a dielectric layer 50, a conductive transmission layer 60 and a first electrode 70. The silicon substrate 10 is provided with a front side and a back side on opposite sides. The passivation anti-reflection layer 20 is provided on the front side of the silicon substrate 10; the second electrode 30 is provided on the passivation anti-reflection layer 20. The passivation layer 40 is provided on the back side of the silicon substrate 10; a groove 45 is provided on the side of the passivation layer 40 away from the silicon substrate 10, the grooves 45 are arranged at intervals along the passivation layer 40, and the depth of the grooves 45 reaches the silicon substrate 10. The dielectric layer 50 is provided in the groove 45, and the dielectric layer 50 is connected to the silicon substrate 10; the conductive transmission layer 60 is provided in the groove 45, and the conductive transmission layer 60 is provided on the side of the dielectric layer 50 away from the silicon substrate 10. One end of the first electrode 70 is located in the groove 45 and is connected to the conductive transmission layer 60. Among them, in the depth direction of the groove 45, the depth of the groove 45 is H, the thickness of the dielectric layer 50 is B1, and the thickness of the conductive transmission layer 60 is B2; then H＞B1+B2. By H＞B1+B2, it is ensured that the dielectric layer 50 and the conductive transmission layer 60 are embedded in the groove 45, and then it is ensured that during the etching process, the mask 80 and the passivation layer 40 on both sides of the groove 45 can protect the dielectric layer 50 and the conductive transmission layer 60 in the groove 45, so as to avoid the dielectric layer 50 and the conductive transmission layer 60 in the groove 45 being damaged when etching the conductive transmission layer 60 outside the groove, and to avoid the dielectric layer 50 and the conductive transmission layer 60 in the groove being etched and reduced, thereby reducing the power generation efficiency of the battery and avoiding leakage, thereby reducing the production defect rate of the solar cell 100.

In summary, the embodiment of the present invention provides a method for preparing a solar cell 100 and a solar cell 100, and the beneficial effects thereof are:

The passivation anti-reflection layer 20 and the passivation layer 40 are first prepared, and then the passivation layer 40 is grooved 45, and the passivation transmission structure is prepared in the groove 45. The groove 45 forms a height difference, and then the groove 45 structure and the mask 80 are used to protect the passivation transmission structure in the groove 45, so that the passivation transmission structure outside the groove is not damaged when etching, and the dielectric layer 50 and the conductive transmission layer 60 in the groove are not also etched, which will reduce the power generation efficiency of the battery and avoid leakage, thereby reducing the production defect rate of the solar cell 100.

Furthermore, by preparing the passivation layer 40 in advance, the passivation layer 40 can protect the silicon substrate 10 during the etching process, thereby preventing the back side of the silicon substrate 10 from being damaged when the etching is excessive.

Since the passivation layer 40 in the etched area is blocked between the dielectric layer 50 and the silicon substrate 10, the dielectric layer 50 in the etched area is separated from the dielectric layer 50 in the groove 45, and the dielectric layer 50 material is silicon oxide, only the conductive transmission layer 60 can be removed during the etching process, and the dielectric layer 50 is retained on the side of the passivation layer 40 away from the silicon substrate 10, so as to improve the passivation effect on the back of the solar cell 100 and avoid the cost of removing the dielectric layer 50. In addition, since only the conductive transmission layer 60 needs to be etched, the etching time is effectively shortened, and the production efficiency of the solar cell 100 is improved.

The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims (10)

1. A method for preparing a solar cell, comprising: Providing a silicon substrate, wherein the silicon substrate has a front side and a back side opposite to each other; A passivation anti-reflection layer is prepared on the front side of the silicon substrate, and a passivation layer is prepared on the back side of the silicon substrate; Grooving the passivation layer, wherein the groove depth reaches the silicon substrate; preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove; Screen printing a first electrode on the passivation transmission structure, and screen printing a second electrode on the other side of the silicon substrate opposite to the side where the first electrode is located; Sintering to produce a solar cell. 2. The method for preparing a solar cell according to claim 1, wherein the step of preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove, comprises: A dielectric layer is prepared on the side of the silicon substrate where the groove is formed, and a conductive transmission layer is prepared on the side of the dielectric layer away from the silicon substrate; Covering the conductive transmission layer in the groove with a mask; Removing the conductive transmission layer outside the groove, or removing the conductive transmission layer and the dielectric layer outside the groove; The mask in the groove is removed. 3 . The method for preparing a solar cell according to claim 2 , wherein the dielectric layer and the conductive transmission layer are prepared by plasma enhanced chemical vapor deposition. 4 . The method for preparing a solar cell according to claim 2 , wherein the dielectric layer material is silicon oxide, and the conductive transmission layer material is doped polysilicon. 5 . The method for preparing a solar cell according to claim 2 , wherein the mask is an alkali-resistant mask. 6. The method for preparing a solar cell according to claim 1, characterized in that, in the step of grooving the passivation layer, the grooving depth reaches the silicon substrate: The grooves are prepared by photolithography or etching. 7. The method for preparing a solar cell according to claim 1, wherein the step of providing a silicon substrate having a front side and a back side opposite to each other comprises: A silicon wafer is provided, and the silicon wafer is subjected to texturing, diffusion, cleaning and plating processes to obtain the silicon substrate. 8. The method for preparing a solar cell according to claim 7, wherein the diffusion processing of the silicon wafer comprises: Put the textured silicon wafer into the diffusion furnace; A doping source is introduced into the diffusion furnace to form a high-concentration doping layer on the surface of the silicon wafer; The doping atoms in the high-concentration doping layer are diffused from the high-concentration area on the surface to the low-concentration area deep inside. 9 . The method for preparing a solar cell according to claim 1 , wherein the passivation anti-reflection layer is provided with multiple layers, and each layer of the passivation anti-reflection layer is sequentially stacked on the front side of the silicon substrate. 10. A solar cell, characterized in that the solar cell is manufactured by the solar cell manufacturing method according to claims 1-9.