CN118885045A - A wide input range two-stage high power supply rejection ratio bandgap reference circuit - Google Patents
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- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
Description
技术领域Technical Field
本发明属于电子电力技术领域,涉及一种具有宽输入电压范围和高电源抑制比的两级带隙基准电路的设计。The invention belongs to the technical field of electronic power and relates to the design of a two-stage bandgap reference circuit with a wide input voltage range and a high power supply rejection ratio.
背景技术Background Art
带隙基准电路作为模拟电路以及混合信号电路中最基本同时也是最核心的电路之一。芯片整体电路结构都依赖于带隙基准电压给出的各项指标,对电路性能以及正常工作起到了决定性作用。Bandgap reference circuit is one of the most basic and core circuits in analog circuits and mixed signal circuits. The overall circuit structure of the chip depends on the various indicators given by the bandgap reference voltage, which plays a decisive role in the circuit performance and normal operation.
带隙基准电路核心指标为低温度系数、宽温度范围、宽输入范围、低功耗和高电源抑制比。对于以往设计而言,大多都只关注一个方面,在做到宽输入范围的同时很难做到高电源抑制比和低温度系数。因电源电压输入范围较大,也引入了能否确保电路正常工作的问题。随着集成电路产业的不断发展,能够兼容多项指标良好的电路倍受业界的青睐。The core indicators of the bandgap reference circuit are low temperature coefficient, wide temperature range, wide input range, low power consumption and high power supply rejection ratio. For previous designs, most of them only focused on one aspect. It is difficult to achieve high power supply rejection ratio and low temperature coefficient while achieving a wide input range. Due to the large input range of the power supply voltage, the problem of whether the circuit can work properly is also introduced. With the continuous development of the integrated circuit industry, circuits that can be compatible with multiple indicators are favored by the industry.
发明内容Summary of the invention
为了克服因宽输入电压范围引起的输出不稳定问题,本发明采用了两级带隙基准电路,第一级的带隙基准采用高压器件来进行预降压,从而得到一个较为粗糙的基准电压源,再以第一级基准为电压源为第二级基准电压供电,从而得到一个精确的基准电压源。本发明采用的两级带隙基准电路可以获得较大的电源抑制比。In order to overcome the output instability problem caused by a wide input voltage range, the present invention adopts a two-stage bandgap reference circuit, the first-stage bandgap reference uses a high-voltage device for pre-stepping down, thereby obtaining a relatively rough reference voltage source, and then the first-stage reference is used as a voltage source to power the second-stage reference voltage, thereby obtaining an accurate reference voltage source. The two-stage bandgap reference circuit used in the present invention can obtain a larger power supply rejection ratio.
本发明解决其技术问题所采用的技术方案是:The technical solution adopted by the present invention to solve its technical problem is:
具有宽输入电压范围和高电源抑制比的两级带隙基准电路主要由三个电路模块组成:一是第一级预降压模块,二是第二级带隙基准核心电路模块,三是第二级启动检测模块。The two-stage bandgap reference circuit with wide input voltage range and high power supply rejection ratio mainly consists of three circuit modules: one is a first-stage pre-step-down module, the second is a second-stage bandgap reference core circuit module, and the third is a second-stage startup detection module.
预降压模块是带隙基准电路的第一级,运用高压MOS管将带隙基准核心隔离,输出一个较为粗糙的带隙基准电压源,为第二级供电。预降压模块能够极大地抑制电源纹波。The pre-step-down module is the first stage of the bandgap reference circuit. It uses a high-voltage MOS tube to isolate the bandgap reference core and output a relatively rough bandgap reference voltage source to power the second stage. The pre-step-down module can greatly suppress power supply ripple.
带隙基准核心电路能够产生一个精确的与温度几乎无关的基准电压。因第一级预降压模块输出的电压较低,每条支路可带载晶体管数量较少,采用四支路结构来提高输出电压稳定性,同时采用低压cascode电流镜结构来进一步增大三极管工作范围。通过一个较大电阻来为带隙基准提供启动电流,启动成功后通过后级检测模块来关断启动电流The bandgap reference core circuit can generate an accurate reference voltage that is almost independent of temperature. Since the output voltage of the first-stage pre-step-down module is low, each branch can carry fewer transistors. A four-branch structure is used to improve the output voltage stability, and a low-voltage cascode current mirror structure is used to further increase the working range of the transistor. A larger resistor is used to provide the starting current for the bandgap reference. After the startup is successful, the startup current is turned off by the post-stage detection module.
第二级启动检测模块,通过比较低压cascode电流镜结构所在两条支路上的两点电压,经差分输入运算放大器与共源极放大器来判断是否启动成功,在启动成功后关断启动电流。该电路同时具有迟滞作用,避免纹波导致的启动电路频繁开关。The second-stage startup detection module compares the voltages at two points on the two branches of the low-voltage cascode current mirror structure, and determines whether the startup is successful through the differential input operational amplifier and the common source amplifier, and turns off the startup current after the startup is successful. The circuit also has a hysteresis effect to avoid frequent switching of the startup circuit caused by ripple.
输出的基准电压为一个与电阻比例相关的正温度系数电压与三极管负温度系数的基极-发射极电压叠加。通过改变电阻比例,得到一个在室温下的零温度系数的带隙基准电压,第一级带隙基准电压为2.5V左右,第二级带隙基准电压为1.22V左右。The output reference voltage is a positive temperature coefficient voltage related to the resistance ratio and the base-emitter voltage of the transistor with a negative temperature coefficient. By changing the resistance ratio, a bandgap reference voltage with a zero temperature coefficient at room temperature is obtained. The first-level bandgap reference voltage is about 2.5V, and the second-level bandgap reference voltage is about 1.22V.
本发明的有益效果是,本发明具有宽输入范围满足不同工作环境;具有良好的温度特性,能够在宽温度范围下工作;同时功耗低,提高芯片工作寿命;具有较高的电源纹波抑制比能够,提高系统抗干扰能力。The beneficial effects of the present invention are that the present invention has a wide input range to meet different working environments; has good temperature characteristics and can work in a wide temperature range; at the same time, has low power consumption and improves the working life of the chip; has a high power supply ripple suppression ratio and can improve the system's anti-interference ability.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为本发明整体电路图FIG. 1 is an overall circuit diagram of the present invention.
图2为本发明预降压模块具体电路图;FIG2 is a specific circuit diagram of the pre-step-down module of the present invention;
图3为本发明带隙基准第二级具体电路图;FIG3 is a specific circuit diagram of the second stage of the bandgap reference of the present invention;
图4为本发明第二级启动检测模块具体电路图;FIG4 is a specific circuit diagram of the second-stage startup detection module of the present invention;
图5为本发明第一级温度特性曲线仿真图;FIG5 is a simulation diagram of the first-stage temperature characteristic curve of the present invention;
图6为本发明第二级温度特性曲线仿真图;FIG6 is a simulation diagram of the second-stage temperature characteristic curve of the present invention;
图7为本发明输出PSRR仿真曲线图。FIG. 7 is a simulation curve diagram of the output PSRR of the present invention.
具体实施方式DETAILED DESCRIPTION
下面结合附图和具体实施方式对本发明进行更加详细的说明The present invention will be described in more detail below with reference to the accompanying drawings and specific embodiments.
本发明第一级预降压模块具体电路结构如图2所示。在预降压模块中,R0为右侧带隙基准提供启动电流,M0为调整管。Q3和Q1尺寸比例为N;Q1所在支路电流在保证三极管正常工作区间内与输入电压无关,且与环境温度成正比,与R2电阻成反比。该电流流过R1的压降加上Q1和Q2的基极-发射极电压即为第一级预降压模块的输出电压。该电压近似与输入电压和外界温度无关。The specific circuit structure of the first-stage pre-step-down module of the present invention is shown in Figure 2. In the pre-step-down module, R0 provides the starting current for the right bandgap reference, and M0 is the adjustment tube. The size ratio of Q3 and Q1 is N; the branch current where Q1 is located is independent of the input voltage within the normal working range of the transistor, and is proportional to the ambient temperature and inversely proportional to the resistance of R2. The voltage drop of the current flowing through R1 plus the base-emitter voltage of Q1 and Q2 is the output voltage of the first-stage pre-step-down module. This voltage is approximately independent of the input voltage and the external temperature.
本发明提出了一种具有宽输入电压范围和高电源抑制比的两级带隙基准电路的设计,整体框架结构如图1所示。通过第一级预降压电路将宽范围输入电压降低,作为第二级带隙基准核心电路电源电压。该电路具有高电源纹波抑制比。通过分为第一级预降压模块、第二级带隙基准核心电路、启动检测模块进行分别说明。The present invention proposes a design of a two-stage bandgap reference circuit with a wide input voltage range and a high power supply rejection ratio, and the overall framework structure is shown in Figure 1. The wide range input voltage is reduced by a first-stage pre-step-down circuit as the power supply voltage of the second-stage bandgap reference core circuit. The circuit has a high power supply ripple rejection ratio. It is described separately by dividing it into a first-stage pre-step-down module, a second-stage bandgap reference core circuit, and a startup detection module.
本发明第二级带隙基准核心电路结构如图3所示。在该电路中,EN_DET为启动电路使能信号,启动时M3导通,R3为右路提供启动电流。电流通过M5、M6复制;启动瞬间M6源极电压为地,M6漏极电压拉低,为M7栅极提供偏置;经M9、M10、M11、M12电流镜复制,为M8栅极提供偏置,电流镜偏置建立完成。M18、M19导通将Q4、Q8基极电压抬高,核心电路三极管都导通,电路启动完成。电路启动后,M3关断,启动电流关断。Q5与Q6尺寸比例为M。电路稳定后流过R4、R6、R8、R10的电流相等,构造等式可求解该电流;通过将Q4基极电压与在R11的压降叠加得到第二级带隙基准电路的输出电压。该电压近似于外界温度无关。IOUT为支路电流的比例复制,可被当作电流源为后级电路使用。RES_DIV为电阻分压器,在VREF的基础上电阻分压出不同大小的基准电压供后级电路使用。The structure of the second-stage bandgap reference core circuit of the present invention is shown in FIG3. In the circuit, EN_DET is the start-up circuit enable signal. When starting, M3 is turned on, and R3 provides the start-up current for the right path. The current is copied through M5 and M6; at the moment of starting, the source voltage of M6 is grounded, and the drain voltage of M6 is pulled down to provide bias for the gate of M7; it is copied through the current mirror of M9, M10, M11, and M12 to provide bias for the gate of M8, and the current mirror bias is established. M18 and M19 are turned on to raise the base voltage of Q4 and Q8, and the core circuit triodes are all turned on, and the circuit startup is completed. After the circuit is started, M3 is turned off, and the start-up current is turned off. The size ratio of Q5 to Q6 is M. After the circuit is stable, the current flowing through R4, R6, R8, and R10 is equal, and the current can be solved by constructing an equation; the output voltage of the second-stage bandgap reference circuit is obtained by superimposing the base voltage of Q4 with the voltage drop at R11. This voltage is approximately independent of the external temperature. IOUT is a proportional copy of the branch current and can be used as a current source for subsequent circuits. RES_DIV is a resistor divider that divides VREF into reference voltages of different sizes for subsequent circuits.
本发明第二级启动电流检测电路结构如图4所示。电流源IOUT1、IOUT2为基准核心电路支路电流比例复制,为本电路电流偏置。VP、VN为低压cascode电流镜结构所在两条支路上的两点电压。启动时M30关断,EN_DET输出低电平,M3导通,产生启动电流。第二级核心电路启动后,M30导通,EN_DET输出翻转,关断M3,关闭启动电流。The structure of the second-stage startup current detection circuit of the present invention is shown in FIG4. The current sources IOUT1 and IOUT2 are the current proportional copies of the reference core circuit branch currents, which are the current biases of this circuit. VP and VN are the two-point voltages on the two branches where the low-voltage cascode current mirror structure is located. When starting, M30 is turned off, EN_DET outputs a low level, M3 is turned on, and a startup current is generated. After the second-stage core circuit is started, M30 is turned on, the EN_DET output flips, M3 is turned off, and the startup current is closed.
图5显示了本发明第一级带隙电压在不同输入电压下,输出电压的温度特性曲线。在-55摄氏度到125摄氏度的工作温度范围内,整体成抛物线。输出电压随温度改变较低,12V输入电压下第一级输出电压温漂系数为55ppm/℃。Figure 5 shows the temperature characteristic curve of the output voltage of the first-stage bandgap voltage of the present invention under different input voltages. In the operating temperature range of -55 degrees Celsius to 125 degrees Celsius, the overall curve is parabolic. The output voltage changes less with temperature, and the temperature drift coefficient of the first-stage output voltage is 55ppm/℃ under 12V input voltage.
图6显示了本发明第二级带隙基准核心电路在输出电压的温度特性曲线。在-55摄氏度到125摄氏度的工作温度范围内,整体成抛物线,在室温附近达到零温度系数。输出电压随温度改变较低,第二级输出电压温漂系数为17ppm/℃。Figure 6 shows the temperature characteristic curve of the output voltage of the second-stage bandgap reference core circuit of the present invention. In the operating temperature range of -55 degrees Celsius to 125 degrees Celsius, the whole circuit is parabolic and reaches a zero temperature coefficient near room temperature. The output voltage changes less with temperature, and the temperature drift coefficient of the second-stage output voltage is 17ppm/℃.
图7为本发明PSRR仿真曲线图,在PVT仿真下,PSRR低频最低值为-81dB。PSRR随频率提高而升高。整体带隙基准电路PSRR较高,对输入电压变化不敏感,在输入电压范围内能正常工作,满足系统对电源电压的需求。FIG7 is a PSRR simulation curve of the present invention. Under PVT simulation, the lowest value of PSRR at low frequency is -81dB. PSRR increases with increasing frequency. The overall bandgap reference circuit has a high PSRR and is insensitive to input voltage changes. It can work normally within the input voltage range and meet the system's demand for power supply voltage.
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