CN118866675A - Optimization method of dry etching process - Google Patents

Abstract

The invention relates to the technical field of semiconductor device manufacturing, and discloses an optimization method of a dry etching process. Comprising the following steps: the thinning amount of the protective layer in unit time during dry etching is obtained in advance; providing a sample to be etched, wherein the sample comprises a first structural layer and a second structural layer; preparing a protective layer on the second structural layer; etching treatment is carried out on one side of the protective layer to form a ridge structure; obtaining the actual thinning amount of the protective layer according to the etching time and the thinning amount of the protective layer in unit time, and obtaining the residual thickness of the protective layer according to the initial thickness of the protective layer; measuring the sum of the thicknesses of the protective layer and the ridge structure, and obtaining the actual thickness of the ridge structure according to the residual thickness of the protective layer; comparing the actual thickness of the ridge structure with a preset target thickness to obtain a thickness difference value; and etching and correcting the protective layer until the actual thickness of the ridge structure is equal to the preset target thickness. The etching treatment and repeated etching correction can be performed on the same structural layer, so that the accurate etching depth is obtained, the cost is saved, and the efficiency is improved.

Description

Optimization method of dry etching process

Technical Field

The invention relates to the technical field of semiconductor device manufacturing, and in particular to a method for optimizing a dry etching process.

Background Art

In the preparation process of semiconductor devices, it is often necessary to etch to a specific depth on the epitaxial structural material to realize the production of insulating structures or electrodes, such as forming a ridge structure of a specific height, so as to ensure the performance of semiconductor devices. Dry etching is a common etching process in semiconductor technology. Compared with wet etching, dry etching uses physical bombardment such as argon gas, so it can form side walls with better collimation. It is widely used in the preparation of small line width devices such as waveguides or single-mode lasers.

Dry etching generally requires a protective layer to protect the parts that do not need to be etched. However, due to the physical bombardment characteristics of dry etching, the protective layer will also be thinned during the etching process, so it will be impossible to directly measure the "actual" etching depth after etching. The actual etching depth can only be measured after removing the protective layer; but if the etching depth does not reach the expected target, it will not be able to continue because there is no protective layer, and it is impossible to re-apply the protective layer through photolithography. Due to the alignment error, new test samples can only be used again, and the above steps are repeated back and forth until the semiconductor device layer is accurately etched to the target depth. However, this etching calibration method is not only inefficient, but also causes waste of sample materials and low economic benefits.

Summary of the invention

In view of this, the present invention provides a method for optimizing a dry etching process to solve the problem that the existing etching calibration method is inefficient, easily causes waste of sample materials, and has low economic benefits when completing precise etching of a target depth of a semiconductor device.

In a first aspect, the present invention provides a method for optimizing a dry etching process, comprising:

Step S101, pre-obtaining the thinning amount of the protective layer per unit time during dry etching;

Step S102, providing a sample to be etched, wherein the sample to be etched includes a first structure layer and a second structure layer located on a surface of one side of the first structure layer;

Step S103, preparing a protective layer on a side of the second structural layer away from the first structural layer, wherein the protective layer shields the first target area of the second structural layer and exposes the second target area of the second structural layer;

Step S104, performing an etching process on a side of the protective layer away from the first structural layer to form a groove on the second target area of the second structural layer and a ridge structure on the first target area of the second structural layer;

Step S105, obtaining the actual thinning amount of the protective layer during the etching process according to the etching process time and the thinning amount of the protective layer per unit time during dry etching; and obtaining the remaining thickness of the protective layer according to the initial thickness of the protective layer and the actual thinning amount of the protective layer during the etching process;

Step S106, measuring the total thickness of the protective layer and the ridge structure, and obtaining the actual thickness of the ridge structure according to the remaining thickness of the protective layer;

Step S107, comparing the actual thickness of the ridge structure with the preset target thickness to obtain a thickness difference;

Step S108 , based on the thickness difference, performing etching correction on the side of the protection layer away from the first structural layer until the actual thickness of the ridge structure is equal to the preset target thickness.

In the present invention, a test step is first performed before the formal etching process to obtain the thinning amount of the protective layer per unit time under the same conditions as the formal dry etching; then, during the formal etching process, the actual thinning amount is obtained according to the etching time, and then the remaining thickness of the protective layer after etching is obtained according to the initial thickness of the protective layer, and finally, the actual thickness of the protective layer and the thickness of the ridge structure are measured, and the remaining thickness of the protective layer is subtracted from the measured thickness to obtain the precise thickness of the ridge structure, that is, the precise etching depth for etching the second structural layer; then, the thickness difference is obtained by comparing the actual thickness of the ridge structure with the preset target thickness, and on the premise that the thickness difference is not zero, the second structural layer is etched and corrected, and the protective layer can still be used as a shield during the etching correction until the actual thickness of the ridge structure is equal to the preset target thickness.

Etching treatment and repeated etching correction can be performed on the same semiconductor device until the precise thickness of the ridge structure etching is achieved, thereby avoiding the problems of material waste and excessive etching caused by the inability to continue the etching correction due to conventional etching correction. After the aforementioned etching treatment, the etching rate can be obtained as a reference for etching correction to improve etching efficiency. In addition, since the actual thinning amount of the protective layer can be obtained in the process of obtaining the above-mentioned precise etching depth, the appropriate thickness of the protective layer can be determined according to the thinning amount during subsequent product processing, and there is no need to blindly thicken the protective layer for safety reasons, which helps to reduce material costs and improve production efficiency.

In an optional implementation, in the step S106 of measuring the total thickness of the protective layer and the ridge structure, a step meter is used to measure the total thickness of the protective layer and the ridge structure.

In the present invention, the step meter is used to measure the thickness, which can obtain high-precision measurement results and has the characteristics of being fast, multifunctional and easy to operate. The operator only needs to place the probe on the step-shaped structure, that is, the groove in this embodiment, and the step meter will automatically calculate the total thickness of the raised ridge structure and the protective layer without the need for a complicated calibration process.

In an optional implementation, based on the thickness difference, step S108 of performing etching correction on the side of the protective layer away from the first structural layer includes repeating steps S104 to S108 multiple times.

In the present invention, etching treatment-step profiler measurement-correction of etching time is repeated multiple times on a sample to be etched, so as to achieve accurate correction of etching depth and obtain an accurate ridge structure; multiple corrections are performed on the same sample to be etched, so as to avoid cost waste while ensuring etching accuracy and improving etching correction efficiency.

In an optional implementation, the step S101 of pre-obtaining the thinning amount of the protective layer per unit time during dry etching includes:

Provides test structure layer;

Disposing a protective layer on one side surface of the test structure layer;

Measure and obtain the sum of the initial thickness of the protective layer and the test structure layer;

Perform etching treatment for 1 min on the side of the protective layer away from the test structure layer;

Measuring the total thickness of the protective layer and the test structure layer after etching;

The total initial thickness of the protective layer and the test structure layer is compared with the total thickness of the protective layer and the test structure layer after etching, so as to obtain the etching thinning amount of the protective layer per unit time.

In the present invention, the thinning amount of the protective layer per unit time is obtained by pre-introducing the test steps, and the etching time is selected as 1 minute. The obtained thickness difference is the etching thinning amount of the protective layer per unit time, which improves the test efficiency and avoids the problem of inaccurate test results caused by the different sizes of the samples to be etched affecting the etching load effect during the actual etching.

In an optional embodiment, the first structural layer includes one or more of silicon, gallium arsenide, indium phosphide, gallium nitride, and silicon carbide.

In the present invention, the optimization method of the dry etching process can select the first structural layer of a variety of materials as the substrate for precise dry etching. The first structural layer of each material is universal for the second structural layer formed thereon as the etching treatment object, and there is no situation where it cannot be applied to the second structural layer of a certain material. That is, when the first structural layer is used as the substrate, the first structural layer is suitable for forming an epitaxial structure of any material as the second structural layer to be etched, and has a wide range of applications.

In an optional implementation, the test structure layer and the first structure layer have the same size; the test structure layer and the first structure layer have the same structure; or the test structure layer and the first structure layer have different structures.

In the present invention, a first structural layer of the same size as that used in formal etching can be used in the test step, but the structure of the first structural layer may be different. Specifically, the test structural layer in the test step of the present invention can be made of cheaper materials than the first structural layer used in formal etching, or broken pieces with damaged surfaces can be selected to save costs.

In an optional embodiment, the step S103 of preparing a protective layer on a side of the second structural layer away from the first structural layer includes:

Covering the initial protective layer on the surface of the second structural layer on the side facing away from the first structural layer;

A mask layer is disposed on a surface of the initial protective layer facing away from the first structural layer, wherein the mask layer includes a pattern region exposing a portion of the protective layer, and the pattern region corresponds to a second target region of the second structural layer;

The initial protection layer is etched on one side of the mask layer to form a protection layer corresponding to the first target area of the second structure layer.

In the present invention, after removing the mask layer, the second structural layer can be etched using the protective layer as a mask, and the precise thickness of the ridge structure can be obtained by obtaining the actual thinning amount of the protective layer. Thereafter, the protective layer on the same sample to be etched continues to be used as a mask to perform precise etching correction on the ridge structure. The calibration efficiency is high, which helps to save costs.

In an optional embodiment, the protective layer includes: photoresist, or dielectric material, or hard metal material; the dielectric material includes silicon dioxide or silicon nitride, and the hard metal material includes one or more of chromium, titanium, and nickel.

In the present invention, the protective layer is applicable to any etching mask material, has a wide selection range, and is conducive to wide application.

In an optional implementation, in the step S104 of performing the etching process on the side of the protective layer away from the first structural layer, the dry etching method includes inductively coupled plasma etching, reactive ion etching, or atomic layer etching.

In the present invention, dry etching can be applied to a variety of equipment. Inductively coupled plasma etching produces high ion density, good etching uniformity, high etching sidewall verticality and good finish; reactive ion etching has good morphology control ability (anisotropy), high selectivity and high etching rate; atomic layer etching has the advantages of precise etching control, good uniformity, small load effect, etc.

In an optional implementation, in the step S104 of performing etching on the side of the protective layer away from the first structural layer, the etching time is less than or equal to 1 minute.

In the present invention, the initial etching time is relatively short to ensure the etching rate and avoid waste caused by excessive etching.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

FIG1 is a flow chart of a method for optimizing a dry etching process according to an embodiment of the present invention;

FIG2 is a schematic diagram of the structure of a sample to be etched according to an embodiment of the present invention;

3 is a schematic diagram of the structure after a second structural layer is provided on a sample to be etched according to an embodiment of the present invention;

FIG4 is a schematic diagram of the structure of the second structural layer after etching according to an embodiment of the present invention;

FIG5 is a schematic diagram of the structure of an embodiment of the present invention after removing the protective layer;

6 is a schematic diagram of the structure of the test structure layer in the test step of an embodiment of the present invention;

7 is a schematic structural diagram of an embodiment of the present invention after a protective layer is provided on the test structure layer;

8 is a schematic structural diagram of an embodiment of the present invention after etching the protective layer on the test structure layer;

9 is a schematic structural diagram of providing an initial protective layer on a sample to be etched according to an embodiment of the present invention;

10 is a schematic structural diagram of an embodiment of the present invention after a mask layer is provided on the initial protective layer;

FIG. 11 is a schematic diagram of the structure after the initial protective layer is etched according to an embodiment of the present invention.

Description of reference numerals:

1. First structural layer; 2. Second structural layer; 3. Protection layer; 4. Mask layer; 10. Test structural layer.

DETAILED DESCRIPTION

The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only some structures related to the present invention are shown in the accompanying drawings, rather than all structures. In the following description, the description of known structures and technologies is omitted to avoid unnecessary confusion of the concept of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified for the purpose of clear expression, and some details may be omitted. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships between them are only exemplary, and may be deviated due to manufacturing tolerances or technical limitations in practice, and those skilled in the art may additionally design regions/layers with different shapes, sizes, and relative positions according to actual needs. In the context of the present invention, when a layer/element is referred to as being "on" another layer/element, the layer/element may be directly on the other layer/element, or there may be an intermediate layer/element between them. In addition, if one layer/element is "on" another layer/element in one orientation, then when the orientation is reversed, the layer/element may be "below" the other layer/element.

As shown in FIGS. 1 to 11 , this embodiment provides a method for optimizing a dry etching process. FIG. 1 is a flow chart of the method for optimizing a dry etching process, which includes the following steps:

Step S101, pre-obtaining the thinning amount of the protective layer 3 per unit time during dry etching.

Before the formal etching process is carried out, a test step is first introduced, and the same machine and process formula as those used in the formal etching are used to obtain the thinning amount of the protective layer 3 as the sample to be etched per unit time during the formal etching process.

The process recipe is the corresponding program for the machine to process different products. It is set in advance on the machine by the manufacturing engineer. During production, it will automatically select and control the machine to process in the pre-set manner according to the type of sample to be etched.

Step S102 , providing a sample to be etched, wherein the sample to be etched includes a first structure layer 1 and a second structure layer 2 located on one side surface of the first structure layer 1 .

As shown in Figure 2, providing a sample to be etched is the first step in entering the formal etching process. The sample to be etched in this embodiment takes a simple combination of the first structure layer 1 and the second structure layer 2 as an example. The materials of the first structure layer 1 and the second structure layer 2 are not limited. For example, the first structure layer 1 can be a substrate layer, and the second structure layer 2 is an epitaxial layer located on the substrate layer. Of course, the first structure layer 1 and the second structure layer 2 can be any device layer that requires a dry etching process in the processing of semiconductor devices. Compared with traditional etching, which designs an etching stop layer at a height that does not require etching, or requires selective etching with wet etching, the calibration method of this embodiment can be used for precise dry etching of any structure and material, with a wide range of applications, simple structure, and convenient operation.

Step S103 , preparing a protective layer 3 on a side of the second structural layer 2 facing away from the first structural layer 1 , wherein the protective layer 3 shields the first target area of the second structural layer 2 and exposes the second target area of the second structural layer 2 .

As shown in Figure 3, a partially covering protective layer 3 is formed on the upper surface of the second structural layer 2, and the area of the second structural layer 2 blocked by the protective layer 3 is called the first target area, and the area of the second structural layer 2 not blocked by the protective layer 3 is called the first target area. The protective layer 3 protects the first target area of the second structural layer 2 to facilitate precise etching of the second structural layer 2.

Step S104 , performing etching on the side of the protection layer 3 facing away from the first structure layer 1 to form a groove on the second target area of the second structure layer 2 and a ridge structure on the first target area of the second structure layer 2 .

As shown in Figure 4, etching is performed on one side of the upper surface of the protective layer 3. Since the first target area of the second structural layer 2 is covered by the protective layer 3 and the second target area is exposed, the material of the second structural layer 2 in the second target area is etched away, thereby forming a relatively protruding ridge structure in the first target area, and the protective layer 3 covers the ridge structure.

Step S105, obtaining the actual thinning amount of the protective layer 3 during the etching process according to the etching process time and the thinning amount of the protective layer 3 per unit time during dry etching; and obtaining the remaining thickness of the protective layer 3 according to the initial thickness of the protective layer 3 and the actual thinning amount of the protective layer 3 during the etching process.

Since the thinning amount of the protective layer 3 per unit time under the same etching machine and recipe is known in step S101, the actual thinning amount of the protective layer 3 during the etching process can be obtained according to the etching time; and then by comparing the initial thickness of the protective layer 3 and the actual thinning amount obtained, the difference between the two is the actual remaining thickness of the protective layer 3 after the etching process.

Step S106 , measuring the total thickness of the protective layer 3 and the ridge structure, and obtaining the actual thickness of the ridge structure according to the remaining thickness of the protective layer 3 .

Without peeling off the protective layer 3, the actual thickness sum of the raised protective layer 3 and the ridge structure is measured, and based on the residual thickness of the protective layer 3 obtained above, the difference obtained by subtracting the two is the actual thickness of the ridge structure.

Step S107, comparing the actual thickness of the ridge structure with the preset target thickness to obtain a thickness difference.

The preset target thickness is the etching depth set during the production process. By comparing the actual thickness of the ridge structure obtained above with the preset target thickness, the thickness difference is obtained, and it can be judged whether the above etching process is accurate or not.

Step S108 , based on the thickness difference, performing etching correction on the side of the protection layer 3 away from the first structure layer 1 until the actual thickness of the ridge structure is equal to the preset target thickness.

When the etching process is not in place, continue to perform etching correction on the side where the protective layer 3 is located. The etching at this time is carried out on the same machine as the above-mentioned first etching process. The etching correction time can be proportionally corrected according to the etching rate obtained by the above-mentioned etching process to improve the etching correction efficiency. As a preferred method, the time can be slightly reduced to avoid over-etching.

The optimization method of the dry etching process of the present embodiment first performs a test step before the formal etching process to obtain the thinning amount of the protective layer 3 per unit time under the same conditions as the formal dry etching; then, during the formal etching process, the actual thinning amount is obtained according to the etching time, and then the remaining thickness of the protective layer 3 after etching is obtained according to the initial thickness of the protective layer 3; finally, the actual thickness of the protective layer 3 and the thickness of the ridge structure are measured, and the remaining thickness of the protective layer 3 is subtracted from the measured thickness to obtain the precise thickness of the ridge structure, that is, the precise etching depth of the second structural layer 2; then, the thickness difference is obtained by comparing the actual thickness of the ridge structure with the preset target thickness, and the second structural layer 2 is etched and corrected on the premise that the thickness difference is not zero, and the protective layer 3 can still be used as a shield during the etching correction until the actual thickness of the ridge structure is equal to the preset target thickness.

In this embodiment, etching treatment and repeated etching correction can be performed on the same semiconductor device until the precise thickness of the ridge structure etching is achieved, thereby avoiding the problem of material waste and excessive etching caused by the inability to continue the etching correction due to conventional etching correction, and the etching rate can be obtained after the aforementioned etching treatment, which can be used as a reference for etching correction to improve etching efficiency. In addition, since the actual thinning amount of the protective layer 3 can be obtained in the process of obtaining the above-mentioned precise etching depth, the appropriate thickness of the protective layer 3 can be determined according to the thinning amount during subsequent product processing, and there is no need to blindly thicken the protective layer 3 for safety reasons, which helps to reduce material costs and improve production efficiency.

In an optional embodiment, in step S108, based on the thickness difference, etching correction is performed on the side of the protective layer 3 away from the first structural layer 1 until the actual thickness of the ridge structure is equal to the preset target thickness, and further includes: step S109, removing the protective layer 3.

When the actual thickness of the ridge structure after etching correction is equal to the preset target thickness, the protective layer 3 is removed to obtain a semiconductor device with a precise etching depth, as shown in FIG5 .

In an optional implementation, in the step S106 of measuring the sum of the thicknesses of the protective layer 3 and the ridge structure, a step meter is used to measure the sum of the thicknesses of the protective layer 3 and the ridge structure.

The step profiler can be used to measure the thickness, and can obtain high-precision measurement results, and is also fast, versatile and easy to operate. The operator only needs to place the probe on the step-shaped structure, that is, the groove in this embodiment, and the step profiler will automatically calculate the total thickness of the raised ridge structure and the protective layer 3, without the need for a complicated calibration process.

In an optional implementation, the step S108 of performing etching correction on the side of the protective layer 3 away from the first structural layer 1 based on the thickness difference includes repeating steps S104 to S108 for multiple times.

In this embodiment, etching treatment - step profiler measurement - correction of etching time are repeated multiple times on a sample to be etched to achieve accurate correction of etching depth and obtain a precise ridge structure; multiple corrections are performed on the same sample to be etched to avoid cost waste while ensuring etching accuracy and improving etching correction efficiency.

As shown in FIG. 6 to FIG. 8 , the step S101 of pre-obtaining the thinning amount of the protective layer 3 per unit time during dry etching includes:

Step S1011 , providing a test structure layer 10 .

As shown in FIG. 6 , illustratively, the test structure layer 10 can be made of the same material and size as the first structure layer 1 , but can be fragments or broken pieces, which does not affect the test accuracy of the thinning amount of the protective layer 3 and can also save costs.

Step S1012 , providing a protection layer 3 on one side surface of the test structure layer 10 .

As shown in FIG. 7 , the protective layer 3 in the test step and the protective layer 3 in the overshoot of the formal etching process are made of the same material, so as to realize the same test of the thinning amount of the protective layer 3 in this embodiment.

Step S1013 , measuring and obtaining the sum of the initial thicknesses of the protection layer 3 and the test structure layer 10 .

Similarly, in this embodiment, a step profiler is used in the test step to accurately measure the sum of the initial thicknesses of the protective layer 3 and the test structure layer 10. Of course, it is not excluded to use other equipment for measurement.

Step S1014 , performing an etching process for 1 min on the side of the protection layer 3 facing away from the test structure layer 10 .

The etching time in units of minutes is directly used for testing, which is convenient for saving calculation time. After etching, a schematic diagram of the thinned protection layer 3 and the test structure layer 10 as shown in FIG. 8 is obtained.

Step S1015 , measuring the total thickness of the protection layer 3 and the test structure layer 10 after the etching process.

Similarly, a step profiler can be used to accurately measure the combined thickness of the treated protection layer 3 and the test structure layer 10 .

Step S1016, comparing the total initial thickness of the protection layer 3 and the test structure layer 10 with the total thickness of the protection layer 3 and the test structure layer 10 after etching, to obtain the etching thinning amount of the protection layer 3 per unit time.

Since the etching time is selected as 1 min, the obtained thickness difference is the etching thinning amount of the protective layer 3 per unit time.

The thinning amount of the protective layer 3 per unit time is obtained by pre-importing the test steps, which avoids the problem of inaccurate testing caused by the different sizes of the samples to be etched affecting the etching load effect. The etching load effect refers to the effect of a decrease in etching rate or uneven distribution caused by the consumption of local etching gas being greater than the supply.

In this embodiment, the first structural layer 1 includes one or more of silicon, gallium arsenide, indium phosphide, gallium nitride, and silicon carbide.

In the optimization method of the dry etching process of this embodiment, a first structure layer 1 of a variety of materials can be selected as a substrate for precise dry etching. The first structure layer 1 of each material is universally applicable to the second structure layer 2 formed thereon as the etching treatment object, and there is no situation where the second structure layer 2 of a certain material cannot be applied. That is, when the first structure layer 1 is used as a substrate, the first structure layer 1 is suitable for forming an epitaxial structure of any material as the second structure layer 2 to be etched, and has a wide range of applications.

In an optional implementation, the test structure layer 10 is the same size as the first structure layer 1 ; the test structure layer 10 is the same structure as the first structure layer 1 ; or the test structure layer 10 is different from the first structure layer 1 .

That is to say, in the test step, a first structural layer 1 of the same size as that used in the formal etching can be used, but the structure of the first structural layer 1 may be different. The structure here may include material or surface characteristics or performance characteristics. Specifically, the test structural layer 10 in the test step of this embodiment can be made of cheaper materials than the first structural layer 1 used in the formal etching, or fragments with damaged surfaces can be selected to save costs.

In an optional embodiment, step S103 of preparing the protective layer 3 on the side of the second structural layer 2 facing away from the first structural layer 1 includes:

S1031 , covering the initial protective layer 3 on the surface of the second structural layer 2 which is away from the first structural layer 1 .

As shown in FIG. 9 , the initial protective layer 3 covers the entire surface of the first structural layer 1 .

S1032 , disposing a mask layer 4 on a surface of the initial protection layer 3 facing away from the first structure layer 1 , wherein the mask layer 4 includes a pattern region exposing a portion of the protection layer 3 , and the pattern region corresponds to a second target region of the second structure layer 2 .

As shown in Fig. 10, the mask layer 4 partially covers the initial protection layer 3, and the mask layer 4 exposes the initial protection layer 3 that needs to be etched, and protects the part that does not need to be etched. The area of the initial protection layer 3 that needs to be etched corresponds to the part of the second structural layer 2 that needs to be etched.

S1033 , etching the initial protection layer 3 on one side of the mask layer 4 to form a protection layer 3 corresponding to the first target area of the second structure layer 2 .

As shown in FIG. 11 , the mask layer 4 is used as a mask to perform photolithography to form a protection layer 3 that partially covers the second structure layer 2 .

Afterwards, after removing the mask layer 4, the second structural layer 2 is etched using the protective layer 3 as a mask, and the precise thickness of the ridge structure is obtained by obtaining the actual thinning amount of the protective layer 3. Then, on the same sample to be etched, the protective layer 3 continues to be used as a mask to perform precise etching correction on the ridge structure. The calibration efficiency is high, which helps to save costs.

In this embodiment, the protective layer 3 includes: photoresist, or dielectric material, or hard metal material; wherein the dielectric material includes silicon dioxide or silicon nitride, and the hard metal material includes one or more of chromium, titanium, and nickel. That is, the protective layer 3 of this embodiment is suitable for any etching mask material, and has a wide range of selection, which is conducive to wide application.

In this embodiment, in step S104 of performing etching on the side of the protection layer 3 facing away from the first structure layer 1 , the dry etching method includes inductively coupled plasma etching, reactive ion etching, or atomic layer etching.

In this embodiment, there is no limitation on the equipment and method of dry etching, and it can be applied to a variety of equipment. Inductively coupled plasma (ICP) etching method produces high ion density, good etching uniformity, high etching sidewall verticality and good finish, and is widely used in semiconductor process technology; Reactive ion etching (RIE) uses an ion beam of reactive gas to cut the chemical bonds of the substance, so that it produces low molecular weight substances, which are volatilized or released from the board surface for removal. Reactive ion etching has good morphology control ability (anisotropy), high selectivity and high etching rate; Atomic layer etching (ALE) removes materials layer by layer at the atomic scale by recycling to form a self-limiting surface modification layer and selectively remove it. ALE technology has the advantages of precise etching control, good uniformity, and small load effect.

Furthermore, in step S104 of etching the side of the protective layer 3 away from the first structural layer 1, the etching time is less than or equal to 1 minute. The initial etching time is usually shorter to ensure the etching rate and avoid excessive etching resulting in waste.

In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims (10)

1. A method for optimizing a dry etching process, comprising: Step S101, pre-obtaining the thinning amount of the protective layer per unit time during dry etching; Step S102, providing a sample to be etched, wherein the sample to be etched includes a first structural layer and a second structural layer located on a surface of one side of the first structural layer; Step S103, preparing a protective layer on a side of the second structural layer facing away from the first structural layer, wherein the protective layer shields the first target area of the second structural layer and exposes the second target area of the second structural layer; Step S104, performing an etching process on a side of the protective layer away from the first structural layer to form a groove on the second target area of the second structural layer and a ridge structure on the first target area of the second structural layer; Step S105, obtaining an actual thinning amount of the protective layer during the etching process according to the etching process time and the thinning amount of the protective layer per unit time during dry etching; and obtaining a remaining thickness of the protective layer according to the initial thickness of the protective layer and the actual thinning amount of the protective layer during the etching process; Step S106, measuring the sum of the thicknesses of the protective layer and the ridge structure, and obtaining the actual thickness of the ridge structure according to the remaining thickness of the protective layer; Step S107, comparing the actual thickness of the ridge structure with a preset target thickness to obtain a thickness difference; Step S108: Based on the thickness difference, performing etching correction on the side of the protection layer away from the first structural layer until the actual thickness of the ridge structure is equal to the preset target thickness. 2. The method for optimizing the dry etching process according to claim 1 is characterized in that in the step S106 of measuring the total thickness of the protective layer and the ridge structure, a step meter is used to measure the total thickness of the protective layer and the ridge structure. 3. The method for optimizing the dry etching process according to claim 2 is characterized in that, in the step S108 of performing etching correction on the side of the protective layer away from the first structural layer based on the thickness difference, it includes repeating steps S104 to S108 multiple times. 4. The method for optimizing the dry etching process according to claim 1, wherein the step S101 of pre-obtaining the amount of thinning of the protective layer per unit time during dry etching comprises: Provides test structure layer; Disposing a protective layer on one side surface of the test structure layer; Measure and obtain the sum of the initial thicknesses of the protective layer and the test structure layer; Performing an etching process for 1 min on a side of the protective layer away from the test structure layer; Measuring the sum of the thickness of the protective layer and the test structure layer after etching; The total initial thickness of the protective layer and the test structure layer is compared with the total thickness of the protective layer and the test structure layer after etching to obtain the etching thinning amount of the protective layer per unit time. 5 . The method for optimizing a dry etching process according to claim 4 , wherein the first structural layer comprises one or more of silicon, gallium arsenide, indium phosphide, gallium nitride, and silicon carbide. 6. The method for optimizing the dry etching process according to claim 5 is characterized in that the test structure layer is the same size as the first structure layer; the test structure layer is the same structure as the first structure layer, or the test structure layer is different from the first structure layer. 7. The method for optimizing a dry etching process according to claim 1, wherein the step S103 of preparing a protective layer on a side of the second structural layer away from the first structural layer comprises: Covering an initial protective layer on a surface of the second structural layer facing away from the first structural layer; Disposing a mask layer on a surface of the initial protective layer facing away from the first structural layer, the mask layer comprising a pattern area exposing a portion of the protective layer, the pattern area corresponding to the second target area of the second structural layer; The initial protection layer is etched on one side of the mask layer to form a protection layer corresponding to the first target area of the second structure layer. 8. The method for optimizing the dry etching process according to claim 1 is characterized in that the protective layer comprises: photoresist, or dielectric material, or hard metal material; the dielectric material comprises silicon dioxide or silicon nitride, and the hard metal material comprises one or more of chromium, titanium, and nickel. 9. The method for optimizing the dry etching process according to claim 1 is characterized in that in the step S104 of etching the side of the protective layer away from the first structural layer, the dry etching method includes inductively coupled plasma etching, reactive ion etching, or atomic layer etching. 10 . The method for optimizing a dry etching process according to claim 1 , wherein in the step S104 of performing etching on a side of the protective layer away from the first structural layer, the etching time is less than or equal to 1 minute.