CN118862814B - A power supply network design method, system and chip - Google Patents
A power supply network design method, system and chip Download PDFInfo
- Publication number
- CN118862814B CN118862814B CN202411319736.5A CN202411319736A CN118862814B CN 118862814 B CN118862814 B CN 118862814B CN 202411319736 A CN202411319736 A CN 202411319736A CN 118862814 B CN118862814 B CN 118862814B
- Authority
- CN
- China
- Prior art keywords
- design
- power supply
- winding
- supply network
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000013461 design Methods 0.000 title claims abstract description 240
- 238000000034 method Methods 0.000 title claims abstract description 49
- 239000002184 metal Substances 0.000 claims abstract description 91
- 238000004804 winding Methods 0.000 claims abstract description 87
- 238000009826 distribution Methods 0.000 claims description 9
- 230000008569 process Effects 0.000 claims description 9
- 238000012360 testing method Methods 0.000 claims description 6
- 238000012938 design process Methods 0.000 claims description 2
- 238000005457 optimization Methods 0.000 description 11
- 230000006870 function Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 230000004075 alteration Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/394—Routing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/396—Clock trees
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The application relates to the field of power supply network design, and discloses a power supply network design method, a system and a chip, wherein the method comprises the steps of carrying out metal wire design on the basis of an initialized power supply network; and adding a through hole design on the basis of the winding design to obtain the complete design of the power supply network. The application reduces the occupation of the memory of the computer and further reduces the running time consumed by the design flow by adjusting the sequence of the step of realizing the through hole design in the design flow.
Description
Technical Field
The application relates to the field of power supply network design, in particular to a power supply network design method, a system and a chip.
Background
In digital integrated circuits, power is supplied to functional devices. The power supply network is designed as a stacked wire structure to ensure that the individual components in the electronic device are able to obtain a stable and proper supply of power. The metal wires can be divided into signal wires, power wires, ground wires and the like according to functions thereof, and are used for connecting different logic units and modules, so that effective transmission of signals and power is ensured. And every two layers are connected by a through hole with a certain interval. The layout of the metal lines and vias affects the efficient distribution and management of power.
The digital integrated circuit is continuously developed, the size of the device is smaller, the effective devices in unit area are more and more, the working frequency of the chip is higher and more, the power consumption of unit area consumption is larger and more, the power connection is required to be stronger, and in addition, the scale of the chip is also continuously increased, so that the whole area is larger and larger. Thus, the number and density of metal lines and vias in a power network increases. This results in a power network design that requires re-routing of metal lines and vias each time an optimization or tuning scheme is performed, which takes a long time to run, and is inefficient.
Disclosure of Invention
In order to solve the technical problems, the application provides a power supply network design method, a system and a chip, which greatly reduce the occupation of a computer memory and obviously reduce the whole operation time by adjusting the sequence of the step of realizing the complete power supply ground through hole in a design flow.
Specifically, the technical scheme of the application is as follows:
In a first aspect, the application discloses a power supply network design method, comprising the steps of designing a metal wire on the basis of an initialized power supply network;
according to a preset design rule, carrying out clock tree layout and signal winding design on the basis of the metal wire design;
And adding a through hole design on the basis of the winding design to obtain the complete design of the power supply network.
In some embodiments, the metal wire design is performed on the basis of the initialized power network, and the method comprises the following steps:
Constructing a multilayer metal structure based on the initialized power supply network;
Each layer of metal structure comprises a plurality of metal wires which are arranged in parallel, and projections of the metal wires of two adjacent layers on the bottom surface are vertically intersected;
designing the level of the multi-layer metal structure and designing the length, width, height and position distribution of the metal wire.
In some embodiments, initializing the power supply network is preceded by wire design on the basis of the initialized power supply network;
The method specifically comprises the steps of setting the size of the power supply network and the position of a power supply interface;
And determining the design requirement of the power supply network and the connection relation between the power supply network and each device.
In some embodiments, the clock tree layout and the signal winding design are performed on the basis of the metal wire design according to a preset design rule, and the method comprises the following steps:
Setting the layout of the individual devices in the power supply network by means of an EDA tool;
designing a clock tree of the power supply network to ensure that clock signals can be uniformly distributed to all required devices;
signal winding is carried out according to DRC design rules and the devices and pin positions on the devices;
And after winding is completed, testing and optimizing the winding design of the power supply network so as to ensure that the power supply network meets the design requirement.
In some embodiments, the adding a through hole design based on the winding design includes the following steps:
constructing a parallel database of the metal wire design while performing wire winding design;
designing through holes on the basis of the parallel database, wherein the design comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes;
reading in the specified format file on the basis of the winding design so as to realize the through hole design on the basis of the winding design.
In some embodiments, the adding a through hole design based on the winding design includes the following steps:
After the winding design is completed, the through hole design is directly carried out on the basis of the winding design, and the through hole design comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes.
In a second aspect, the present application further discloses a power network design system, configured to implement the power network design method described in any one of the foregoing embodiments, including:
the metal wire design module is used for carrying out metal wire design on the basis of the initialized power supply network;
The winding design module is used for carrying out clock tree layout and signal winding design on the basis of the metal wire design according to a preset design rule;
And the through hole design module is used for adding the through hole design on the basis of the winding design to obtain the complete design of the power supply network.
In some embodiments, the winding design module specifically includes:
A layout sub-module for setting the layout of the individual devices in the power supply network by means of an EDA tool;
The clock tree submodule is used for designing a clock tree of the power supply network and ensuring that clock signals can be uniformly distributed to all needed devices;
the winding submodule is used for conducting signal winding according to DRC design rules and the devices and pin positions on the devices;
And the optimizing sub-module is used for testing and optimizing the winding design of the power supply network after winding is completed so as to ensure that the power supply network meets the design requirement.
In some embodiments, the through hole design module is used for constructing a parallel database of the metal wire design while the wire winding design module executes wire winding design, carrying out through hole design on the basis of the parallel database, including the distance of designed through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes;
or the through hole design module is also used for directly carrying out the through hole design on the basis of the winding design after the winding design is finished, and comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes.
In a third aspect, the present application discloses a chip at least including a power network structure designed by the power network design method described in any one of the above embodiments.
Compared with the prior art, the application has at least one of the following beneficial effects:
The application saves the time required for realizing the complete through hole design of the power ground when the subsequent steps wait for the establishment of the power network in each round of optimization iteration by adjusting the sequence of the step of realizing the complete through hole of the power ground in the whole flow. Because the database of the process from automatic layout to wire-wound optimization does not contain a large amount of complete through hole information of power supply, the total amount of the whole database is reduced, the memory required by a computer for running the steps is saved, and the running time of each step is further reduced.
Drawings
The above features, technical features, advantages and implementation of the present application will be further described in the following description of preferred embodiments with reference to the accompanying drawings in a clear and easily understood manner.
FIG. 1 is a schematic diagram of a power network structure as is conventional in the art;
FIG. 2 is a diagram showing the effect of power network design in the prior art;
FIG. 3 is a flowchart illustrating steps of an embodiment of a power network design method according to the present application;
FIG. 4 is a diagram illustrating the design of a power network according to an embodiment of the present application;
FIG. 5 is a flowchart illustrating steps of another embodiment of a power network design method according to the present application;
FIG. 6 is a flowchart illustrating steps of another embodiment of a power network design method according to the present application;
FIG. 7 is a block diagram illustrating an embodiment of a power network design system according to the present application.
Reference numerals:
10-metal wire, 20-through hole, 30-device, 40-pin and 50-signal wire.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
For simplicity of the drawing, only the parts relevant to the invention are schematically shown in each drawing, and they do not represent the actual structure thereof as a product. Additionally, in order to simplify the drawing for ease of understanding, components having the same structure or function in some of the drawings are shown schematically with only one of them, or only one of them is labeled. Herein, "a" means not only "only this one" but also "more than one" case.
It should be further understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
In this context, unless explicitly stated or limited otherwise, the terms "mounted," "connected," "coupled," and "connected" are to be construed broadly, and may, for example, be fixedly connected, detachably connected, or integrally connected, mechanically connected, electrically connected, directly connected, indirectly connected via an intervening medium, or communicate between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
In particular implementations, the terminal devices described in embodiments of the present application include, but are not limited to, other portable devices such as mobile phones, laptop computers, home teaching machines, or tablet computers having touch-sensitive surfaces (e.g., touch screen displays and/or touchpads). It should also be appreciated that in some embodiments, the terminal device is not a portable communication device, but rather a desktop computer having a touch-sensitive surface (e.g., a touch screen display and/or a touch pad).
In addition, in the description of the present application, the terms "first," "second," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following description will explain the specific embodiments of the present application with reference to the accompanying drawings. It is evident that the drawings in the following description are only examples of the application, from which other drawings and other embodiments can be obtained by a person skilled in the art without inventive effort.
A power network (Power Distribution Network, PDN for short) is a key component in an electronic system that is responsible for distributing power from a power supply (e.g., a battery or power adapter) to various parts of the system, including the processor, memory, input/output interface, etc., electronic components. The design of the power supply network is critical to ensure the performance, stability and reliability of the electronic device.
The power supply network is designed into a laminated metal wire structure, which is formed by transferring metal wires from the top layer to the bottom layer in a mutually perpendicular direction, wherein every two layers of metal wires are connected by a through hole with a certain interval, and the power supply network is shown in figure 1 referring to the specification, wherein the power supply structure is formed by a layer of metal wires 10 and through holes 20, every two layers of adjacent metal wires 10 are mutually perpendicular, and the through holes 20 are connected with the adjacent two layers of metal wires.
In digital integrated circuits, in order to supply power to functional devices, the structure of the power supply network needs to be designed to meet different power supply requirements. In the conventional digital physical design process, all metal lines and vias of the power supply ground are generally implemented at the beginning of the whole design, and then the subsequent layout and wiring process is continued. The design effect is shown in the attached figure 2 of the specification.
The digital integrated circuit is continuously developed, the size of the device is increasingly smaller, the effective devices in a unit area are increasingly more and more, the working frequency of a chip is higher and more power consumption is increased in unit area, so that power connection is required to be stronger, metal wires and through holes of the power ground in unit area are increased, the scale of the chip is also continuously increased, the whole area is also continuously increased, the number of wires and through holes in a design is greatly increased, particularly the number of through holes is very large, for example, in a 2000um module, the number of through holes is 1.5e6, and in a global 20mm chip, the number of through holes is 1.5e8.
Because the number of through holes is very large, when the power supply network is built, if all the through holes are completely realized each time, the power supply network needs to take a long time, the scheme is required to be continuously adjusted and optimized in the early stage of the physical design of the chip, the above process is required to be repeated for a plurality of times, and the time for realizing the through holes is required to be repeatedly consumed in the middle optimization process each time, so that the design efficiency is reduced.
In addition, each step needs to be operated on the previous database when the flow of the layout wiring is performed later. This results in the data base being kept in motion during subsequent operations, which stores information about the metal line and via designs, and each EDA tool step occupies a large amount of computer memory when reading the entire design data base, which further results in longer running times for each step after the power network is built, which is a significant challenge for the larger chip scale at present, both computer memory and overall running time.
The application aims to greatly reduce the occupation of the memory of a computer and obviously reduce the overall operation time by adjusting the sequence of the step of realizing the complete power ground through hole in the whole flow under the condition of ensuring that the final result of the physical design of the digital integrated circuit is consistent.
Referring to fig. 3 of the specification, an embodiment of a power network design method provided by the present application includes the following steps:
and S100, designing metal wires on the basis of the initialized power supply network.
The method comprises the steps of constructing a multi-layer metal structure based on an initialized power supply network, wherein each layer of metal structure comprises a plurality of metal wires which are arranged in parallel, projections of the metal wires of two adjacent layers on the bottom surface are vertically intersected, designing a hierarchy of the multi-layer metal structure, and designing length, width, height and position distribution of the metal wires.
In designing a metal wire, the size, distribution density, pitch and the like of the metal wire need to be considered, and the width of the metal wire needs to be determined according to the current that needs to be carried. The larger the current, the larger the required metal line width should be to reduce resistance and voltage drop. The distribution density and the spacing of the metal wires are determined by DRC (DesignRuleCheck) rules, and the size of the set spacing is directly related to the performance and the reliability of the power supply network.
S200, performing clock tree layout and signal winding design on the basis of the metal wire design according to a preset design rule.
And S300, adding a through hole design on the basis of the winding design to obtain the complete design of the power supply network.
In particular, referring to fig. 2, in a digital integrated circuit, a power supply network provides power to a device 30 having various logic functions. To perform the chip function, the pins 40 of the various devices 30 need to be connected by signal lines 50. The design of the signal winding needs to rely on the layout of the metal wire 10, wherein the metal wire 10 and the via 20 of the power supply ground and the signal wire 50 cannot be overlapped at the same physical position in the same layer, otherwise, the circuit is short-circuited, resulting in serious functional errors. The metal wire 10 of the power supply network is actually required to be implemented as the first step after the design initialization is completed, because the metal wire 10 of the chip power supply network needs to occupy the used physical position, and the metal wire 10 or the unset through hole 20 cannot be overlapped at the same position in the same layer when the step of signal winding is executed subsequently;
Take the adjacent upper layer metal line and the next layer metal line as examples. In designing the via holes 20 of the two-layer metal lines 10, it is necessary to consider not only the size information of the via holes 20 but also the information of the two-layer metal lines 10 to which the via holes 20 are connected. The location of the via design is typically where the upper level metal line crosses the lower level metal line. Based on the above rule, we can require the step of performing signal winding in advance without laying out the signal line 50 at the place where the metal lines cross. Then, in designing the power network, it is possible to add the via 20 required for the power ground after the entire signal line design is completed, so that there is no influence on the design. And after the application is improved, the database used in the signal winding step is not required to carry a large amount of physical information of the through holes 20, so that the memory and the running time required by a computer are reduced.
In correspondence with the steps in fig. 3, the design effect in this embodiment is shown in fig. 4, which refers to the implementation of the complete metal wire 10 in the design of the power network (power ground), the signal winding and optimization are performed on the basis of the metal wire 10 in the second step, and finally the complete through hole 20 is added after the winding.
Another embodiment of the power network design method of the present application, as shown in fig. 5 of the specification, further includes a step S010 of initializing the power network before executing step S100.
The method specifically comprises the steps of setting the size of the power supply network and the position of a power supply interface, and determining the design requirement of the power supply network and the connection relation between the power supply network and each device.
Preferably, the power network is initialized, and the designer needs to define the power network, including the definition of global power and the setting of connection relation.
Another embodiment of a power network design method of the present application, as shown in fig. 5 of the specification, is based on one embodiment of the method, the step S200 includes the following sub-steps:
s210, automatic layout, namely setting the layout of each device in the power supply network by means of an EDA (Electronic Design Automation ) tool.
Specifically, in the automatic layout stage, the circuit components are automatically placed using tools according to design rules and constraints. This step is a critical part of the automation of the physical design, but requires ensuring the connectivity and integrity of the power network.
S220, clock tree synthesis, namely designing a clock tree of the power supply network, and ensuring that clock signals can be uniformly distributed to all needed devices.
In particular, clock tree synthesis is to ensure that the clock signal is evenly distributed across all required circuit portions. It is necessary to define the root and nodes of the clock and use special tools to balance the clock tree to optimize the clock delay.
And S230, automatically winding, namely performing signal winding according to DRC design rules and the devices and pin positions on the devices.
In particular, automatic winding is the connection of the various parts of the power supply network through signal lines, which is typically done automatically by the EDA tool according to layout and power requirements. Preferably, the DRC (DesignRuleCheck) rule may need to be followed in this step as a design specification for semiconductor process fabrication to ensure that the patterns and layouts used in the chip design meet the requirements of the fabrication process.
And S240, performing design optimization, namely performing test optimization on the winding design of the power supply network after winding is completed so as to ensure that the power supply network meets the design requirement.
Specifically, after winding is completed, optimization is required to ensure that the performance of the power supply network meets the design requirements. Design optimization this step includes wire routing capability optimization, wire width adjustment, addition of decoupling capacitors, optimization of power ring layout, etc., to reduce voltage drop and improve signal integrity.
Another embodiment of a power network design method of the present application is shown in fig. 5 of the specification. On the basis of one embodiment of the above method, the step S300 shown includes the following steps:
S310, after the winding design is completed, directly performing through hole design on the basis of the winding design.
Preferably, the through hole design includes designing the pitch of the through holes, the density of the through holes, the size of the through holes, and the connection relation of the through holes.
Specifically, the position of the through hole (via) is located at the position where the metal wire of the upper layer is intersected with the metal wire of the lower layer, but not every intersection position is necessarily provided with a through hole, and when the through hole is designed, the width and the interval of the metal wires of each layer need to be considered so as to ensure reasonable current distribution among the layers and avoid the insufficient power supply capability of a certain layer.
In this embodiment, although the step of designing the through hole is put to the final implementation, the operation pressure of the database can be relieved, and still it takes a long time to implement the through hole design finally.
Based on this, in another implementation manner of this embodiment, a working window may be newly created while the winding design is performed, so as to implement synchronous signal winding and through hole design, and thus, the running time of the process may be saved to the greatest extent. And the working efficiency is improved. Reference is made to figure 6 of the accompanying description.
Specifically, in this embodiment, the step S300 includes the steps of:
s320, constructing a parallel database of the metal wire design while executing the wire winding design.
S321, designing through holes on the basis of the parallel database, wherein the through hole design comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes, and writing related through hole information into a specified format file.
S322, reading in the specified format file on the basis of the winding design so as to realize through hole design on the basis of the winding design.
Specifically, in the process of performing the wire winding design after the metal wire design is implemented in this embodiment, S320 is implemented by opening the database of the metal wire design in parallel, and making a complete through hole for adding power. The effect of realizing the through hole of the power ground is consistent with that of realizing the through hole after the wire winding is designed, then the physical information of the through hole of the power ground which is realized in the parallel database is written out by using a file DEF (Design Exchange Format ) which is standard in the integrated circuit industry in the step S321, and finally the through hole of the power ground is realized by reading in the DEF file and adding the through hole of the power ground in the wire winding design database, wherein the time required for reading the DEF to realize the through hole of the power ground is very short in the step S322, so that the time for executing the part of the through hole design can be saved through parallelism.
Based on the same technical conception, the application also discloses a power supply network design system which can be used for realizing any one of the power supply network design methods, and specifically, the embodiment of the power supply network design system comprises the following components:
the metal wire design module is used for carrying out metal wire design on the basis of the initialized power supply network;
The winding design module is used for carrying out clock tree layout and signal winding design on the basis of the metal wire design according to a preset design rule;
And the through hole design module is used for adding the through hole design on the basis of the winding design to obtain the complete design of the power supply network.
In another embodiment of the power network design system provided by the present application, on the basis of the above system embodiment, the metal wire design module specifically includes:
In another embodiment of the present application, on the basis of the above system embodiment, the power network design system further includes:
and the initialization module is used for initializing the power supply network.
The method specifically comprises the steps of setting the size of the power supply network and the position of a power supply interface, and determining the design requirement of the power supply network and the connection relation between the power supply network and each device.
The metal wire design module is specifically used for constructing a multi-layer metal structure based on an initialized power network. Each layer of metal structure comprises a plurality of metal wires which are arranged in parallel, and projections of the metal wires of two adjacent layers on the bottom surface are vertically intersected. Designing the level of the multi-layer metal structure and designing the length, width, height and position distribution of the metal wire.
In another embodiment of the power network design system provided by the present application, referring to fig. 7 of the specification, on the basis of the above system embodiment, the winding design module specifically includes:
A layout sub-module for setting the layout of the individual devices in the power supply network by means of an EDA tool;
The clock tree submodule is used for designing a clock tree of the power supply network and ensuring that clock signals can be uniformly distributed to all needed devices;
the winding submodule is used for conducting signal winding according to DRC design rules and the devices and pin positions on the devices;
And the optimizing sub-module is used for testing and optimizing the winding design of the power supply network after winding is completed so as to ensure that the power supply network meets the design requirement.
In another embodiment of the power network design system provided by the present application, on the basis of the above system embodiment, the through hole design module is configured to construct a parallel database of the metal wire design while the wire design module performs wire design; the method comprises the steps of carrying out through hole design on the basis of the parallel database, wherein the through hole design comprises the steps of designing the distance between through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes;
or the through hole design module is also used for directly carrying out the through hole design on the basis of the winding design after the winding design is finished, and comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes.
The power network structure designed by the power network design method described in any of the above embodiments should also be within the scope of the present application based on the same concept. Likewise, at least one chip comprising a power network structure designed by the power network design method described in any of the above embodiments should also be within the scope of the present application.
The power network design method, system and chip of the present application have the same technical concept, and the technical details of the two embodiments are mutually applicable, so that repetition is reduced, and no description is repeated here.
It will be apparent to those skilled in the art that the above-described program modules are only illustrated in the division of the above-described program modules for convenience and brevity, and that in practical applications, the above-described functional allocation may be performed by different program modules, i.e., the internal structure of the apparatus is divided into different program units or modules, to perform all or part of the above-described functions. The program modules in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one processing unit, where the integrated units may be implemented in a form of hardware or in a form of a software program unit. In addition, the specific names of the program modules are also only for distinguishing from each other, and are not used to limit the protection scope of the present application.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (10)
1. The power supply network design method is characterized by comprising the following steps of:
carrying out metal wire design on the basis of an initialized power supply network;
According to a preset design rule, carrying out clock tree layout and signal winding design on the basis of the metal wire design, wherein in the clock tree layout and signal winding design process, an operating database does not contain through hole information;
and placing the step of through hole design after the step of winding design to reduce the occupation of the memory of a computer and the whole operation time.
2. The power network design method as claimed in claim 1, wherein the metal wire design is performed on the basis of the initialized power network, comprising the steps of:
Constructing a multilayer metal structure based on the initialized power supply network;
Each layer of metal structure comprises a plurality of metal wires which are arranged in parallel, and projections of the metal wires of two adjacent layers on the bottom surface are vertically intersected;
designing the level of the multi-layer metal structure and designing the length, width, height and position distribution of the metal wire.
3. A power network design method according to claim 1 or 2, further comprising initializing the power network before the metal wire design is performed on the basis of the initialized power network;
The method specifically comprises the steps of setting the size of the power supply network and the position of a power supply interface;
And determining the design requirement of the power supply network and the connection relation between the power supply network and each device.
4. The power network design method as set forth in claim 1, wherein the clock tree layout and the signal winding design are performed based on the metal wire design according to a preset design rule, comprising the steps of:
Setting the layout of the individual devices in the power supply network by means of an EDA tool;
designing a clock tree of the power supply network to ensure that clock signals can be uniformly distributed to all required devices;
signal winding is carried out according to DRC design rules and the devices and pin positions on the devices;
And after winding is completed, testing and optimizing the winding design of the power supply network so as to ensure that the power supply network meets the design requirement.
5. The power network design method as set forth in claim 1, wherein said adding a via design based on said database of completed said wire-wound designs comprises the steps of:
constructing a parallel database of the metal wire design while performing wire winding design;
designing through holes on the basis of the parallel database, wherein the design comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes;
reading in the specified format file on the basis of the winding design so as to realize the through hole design on the basis of the winding design.
6. The power network design method as set forth in claim 1, wherein said adding a via design based on said database of completed said wire-wound designs comprises the steps of:
After the winding design is completed, the through hole design is directly carried out on the basis of the database of the winding design, wherein the through hole design comprises the steps of designing the distance of the through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes.
7. A power supply network design system for implementing the power supply network design method of any one of claims 1-6, comprising:
the metal wire design module is used for carrying out metal wire design on the basis of the initialized power supply network;
The wire winding design module is used for carrying out clock tree layout and wire winding design of signals on the basis of the metal wire design according to a preset design rule, wherein an operating database does not contain through hole information in the process of the clock tree layout and the wire winding design of the signals;
And the through hole design module is used for adding the through hole design on the basis of completing the database of the winding design to obtain the complete design of the power supply network, and the step of through hole design is placed after the step of winding design so as to reduce the occupation of the memory of the computer and the whole operation time.
8. The power network design system of claim 7, wherein the wire-wound design module comprises:
A layout sub-module for setting the layout of the individual devices in the power supply network by means of an EDA tool;
The clock tree submodule is used for designing a clock tree of the power supply network and ensuring that clock signals can be uniformly distributed to all needed devices;
the winding submodule is used for conducting signal winding according to DRC design rules and the devices and pin positions on the devices;
And the optimizing sub-module is used for testing and optimizing the winding design of the power supply network after winding is completed so as to ensure that the power supply network meets the design requirement.
9. A power network design system, as set forth in claim 7, wherein:
The wire winding design module is used for carrying out wire winding design and constructing a parallel database of the metal wire design, carrying out the wire winding design on the basis of the parallel database, wherein the wire winding design module comprises a distance between designed holes, a density of the holes, a size of the holes and a connection relation of the holes;
Or, the through hole design module is further used for directly carrying out through hole design on the basis of the database of the winding design after the winding design is completed, and the through hole design module comprises the space of designed through holes, the density of the through holes, the size of the through holes and the connection relation of the through holes.
10. A chip comprising a power network structure designed by the power network design method according to any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411319736.5A CN118862814B (en) | 2024-09-23 | 2024-09-23 | A power supply network design method, system and chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411319736.5A CN118862814B (en) | 2024-09-23 | 2024-09-23 | A power supply network design method, system and chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN118862814A CN118862814A (en) | 2024-10-29 |
| CN118862814B true CN118862814B (en) | 2025-01-21 |
Family
ID=93171681
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202411319736.5A Active CN118862814B (en) | 2024-09-23 | 2024-09-23 | A power supply network design method, system and chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN118862814B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116522857A (en) * | 2023-07-03 | 2023-08-01 | 上海韬润半导体有限公司 | Method and system for selecting optimal power supply network scheme |
| CN116757144A (en) * | 2023-07-07 | 2023-09-15 | 上海韬润半导体有限公司 | Method, system and storage medium for optimizing power supply network and saving winding resources |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040032109A (en) * | 2001-06-08 | 2004-04-14 | 마그마 디자인 오토메이션 인코포레이티드 | Representing the design of a sub-module in a hierarchical integrated circuit design and analysis system |
| JP2008310527A (en) * | 2007-06-13 | 2008-12-25 | Nec Electronics Corp | Layout design apparatus and layout design method for semiconductor integrated circuit |
| CN101908080B (en) * | 2009-06-03 | 2012-06-27 | 复旦大学 | Method for designing power supply network quickly |
| US8745565B2 (en) * | 2009-08-31 | 2014-06-03 | Synopsys, Inc. | Satisfying routing rules during circuit design |
| US10204203B2 (en) * | 2012-12-31 | 2019-02-12 | Synopsys, Inc. | Pattern-based power-and-ground (PG) routing and via creation |
| JP2018028802A (en) * | 2016-08-18 | 2018-02-22 | 岡部株式会社 | Through hole reinforcement design support system of steel beam |
| CN112560384B (en) * | 2020-07-21 | 2024-12-03 | 深圳鸿芯微纳技术有限公司 | A method and system for improving vias using a multi-connected via structure |
| KR20220041280A (en) * | 2020-09-24 | 2022-04-01 | 삼성전자주식회사 | Semiconductor devices |
| US11455454B2 (en) * | 2020-11-24 | 2022-09-27 | Arm Limited | Methods and apparatuses for concurrent coupling of inter-tier connections |
| CN115630606A (en) * | 2022-11-03 | 2023-01-20 | 创视微电子(成都)有限公司 | Wiring method for strengthening power supply |
| CN116504777A (en) * | 2023-03-15 | 2023-07-28 | 北京大学 | Method, device and equipment for detecting integrity of power through-hole connection in integrated circuit |
| CN116663486A (en) * | 2023-05-31 | 2023-08-29 | 叩持(西安)电子信息技术有限公司 | Chip power supply planning method and related device based on PI analysis |
| CN117371382B (en) * | 2023-10-24 | 2024-05-28 | 深圳市合芯数字科技有限公司 | Standard cell layout processing method, device and storage medium |
-
2024
- 2024-09-23 CN CN202411319736.5A patent/CN118862814B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116522857A (en) * | 2023-07-03 | 2023-08-01 | 上海韬润半导体有限公司 | Method and system for selecting optimal power supply network scheme |
| CN116757144A (en) * | 2023-07-07 | 2023-09-15 | 上海韬润半导体有限公司 | Method, system and storage medium for optimizing power supply network and saving winding resources |
Also Published As
| Publication number | Publication date |
|---|---|
| CN118862814A (en) | 2024-10-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112507648B (en) | Layout design method, integrated circuit, operation chip and computing equipment | |
| US6240542B1 (en) | Poly routing for chip interconnects with minimal impact on chip performance | |
| US7600208B1 (en) | Automatic placement of decoupling capacitors | |
| US7100138B2 (en) | Method and apparatus for circuit design | |
| US11030383B2 (en) | Integrated device and method of forming the same | |
| CN101196947A (en) | Circuit design support device and method, and printed circuit board manufacturing method | |
| CN100429664C (en) | Method and apparatus for performing power routing on a voltage island within an integrated circuit chip | |
| US6698000B2 (en) | Semiconductor process parameter determining method, semiconductor process parameter determining system, and semiconductor process parameter determining program | |
| US10360342B2 (en) | Method, system, and storage medium for engineering change order scheme in circuit design | |
| CN103378849A (en) | Method of chip input and output design | |
| CN118862814B (en) | A power supply network design method, system and chip | |
| TW202029415A (en) | Integrated circuit device, method for integrated circuit co-design and method for integrated circuit simulation | |
| CN117291140B (en) | Method and device for reducing winding violations of automatic wiring tool, storage medium and electronic terminal | |
| US7091614B2 (en) | Integrated circuit design for routing an electrical connection | |
| CN113515913A (en) | Magnetic process design method of STT-MRAM related circuit | |
| US8555232B2 (en) | Wire routing using virtual landing pads | |
| CN114365139A (en) | System and method for modeling and simulating on-die capacitors | |
| CN114004190A (en) | Method for multi-level information acquisition and extensible operation based on physical layout | |
| CN114068522B (en) | Method for grid winding of transistor | |
| CN116127891A (en) | Programmable Logic Device Multiplier Module Layout Method, Device, Equipment and Medium | |
| JP3481935B2 (en) | Semiconductor integrated circuit having macro cell and design method thereof | |
| Banker et al. | Physical design tradeoffs for ASIC technologies | |
| JP3028938B2 (en) | Layout method of semiconductor integrated circuit | |
| US6985843B2 (en) | Cell modeling in the design of an integrated circuit | |
| CN106709154A (en) | Method for reducing modification layers during integrated circuit engineering modification |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |