CN118858113B - Collection chamber module and flow cytometry data acquisition system - Google Patents
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Abstract
本发明涉及数据采集技术领域，具体公开了一种采集仓模块和流式细胞数据采集系统，其中，采集仓模块包括多个子板，每个子板均包括第一FPGA及多个模数转换器；母板，与多个子板连接，母板包括第二FPGA、第三FPGA、数据处理模块和内存模块；数据处理模块与第二FPGA和内存模块连接，用于将第二FPGA缓存的有效信号中的光谱数据转存至内存模块中；第三FPGA与第二FPGA和图像数据采集模块连接，用于根据有效信号生成延时触发信号以触发图像数据采集模块运行；该采集仓模块能及时解析出有效信号以同步提取光谱数据和生成延时触发信号，及时驱动图像数据采集模块运行以采集到与光谱数据匹配的图像数据。
The present invention relates to the technical field of data acquisition, and specifically discloses an acquisition chamber module and a flow cell data acquisition system, wherein the acquisition chamber module comprises a plurality of sub-boards, each of which comprises a first FPGA and a plurality of analog-to-digital converters; a motherboard connected to the plurality of sub-boards, the motherboard comprising a second FPGA, a third FPGA, a data processing module and a memory module; the data processing module is connected to the second FPGA and the memory module, and is used for transferring spectral data in a valid signal cached by the second FPGA to the memory module; the third FPGA is connected to the second FPGA and the image data acquisition module, and is used for generating a delayed trigger signal according to the valid signal to trigger the image data acquisition module to run; the acquisition chamber module can timely parse out the valid signal to synchronously extract the spectral data and generate the delayed trigger signal, and timely drive the image data acquisition module to run to acquire image data matching the spectral data.
Description
Technical Field
The application relates to the technical field of data acquisition, in particular to an acquisition bin module and a flow type cell data acquisition system.
Background
The flow cytometry is used as a front technology of cell analysis, and by means of laser-induced fluorescence and the like, the high-efficiency and accurate determination of various characteristics in suspension cells is realized, and the deep research of cell biology is greatly promoted. However, the conventional method is limited by the selectivity of fluorescent dye and the lack of spatial structure information, which promotes the emerging technologies such as spectral flow and image flow. The spectrum flow type improves the data resolution and the information quantity by capturing the whole spectrum of single cells, and the image flow type is combined with the microscopy technology to intuitively display the cell structure, and the two aims to make up the defects of the traditional flow cytometry.
The related technology provides a flow type cell data acquisition system for synchronously acquiring spectrum data and image data, but the system is difficult to realize accurate synchronous alignment of two types of data under the conditions of high speed and high flux, lacks independent acquisition of the two types of data, lacks an timely effective trigger mechanism, and cannot ensure accurate association of the two types of data corresponding to each flow type cell.
In view of the above problems, no effective technical solution is currently available.
Disclosure of Invention
The application aims to provide a collection bin module and a flow type cell data collection system, which are used for timely collecting spectrum data and correspondingly triggering the image data collection module to collect image data, so that the upper computer can perform high-precision sorting of flow type cells.
In a first aspect, the present application provides a collection bin module, which is applied in a flow cytometry data collection system, wherein the flow cytometry data collection system comprises a spectrum data collection module, an image data collection module and an upper computer, and the collection bin module comprises:
each sub-board comprises a first FPGA and a plurality of analog-to-digital converters;
The motherboard is connected with the plurality of daughter boards and comprises a second FPGA, a third FPGA, a data processing module and a memory module;
The plurality of analog-to-digital converters are connected with the first FPGA and the spectrum data acquisition module and are used for converting analog signals provided by the spectrum data acquisition module into digital signals;
The first FPGA is connected with the second FPGA and is used for acquiring an effective signal according to the digital signal and transmitting the effective signal to the second FPGA for caching;
The data processing module is connected with the second FPGA and the memory module and is used for transferring the spectrum data in the effective signals cached by the second FPGA to the memory module;
The data processing module is also connected with the upper computer and is used for finishing and uploading the spectrum data with the preset quantity in the memory module to the upper computer;
The third FPGA is connected with the second FPGA and the image data acquisition module and is used for generating a delay trigger signal according to the effective signal so as to trigger the image data acquisition module to operate.
The acquisition bin module is applied to a flow type cell data acquisition system, can adapt to the high-speed and high-flux characteristics of flow type cells, receives the analog signals generated by the spectrum data acquisition module, timely analyzes effective signals from the analog signals to synchronously extract spectrum data and generate a delay trigger signal for triggering the operation of the image data acquisition module, and timely drives the image data acquisition module to operate by utilizing the delay trigger signal so as to acquire image data matched with the spectrum data, thereby being convenient for an upper computer to carry out high-precision sorting of the flow type cells.
The data processing module is an ARM processor, and the ARM processor transfers the spectrum data in the effective signal cached by the second FPGA to the memory module based on a DMA channel configured by an AXI bus.
In this example, the ARM processor configures the DMA channel to connect the memory module and the second FPGA, so that the spectrum data in the effective signal cached in the second FPGA can be directly copied into the memory module based on the DMA transmission technology, and high-speed extraction and transmission of the spectrum data are realized.
The data processing module is used for processing the spectrum data in the memory module, wherein the process of collecting the bin module comprises the steps of compensating, looping and sorting in sequence.
In this example, the above arrangement can effectively improve the integrity and the validity of the spectrum data acquired by the upper computer.
And the acquisition bin module is used for carrying out threshold deleting processing and amplifying processing on the digital signals by the first FPGA so as to obtain the effective signals.
The process of caching the effective signals by the second FPGA comprises the following steps:
acquiring the effective signal based on the first FPGA transmission;
Performing parallel-to-serial conversion on the effective signals to obtain serial effective signals;
And cutting and aligning the serial effective signals to obtain effective signals conforming to the AXI bus 64-bit format, and caching based on the FIFO.
The acquisition bin module is characterized in that the effective signals comprise forward effective signals and lateral effective signals, the lateral effective signals comprise the spectrum data, and the third FPGA generates the delay trigger signals based on the forward effective signals.
In a second aspect, the application also provides a flow cytometry data acquisition system, which comprises a spectrum data acquisition module, an image data acquisition module, an upper computer and an acquisition bin module provided by the first aspect;
the upper computer is also connected with the spectrum data acquisition module and the image data acquisition module and is used for driving the spectrum data acquisition module to acquire so as to generate the analog signal, and is also used for acquiring the image data acquired by the image data acquisition module and synchronizing and storing the image data and the spectrum data which are tidied and uploaded by the data processing module.
The flow type cell data acquisition system is provided with the acquisition bin module, the acquisition bin module can adapt to the high-speed and high-flux characteristics of the flow type cells, receives the analog signals generated by the spectrum data acquisition module, timely analyzes effective signals from the analog signals to synchronously extract spectrum data and generate delay trigger signals for triggering the operation of the image data acquisition module, and timely drives the image data acquisition module to operate by utilizing the delay trigger signals so as to acquire image data matched with the spectrum data, so that the high-precision sorting of the flow type cells is convenient for an upper computer.
The flow cytometry data acquisition system comprises an image data acquisition module, a control module and a control module, wherein the image data acquisition module comprises a high-speed camera and an AOM driver, and the triggering dead time of the high-speed camera meets the following conditions:
T Dead zone is more than or equal to 1/f, wherein T Dead zone is the trigger dead time, and f is the frame rate of the high-speed camera;
the exposure time of the AOM driver satisfies:
T Exposure to light is less than or equal to L/(F.times.V), wherein T Exposure to light is the exposure time of the AOM driver, L is the pixel size, F is the optical magnification of the image data acquisition module, and V is the flow velocity of the flow cell.
The flow cytometry data acquisition system comprises an acquisition bin module, a host computer, an image data acquisition module and a flow cytometry data acquisition system, wherein the acquisition bin module further comprises a motherboard adapter plate, and the motherboard is connected with the host computer and the image data acquisition module through the motherboard adapter plate.
And the master board adapter plate is provided with an SMA interface, and the SMA interface is connected with the image data acquisition module through a coaxial cable with 50 omega characteristic impedance.
From the above, the application provides a collection bin module and a flow cell data collection system, wherein the collection bin module can adapt to the high-speed and high-flux characteristics of flow cells to receive analog signals generated by a spectrum data collection module, timely analyze effective signals from the analog signals to synchronously extract spectrum data and generate delay trigger signals for triggering the operation of the image data collection module, and timely drive the image data collection module to operate by utilizing the delay trigger signals so as to collect image data matched with the spectrum data, thereby being convenient for a host computer to carry out high-precision sorting of the flow cells.
Drawings
Fig. 1 is a schematic structural diagram of an acquisition bin module according to an embodiment of the present application.
Fig. 2 is a schematic structural diagram of a flow cytometry data acquisition system according to an embodiment of the present application.
The system comprises a reference numeral 100, an acquisition bin module, a 200, a spectrum data acquisition module, a 300, an image data acquisition module, a 400, an upper computer, a 110, a daughter board, a 120, a mother board, a 130, a mother board adapter board, a 111, an analog-to-digital converter, a 112, a first FPGA, a 121, a second FPGA, a 122, a third FPGA, a 123, a data processing module, a 124, a memory module, a 301, a high-speed camera, a 302 and an AOM driver.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present invention and are not to be construed as limiting the present invention.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the description of the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, mechanically connected, electrically connected, or communicable with each other, directly connected, indirectly connected via an intermediary, or in communication between two elements or in an interaction relationship between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the present disclosure, components and arrangements of specific examples are described below. They are, of course, merely examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.
Referring to fig. 1 and 2, some embodiments of the present application provide a collection bin module, which is applied in a flow cytometry data collection system, wherein the flow cytometry data collection system includes a spectrum data collection module 200, an image data collection module 300 and a host computer 400, and the collection bin module includes:
A plurality of sub-boards 110, each sub-board 110 including a first FPGA112 and a plurality of analog-to-digital converters 111;
The motherboard 120 is connected with the plurality of daughter boards 110, and the motherboard 120 comprises a second FPGA121, a third FPGA122, a data processing module 123 and a memory module 124;
the plurality of analog-to-digital converters 111 are connected with the first FPGA112 and the spectrum data acquisition module 200, and are configured to convert analog signals provided by the spectrum data acquisition module 200 into digital signals;
The first FPGA112 is connected with the second FPGA121, and is configured to obtain an effective signal according to the digital signal, and transmit the effective signal to the second FPGA121 for buffering;
The data processing module 123 is connected to the second FPGA121 and the memory module 124, and is configured to transfer the spectrum data in the effective signal buffered by the second FPGA121 to the memory module 124;
The data processing module 123 is further connected to the upper computer 400, and is configured to sort and upload the spectral data of the preset number in the memory module 124 to the upper computer 400;
The third FPGA122 is connected to the second FPGA121 and the image data acquisition module 300, and is configured to generate a delayed trigger signal according to the valid signal to trigger the image data acquisition module 300 to operate.
The flow cytometry data acquisition system is used for acquiring image data and spectrum data of high-speed moving and high-flux flow cytometry, so as to accurately and quantitatively analyze and distinguish the flow cytometry, and is particularly suitable for sorting the flow cytometry, wherein the flow cytometry data acquisition system generally utilizes a fluid pool to convey the flow cytometry at high speed, and the spectrum data acquisition module 200 and the image data acquisition module 300 are respectively used for acquiring spectrum information and image information of the flow cytometry flowing through corresponding monitoring position points in the fluid pool, and the information is finally converted into digitized spectrum data and image data which are stored in the upper computer 400 so as to sort the flow cytometry by utilizing corresponding sorting programs in the upper computer 400.
More specifically, the spectral data acquisition module 200 and the image data acquisition module 300 each include a laser excitation module and a data acquisition module, the laser excitation module is configured to generate laser to irradiate on the fluid pool so that the data acquisition module 300 acquires corresponding data information, the irradiation positions of the laser excitation modules of the spectral data acquisition module 200 and the image data acquisition module 300 have a certain distance, so that the flow cytometry cells sequentially pass through two irradiation positions in the flowing process, and thus the two data acquisition modules can acquire spectral information and image information associated with the same flow cytometry cells, and the excitation module of the embodiment of the application is mainly configured to acquire spectral data based on the spectral information and generate a delay trigger signal for driving the image data acquisition module 300 to operate so that the image data acquisition module 300 can acquire the image information matched with the spectral information and convert the image information into the image data to be uploaded to the upper computer 400, namely, the flow cytometry data acquisition system applied by the acquisition module of the acquisition bin module of the embodiment of the application is a data synchronization system for acquiring the image data based on the spectral data trigger, so that the irradiation position of the excitation module 200 of the laser data acquisition module is set to be the laser data irradiation module 300 prior to the spectral data acquisition module.
More specifically, the acquisition bin module of the embodiment of the application mainly has two functions of acquiring effective spectrum data based on spectrum information and timely generating delay trigger signals used for triggering the operation of the image data acquisition module 300 based on the effective spectrum data, so that the upper computer 400 can finally acquire the spectrum data and the image data which are related to flow cells and can be synchronously aligned and analyzed, wherein the acquisition bin module of the embodiment of the application is provided with a plurality of sub-boards 110 for ensuring that the delay trigger signals have timeliness, and a plurality of analog-to-digital converters 111 are arranged in each sub-board 110 for collecting the spectrum information from the spectrum data acquisition module 200, the spectrum information transmitted into the acquisition bin module is expressed as analog signals, and the plurality of analog-to-digital converters 111 in the plurality of sub-boards 110 can collect the analog signals in parallel and convert the analog signals into digital signals capable of carrying out data analysis, so that the acquisition bin module of the embodiment of the application can timely generate the delay trigger signals to acquire the image data matched with the corresponding data, wherein the plurality of sub-boards can be designed according to the application requirements, and the application can be simultaneously and the receiving the analog signals are respectively extracted based on the analog signals and the time sequence signals in the different from the first time sequence data acquisition bin module and the second time sequence module and the application can be sequentially and sequentially extracted based on the different from the analog signal acquisition time sequence data acquisition time sequence module 110, and the second time sequence signal is based on the time sequence signal 121.
It should be noted that, the motherboard 120 and the daughter board 110 belong to an integrated circuit board and are connected through a data interface, wherein the daughter board 110 is mainly used for collecting and screening analog signals corresponding to spectrum information to obtain effective signals (spectrum information collected at a position corresponding to a position where a flow cell passes through a laser excitation component of the spectrum data collection module 200), and the motherboard 120 is mainly used for transferring spectrum data in the effective signals and generating a delay trigger signal.
More specifically, the process of acquiring the effective signal by the first FPGA112 according to the digital signal is actually a process of screening out the digital signal that does not include the spectrum data of the flow cell based on a preset rule, and the second FPGA121 is disposed in the motherboard 120 and used for buffering the effective signal, and the delay trigger signal generation and the spectrum data extraction and transfer process are synchronously performed on the effective signal in the second FPGA121 based on the third FPGA122 and the data processing module 123, and the two processes are performed by two control devices, so that timeliness and accuracy of the data processing can be ensured, and mutual interference of the data can be avoided.
More specifically, the memory module 124 is configured to store the spectral data in the valid signal temporarily, and the data processing module 123 is configured to sort and integrate the spectral data stored in the memory module temporarily, so as to upload the sorted spectral data to the host computer 400, wherein each set of sorted spectral data uploaded to the host computer 400 corresponds to the flow cell at one time and matches the image data acquired by the image data acquisition module 300 at one time.
It should be noted that, the spectrum data stored in the memory module 124 includes a corresponding spectrum ID, the uploaded image data of the image data acquisition module 300 includes a corresponding image ID, and the host computer 400 performs matching between the image data and the spectrum data through the spectrum ID and the image ID.
In some embodiments, the data processing module 123 is connected to the third FPGA122, and is configured to output a spectrum ID to the third FPGA122, so that the third FPGA122 generates a delay trigger signal according to the valid signal and the spectrum ID, so that the image data acquisition module 300 can generate the image ID according to the delay trigger signal in the process of acquiring the image data, so that the image data and the spectrum data have matchability, and the data pairing logic is further simplified.
More specifically, the delay trigger signal may be a trigger signal sent to the image data acquisition module 300 based on a preset delay to trigger the image data acquisition module 300 to operate, or may be a trigger signal directly sent to the image data acquisition module 300 to trigger the image data acquisition module 300 to operate in a delayed manner, based on the foregoing, it is known that the irradiation positions of the spectrum data acquisition module 200 and the image data acquisition module 300 have a certain position difference, and in order to ensure that the two acquired objects (flow type cells) are the same, a certain delay is required to be designed to trigger the image data acquisition module 300 to operate, and the delay value may be set by integrating the processing efficiency of the acquisition bin module (the time consumption of the whole process of generating the delay trigger signal based on the analog signal), the flow velocity of the fluid in the fluid pool, and the distance difference of the irradiation positions, so as to ensure that the image data acquired by the upper computer 400 and the spectrum data are mutually matched.
More specifically, the operation of the motherboard 120 is performed based on the effective signal, which is equivalent to the use of the daughter board 110 to perform the screening of the spectrum data, so as to collect the spectrum data based on the effective signal and trigger the operation of the image data acquisition module 300, thereby ensuring the data matching performance and effectively saving the system resources, and avoiding the image data acquisition module 300 from acquiring the invalid data.
The acquisition bin module of the embodiment of the application is applied to a flow cell data acquisition system, can adapt to the high-speed and high-flux characteristics of flow cells, receives the analog signals generated by the spectrum data acquisition module 200, timely extracts effective signals from the analog signals to synchronously extract spectrum data and generate a delay trigger signal for triggering the operation of the image data acquisition module 300, and timely drives the image data acquisition module 300 to operate by utilizing the delay trigger signal so as to acquire image data matched with the spectrum data, thereby facilitating the high-precision sorting of the flow cells by the upper computer 400.
In some preferred embodiments, the number of sub-boards 110 is preferably 5, and the number of analog-to-digital converters 111 in each sub-board 110 is preferably 7.
In some preferred embodiments, the data processing module 123 is an ARM processor that forwards the spectral data in the valid signal buffered by the second FPGA121 to the memory module 124 based on the DMA channel of the AXI bus configuration.
Specifically, the ARM processor configures a DMA (Direct Memory Access ) channel to connect the memory module 124 and the second FPGA121, so that the spectrum data in the effective signal buffered in the second FPGA121 can be directly copied into the memory module 124 based on the DMA transmission technology, thereby implementing high-speed extraction and transmission of the spectrum data.
More specifically, in this embodiment, the ARM processor can effectively improve data transfer performance, reduce data processing load based on DMA configured by an AXI bus, and the AXI (Advanced Extensible Interface ) bus can provide high-performance data transfer, support high-bandwidth and low-latency, and allow complex data burst transfer and out-of-order execution, further improve data transfer efficiency and flexibility, support separate address/control and data phases, and separate read-write data channels, so that the DMA can independently control the data transfer process without sharing resources with other system components.
In some preferred embodiments, the process of the data processing module 123 sorting the spectral data in the memory module 124 includes performing the compensation, gate and sort processes sequentially.
The round gate processing is to add preset gate data to the spectrum data after the compensation processing, the sorting processing is to sort the spectrum data added with the gate data based on the gate data so as to divide the spectrum data into in-gate data and out-gate data, and after the sorting processing is completed, the processed spectrum data is integrated (or can be directly uploaded without integration) according to the system use requirement and uploaded to the upper computer 400, wherein the uploading process is that the data processing module 123 is sent to software of the upper computer 400 based on a TCP protocol of a network port lwIP protocol stack.
More specifically, the above arrangement can effectively improve the integrity and effectiveness of the spectrum data acquired by the upper computer 400.
More specifically, in the embodiment of the present application, the data processing module 123 preferably organizes a plurality of sets of spectrum data stored in the memory module 124 at one time to improve data organizing efficiency, wherein the second FPGA121 generates an interrupt signal after monitoring, by the data processing module 123, that the number of spectrum data that is not consolidated in the memory module 124 reaches a preset number, so as to suspend caching of the spectrum data and generating a corresponding delay trigger signal in the third FPGA122, so that the data processing module 123 is utilized to organize the preset number of spectrum data in the memory module 124 during the interrupt time, and upload the spectrum data to the upper computer 400, thereby realizing batch organizing and uploading operations of the spectrum data, and enabling the interrupt behavior to ensure smooth uploading of the spectrum data.
It should be noted that, the spectrum data temporarily stored in the memory module 124 has generated a corresponding delay trigger signal by the third FPGA122 to trigger the image data acquisition module 300 to acquire the image data during the storing process, so the above-mentioned interruption behavior does not affect the acquisition of the corresponding image data.
In some preferred embodiments, the third FPGA122 enables the first FPGA112.
Specifically, the first FPGA112 can only operate when the third FPGA122 operates to generate the enabling signal, that is, the first FPGA112 can only receive the digital signal in real time when the third FPGA122 is in an operating state and obtain the effective signal according to the digital signal, in this embodiment, the third FPGA122 can only enable the first FPGA112 to operate when the third FPGA122 is in a state capable of normally generating the delayed trigger signal, so that the first FPGA112 can be prevented from operating inefficiently, and it is ensured that the effective signal extracted by the first FPGA112 can smoothly generate the corresponding delayed trigger signal and upload the corresponding spectrum data.
More specifically, in the foregoing interrupt behavior, the third FPGA122 is also simultaneously interrupted, enabling the first FPGA112 to be suspended from operation.
In some preferred embodiments, the first FPGA112 performs a thresholding process and an amplifying process on the digital signal to obtain a valid signal.
Specifically, the threshold value pruning processing is a behavior of screening the digital signals based on a preset signal threshold value, and accordingly, the strength of the digital signals which do not contain the flow cell related data is smaller, so that the rapid screening of the digital signals can be realized directly based on the threshold value pruning processing, and the screened digital signals are amplified to obtain effective signals meeting the system analysis requirement strength.
In some preferred embodiments, the process of the second FPGA121 buffering the valid signal includes:
Acquiring a valid signal based on the first FPGA112 transfer;
performing parallel-to-serial conversion on the effective signals to obtain serial effective signals;
The serial valid signal is cut and aligned to obtain a valid signal conforming to the AXI bus 64-bit format, and is buffered based on FIFO.
In particular, in this embodiment, based on the foregoing, the first FPGA112 in the same sub-board 110 obtains the digital signals based on the multiple analog-to-digital converters 111, so that the obtained effective signals are presented as parallel signals, and for processing to obtain the effective signals conforming to the AXI bus 64-bit format for subsequent DMA transmission based on the AXI bus configuration, the second FPGA121 needs to perform serial-to-parallel conversion on the effective signals to obtain serial effective signals, and then performs clipping and alignment processing to obtain the effective signals conforming to the AXI bus 64-bit format, and buffering based on the FIFO (first-in first-out) manner can ensure the timeliness of the effective signal transmission, so that the subsequent uploaded spectrum data is matched with the delay trigger signal to enable the upper computer 400 to successfully obtain the spectrum data and the image data corresponding to each other.
In some preferred embodiments, the valid signals include a forward valid signal and a lateral valid signal, the lateral valid signal including spectral data, and the third FPGA122 generates the delayed trigger signal based on the forward valid signal.
Specifically, the spectrum data acquisition module 200 includes a lateral spectrum data acquisition component and a forward spectrum data acquisition component, where the lateral spectrum data acquisition component is configured to acquire lateral spectrum information generated by lateral emission, and includes spectrum data that can directly correspond to diffraction characteristics of fluid, the corresponding lateral spectrum information including relevant data of flow cytometry is used for performing flow cytometry sorting processing, and the forward spectrum data acquisition component is configured to acquire forward spectrum information generated by continuous forward emission of laser light through a fluid pool, so that whether the corresponding forward spectrum information includes flow cytometry can be conveniently analyzed based on shielding characteristics of the flow cytometry, and in this embodiment, the analog signals collected by the daughter board 110 include the forward spectrum information and the lateral spectrum information, so that the corresponding digital signals include forward digital signals and lateral digital signals, and the corresponding effective signals include forward effective signals and lateral effective signals, where the process of acquiring the effective signals by the first FPGA112 according to the digital signals is mainly to screen the forward digital signals so as to extract the forward digital signals and the corresponding lateral digital signals required by the system.
More specifically, since the lateral spectrum information includes spectrum data that can directly correspond to the diffraction characteristics of the fluid, the lateral effective signal includes spectrum data corresponding to the flow cell, so that the spectrum data transferred to the memory module 124 by the second FPGA121 is spectrum data in the lateral spectrum information, and the third FPGA122 generates the delay trigger signal based on the forward effective signal, so that the data processed by the third FPGA122 and the data transferred by the second FPGA121 are independent and matched, and it can be ensured that the acquisition bin module according to the embodiment of the present application can simultaneously and efficiently complete the tasks of data uploading and delay trigger signal generation.
In a second aspect, referring to fig. 2, some embodiments of the present application further provide a flow cytometry data acquisition system, including a spectrum data acquisition module 200, an image data acquisition module 300, a host computer 400, and an acquisition bin module 100 as provided in the first aspect;
The upper computer 400 is further connected to the spectrum data acquisition module 200 and the image data acquisition module 300, and is used for driving the spectrum data acquisition module 200 to acquire so as to generate an analog signal, and is also used for acquiring the image data acquired by the image data acquisition module 300, and synchronizing and storing the image data and the spectrum data uploaded by the data processing module 123.
Specifically, the upper computer 400 is configured with sorting software for collecting the spectral data uploaded by the acquisition bin module 100 and the image data uploaded by the image data acquisition module 300 that are matched to each other to sort the flow cells.
More specifically, in this embodiment, the upper computer 400 is connected to the spectrum data acquisition module 200, and can drive the spectrum data acquisition module 200 to acquire spectrum information in real time when fluid in the fluid pool flows, so that the acquisition bin module 100 can automatically analyze whether spectrum data meeting the system requirements exists according to the spectrum information, and trigger the image data acquisition module 300 to operate to acquire image data matched with the spectrum data.
The flow cytometry data acquisition system of the embodiment of the application is provided with the acquisition bin module 100, the acquisition bin module 100 can adapt to the high-speed and high-flux characteristics of the flow cytometry to receive the analog signals generated by the spectrum data acquisition module 200, timely analyze the effective signals from the analog signals to synchronously extract the spectrum data and generate the time delay trigger signals for triggering the operation of the image data acquisition module 300, and timely drive the image data acquisition module 300 to operate by utilizing the time delay trigger signals so as to acquire the image data matched with the spectrum data, thereby facilitating the high-precision sorting of the flow cytometry by the upper computer 400.
In some preferred embodiments, the image data acquisition module 300 includes a high speed camera 301 and an AOM driver 302, the trigger dead time of the high speed camera 301 satisfying:
T Dead zone is not less than 1/f, wherein T Dead zone is trigger dead time, and f is the frame rate of the high-speed camera 301;
The exposure time of AOM driver 302 satisfies:
T Exposure to light is less than or equal to L/(F.times.V), wherein T Exposure to light is the exposure time of AOM driver 302, L is the pixel size, F is the optical magnification of image data acquisition module 300, and V is the flow velocity of the flow cell.
Specifically, the high-speed camera 301 is a data acquisition component of the image data acquisition module 300, in this embodiment of the present application, it is preferable to use a Phantom S710 vision camera, the waveform standard is TTL, the frame rate can reach 27375fps, the corresponding minimum trigger dead time minT Dead zone =36.5 us, considering that the minimum time unit configured by the acquisition bin module 100 is 20ns, the parameter is configured by software through a protocol frame, and the protocol frame is not too long, so the exposure time of the high-speed camera 301 can be rounded up to 40us according to the minimum trigger dead time.
More specifically, the laser excitation assembly includes a laser, an optical assembly and a corresponding driving control assembly, where, in this embodiment, AOM driver 302 is a driving control assembly of the laser, and in this embodiment, two devices of AOM driver 302 and an AOM acoustic modulator are integrated, and AODR 1080AF-DINA-1.0 HCR and AOMO 3080-120 are respectively used in this embodiment to comprehensively regulate the emission pulse of the laser, and AOM driver 302 converts a specified common waveform into a control signal required by the AOM; the AOM driver 302 and the high-speed camera 301 are both connected to the third FPGA122 of the acquisition bin module 100, and operate based on a delayed trigger signal sent by the third FPGA122 to generate laser light and acquire corresponding image data, under the trigger of the delayed trigger signal, the AOM driver 302 cooperates with the AOM acoustic modulator to convert the laser signal into a controllable pulse laser signal, so as to realize low exposure at a high flow rate, so as to ensure that the high-speed camera 301 can acquire image data meeting the system requirement, wherein the low exposure process satisfies the setting condition of the T Exposure to light , such as a pixel size of 20um, an optical amplification factor of 20um, a flow rate of 3m/s, and an exposure time max T Exposure to light = 333ns of the AOM driver 302 that can be obtained to be maximum, and considering that a minimum time unit configured by the acquisition bin module 100 is 20ns, the exposure time of the AOM driver 302 can be set to 300ns in a downward rounding manner according to the exposure time of the maximum AOM driver 302.
More specifically, the setting of the parameters related to the high-speed camera 301 and the AOM driver 302 based on the above conditions can ensure that the image data acquisition module 300 can successfully acquire the image data matched with the spectrum data under the triggering of the acquisition bin module 100.
More specifically, in some embodiments, the delayed trigger signal includes an external trigger signal and an AOM trigger signal, where the external trigger signal and the AOM trigger signal are used to trigger the high-speed camera 301 and the AOM driver 302, respectively, and for the same delayed trigger signal, the trigger timing of the high-speed camera 301 precedes the trigger timing of the AOM driver 302, so that the exposure time of the high-speed camera 301 includes the exposure time of the AOM driver 302 to ensure that the image data meeting the system requirement can be successfully acquired, in this embodiment, the duration of the corresponding exposure time is determined by the pulse width of the corresponding trigger signal, if the pulse width of the external trigger signal is 1us, the pulse width of the AOM trigger signal is 0.33us, and the phase of the external trigger signal leads the AOM trigger signal by 0.33us, then the image data acquisition of 0.33us is achieved during the exposure duration of the high-speed camera 301.
In some preferred embodiments, the capture bin module 100 further includes a motherboard adapter plate 130, and the motherboard 120 is connected to the host computer 400 and the image data capture module 300 through the motherboard adapter plate 130.
Specifically, the motherboard adapter board is used for completing communication between the motherboard 120 and other modules, such as implementing communication of SPI and CAN bus, and in the embodiment of the present application, the motherboard adapter board is mainly used for connecting the upper computer 400 and the image data acquisition module 300, so as to ensure that the collected spectrum data CAN be successfully uploaded to the upper computer 400 and ensure that the delay trigger signal CAN be timely sent to the image data acquisition module 300 for image data acquisition.
In some preferred embodiments, motherboard interposer 130 has an SMA interface that connects to image data acquisition module 300 via a coaxial cable with a characteristic impedance of 50Ω.
In particular, the coaxial cable is preferably RG-316 cable.
More specifically, in this embodiment, the motherboard adapter board 130 is preferably connected to the AOM driver 302 and the high-speed camera 301 based on an RG-316 cable, so that timeliness of transmission of the delay trigger signal can be effectively ensured, and accurate image data acquisition can be realized.
In summary, the embodiment of the application provides a collection bin module and a flow cell data collection system, wherein the collection bin module can adapt to the high-speed and high-flux characteristics of flow cells to receive analog signals generated by a spectrum data collection module 200, timely analyze effective signals from the analog signals to synchronously extract spectrum data and generate a delay trigger signal for triggering the operation of an image data collection module 300, and timely drive the image data collection module 300 to operate by utilizing the delay trigger signal so as to collect image data matched with the spectrum data, thereby facilitating the high-precision sorting of the flow cells by an upper computer 400.
In the description of the present specification, reference to the terms "one embodiment," "certain embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
What has been described above is merely some embodiments of the present invention. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit of the invention.
Claims (8)
1. The utility model provides a gather storehouse module, uses in flow cell data acquisition system, its characterized in that, flow cell data acquisition system includes spectrum data acquisition module, image data acquisition module and host computer, gather storehouse module and include:
each sub-board comprises a first FPGA and a plurality of analog-to-digital converters;
The motherboard is connected with the plurality of daughter boards and comprises a second FPGA, a third FPGA, a data processing module and a memory module;
The plurality of analog-to-digital converters are connected with the first FPGA and the spectrum data acquisition module and are used for converting analog signals provided by the spectrum data acquisition module into digital signals;
The first FPGA is connected with the second FPGA and is used for acquiring an effective signal according to the digital signal and transmitting the effective signal to the second FPGA for caching;
The data processing module is connected with the second FPGA and the memory module and is used for transferring the spectrum data in the effective signals cached by the second FPGA to the memory module;
The data processing module is also connected with the upper computer and is used for finishing and uploading the spectrum data with the preset quantity in the memory module to the upper computer;
The third FPGA is connected with the second FPGA and the image data acquisition module and is used for generating a delay trigger signal according to the effective signal so as to trigger the image data acquisition module to operate;
the data processing module is an ARM processor, and the ARM processor transfers the spectrum data in the effective signal cached by the second FPGA to the memory module based on a DMA channel configured by an AXI bus;
the image data acquisition module comprises a high-speed camera and an AOM driver, and the triggering dead time of the high-speed camera meets the following conditions:
T Dead zone is more than or equal to 1/f, wherein T Dead zone is the trigger dead time, and f is the frame rate of the high-speed camera;
the exposure time of the AOM driver satisfies:
T Exposure to light is less than or equal to L/(F.times.V), wherein T Exposure to light is the exposure time of the AOM driver, L is the pixel size, F is the optical magnification of the image data acquisition module, and V is the flow velocity of the flow cell.
2. The collection bin module of claim 1, wherein the data processing module collates the spectral data in the memory module comprises performing compensation, gate and sort processes in sequence.
3. The acquisition bin module of claim 1, wherein the first FPGA performs a threshold pruning process and an amplification process on the digital signal to obtain the valid signal.
4. The acquisition bin module of claim 1, wherein the process of the second FPGA buffering the valid signal comprises:
acquiring the effective signal based on the first FPGA transmission;
Performing parallel-to-serial conversion on the effective signals to obtain serial effective signals;
And cutting and aligning the serial effective signals to obtain effective signals conforming to the AXI bus 64-bit format, and caching based on the FIFO.
5. The acquisition bin module of claim 1, wherein the valid signals include a forward valid signal and a lateral valid signal, the lateral valid signal including the spectral data, the third FPGA generating the delayed trigger signal based on the forward valid signal.
6. A flow cytometry data acquisition system, comprising a spectrum data acquisition module, an image data acquisition module, an upper computer and an acquisition bin module according to any one of claims 1-5;
the upper computer is also connected with the spectrum data acquisition module and the image data acquisition module and is used for driving the spectrum data acquisition module to acquire so as to generate the analog signal, and is also used for acquiring the image data acquired by the image data acquisition module and synchronizing and storing the image data and the spectrum data which are tidied and uploaded by the data processing module.
7. The flow cytometer data collection system of claim 6, wherein the collection bin module further comprises a motherboard adapter plate, wherein the motherboard is connected to the upper computer and the image data collection module through the motherboard adapter plate.
8. The flow cytometer data acquisition system of claim 7, wherein the motherboard adapter plate has an SMA interface connected to the image data acquisition module via a coaxial cable having a characteristic impedance of 50 Ω.
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