CN118837005A - Piezoresistive sensor, manufacturing method thereof and electronic equipment - Google Patents

Abstract

The present application provides a piezoresistive sensor and a preparation method thereof, and an electronic device, wherein the piezoresistive sensor comprises: a pressure sensing structure, a surface of one side of the pressure sensing structure along a first direction is provided with a groove, the pressure sensing structure comprises a piezoresistive layer and a lead layer connected to the piezoresistive layer, the piezoresistive layer is located on one side of the groove along the first direction; an insulating substrate is located on one side of the pressure sensing structure along the first direction and faces the groove; a contact structure penetrates the insulating substrate along the first direction and is connected to the lead layer. The reliability of the piezoresistive sensor is improved and the volume is reduced.

Description

Piezoresistive sensor and preparation method thereof, and electronic device

Technical Field

The present application relates to the field of semiconductor technology, and in particular to a piezoresistive sensor, a preparation method thereof, and an electronic device.

Background Art

Piezoresistive sensors are devices or apparatuses that can sense pressure signals and convert them into usable output electrical signals according to certain rules. Piezoresistive sensors are usually composed of pressure sensitive elements and signal processing units. Piezoresistive sensors are the most commonly used sensors in industrial practice. They are widely used in various industrial automatic control environments, involving many industries such as water conservancy and hydropower, railway transportation, intelligent buildings, production automatic control, aerospace, military industry, petrochemicals, oil wells, electricity, ships, machine tools, pipelines, etc.

For example, piezoresistive sensors include piezoresistive contact force sensors, which can be used in stylus pens as the core components of stylus pens. Stylus pens are often used with consumer electronic products such as tablets, computers, and mobile phones. When in contact with the touch screen, they can actively transmit signals that are received by the screen to achieve functions such as writing and painting. The gravity pressure sensing function of the stylus can achieve changes in thickness and lightness with different writing forces, which is closer to the actual writing experience, so pen force sensing is the key to affecting the stylus experience.

However, the piezoresistive sensor of the related art has poor reliability and is large in size.

Summary of the invention

The present disclosure provides a piezoresistive sensor and a preparation method thereof, and an electronic device to solve the problems of poor reliability and large size of the piezoresistive sensor in the related art.

The present application provides a piezoresistive sensor, comprising: a pressure-sensing structure, wherein a groove is arranged on a surface of one side of the pressure-sensing structure along a first direction, wherein the pressure-sensing structure comprises a piezoresistive layer and a lead layer connected to the piezoresistive layer, wherein the piezoresistive layer is located on one side of the groove along the first direction; an insulating substrate, located on one side of the pressure-sensing structure along the first direction and facing the groove; and a contact structure, penetrating the insulating substrate along the first direction and connected to the lead layer.

Optionally, the varistor layer extends to an inner wall of the groove on one side along the first direction; or, the varistor layer is spaced apart from the groove.

Optionally, the insulating substrate has a contact hole penetrating the insulating substrate along the first direction; and the contact structure covers the inner wall surface of the contact hole.

Optionally, the contact structure includes a seed layer located on an inner wall of the contact hole and a contact body layer located on a surface of the seed layer.

Optionally, the insulating substrate includes a glass substrate.

Optionally, the pressure sensing structure includes a main pressure sensing layer; wherein the piezoresistive resistor layer and the lead layer are located in the main pressure sensing layer; and the lead layer is located on a side of the groove.

Optionally, the pressure sensing structure further includes a connecting column, which is located on a side of the main pressure sensing layer away from the insulating substrate and connected to the main pressure sensing layer, and the connecting column is arranged opposite to the groove along the first direction.

Optionally, the main pressure-sensitive layer has the groove.

Optionally, the main pressure-sensitive layer includes a first semiconductor layer and a second semiconductor layer located between the first semiconductor layer and the insulating substrate; wherein the piezoresistive resistor layer is located in the first semiconductor layer, the groove is located in the second semiconductor layer, and the lead layer is at least located in the second semiconductor layer.

Optionally, the pressure sensing structure also includes: a bonding layer, the bonding layer is located between the main pressure sensing layer and the insulating substrate, the bonding layer has the groove; an electrode layer separated from the groove, penetrates the bonding layer along the first direction and is connected to the lead layer; wherein the contact structure is connected to the lead layer through the electrode layer.

Optionally, the pressure sensing structure further includes an etch stop layer located between the bonding layer and the main pressure sensing layer; wherein the electrode layer also penetrates the etch stop layer.

Optionally, the groove further extends into the etch stop layer.

Optionally, the varistor layer is a varistor doped layer, and the lead layer is a lead doped layer.

The present invention also provides a method for preparing a piezoresistive sensor, comprising: forming a pressure-sensing structure, wherein a groove is provided on a surface of one side of the pressure-sensing structure along a first direction, the pressure-sensing structure comprising a piezoresistive layer and a lead layer connected to the piezoresistive layer, the piezoresistive layer being located on one side of the groove along the first direction; forming an insulating substrate, wherein the insulating substrate is located on one side of the pressure-sensing structure along the first direction and faces the groove; and forming a contact structure, wherein the contact structure penetrates the insulating substrate along the first direction and is connected to the lead layer.

Optionally, the step of forming the pressure-sensing structure includes: forming a piezoresistive layer and a lead layer in a semiconductor substrate; wherein, the step of forming the insulating substrate includes: arranging the insulating substrate on one side of the semiconductor substrate along the first direction; wherein, the step of forming the pressure-sensing structure also includes: after forming the contact structure, etching the surface of the semiconductor substrate on a side away from the insulating substrate so that a portion of the semiconductor substrate forms a main pressure-sensing layer; wherein, the piezoresistive layer and the lead layer are located in the main pressure-sensing layer.

Optionally, the step of forming the pressure sensing structure further includes: forming a groove on a surface of one side of the semiconductor substrate along the first direction; wherein the lead layer is located on a side of the groove.

Optionally, the step of forming the varistor layer and the lead layer in the semiconductor substrate includes: forming the varistor layer in a first semiconductor layer; forming a second semiconductor layer covering the varistor layer on one side of the first semiconductor layer along the first direction; forming the lead layer in the second semiconductor layer; wherein the step of forming the groove on the surface of one side of the semiconductor substrate along the first direction is: forming the groove at least in the second semiconductor layer.

Optionally, the step of forming the pressure sensing structure also includes: forming an etch stop layer covering the varistor layer and the lead layer on one side of the semiconductor substrate along the first direction; forming a bonding layer on the side of the etch stop layer away from the semiconductor substrate; forming the groove in the bonding layer; and forming an electrode layer passing through the bonding layer and the etch stop layer along the first direction, the electrode layer being spaced apart from the groove; wherein the contact structure is connected to the lead layer through the electrode layer; and the lead layer is located on the side of the groove.

The present application also provides an electronic device, including: the piezoresistive sensor of the present application.

Optionally, the electronic device includes a stylus; and the piezoresistive sensor is a piezoresistive contact force sensor.

The technical solution of this application has the following beneficial effects:

The piezoresistive sensor provided by the technical solution of the present application has a groove in the pressure-sensing structure, and the groove is used to prevent overload when the pressure-sensing structure is subjected to pressure. The insulating substrate is located on one side of the pressure-sensing structure along the first direction and faces the groove. The contact structure passes through the insulating substrate along the first direction and is connected to the lead layer, and the contact structure is used to lead out the electrical signal of the lead layer in the pressure-sensing structure. In this way, there is no need to form leads through a wire bonding process on the outside of the pressure-sensing structure to lead out the electrical signal of the lead layer, thereby reducing the volume of the piezoresistive sensor. In addition, the contact structure is located in the insulating substrate, and the insulating substrate has a protective effect on the contact structure, thereby preventing the contact structure from being damaged and falling off when the piezoresistive sensor is bumped or dropped, thereby improving the reliability of the piezoresistive sensor.

The technical solution of the present application provides an electronic device, which improves the reliability of the piezoresistive sensor and reduces the volume of the piezoresistive sensor, thereby improving the reliability of the electronic device and reducing the volume of the electronic device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of the structure of a piezoresistive sensor in the related art;

FIG2 is a schematic diagram of the structure of a piezoresistive sensor provided in one embodiment of the present invention;

FIG3 is a top view of a pressure sensing structure provided by an embodiment of the present invention;

FIG4 is a schematic structural diagram of a piezoresistive sensor provided by another embodiment of the present invention;

FIG5 is a schematic diagram of the structure of a piezoresistive sensor provided by another embodiment of the present invention;

FIG6 is a schematic flow chart of a method for preparing a piezoresistive sensor according to an embodiment of the present invention;

7 to 18 are schematic diagrams of the structure of a piezoresistive sensor preparation process according to an embodiment of the present invention;

19 to 25 are schematic structural diagrams of a piezoresistive sensor preparation process according to another embodiment of the present invention;

26 to 29 are schematic diagrams of the structure of a piezoresistive sensor preparation process according to another embodiment of the present invention;

FIG30 is a schematic diagram of the structure of an electronic device provided in one embodiment of the present invention.

DETAILED DESCRIPTION

A piezoresistive sensor, with reference to FIG1, comprises: a substrate 10; a support structure 11 located on one side of the substrate 10 along a first direction; a main pressure-sensitive layer 12 located on a side of the support structure 11 away from the substrate 10; a piezoresistive resistor layer 13 located in the main pressure-sensitive layer 12; a first insulating layer 14 located on a surface of the support structure 11 facing the main pressure-sensitive layer 12; a second insulating layer 15 located on a side of the main pressure-sensitive layer 12 facing the first insulating layer 14, and a side of the second insulating layer 15 facing the first insulating layer 14 A groove 16 is provided; a lead layer 17, which is located in the second insulating layer 15 and connected to the varistor layer 13; a conductive bonding layer 19, which is located between the first insulating layer 14 and the second insulating layer 15; an electrode 20, which is located on the surface of the first insulating layer 14 on the side of the main pressure-sensitive layer 12; a lead 18, one end of the lead 18 is connected to the electrode 20 and the other end is connected to the substrate 10; a connecting column 21, which is located on the side of the main pressure-sensitive layer 12 away from the supporting structure 11 and is arranged opposite to the groove 16 in the first direction.

The structure of the above-mentioned piezoresistive sensor is complex, and the groove 16 is arranged in the second insulating layer 15. Therefore, the thickness of the second insulating layer 15 needs to be set relatively large. The piezoresistive sensor also includes a first insulating layer 14, and a conductive bonding layer 19 is also arranged between the first insulating layer 14 and the second insulating layer 15. Secondly, it is necessary to set a certain space for the extension of the lead 18, which leads to a larger volume of the piezoresistive sensor. Thirdly, when the piezoresistive sensor falls or collides, the lead 18 is easily damaged, the lead 18 is short-circuited or broken, and the reliability of the piezoresistive sensor is reduced. Thirdly, the conductive bonding layer 19 is formed by bonding the first sub-bonding layer on the surface of the first insulating layer 14 and the second sub-bonding layer on the surface of the second insulating layer 15. The first sub-bonding layer and the second sub-bonding layer are prone to misalignment, which leads to the problem of unstable internal mechanical properties of the piezoresistive sensor.

On this basis, the present application provides a piezoresistive sensor and a preparation method thereof, and an electronic device, which improves the reliability of the piezoresistive sensor and reduces the volume of the piezoresistive sensor.

In order to enable those skilled in the art to better understand the technical solution of the present disclosure, and to fully understand and implement how the present disclosure applies technical means to solve technical problems and achieve the corresponding technical effects, the technical solution in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only embodiments of a part of the present disclosure, not all of the embodiments. The embodiments of the present disclosure and the various features in the embodiments can be combined with each other without conflict, and the technical solutions formed are all within the scope of protection of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the present disclosure.

It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present disclosure described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

Example 1

This embodiment provides a piezoresistive sensor. Referring to FIG. 2 , the piezoresistive sensor includes:

A pressure sensing structure 100, wherein a groove 106 is provided on one side of the surface of the pressure sensing structure 100 along the first direction Z. The pressure sensing structure 100 comprises a piezoresistive layer 104 and a lead layer 103 connected to the piezoresistive layer 104. The piezoresistive layer 104 is located on one side of the groove 106 along the first direction Z.

The insulating substrate 200 is located at one side of the pressure sensing structure 100 along the first direction Z and faces the groove 106;

The contact structure 202 penetrates the insulating substrate 200 along the first direction Z and is connected to the lead layer 103 .

In the piezoresistive sensor of the present embodiment, a groove 106 is provided in the pressure sensing structure 100. The groove 106 is used to prevent overload when the pressure sensing structure 100 is subjected to pressure. The insulating substrate 200 is located on one side of the pressure sensing structure 100 along the first direction Z and faces the groove 106. The contact structure 202 penetrates the insulating substrate 200 along the first direction Z and is connected to the lead layer 103. The contact structure 202 is used to lead out the electrical signal of the lead layer 103 in the pressure sensing structure 100. In this way, there is no need to form leads through a wire bonding process on the outside of the pressure sensing structure 100 for leading out the electrical signal of the lead layer, thereby reducing the volume of the piezoresistive sensor. In addition, the contact structure 202 is located in the insulating substrate 200. The insulating substrate 200 has a protective effect on the contact structure 202, thereby preventing the contact structure from being damaged and falling off when the piezoresistive sensor is bumped or dropped, thereby improving the reliability of the piezoresistive sensor.

The pressure sensing structure 100 is a micro-electro-mechanical system (MEMS) piezoresistive pressure sensing structure.

In one embodiment, referring to FIG2 , the piezoresistive layer 104 extends to the inner wall of the groove 106 on one side along the first direction Z. When the pressure sensing structure 100 is subjected to external pressure, the closer the piezoresistive layer 104 is to the groove 106, the greater the deformation. Therefore, the piezoresistive layer 104 extends to the inner wall of the groove 106 on one side along the first direction Z, and the greater the resistance change of the piezoresistive layer 104 is, the greater the detection sensitivity of the piezoresistive sensor is.

In other embodiments, the varistor layer is spaced apart from the groove.

In one embodiment, the groove 106 includes a central area and an edge area, and the edge area of the groove 106 is located on the side of the central area of the groove 106 along a direction perpendicular to the first direction Z. The piezoresistive layer 104 and the edge area of the groove 106 are arranged opposite to each other along the first direction Z. When the pressure sensing structure 100 is subjected to pressure, the deformation of the edge area of the groove 106 is greater than that of the central area of the groove 106. Therefore, the piezoresistive layer 104 and the edge area of the groove 106 are arranged opposite to each other along the first direction Z, so that the resistance of the piezoresistive layer 104 changes more, thereby improving the detection sensitivity of the piezoresistive sensor.

In other embodiments, the piezoresistive layer 104 and the center area of the groove 106 are disposed opposite to each other along the first direction Z. Alternatively, the piezoresistive layer 104 and the center area of the groove 106 and the edge area of the groove 106 are disposed opposite to each other along the first direction Z.

In one embodiment, referring to FIG2 , the pressure sensing structure 100 includes a main pressure sensing layer 101 , wherein a piezoresistive resistor layer 104 and a lead layer 103 are located in the main pressure sensing layer 101 , and a groove 106 is provided in the main pressure sensing layer 101 , and the lead layer 103 is located at the side of the groove 106 .

In this embodiment, the piezoresistive sensor is a piezoresistive contact force sensor, and there is no requirement for the vacuum degree in the groove 106. Referring to FIG2 , the pressure sensing structure 100 further includes a connecting column 102. The connecting column 102 is located on the side of the main pressure sensing layer 101 away from the insulating substrate 200 and is connected to the main pressure sensing layer 101. The connecting column 102 is arranged opposite to the groove 106 along the first direction Z. During the operation of the piezoresistive sensor, pressure is applied to the connecting column 102, and the connecting column 102 transmits the pressure to the main pressure sensing layer 101 and causes the main pressure sensing layer 101 to deform. When the main pressure sensing layer 101 is deformed, the resistance of the piezoresistive layer 104 changes, and the lead layer 103 is used to transmit the electrical signal change in the piezoresistive layer 104, thereby realizing the piezoresistive sensor to detect pressure.

The connecting column 102 is disposed opposite to the groove 106 along the first direction Z to ensure that the force-bearing position is accurately centered.

In one embodiment, the connecting column 102 includes a connecting column body and a connecting column end portion located on the side of the connecting column body away from the main pressure sensing layer 101 . The connecting column end portion is a hemispherical structure and is subject to external pressure.

In other embodiments, the end of the connecting column may also be in other shapes.

In one embodiment, a diameter of a cross section of the connecting pillar body in a direction perpendicular to the first direction Z is 200 μm to 300 μm.

In one embodiment, the varistor layer 104 is a varistor doped layer, and the lead layer 103 is a lead doped layer. It is easy to integrate the varistor layer 104 and the lead layer 103 into the main pressure sensing layer 101.

In one embodiment, the thickness of the main pressure-sensitive layer 101 is 300 μm to 400 μm. The thickness of the main pressure-sensitive layer 101 is the dimension of the main pressure-sensitive layer 101 along the first direction Z.

In one embodiment, the material of the main pressure-sensing layer 101 and the connecting pillar 102 includes a semiconductor material, such as silicon, germanium or silicon germanium, and the material of the main pressure-sensing layer 101 is a single crystal semiconductor material or a multi-single crystal semiconductor material. The material of the connecting pillar 102 is a single crystal semiconductor material or a multi-single crystal semiconductor material.

In one embodiment, the main pressure sensing layer 101 and the connecting pillar 102 may be doped with conductive ions, and the ion concentration doped in the main pressure sensing layer 101 and the connecting pillar 102 is much lower than the ion concentration in the piezoresistive layer 104. In one embodiment, the main pressure sensing layer 101 and the connecting pillar 102 may be doped with N-type ions.

In one embodiment, the resistivity of the semiconductor substrate 1000 is 1 Ω*cm to 10 Ω*cm.

In one embodiment, the main pressure-sensing layer 101 and the connecting column 102 are an integrated structure, and the main pressure-sensing layer 101 and the connecting column 102 are made of the same material, thereby improving structural stability.

In one embodiment, the main pressure-sensing layer 101 and the connecting pillar 102 are made of different materials.

In this embodiment, since the piezoresistive resistor layer 104 , the lead layer 103 and the groove 106 are all located in the main pressure-sensing layer 101 , the size of the pressure-sensing structure 100 along the first direction Z is reduced.

In one embodiment, P-type ions or N-type ions are doped into the varistor layer 104. The P-type ions are, for example, boron ions.

In one embodiment, P-type ions or N-type ions are doped into the lead layer 103. The P-type ions are, for example, boron ions.

In one embodiment, the doping concentration of the varistor layer 104 is less than the doping concentration of the lead layer 103 .

In one embodiment, the doping concentration of the varistor layer 104 is 2e ¹⁸ atom/cm ³ -1e ¹⁹ atom/cm ³ ; the doping concentration of the lead layer 103 is 3e ¹⁹ atom/cm ³ -5e ²⁰ atom/cm ³ .

In one embodiment, the depth of the groove 106 along the first direction Z is 200 nm to 700 nm. In other embodiments, the depth of the groove 106 along the first direction Z may also be selected in other suitable ranges. This application does not limit this.

In one embodiment, the cross-sectional shape of the groove 106 along the direction perpendicular to the first direction Z is a square. Furthermore, the side length of the cross-sectional shape of the groove 106 along the direction perpendicular to the first direction Z is 400 μm to 600 μm.

In other embodiments, the cross-sectional shape of the groove along the direction perpendicular to the first direction Z may be a rectangle, a circle, an ellipse or other suitable shapes, which is not limited in the present application.

In one embodiment, the contact structure 202 further extends to a portion of the surface of the insulating substrate 200 facing away from the pressure sensing structure 100 .

In one embodiment, the piezoresistive sensor further includes a pad 203 located on the side of the insulating substrate 200 away from the pressure sensing structure 100 and connected to the contact structure 202. The area of the contact structure 202 extending to the side of the insulating substrate 200 away from the pressure sensing structure 100 is located between the pad 203 and the insulating substrate 200.

In one embodiment, the insulating substrate 200 has a contact hole 201 penetrating the insulating substrate 200 along the first direction Z; the contact structure 202 covers the inner wall surface of the contact hole 201 .

In one embodiment, the contact structure 202 includes a seed layer located on the inner wall of the contact hole 201 and a contact body layer located on the surface of the seed layer. The seed layer can improve the film quality of the contact body layer.

In one embodiment, the material of the seed layer includes a metal material, such as copper. The material of the contact body layer includes a metal material, such as copper.

2 takes the contact structure 202 being located in a portion of the contact hole 201 as an example. In other embodiments, the contact structure fills the entire contact hole.

In one embodiment, the diameter of the end of the contact hole 201 facing the main pressure-sensitive layer 101 is smaller than the diameter of the end of the contact hole 201 away from the main pressure-sensitive layer 101 , so that the contact structure 202 is easily filled in the contact hole 201 .

Exemplarily, the diameter of the end of the contact hole 201 facing the main pressure-sensitive layer 101 is 30 μm to 40 μm, and the diameter of the end of the contact hole 201 away from the main pressure-sensitive layer 101 is 60 μm to 70 μm.

In other embodiments, there is no limitation on the size relationship between the diameter of the end of the contact hole 201 facing the main pressure-sensitive layer 101 and the diameter of the end of the contact hole 201 away from the main pressure-sensitive layer 101 .

In one embodiment, the depth of the contact hole 201 along the first direction Z is 300 μm-400 μm.

In one embodiment, the pressure sensing structure 100 further includes an electrode layer 105, which is located between the contact structure 202 and the lead layer 103, and is connected to the contact structure 202 and the lead layer 103 respectively. The contact structure 202 leads out the electrical signal on the electrode layer 105.

In one embodiment, the material of the electrode layer 105 includes a metal material, such as aluminum.

In one embodiment, the insulating substrate 200 includes a glass substrate.

In one embodiment, the piezoresistive layer 104 and the insulating substrate 200 are in direct contact and bonded together, and the contact area between the piezoresistive layer 104 and the insulating substrate 200 is large, making it easier to align the piezoresistive sensor, thereby improving the internal mechanical stability of the piezoresistive sensor.

In this embodiment, the bonding cost of the insulating substrate 200 and the main pressure-sensitive layer 101 is relatively low, thereby reducing the cost of the piezoresistive sensor. For example, when the insulating substrate 200 is a glass substrate and the material of the main pressure-sensitive layer 101 is silicon, the main pressure-sensitive layer 101 made of silicon and the insulating substrate 200 made of glass are bonded together.

FIG3 is a top view of the pressure sensing structure 100, and the equivalent circuit of the pressure sensing structure 100 is a Wheatstone bridge. The varistor layer 104 includes a first varistor, a second varistor, a third varistor, and a fourth varistor. When the pressure sensing structure 100 is subjected to pressure, the main pressure sensing layer 101 will deform, and the deformation information generated by the main pressure sensing layer 101 is transmitted to the first varistor, the second varistor, the third varistor, and the fourth varistor, so that the resistance values of the first varistor, the second varistor, the third varistor, and the fourth varistor change. When a certain constant voltage source or constant current source acts on the Wheatstone bridge, one end of the first varistor is connected to one end of the fourth varistor and connected to the constant voltage source or constant current source, and the other end of the varistor is connected to one end of the second varistor and the first voltage output terminal Vout+; the other end of the second varistor and one end of the third varistor are electrically connected to the ground terminal; one end of the third varistor is connected to the other end of the fourth varistor and the second voltage output terminal Vout-.

In this embodiment, the piezoresistive sensor is a piezoresistive contact force sensor, the working range of the connecting column 102 is at least 8N, the external pressure on the connecting column 102 is GPa level, the thickness of the main pressure sensing layer 101 is hundreds of microns, and the groove 106 only needs to be tens of nanometers to hundreds of nanometers. It should be noted that in other embodiments, the working parameters of the piezoresistive sensor are not limited to this.

Example 2

The present embodiment provides a piezoresistive sensor. Referring to FIG4 , the piezoresistive sensor of the present embodiment differs from the piezoresistive sensor of the present embodiment 1 in that: the main pressure-sensitive layer 101 includes a first semiconductor layer 101a and a second semiconductor layer 101b located between the first semiconductor layer 101a and the insulating substrate 200; wherein the piezoresistive resistor layer 104 is located in the first semiconductor layer 101a, the groove 106 is located in the second semiconductor layer 101b, and the lead layer 103 is located at least in the second semiconductor layer 101b.

The lead layer 103 is at least located in the second semiconductor layer 101b. Specifically, the lead layer 103 is only located in the second semiconductor layer 101b, or the lead layer 103 is located in the second semiconductor layer 101b and the first semiconductor layer 101a, so as to increase the contact area between the lead layer 103 and the varistor layer 104.

In one embodiment, a portion of the varistor layer 104 may also extend to one side of the lead layer 103 along the first direction and contact the lead layer 103 , thereby increasing the contact area between the lead layer 103 and the varistor layer 104 .

The materials of the first semiconductor layer 101 a and the second semiconductor layer 101 b may be the same or different.

In one embodiment, the material of the first semiconductor layer 101 a includes a single crystal semiconductor material, such as single crystal silicon.

In one embodiment, the material of the second semiconductor layer 101 b includes a polycrystalline semiconductor material, such as polycrystalline silicon.

In one embodiment, the thickness of the second semiconductor layer 101 b is less than the thickness of the first semiconductor layer 101 a .

In one embodiment, the thickness of the second semiconductor layer 101 b is less than or equal to 1 micrometer.

In this embodiment, the groove 106 is not provided in the first semiconductor layer 101 a , so that ion implantation can be performed on a relatively flat surface of one side of the first semiconductor layer 101 a to form the varistor layer 104 , thereby improving the distribution uniformity of ions in the varistor layer 104 .

Regarding the positional relationship between the groove 106 and the varistor layer 104 , and the positional relationship between the groove 106 and the lead layer 103 , refer to the description of the first embodiment.

The other contents of this embodiment that are the same as those of Embodiment 1 will not be described in detail.

Example 3

This embodiment provides a piezoresistive sensor. Referring to FIG5 , the difference between the piezoresistive sensor of this embodiment and the piezoresistive sensor of Embodiment 1 is that the pressure sensing structure 100 further includes: a bonding layer 107, the bonding layer 107 is located between the main pressure sensing layer 101 and the insulating substrate 200, and the bonding layer 107 has a groove 106; an electrode layer 105 spaced from the groove 106, passes through the bonding layer 107 along the first direction Z and is connected to the lead layer 103. The contact structure 202 is connected to the lead layer 103 through the electrode layer 105.

The groove 106 is arranged in the bonding layer 107 so that ion implantation can be performed on a relatively flat surface of the main pressure-sensitive layer 101 to form the lead layer 103 and the varistor layer 104 , thereby improving the distribution uniformity of ions in the lead layer 103 and the varistor layer 104 .

In one embodiment, the pressure sensing structure 100 further includes an etch stop layer 108 located between the bonding layer 107 and the main pressure sensing layer 101. The electrode layer 105 also penetrates the etch stop layer 108. When an opening for accommodating the electrode layer 105 is formed in the bonding layer 107 and the etch stop layer 108, the etch stop layer 108 can protect the lead layer 103 and reduce the degree of over-etching.

In one embodiment, the groove 106 further extends into the etch stop layer 108 , so that the depth of the groove 106 along the first direction Z increases, thereby improving the overload protection capability of the groove 106 .

It should be noted that, in other embodiments, the groove is located in the bonding layer and does not extend into the etch stop layer.

Regarding the positional relationship between the groove 106 and the varistor layer 104 , and the positional relationship between the groove 106 and the lead layer 103 , refer to the description of the first embodiment.

The other contents of this embodiment that are the same as those of Embodiment 1 will not be described in detail.

Example 4

This embodiment provides a method for preparing a piezoresistive sensor, referring to FIG6 , comprising:

Step S1: forming a pressure sensing structure, wherein a groove is provided on a surface of one side of the pressure sensing structure along a first direction, the pressure sensing structure comprises a piezoresistive layer and a lead layer connected to the piezoresistive layer, and the piezoresistive layer is located on one side of the groove along the first direction;

Step S2: forming an insulating substrate, wherein the insulating substrate is located on one side of the pressure sensing structure along the first direction and faces the groove;

Step S3: forming a contact structure, wherein the contact structure penetrates the insulating substrate along the first direction and is connected to the lead layer.

The step of forming the pressure-sensing structure includes: forming a piezoresistive layer and a lead layer in a semiconductor substrate. The step of forming an insulating substrate includes: arranging an insulating substrate on one side of the semiconductor substrate along a first direction. The step of forming the pressure-sensing structure also includes: after forming the contact structure, etching the surface of the semiconductor substrate on the side away from the insulating substrate, so that the semiconductor substrate forms a main pressure-sensing layer and a connecting column, the connecting column is located on the side of the main pressure-sensing layer away from the insulating substrate and is connected to the main pressure-sensing layer. The piezoresistive layer and the lead layer are located in the main pressure-sensing layer.

The process of forming a piezoresistive sensor is described in detail below with reference to FIGS. 7 to 18 .

7 , a groove 106 is formed on one side surface of the semiconductor substrate 1000 along the first direction Z.

In one embodiment, before forming the groove 106 in the semiconductor substrate 1000 and forming the varistor layer and the lead layer, the surface of the semiconductor substrate 1000 is polished so that the roughness of the surface of the semiconductor substrate 1000 on both sides along the first direction Z is reduced.

In one embodiment, before forming the groove 106 in the semiconductor substrate 1000 and forming the varistor layer and the lead layer, the thickness of the semiconductor substrate 1000 is 500 micrometers to 675 micrometers. The thickness of the semiconductor substrate 1000 is the dimension of the semiconductor substrate 1000 along the first direction Z.

In one embodiment, the resistivity of the semiconductor substrate 1000 is 1 Ω*cm to 10 Ω*cm.

In one embodiment, before the varistor layer and the lead layer are subsequently formed, the semiconductor substrate 1000 has doping ions, and the concentration of the doping ions in the semiconductor substrate 1000 is much lower than the doping concentration of the subsequent varistor layer. For example, before the varistor layer and the lead layer are subsequently formed, the conductivity type of the semiconductor substrate 1000 is N-type. In other embodiments, before the varistor layer and the lead layer are subsequently formed, the semiconductor substrate 1000 is undoped.

The step of forming a groove 106 on a side surface of the semiconductor substrate 1000 along the first direction Z includes: forming a patterned first mask layer on a side surface of the semiconductor substrate 1000 along the first direction Z, the patterned first mask layer exposing a portion of the surface of the semiconductor substrate 1000; etching a portion of the semiconductor substrate 1000 using the patterned first mask layer as a mask to form the groove 106 in the semiconductor substrate 1000; and then removing the patterned first mask layer.

In one embodiment, the material of the patterned first mask layer includes photoresist.

8 , a protection layer 1002 is formed on one side surface of a semiconductor substrate 1000 .

In one embodiment, the material of the protection layer 1002 includes silicon oxide.

In one embodiment, the thickness of the protection layer 1002 is 20 nm to 50 nm.

In one embodiment, the process of forming the protection layer 1002 is an oxidation process.

In other embodiments, the process of forming the protection layer 1002 is a deposition process.

It should be noted that, in the process of forming the protective layer 1002 by the oxidation process, a secondary protective layer F is also formed on the other side surface of the semiconductor substrate 1000, and the secondary protective layer F is arranged opposite to the protective layer 1002 along the first direction Z. In other embodiments, when the protective layer 1002 is formed by the deposition process, the secondary protective layer F may not be formed.

9 , a varistor layer 104 and a wiring layer 103 are formed in a semiconductor substrate 1000 .

In one embodiment, the lead layer 103 is formed after the varistor layer 104 is formed. In another embodiment, the varistor layer 104 is formed after the lead layer 103 is formed.

The process of forming the varistor layer 104 includes an ion implantation process. The process of forming the lead layer 103 includes an ion implantation process.

The steps of forming the lead layer 103 and the varistor layer 104 include: using an ion implantation process to implant ions into the semiconductor substrate 1000 through the protective layer 1002 to respectively form the lead layer 103 and the varistor layer 104. The protective layer 1002 can protect the surface of the semiconductor substrate 1000 and reduce the implantation damage to the semiconductor substrate 1000 caused by the ion implantation process.

10 , after the lead layer 103 and the varistor layer 104 are formed, the protective layer 1002 is removed.

In one embodiment, the method further includes: after forming the lead layer 103 and the varistor layer 104, removing the secondary protective layer F. Further, the secondary protective layer F is removed during the process of removing the protective layer 1002, thereby simplifying the process. In other embodiments, the protective layer 1002 and the secondary protective layer F may be removed in different steps.

In this embodiment, the formation of the lead layer 103 and the varistor layer 104 after the formation of the groove 106 is taken as an example. In other embodiments, the groove 106 may be formed after the formation of the lead layer 103 and the varistor layer 104; or the groove 106 may be formed between the step of forming the lead layer 103 and the step of forming the varistor layer 104.

In one embodiment, the method further includes: performing annealing on the lead layer 103 and the varistor layer 104 to activate ions in the lead layer 103 and the varistor layer 104. In one embodiment, the annealing temperature is 1000°C to 1200°C.

In one embodiment, after removing the protective layer 1002, the lead layer 103 and the varistor layer 104 are annealed. In other embodiments, after annealing the lead layer 103 and the varistor layer 104, the protective layer 1002 is removed.

In one embodiment, it further includes: forming an electrode layer 105 on the surface of the lead layer 103 facing away from the semiconductor substrate 1000. The material of the electrode layer 105 refers to the content of the above-mentioned embodiment 1. The process of forming the electrode layer 105 includes a combination of a deposition process and an etching process.

11 to 15 , an insulating substrate 200 is disposed at one side of a semiconductor body 1000 along a first direction Z. Referring to FIG.

11 , an initial insulating substrate 2000 is provided.

The initial insulating substrate 2000 includes an initial glass substrate.

In one embodiment, the thickness of the initial insulating substrate 2000 is 400 micrometers to 500 micrometers.

12 , a contact hole 201 is formed in a preliminary insulating substrate 2000 .

In one embodiment, the process of forming the contact hole 201 is an etching process, such as one or a combination of a wet etching process and a dry etching process.

In another embodiment, the process of forming the contact hole 201 is a laser drilling process.

The size of the contact hole 201 refers to the description of the first embodiment.

The contact hole 201 extends from the first surface of the initial insulating substrate 2000 into a portion of the initial insulating substrate 2000 , and the bottom surface of the contact hole 201 exposes the material of the initial insulating substrate 2000 .

FIG. 13 is a top view of FIG. 12 , in which a plurality of contact holes 201 are centrally symmetrically arranged.

In other embodiments, the arrangement positions of the plurality of contact holes 201 are not limited.

14 is a schematic diagram based on FIG. 12 , in which the initial insulating substrate 2000 is thinned from its second surface, the second surface being arranged opposite to the first surface, and the initial insulating substrate 2000 after thinning constitutes an insulating substrate 200 . The contact hole 201 penetrates the insulating substrate 200 .

The description of the insulating substrate 200 refers to the aforementioned first embodiment.

15 , an insulating substrate 200 is disposed at one side of a semiconductor body 1000 along a first direction Z. Referring to FIG.

The contact hole 201 penetrates the insulating substrate 200 along the first direction. The contact hole 201 exposes the electrode layer 105 .

The step of disposing the insulating substrate 200 on one side of the semiconductor substrate 1000 along the first direction Z includes: bonding the semiconductor substrate 1000 and the insulating substrate 200 together, for example, bonding the semiconductor substrate 1000 and the insulating substrate 200 together using an anodic bonding process.

Anodic bonding is a bonding process that connects silicon wafers and glass substrates. Anodic bonding is a relatively mature bonding process with low cost.

In this embodiment, before the insulating substrate 200 is disposed on one side of the semiconductor base 1000 along the first direction Z, the contact hole 201 is formed to avoid damage to the lead layer caused by the process of forming the contact hole 201 .

In other embodiments, after the insulating substrate 200 is disposed on one side of the semiconductor body 1000 along the first direction Z, the contact hole 201 is formed in the insulating substrate 200 .

16 , a contact structure 202 is formed. The contact structure 202 penetrates the insulating substrate 200 along the first direction Z and is connected to the lead layer 103 .

Specifically, a contact structure 202 is formed in the contact hole 201, and the contact structure 202 covers the inner wall surface of the contact hole 201. The contact structure 202 is connected to the electrode layer 105.

In one embodiment, the step of forming the contact structure 202 includes: forming a seed layer on the inner wall of the contact hole; forming a contact body layer on the surface of the seed layer. The material description of the contact body layer and the seed layer refers to the above-mentioned embodiment 1.

In one embodiment, the process of forming the seed layer includes a deposition process, such as a sputtering process. In one embodiment, the process of forming the contact body layer includes a deposition process, an electroplating process, or a chemical plating process.

The contact structure 202 may be located in a portion of the contact hole 201 ; or, the contact structure may completely fill the contact hole 201 .

In one embodiment, the contact structure 202 further extends to a side of the insulating substrate 200 away from the pressure sensing structure 100 .

In one embodiment, the method further includes: after forming the contact structure 202, forming a pad 203 connected to the contact structure 202 on the side of the insulating substrate 200 away from the pressure sensing structure 100. The area of the contact structure 202 extending to the side of the insulating substrate 200 away from the pressure sensing structure 100 is located between the pad 203 and the insulating substrate 200.

Fig. 17 is a top view of the pads 203. There are four pads 203. In other embodiments, the number of pads 203 is not limited.

Referring to FIG. 18 , after the contact structure 202 is formed, the surface of the semiconductor substrate 1000 on the side away from the insulating substrate 200 is etched to form the main pressure-sensitive layer 101 and the connecting column 102 on the semiconductor substrate 1000. The connecting column 102 is located on the side of the main pressure-sensitive layer 101 away from the insulating substrate 200 and is connected to the main pressure-sensitive layer 101. The piezoresistive layer 104 and the lead layer 103 are located in the main pressure-sensitive layer 101.

The step of etching the surface of the semiconductor substrate 1000 facing away from the insulating substrate 200 includes: forming a patterned second mask layer on the side of the semiconductor substrate 1000 facing away from the insulating substrate 200, the patterned second mask layer is used to define the position of the connecting column; etching a portion of the semiconductor substrate 1000 using the patterned second mask layer as a mask to form a main pressure-sensitive layer and a connecting column on the semiconductor substrate 1000; and then removing the patterned second mask layer.

The material of the patterned second mask layer includes photoresist.

The process of etching a portion of the semiconductor substrate 1000 using the patterned second mask layer as a mask includes one of a dry etching process and a wet etching process or a combination thereof.

The connecting pillar 102 is arranged opposite to the groove 106 along the first direction Z, and the lead layer 103 is located at the side of the groove 106. The varistor layer 104 is located at one side of the groove 106 along the first direction Z. For more descriptions of the varistor layer 104, the groove 106, the lead layer 103, the main pressure-sensitive layer 101 and the connecting pillar 102, refer to the description of the aforementioned embodiment 1, and will not be described in detail.

Example 5

The difference between this embodiment and Embodiment 4 is that the step of forming a varistor layer 104 and a lead layer 103 in a semiconductor substrate 1000 includes: forming a varistor layer in a first semiconductor layer; forming a second semiconductor layer covering the varistor layer on one side of the first semiconductor layer along a first direction; forming a lead layer in at least the second semiconductor layer; wherein the step of forming a groove on a surface of one side of the semiconductor substrate along the first direction is: forming a groove in the second semiconductor layer.

19 to 25 are schematic diagrams of the structure of the piezoresistive sensor preparation process provided in this embodiment.

19 , a varistor layer 104 is formed in the first semiconductor layer 1003 .

The process of forming the varistor layer 104 includes an ion implantation process.

In one embodiment, the method further includes: forming a first protective layer on one side surface of the first semiconductor layer 1003; using an ion implantation process to implant ions into the first semiconductor layer 1003 through the first protective layer to form the varistor layer 104; and then removing the first protective layer. The first protective layer is used to protect one side surface of the first semiconductor layer 1003 to reduce implantation damage to the first semiconductor layer 1003 during the process of forming the varistor layer 104 by the ion implantation process.

In other embodiments, the first protection layer may not be formed.

For the description of the first semiconductor layer 1003 and the varistor layer 104 , refer to the description of Embodiment 2.

20 , a second semiconductor layer 1004 covering the varistor layer 104 is formed on one side of the first semiconductor layer 1003 in the first direction.

The process of forming the second semiconductor layer 1004 includes a deposition process, such as a low pressure chemical vapor deposition process. The material of the second semiconductor layer 1004 is described in the second embodiment.

In one embodiment, during the process of forming the second semiconductor layer 1004, conductive ions are in-situ doped into the second semiconductor layer 1004 to make the second semiconductor layer 1004 have a certain resistivity, thereby reducing the process time of forming the lead layer in the subsequent ion implantation process.

In one embodiment, the resistivity of the second semiconductor layer 1004 is 1 Ω*cm to 10 Ω*cm.

The second semiconductor layer 1004 and the first semiconductor layer 1003 constitute a semiconductor substrate 1000 .

21 , a wiring layer 103 is formed at least in the second semiconductor layer 1004 .

The process of forming the wiring layer 103 includes an ion implantation process.

In one embodiment, the method further includes: forming a second protective layer on a surface of the second semiconductor layer 1004 on a side away from the first semiconductor layer 1003; using an ion implantation process to implant ions into the second semiconductor layer 1004 through the second protective layer to form the lead layer 103; and then removing the second protective layer. The second protective layer is used to protect the surface of the second semiconductor layer 1004 on a side away from the first semiconductor layer 1003, thereby reducing implantation damage to the second semiconductor layer 1004 during the process of forming the lead layer 103 by the ion implantation process.

In other embodiments, the second protection layer may not be formed.

For the description of the second semiconductor layer 1004 , the first semiconductor layer 1003 , and the wiring layer 103 , refer to the description of Embodiment 2.

In one embodiment, the method further includes: performing annealing on the lead layer 103 and the varistor layer 104 to activate ions in the lead layer 103 and the varistor layer 104. In one embodiment, the annealing temperature is 1000°C to 1200°C.

In one embodiment, after the second protection layer is removed, the lead layer 103 and the varistor layer 104 are annealed. In other embodiments, after the lead layer 103 and the varistor layer 104 are annealed, the second protection layer is removed.

In one embodiment, after the varistor layer 104 is annealed, the lead layer 103 is annealed.

22 , a groove 106 is formed in the second semiconductor layer 1004 .

The process of forming the groove 106 in the second semiconductor layer 1004 includes an etching process, such as a dry etching process and a wet etching process or a combination thereof.

In one embodiment, after forming the wiring layer 103 in the second semiconductor layer 1004, the groove 106 is formed in the second semiconductor layer 1004. In other embodiments, the wiring layer may be formed in the second semiconductor layer after forming the groove in the second semiconductor layer.

During the formation of the groove 106 , the etching depth of the second semiconductor layer 1004 is less than or equal to the spacing distance between the side surface of the second semiconductor layer 1004 facing away from the first semiconductor layer 1003 and the side surface of the varistor layer 104 facing the second semiconductor layer 1004 .

23 , an electrode layer 105 is formed on a surface of the lead layer 103 that is away from the semiconductor substrate 1000 .

The material of the electrode layer 105 refers to the content of the aforementioned embodiment 2. The process of forming the electrode layer 105 includes a combination of a deposition process and an etching process.

24 , an insulating substrate 200 is disposed on one side of the semiconductor substrate 1000 along the first direction Z. Specifically, the insulating substrate 200 is disposed on a side of the second semiconductor layer 1004 away from the first semiconductor layer 1003 .

This step is described with reference to Example 4.

25 , a contact structure 202 is formed. The contact structure 202 penetrates the insulating substrate 200 along the first direction Z and is connected to the lead layer 103 .

This step is described with reference to Example 4.

Referring to FIG. 25 , after the contact structure 202 is formed, the surface of the semiconductor substrate 1000 on the side away from the insulating substrate 200 is etched to form the main pressure-sensitive layer 101 and the connecting column 102 on the semiconductor substrate 1000. The connecting column 102 is located on the side of the main pressure-sensitive layer 101 away from the insulating substrate 200 and is connected to the main pressure-sensitive layer 101. The piezoresistive layer 104 and the lead layer 103 are located in the main pressure-sensitive layer 101.

The surface of the semiconductor substrate 1000 facing away from the insulating substrate 200 is etched to form a main pressure-sensitive layer 101 and a connecting column 102 on the semiconductor substrate 1000. Specifically, the surface of the first semiconductor layer 1003 facing away from the insulating substrate 200 is etched to form a part of the first semiconductor layer 1003 and the second semiconductor layer 1004 to form the main pressure-sensitive layer 101, and another part of the first semiconductor layer 1003 to form a connecting column 102.

For other contents of this step that are the same as those in Example 4, please refer to the description of Example 4.

Example 6

The difference between the present embodiment and the method for preparing a piezoresistive sensor of the aforementioned embodiment lies in that the step of forming a pressure-sensing structure also includes: forming an etch stop layer covering the piezoresistive layer and the lead layer on one side of the semiconductor substrate along the first direction; forming a bonding layer on the side of the etch stop layer away from the semiconductor substrate; forming a groove in the bonding layer; and forming an electrode layer passing through the bonding layer and the etch stop layer along the first direction, the electrode layer being spaced apart from the groove; wherein the contact structure is connected to the lead layer through the electrode layer; the connecting column is arranged opposite to the groove along the first direction, and the lead layer is located on the side of the groove.

26 to 29 are schematic diagrams of the structure of the piezoresistive sensor preparation process provided in this embodiment.

26 , a varistor layer 104 and a wiring layer 103 are formed in a semiconductor substrate 1000 .

In one embodiment, it further includes: forming a protective layer on one side surface of the semiconductor substrate 1000. The step of forming the lead layer 103 and the varistor layer 104 includes: using an ion implantation process to implant ions into the semiconductor substrate 1000 through the protective layer to form the lead layer 103 and the varistor layer 104 respectively. After forming the lead layer 103 and the varistor layer 104, the protective layer is removed.

In other embodiments, the protection layer may not be formed.

The lead layer 103 is formed after the varistor layer 104 is formed. Alternatively, the varistor layer 104 is formed after the lead layer 103 is formed.

In one embodiment, the method further includes: performing annealing treatment on the lead layer 103 and the varistor layer 104 to activate ions in the lead layer 103 and the varistor layer 104 .

Referring to Figure 27, an etch stop layer 108 covering the varistor layer 104 and the lead layer 103 is formed on one side of the semiconductor substrate 1000 along the first direction; a bonding layer 107 is formed on the side of the etch stop layer 108 away from the semiconductor substrate 1000; a groove 106 is formed in the bonding layer 107; and an electrode layer 105 is formed along the first direction to penetrate the bonding layer 107 and the etch stop layer 108, and the electrode layer 105 is spaced apart from the groove 106.

The electrode layer 105 is located on the side of the groove 106 .

The process of forming the etch stop layer 108 includes a deposition process. The process of forming the bonding layer 107 includes a deposition process.

The step of forming the electrode layer 105 penetrating the bonding layer 107 and the etch stop layer 108 along the first direction includes: forming an opening penetrating the bonding layer 107 and the etch stop layer 108 along the first direction; and forming the electrode layer 105 in the opening.

In one embodiment, the electrode layer 105 further extends to a portion of the surface of the bonding layer 107 facing away from the etching stop layer 108. The electrode layer 105 may fill the opening completely, or the electrode layer 105 may be located in a portion of the opening. The electrode layer 105 is connected to the lead layer 103.

The process of forming the electrode layer 105 in the opening includes a combination of a deposition process and an etching process.

The process of forming the groove 106 in the bonding layer 107 includes a combination of a deposition process and an etching process.

In one embodiment, the opening is formed during the process of forming the groove 106, which simplifies the process. In other embodiments, the groove 106 and the opening are formed successively in different steps.

In one embodiment, the recess 106 also extends into the etch stop layer 108 .

In other embodiments, the recess 106 is located in the bonding layer 107 and does not extend into the etch stop layer 108 .

The description about the bonding layer 107 , the etch stop layer 108 , the recess 106 and the electrode layer 105 is the same as that of the third embodiment.

28 , an insulating substrate 200 is disposed on one side of the semiconductor substrate 1000 along the first direction Z; a contact structure 202 is formed, and the contact structure 202 penetrates the insulating substrate 200 along the first direction Z and is connected to the lead layer 103 .

This step is described with reference to Example 4.

Referring to FIG. 29 , after the contact structure 202 is formed, the surface of the semiconductor substrate 1000 on the side away from the insulating substrate 200 is etched to form the main pressure-sensitive layer 101 and the connecting column 102 on the semiconductor substrate 1000. The connecting column 102 is located on the side of the main pressure-sensitive layer 101 away from the insulating substrate 200 and is connected to the main pressure-sensitive layer 101. The piezoresistive layer 104 and the lead layer 103 are located in the main pressure-sensitive layer 101.

This step is described with reference to Example 4.

Example 7

This embodiment provides an electronic device, referring to FIG. 30 , including: the piezoresistive sensor 35 of the aforementioned embodiment.

In one embodiment, the electronic device includes a stylus pen, wherein a piezoresistive sensor 35 is provided in the stylus pen, and the piezoresistive sensor is a piezoresistive contact force sensor.

Styluses are often used with consumer electronic products such as tablets, computers, and mobile phones. When in contact with the touch screen, they can actively transmit signals that are received by the screen to achieve functions such as writing and drawing. The gravity pressure sensing function of the stylus can achieve different thicknesses and shades of writing with different writing forces, which is closer to the actual writing experience. Therefore, pen force sensing is the key to affecting the stylus experience.

30 , the stylus pen includes a pen housing 30, a pen tip 32, a pen core 33, a force transmission member 31, a fixing member 34 and a piezoresistive sensor 35. The pen core 33, the force transmission member 31 and the fixing member 34 are located inside the pen housing 30. The pen tip 32 is connected to the pen core 33, and at least a portion of the pen tip 32 extends to the outside of the pen housing 30. The force transmission member 31 is connected to the pen core 33 and the piezoresistive sensor 35, respectively. One end of the fixing member 34 is connected to the pen housing 30.

In one embodiment, the force transmission member 31 is in a "U" shape, the force transmission member 31 forms a notch, and the piezoresistive sensor 35 is located on the side wall of the notch away from the refill 33. The side surface of the insulating substrate of the piezoresistive sensor 35 away from the pressure sensing structure is fixed to the side wall of the notch away from the refill 33. The connecting column is fixed to the fixing member 34. It should be noted that the shape of the force transmission member 31 is not limited to this.

In one embodiment, the fixing member 34 is in an L-shape. It should be noted that the shape of the fixing member 34 is not limited thereto.

The initial state of the piezoresistive sensor 35 and the fixing member 34 is a contact force state. When the pen tip 32 is subjected to force, the force transmission member 31 drives the piezoresistive sensor 35 to move away from the fixing member 34, and the contact force of the connecting column of the piezoresistive sensor 35 changes, thereby causing the main body pressure sensing layer 101 to deform, and the electrical signal output of the piezoresistive sensor 35 is linearly related to the contact force of the connecting column.

In one embodiment, the working range of the connecting column of the air pressure sensor in the stylus is at least 8N, the connecting column is subjected to an external pressure of GPa, the thickness of the main pressure sensing layer is hundreds of microns, and the groove only needs tens to hundreds of nanometers. In one embodiment, the groove is a vacuum cavity.

In the embodiments provided in the present disclosure, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the above-mentioned module, program segment or a part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and/or flowchart, and the combination of boxes in the block diagram and/or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

It should be noted that in the present disclosure, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element limited by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

Although the embodiments disclosed in the present disclosure are as above, the above contents are only embodiments adopted for facilitating the understanding of the present disclosure and are not intended to limit the present disclosure. Any technician in the technical field to which the present disclosure belongs can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in the present disclosure, but the scope of patent protection of the present disclosure shall still be subject to the scope defined in the attached claims.

Claims (20)

1. A piezoresistive sensor, which is used in a piezoresistive sensor, characterized by comprising the following steps:

The voltage-sensitive structure comprises a voltage-sensitive layer and a lead layer connected with the voltage-sensitive layer, wherein the voltage-sensitive layer is positioned on one side of the groove along the first direction;

The insulation substrate is positioned at one side of the pressure sensing structure along the first direction and faces the groove;

and the contact structure penetrates through the insulating substrate along the first direction and is connected with the lead layer.

2. The piezoresistive sensor according to claim 1, characterized in that the piezoresistive layer extends to an inner wall of the groove on one side in the first direction; or the piezoresistor layer and the groove are arranged at intervals.

3. The piezoresistive sensor according to claim 1, characterized in that the insulating substrate has a contact hole therein penetrating the insulating substrate in the first direction; the contact structure covers an inner wall surface of the contact hole.

4. The piezoresistive sensor according to claim 3, characterized in that the contact structure comprises a seed layer at the inner wall of the contact hole and a contact body layer at the surface of the seed layer.

5. The piezoresistive sensor according to claim 1, characterized in that the insulating substrate comprises a glass substrate.

6. The piezoresistive sensor according to claim 1, characterized in that the pressure sensitive structure comprises a body pressure sensitive layer;

Wherein the varistor layer and the lead layer are positioned in the main body pressure sensing layer; the lead layer is positioned at the side part of the groove.

7. The piezoresistive sensor according to claim 6, characterized in that the pressure sensitive structure further comprises a connection post, which is located at a side of the main body pressure sensitive layer facing away from the insulating substrate and is connected with the main body pressure sensitive layer, the connection post being arranged opposite to the groove along the first direction.

8. The piezoresistive sensor according to claim 6, characterized in that said body pressure sensing layer has said grooves therein.

9. The piezoresistive sensor according to claim 8, characterized in that the body pressure sensing layer comprises a first semiconductor layer and a second semiconductor layer located between the first semiconductor layer and the insulating substrate;

the varistor layer is located in the first semiconductor layer, the groove is located in the second semiconductor layer, and the lead layer is located at least in the second semiconductor layer.

10. The piezoresistive sensor according to claim 6, characterized in that the pressure sensing structure further comprises: a bonding layer located between the body pressure sensing layer and the insulating substrate, the bonding layer having the grooves therein; an electrode layer spaced from the recess, penetrating the bonding layer in the first direction and connected to the lead layer;

Wherein the contact structure is connected with the lead layer through the electrode layer.

11. The piezoresistive sensor according to claim 10, characterized in that the pressure sensitive structure further comprises an etch stop layer between the bonding layer and the bulk pressure sensitive layer;

Wherein the electrode layer also penetrates the etch stop layer.

12. The piezoresistive sensor according to claim 11, wherein the grooves also extend into the etch stop layer.

13. The piezoresistive sensor according to claim 1, characterized in that the piezoresistive layer is a piezoresistive doped layer and the lead layer is a lead doped layer.

14. A method of manufacturing a piezoresistive sensor, comprising:

Forming a pressure sensing structure, wherein a groove is formed in one side surface of the pressure sensing structure along a first direction, the pressure sensing structure comprises a piezoresistor layer and a lead layer connected with the piezoresistor layer, and the piezoresistor layer is positioned on one side of the groove along the first direction;

Forming an insulating substrate, wherein the insulating substrate is positioned on one side of the pressure sensing structure along the first direction and faces the groove;

And forming a contact structure, wherein the contact structure penetrates through the insulating substrate along the first direction and is connected with the lead layer.

15. The method of manufacturing a piezoresistive sensor according to claim 14, characterized in that the step of forming said pressure sensitive structure comprises: forming a piezoresistor layer and a lead layer in a semiconductor substrate;

Wherein the step of forming the insulating substrate includes: providing the insulating substrate on one side of the semiconductor substrate along the first direction;

Wherein the step of forming the pressure sensing structure further comprises: after the contact structure is formed, etching the surface of one side, away from the insulating substrate, of the semiconductor substrate to enable a part of the semiconductor substrate to form a main body pressure sensing layer;

wherein the varistor layer and the lead layer are located in the body pressure sensing layer.

16. The method of manufacturing a piezoresistive sensor according to claim 15, characterized in that the step of forming said pressure sensitive structure further comprises: forming a groove on one side surface of the semiconductor substrate along the first direction;

wherein, the lead wire layer is located the lateral part of recess.

17. The method of manufacturing a piezoresistive sensor according to claim 16, wherein the step of forming the piezoresistive layer and the lead layer in the semiconductor substrate comprises: forming the varistor layer in a first semiconductor layer; forming a second semiconductor layer covering the varistor layer on one side of the first semiconductor layer along the first direction; forming the lead layer at least in the second semiconductor layer;

The step of forming the groove on one side surface of the semiconductor substrate along the first direction comprises the following steps: the recess is formed in the second semiconductor layer.

18. The method of manufacturing a piezoresistive sensor according to claim 15, characterized in that the step of forming said pressure sensitive structure further comprises:

Forming an etching stop layer covering the piezoresistor layer and the lead layer on one side of the semiconductor substrate along the first direction;

Forming a bonding layer on one side of the etching stop layer away from the semiconductor substrate;

forming the groove in the bonding layer; and

Forming an electrode layer penetrating the bonding layer and the etching stop layer along the first direction, wherein the electrode layer is spaced from the groove;

the contact structure is connected with the lead layer through the electrode layer, and the lead layer is positioned on the side part of the groove.

19. An electronic device, comprising: the piezoresistive sensor according to any of claims 1 to 13.

20. The electronic device of claim 19, wherein the electronic device comprises a stylus; the piezoresistive sensor is a piezoresistive contact force sensor.