CN118760316A - A source follower - Google Patents
A source follower Download PDFInfo
- Publication number
- CN118760316A CN118760316A CN202410956102.4A CN202410956102A CN118760316A CN 118760316 A CN118760316 A CN 118760316A CN 202410956102 A CN202410956102 A CN 202410956102A CN 118760316 A CN118760316 A CN 118760316A
- Authority
- CN
- China
- Prior art keywords
- transistor
- current
- source
- follower
- source follower
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
Abstract
Description
技术领域Technical Field
本公开的实施例涉及集成电路技术领域,尤其涉及一种源极跟随器。Embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular to a source follower.
背景技术Background Art
在集成电路中,一般的源极跟随器或者超级源极跟随器电路,其拉电流/灌电流的某一侧为电流源,其能力有限,而另一侧能力较强,对输出的拉电流/灌电流能力不对称,这导致在输出节点阻抗小时,大信号输入输出上升沿/下降沿速度较慢。In an integrated circuit, a general source follower or super source follower circuit has a current source on one side of the current sourcing/sinking circuit, which has limited capability, while the other side has a stronger capability, resulting in an asymmetric output current sourcing/sinking capability. This results in a slower rising/falling edge speed of large signal input and output when the output node impedance is small.
现有技术中,可以通过增加电流源,同时增加输入管的尺寸,以实现大信号的快速响应。然而,采用这种现有技术方案不仅增加了功耗,也增加了电路成本。In the prior art, a fast response of a large signal can be achieved by increasing the current source and the size of the input tube at the same time. However, adopting this prior art solution not only increases power consumption, but also increases circuit cost.
发明内容Summary of the invention
本文中描述的实施例提供了一种源极跟随器,能够实现快速瞬态响应,还能够降低电路功耗和成本。The embodiments described herein provide a source follower circuit that can achieve fast transient response and reduce circuit power consumption and cost.
本公开提供了一种源极跟随器,包括:跟随电路和负反馈环路。The present disclosure provides a source follower, comprising: a follower circuit and a negative feedback loop.
所述跟随电路被配置为,当所述源极跟随器接收到输入信号时,向所述源极跟随器的输出端提供第一电流。所述负反馈环路被配置为,当所述源极跟随器接收到所述输入信号时,向所述源极跟随器的输出端提供第二电流;其中,所述第二电流在瞬态响应过程中逐渐减小直至稳定为预设电流。The follower circuit is configured to provide a first current to the output terminal of the source follower when the source follower receives an input signal. The negative feedback loop is configured to provide a second current to the output terminal of the source follower when the source follower receives the input signal; wherein the second current gradually decreases during a transient response process until it stabilizes to a preset current.
在本公开的一些实施例中,所述跟随电路的输入端连接所述源极跟随器的输入端,所述跟随电路的输出端连接所述负反馈环路的输出端和所述源极跟随器的输出端,所述负反馈环路的输入端连接所述跟随电路的第一参考节点。In some embodiments of the present disclosure, the input end of the follower circuit is connected to the input end of the source follower, the output end of the follower circuit is connected to the output end of the negative feedback loop and the output end of the source follower, and the input end of the negative feedback loop is connected to the first reference node of the follower circuit.
所述跟随电路进一步被配置为,当所述源极跟随器接收到第一输入信号时,向所述源极跟随器的输出端提供第一拉电流。所述负反馈环路被配置为,当所述源极跟随器接收到所述第一输入信号时,向所述源极跟随器的输出端提供第二拉电流。The follower circuit is further configured to provide a first source current to the output terminal of the source follower when the source follower receives a first input signal. The negative feedback loop is configured to provide a second source current to the output terminal of the source follower when the source follower receives the first input signal.
在本公开的一些实施例中,所述负反馈环路包括:电流镜模块、第一晶体管、第二晶体管和第一电流源。In some embodiments of the present disclosure, the negative feedback loop includes: a current mirror module, a first transistor, a second transistor and a first current source.
所述电流镜模块的输入端和所述第二晶体管的第一端连接电源电压,所述电流镜模块的第一输出端连接所述第一电流源的输入端和所述第二晶体管的控制端,所述电流镜模块的第二输出端连接所述第一晶体管的第二端,所述第一电流源的输出端和所述第一晶体管的第一端接地,所述第二晶体管的第二端连接所述源极跟随器的输出端。The input end of the current mirror module and the first end of the second transistor are connected to the power supply voltage, the first output end of the current mirror module is connected to the input end of the first current source and the control end of the second transistor, the second output end of the current mirror module is connected to the second end of the first transistor, the output end of the first current source and the first end of the first transistor are grounded, and the second end of the second transistor is connected to the output end of the source follower.
在本公开的一些实施例中,所述电流镜模块包括:第三晶体管和第四晶体管。In some embodiments of the present disclosure, the current mirror module includes: a third transistor and a fourth transistor.
所述第三晶体管的第一端和所述第四晶体管的第一端连接所述电源电压,所述第三晶体管的控制端、所述第三晶体管的第二端和所述第四晶体管的控制端连接所述第一晶体管的第二端,所述第四晶体管的第二端连接所述第一电流源的输入端和所述第二晶体管的控制端。The first end of the third transistor and the first end of the fourth transistor are connected to the power supply voltage, the control end of the third transistor, the second end of the third transistor and the control end of the fourth transistor are connected to the second end of the first transistor, and the second end of the fourth transistor is connected to the input end of the first current source and the control end of the second transistor.
在本公开的一些实施例中,所述跟随电路包括:第五晶体管、第六晶体管、第二电流源和第三电流源。In some embodiments of the present disclosure, the follower circuit includes: a fifth transistor, a sixth transistor, a second current source, and a third current source.
所述第二电流源的输入端连接所述电源电压,所述第二电流源的输出端连接所述第五晶体管的第一端、所述第六晶体管的第二端和所述源极跟随器的输出端,所述第五晶体管的控制端连接所述源极跟随器的输入端,所述第五晶体管的第二端连接所述第六晶体管的控制端、所述第一晶体管的控制端和所述第三电流源的输入端,所述第三电流源的输出端和所述第六晶体管的第一端接地。The input end of the second current source is connected to the power supply voltage, the output end of the second current source is connected to the first end of the fifth transistor, the second end of the sixth transistor and the output end of the source follower, the control end of the fifth transistor is connected to the input end of the source follower, the second end of the fifth transistor is connected to the control end of the sixth transistor, the control end of the first transistor and the input end of the third current source, and the output end of the third current source and the first end of the sixth transistor are grounded.
在本公开的一些实施例中,所述跟随电路的输入端连接所述源极跟随器的输入端,所述跟随电路的输出端连接所述负反馈环路的输出端和所述源极跟随器的输出端,所述负反馈环路的输入端连接所述跟随电路的第二参考节点。In some embodiments of the present disclosure, the input end of the follower circuit is connected to the input end of the source follower, the output end of the follower circuit is connected to the output end of the negative feedback loop and the output end of the source follower, and the input end of the negative feedback loop is connected to the second reference node of the follower circuit.
所述跟随电路进一步被配置为,当所述源极跟随器接收到第二输入信号时,向所述源极跟随器的输出端提供第一灌电流。所述负反馈环路被配置为,当所述源极跟随器接收到所述第二输入信号时,向所述源极跟随器的输出端提供第二灌电流。The follower circuit is further configured to provide a first sink current to the output terminal of the source follower when the source follower receives a second input signal. The negative feedback loop is configured to provide a second sink current to the output terminal of the source follower when the source follower receives the second input signal.
在本公开的一些实施例中,所述负反馈环路包括:电流镜模块、第一晶体管、第二晶体管和第一电流源。In some embodiments of the present disclosure, the negative feedback loop includes: a current mirror module, a first transistor, a second transistor and a first current source.
所述电流镜模块的第一输入端连接所述第一电流源的输出端和所述第二晶体管的控制端,所述电流镜模块的第二输入端连接所述第一晶体管的第二端,所述第一电流源的输入端和所述第一晶体管的第一端连接电源电压,所述电流镜模块的输出端和所述第二晶体管的第一端接地,所述第二晶体管的第二端连接所述源极跟随器的输出端。The first input end of the current mirror module is connected to the output end of the first current source and the control end of the second transistor, the second input end of the current mirror module is connected to the second end of the first transistor, the input end of the first current source and the first end of the first transistor are connected to the power supply voltage, the output end of the current mirror module and the first end of the second transistor are grounded, and the second end of the second transistor is connected to the output end of the source follower.
在本公开的一些实施例中,所述电流镜模块包括:第三晶体管和第四晶体管。In some embodiments of the present disclosure, the current mirror module includes: a third transistor and a fourth transistor.
所述第三晶体管的第一端和所述第四晶体管的第一端接地,所述第三晶体管的控制端、所述第三晶体管的第二端和所述第四晶体管的控制端连接所述第一晶体管的第二端,所述第四晶体管的第二端连接所述第一电流源的输入端和所述第二晶体管的控制端。The first end of the third transistor and the first end of the fourth transistor are grounded, the control end of the third transistor, the second end of the third transistor and the control end of the fourth transistor are connected to the second end of the first transistor, and the second end of the fourth transistor is connected to the input end of the first current source and the control end of the second transistor.
在本公开的一些实施例中,所述跟随电路包括:第五晶体管、第六晶体管、第二电流源和第三电流源。In some embodiments of the present disclosure, the follower circuit includes: a fifth transistor, a sixth transistor, a second current source, and a third current source.
所述第二电流源的输入端连接所述第五晶体管的第一端、所述第六晶体管的第二端和所述源极跟随器的输出端,所述第二电流源的输出端接地,所述第五晶体管的控制端连接所述源极跟随器的输入端,所述第五晶体管的第二端连接所述第六晶体管的控制端、所述第一晶体管的控制端和所述第三电流源的输出端,所述第三电流源的输入端和所述第六晶体管的第一端连接所述电源电压。The input end of the second current source is connected to the first end of the fifth transistor, the second end of the sixth transistor and the output end of the source follower, the output end of the second current source is grounded, the control end of the fifth transistor is connected to the input end of the source follower, the second end of the fifth transistor is connected to the control end of the sixth transistor, the control end of the first transistor and the output end of the third current source, and the input end of the third current source and the first end of the sixth transistor are connected to the power supply voltage.
在本公开的一些实施例中,所述第三晶体管的宽长比:所述第四晶体管的宽长比=1:1,所述第六晶体管的宽长比:所述第一晶体管的宽长比=N:1,其中,N为正整数。In some embodiments of the present disclosure, the aspect ratio of the third transistor: the aspect ratio of the fourth transistor = 1:1, and the aspect ratio of the sixth transistor: the aspect ratio of the first transistor = N:1, where N is a positive integer.
所述预设电流为Ib3-Ib2+N*Ib1,其中,Ib3为所述第三电流源的输出电流,Ib2为所述第二电流源的输出电流,Ib1为所述第一电流源的输出电流。The preset current is Ib3-Ib2+N*Ib1, wherein Ib3 is the output current of the third current source, Ib2 is the output current of the second current source, and Ib1 is the output current of the first current source.
本公开实施例的技术方案中,源极跟随器包括跟随电路和负反馈环路,当源极跟随器接收到输入信号时,跟随电路可以向源极跟随器的输出端提供第一电流,负反馈环路可以向源极跟随器的输出端提供第二电流,且第二电流在瞬态响应过程中逐渐减小直至稳定为预设电流,在有大信号输入时由跟随电路和负反馈环路共同提供拉电流,或者在有大电信号输出时由跟随电路和负反馈环路共同提供灌电流,能够提升源极跟随器的带载能力,故而能够实现快速瞬态响应。此外,无需增加电流源和输入管的尺寸,故而能够降低电路功耗和成本。In the technical solution of the embodiment of the present disclosure, the source follower includes a follower circuit and a negative feedback loop. When the source follower receives an input signal, the follower circuit can provide a first current to the output end of the source follower, and the negative feedback loop can provide a second current to the output end of the source follower, and the second current gradually decreases during the transient response process until it stabilizes to a preset current. When there is a large signal input, the follower circuit and the negative feedback loop jointly provide a pull current, or when there is a large electrical signal output, the follower circuit and the negative feedback loop jointly provide a sink current, which can improve the load capacity of the source follower, so that a fast transient response can be achieved. In addition, there is no need to increase the size of the current source and the input tube, so the circuit power consumption and cost can be reduced.
上述说明仅是本申请实施例技术方案的概述,为了能够更清楚了解本申请实施例的技术手段,而可依照说明书的内容予以实施,并且为了让本申请实施例的上述和其它目的、特征和优点能够更明显易懂,以下特举本申请的具体实施方式。The above description is only an overview of the technical solution of the embodiment of the present application. In order to more clearly understand the technical means of the embodiment of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the embodiment of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明本申请实施例的技术方案,下面将对实施例描述中所需要使用的附图作一简单地介绍,显而易见地,下面描述中的附图是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions of the embodiments of the present application, a brief introduction will be given below to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
图1为本公开实施例提供的一种源极跟随器的结构示意图。FIG1 is a schematic diagram of the structure of a source follower provided in an embodiment of the present disclosure.
图2为本公开实施例提供的一种源极跟随器的电路示意图。FIG. 2 is a circuit diagram of a source follower provided in an embodiment of the present disclosure.
图3为本公开实施例提供的另一种源极跟随器的电路示意图。FIG. 3 is a circuit diagram of another source follower provided in an embodiment of the present disclosure.
具体实施方式DETAILED DESCRIPTION
为了使本公开的实施例的目的、技术方案和优点更加清楚,下面将结合附图,对本公开的实施例的技术方案进行清楚、完整的描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域技术人员在无需创造性劳动的前提下所获得的所有其它实施例,也都属于本公开保护的范围。In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.
除非另外定义,否则在此使用的所有术语(包括技术和科学术语)具有与本公开主题所属领域的技术人员所通常理解的相同含义。进一步将理解的是,诸如在通常使用的词典中定义的那些的术语应解释为具有与说明书上下文和相关技术中它们的含义一致的含义,并且将不以理想化或过于正式的形式来解释,除非在此另外明确定义。如在此所使用的,将两个或更多部分“连接”或“耦接”到一起的陈述应指这些部分直接结合到一起或通过一个或多个中间部件结合。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together directly or through one or more intermediate components.
在本公开中提及“实施例”意味着,结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个位置出现该短语“实施例”并不一定均是指相同的实施例,也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和隐式地理解的是,本公开所描述的实施例可以与其它实施例相结合。Reference to "embodiments" in this disclosure means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase "embodiments" in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure may be combined with other embodiments.
此外,本公开的说明书和权利要求书或上述附图中的术语“第一”、“第二”等是用于区别不同对象,而不是用于描述特定顺序,可以明示或者隐含地包括一个或者更多个该特征。In addition, the terms "first", "second", etc. in the specification and claims of the present disclosure or the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.
在本公开的描述中,除非另有明确的规定和限定,术语“相连”、“连接”应做广义理解,例如,电路结构的“相连”或“连接”除了可以是指物理上的连接,还可以是指电连接或信号连接,例如,可以是直接相连,即物理连接,也可以通过中间至少一个元件间接相连,只要达到电路相通即可,还可以是两个元件内部的连通;信号连接除了可以通过电路进行信号连接外,也可以是指通过媒体介质进行信号连接,例如,无线电波。In the description of the present disclosure, unless otherwise clearly stipulated and limited, the terms "connected" and "connected" should be understood in a broad sense. For example, the "connection" or "connection" of a circuit structure can refer to not only a physical connection, but also an electrical connection or a signal connection. For example, it can be a direct connection, that is, a physical connection, or it can be an indirect connection through at least one intermediate element, as long as the circuit is connected, and it can also be the internal connection of two elements; signal connection can refer to signal connection through a circuit as well as through a media medium, such as radio waves.
本公开中术语“和/或”,仅仅是一种描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:存在A,同时存在A和B,存在B这三种情况。另外,本文中字符“/”,一般表示前后关联对象是一种“或”的关系。The term "and/or" in this disclosure is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and/or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character "/" in this article generally indicates that the associated objects before and after are in an "or" relationship.
在本公开的描述中,除非另有说明,“多个”和“至少两个”的含义是指两个以上(包括两个),同理,“多组”和“至少两组”指的是两组以上(包括两组)。In the description of the present disclosure, unless otherwise specified, "multiple" and "at least two" mean more than two (including two), and similarly, "multiple groups" and "at least two groups" mean more than two groups (including two).
为了使本技术领域的人员更好地理解本申请方案,下面将结合附图,对本申请实施例中的技术方案进行清楚、完整地描述。In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings.
一般的源极跟随器电路或者超级源极跟随器电路,其拉电流/灌电流的某一侧为电流源,其能力有限,而另一侧能力较强,对输出的拉电流/灌电流能力不对称,这导致在输出节点阻抗小时,大信号输入输出上升沿/下降沿速度较慢,即电路瞬态响应较慢。In a general source follower circuit or super source follower circuit, one side of the current sourcing/sinking is a current source with limited capability, while the other side has a stronger capability, resulting in an asymmetric output current sourcing/sinking capability. This results in a slow rising/falling edge speed of large signal input and output when the output node impedance is small, that is, a slow transient response of the circuit.
为了解决上述问题,通常可以在源极跟随器电路或超级源极跟随器电路中增加电流源,并增加输入管的尺寸。然而该方案由于增加了电流源导致电路功耗较高,由于增加了输入管的尺寸,导致电路成本增加。In order to solve the above problems, a current source can be added to the source follower circuit or super source follower circuit, and the size of the input tube can be increased. However, this solution causes higher circuit power consumption due to the addition of the current source, and increases the circuit cost due to the increase in the size of the input tube.
有鉴于此,本公开提供了一种源极跟随器,包括跟随电路和负反馈环路,当源极跟随器接收到输入信号时,跟随电路可以向源极跟随器的输出端提供第一电流,负反馈环路可以向源极跟随器的输出端提供第二电流,且第二电流在瞬态响应过程中逐渐减小直至稳定为预设电流,在有大信号输入时由跟随电路和负反馈环路共同提供灌电流,或者在有大电信号输出时由跟随电路和负反馈环路共同提供拉电流,能够提升源极跟随器的带载能力,故而能够实现快速瞬态响应。此外,无需增加电流源和输入管的尺寸,故而能够降低电路功耗和成本。In view of this, the present disclosure provides a source follower, including a follower circuit and a negative feedback loop. When the source follower receives an input signal, the follower circuit can provide a first current to the output end of the source follower, and the negative feedback loop can provide a second current to the output end of the source follower, and the second current gradually decreases during the transient response process until it stabilizes to a preset current. When there is a large signal input, the follower circuit and the negative feedback loop jointly provide a sink current, or when there is a large electrical signal output, the follower circuit and the negative feedback loop jointly provide a pull current, which can improve the load capacity of the source follower, so that a fast transient response can be achieved. In addition, there is no need to increase the size of the current source and the input tube, so the circuit power consumption and cost can be reduced.
下面以几个具体的实施例详细描述本公开的技术方案。The technical solution of the present disclosure is described in detail below with reference to several specific embodiments.
图1为本公开实施例提供的一种源极跟随器的结构示意图,如图1所示,源极跟随器100包括跟随电路110和负反馈环路120。FIG. 1 is a schematic diagram of the structure of a source follower provided by an embodiment of the present disclosure. As shown in FIG. 1 , the source follower 100 includes a follower circuit 110 and a negative feedback loop 120 .
其中,跟随电路110的输入端连接源极跟随器100的输入端IN,跟随电路110的输出端连接负反馈环路120的输出端和源极跟随器100的输出端OUT,负反馈环路120的输入端连接跟随电路110的参考节点X。Among them, the input end of the follower circuit 110 is connected to the input end IN of the source follower 100, the output end of the follower circuit 110 is connected to the output end of the negative feedback loop 120 and the output end OUT of the source follower 100, and the input end of the negative feedback loop 120 is connected to the reference node X of the follower circuit 110.
跟随电路110被配置为,当源极跟随器100接收到输入信号时,向源极跟随器100的输出端OUT提供第一电流I1。负反馈环路120被配置为,当源极跟随器100接收到输入信号时,向源极跟随器100的输出端OUT提供第二电流I2,其中,第二电流I2在瞬态响应过程中逐渐减小,直至稳定为预设电流Ipre。The follower circuit 110 is configured to provide a first current I1 to the output terminal OUT of the source follower 100 when the source follower 100 receives an input signal. The negative feedback loop 120 is configured to provide a second current I2 to the output terminal OUT of the source follower 100 when the source follower 100 receives an input signal, wherein the second current I2 gradually decreases during the transient response process until it stabilizes to a preset current Ipre.
示例性的,图2为本公开实施例提供的一种源极跟随器的电路示意图,如图2所示,负反馈环路120包括电流镜模块121、第一晶体管M1、第二晶体管M2和第一电流源IB1。Exemplarily, FIG2 is a circuit diagram of a source follower provided in an embodiment of the present disclosure. As shown in FIG2 , the negative feedback loop 120 includes a current mirror module 121 , a first transistor M1 , a second transistor M2 and a first current source IB1 .
电流镜模块121的输入端和第二晶体管M2的第一端连接电源电压Vcc,电流镜模块121的第一输出端连接第一电流源IB1的输入端和第二晶体管M2的控制端,电流镜模块121的第二输出端连接第一晶体管M1的第二端,第一电流源IB1的输出端和第一晶体管M1的第一端接地,第二晶体管M2的第二端连接源极跟随器100的输出端OUT。The input end of the current mirror module 121 and the first end of the second transistor M2 are connected to the power supply voltage Vcc, the first output end of the current mirror module 121 is connected to the input end of the first current source IB1 and the control end of the second transistor M2, the second output end of the current mirror module 121 is connected to the second end of the first transistor M1, the output end of the first current source IB1 and the first end of the first transistor M1 are grounded, and the second end of the second transistor M2 is connected to the output end OUT of the source follower 100.
如图2所示,电流镜模块121可以包括第三晶体管M3和第四晶体管M4。其中,第三晶体管M3的第一端和第四晶体管M4的第一端连接电源电压Vcc,第三晶体管M3的控制端、第三晶体管M3的第二端和第四晶体管M4的控制端连接第一晶体管M1的第二端,第四晶体管M4的第二端连接第一电流源IB1的输入端和第二晶体管M2的控制端。As shown in FIG2 , the current mirror module 121 may include a third transistor M3 and a fourth transistor M4. The first end of the third transistor M3 and the first end of the fourth transistor M4 are connected to the power supply voltage Vcc, the control end of the third transistor M3, the second end of the third transistor M3 and the control end of the fourth transistor M4 are connected to the second end of the first transistor M1, and the second end of the fourth transistor M4 is connected to the input end of the first current source IB1 and the control end of the second transistor M2.
跟随电路110包括第五晶体管M5、第六晶体管M6、第二电流源IB2和第三电流源IB3,第二电流源IB2的输入端连接电源电压Vcc,第二电流源IB2的输出端连接第五晶体管M5的第一端、第六晶体管M6的第二端和源极跟随器100的输出端OUT,第五晶体管M5的控制端连接源极跟随器100的输入端IN,第五晶体管M5的第二端连接第六晶体管M6的控制端、第一晶体管M1的控制端和第三电流源IB3的输入端,第三电流源IB3的输出端和第六晶体管M6的第一端接地。The follower circuit 110 includes a fifth transistor M5, a sixth transistor M6, a second current source IB2 and a third current source IB3, the input end of the second current source IB2 is connected to the power supply voltage Vcc, the output end of the second current source IB2 is connected to the first end of the fifth transistor M5, the second end of the sixth transistor M6 and the output end OUT of the source follower 100, the control end of the fifth transistor M5 is connected to the input end IN of the source follower 100, the second end of the fifth transistor M5 is connected to the control end of the sixth transistor M6, the control end of the first transistor M1 and the input end of the third current source IB3, and the output end of the third current source IB3 and the first end of the sixth transistor M6 are grounded.
具体的,第一晶体管M1和第六晶体管M6为N型金属氧化物半导体场效应管(MetalOxide Semiconductor Field Transistor,MOS),第二晶体管M2、第三晶体管M3、第四晶体管M4和第五晶体管M5为PMOS。第二晶体管M2的源极、第三晶体管M3的源极和第四晶体管M4的源极连接电源电压Vcc,第二晶体管M2的漏极、第六晶体管M6的漏极、第五晶体管M5的源极和第二电流源IB2的输出端连接源极跟随器100的输出端OUT,第二晶体管M2的栅极连接第四晶体管M4的漏极和第一电流源IB1的输入端。Specifically, the first transistor M1 and the sixth transistor M6 are N-type metal oxide semiconductor field effect transistors (MOS), and the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are PMOS. The source of the second transistor M2, the source of the third transistor M3 and the source of the fourth transistor M4 are connected to the power supply voltage Vcc, the drain of the second transistor M2, the drain of the sixth transistor M6, the source of the fifth transistor M5 and the output end of the second current source IB2 are connected to the output end OUT of the source follower 100, and the gate of the second transistor M2 is connected to the drain of the fourth transistor M4 and the input end of the first current source IB1.
第一晶体管M1的源极和第六晶体管M6的源极接地,第一晶体管M1的漏极连接第三晶体管M3的漏极、第三晶体管M3的栅极和第四晶体管M4的栅极,第一晶体管M1的栅极连接第五晶体管M5的漏极、第六晶体管M6的栅极和第三电流源IB3的输入端,第五晶体管M5的栅极连接源极跟随器100的输入端IN。其中,第五晶体管M5和第三电流源IB3的连接点为第一参考节点X1,则负反馈环路120的输入端连接跟随电路110的第一参考节点X1,第二晶体管M2的栅极与第四晶体管M4的漏极的连接点为节点Y。The source of the first transistor M1 and the source of the sixth transistor M6 are grounded, the drain of the first transistor M1 is connected to the drain of the third transistor M3, the gate of the third transistor M3 and the gate of the fourth transistor M4, the gate of the first transistor M1 is connected to the drain of the fifth transistor M5, the gate of the sixth transistor M6 and the input end of the third current source IB3, and the gate of the fifth transistor M5 is connected to the input end IN of the source follower 100. Among them, the connection point between the fifth transistor M5 and the third current source IB3 is the first reference node X1, then the input end of the negative feedback loop 120 is connected to the first reference node X1 of the follower circuit 110, and the connection point between the gate of the second transistor M2 and the drain of the fourth transistor M4 is the node Y.
第六晶体管M6的宽长比:第一晶体管M1的宽长比=N:1,其中,N为正整数,流经第一晶体管M1的电流为流经第六晶体管M6的电流的1/N,则流经第三晶体管M3的电流也为流经第六晶体管M6的电流的1/N。第三晶体管M3的宽长比:第四晶体管M4的宽长比=1:1,因此节点Y的上拉电流为流经第六晶体管M6的电流的1/N,而节点Y的下拉电流为第一电流源IB1的输出电流为Ib1。The width-to-length ratio of the sixth transistor M6: the width-to-length ratio of the first transistor M1 = N: 1, where N is a positive integer, the current flowing through the first transistor M1 is 1/N of the current flowing through the sixth transistor M6, and the current flowing through the third transistor M3 is also 1/N of the current flowing through the sixth transistor M6. The width-to-length ratio of the third transistor M3: the width-to-length ratio of the fourth transistor M4 = 1: 1, so the pull-up current of the node Y is 1/N of the current flowing through the sixth transistor M6, and the pull-down current of the node Y is the output current of the first current source IB1 is Ib1.
当向源极跟随器100的输入端IN输入一正向阶跃信号时,第五晶体管M5的阻抗变大,第一参考节点X1的电压被第三电流源IB3拉低至地,则第一晶体管M1和第六晶体管M6关断。第二电流源IB2向源极跟随器100的输出端OUT提供第一拉电流I_source1,即第一拉电流I_source1为第二电流源IB2的输出电流Ib2。When a positive step signal is input to the input terminal IN of the source follower 100, the impedance of the fifth transistor M5 increases, and the voltage of the first reference node X1 is pulled down to the ground by the third current source IB3, and the first transistor M1 and the sixth transistor M6 are turned off. The second current source IB2 provides the first source current I_source1 to the output terminal OUT of the source follower 100, that is, the first source current I_source1 is the output current Ib2 of the second current source IB2.
向源极跟随器100的输入端IN输入一正向阶跃信号可以表示源极跟随器100接收到第一输入信号,即源极跟随器100有大信号输入,此时,跟随电路110可以向源极跟随器100的输出端OUT提供第一拉电流I_source1。Inputting a positive step signal to the input terminal IN of the source follower 100 can indicate that the source follower 100 receives the first input signal, that is, the source follower 100 has a large signal input. At this time, the follower circuit 110 can provide the first source current I_source1 to the output terminal OUT of the source follower 100.
此时,流经第六晶体管M6的电流为零,即节点Y的上拉电流为零,节点Y的电压被下拉电流Ib1拉低至地,则第二晶体管M2导通。故而第二晶体管M2可以向源极跟随器100的输出端OUT提供第二拉电流I_source2,则源极跟随器100的拉电流I_source为I_source1+I_source2,显然源极跟随器100的拉电流I_source变大,需要重新建立拉电流I_source与灌电流I_sink的平衡。At this time, the current flowing through the sixth transistor M6 is zero, that is, the pull-up current of the node Y is zero, and the voltage of the node Y is pulled down to the ground by the pull-down current Ib1, and the second transistor M2 is turned on. Therefore, the second transistor M2 can provide the second pull current I_source2 to the output terminal OUT of the source follower 100, and the pull current I_source of the source follower 100 is I_source1+I_source2. Obviously, the pull current I_source of the source follower 100 becomes larger, and the balance between the pull current I_source and the sink current I_sink needs to be re-established.
当拉电流I_source>灌电流I_sink时,开启第六晶体管M6,则有电流流经第六晶体管M6以提高灌电流I_sink。此时,节点Y的上拉电流增加,节点Y的电压升高,流经第二晶体管M2的电流降低,即降低第二拉电流I_source2,以降低拉电流I_source,至此完成一轮负反馈。通过多轮负反馈调整,可以使灌电流I_sink=拉电流I_source,从而使得源极跟随器100达到稳态。When the source current I_source>sink current I_sink, the sixth transistor M6 is turned on, and current flows through the sixth transistor M6 to increase the sink current I_sink. At this time, the pull-up current of node Y increases, the voltage of node Y increases, and the current flowing through the second transistor M2 decreases, that is, the second source current I_source2 is reduced to reduce the source current I_source, thus completing a round of negative feedback. Through multiple rounds of negative feedback adjustment, the sink current I_sink can be made equal to the source current I_source, so that the source follower 100 reaches a steady state.
故而,稳态时的灌电流I_sink为Ib3+流经第六晶体管M6的电流,且流经第六晶体管M6的电流=N*流经第一晶体管M1的电流=N*Ib1,则稳态时满足:Ib2+I_source2=N*Ib1+Ib3,即稳态时的I_source2=N*Ib1+Ib3-Ib2。Therefore, the sink current I_sink in steady state is Ib3 + the current flowing through the sixth transistor M6, and the current flowing through the sixth transistor M6 = N * the current flowing through the first transistor M1 = N * Ib1, then in steady state it satisfies: Ib2 + I_source2 = N * Ib1 + Ib3, that is, I_source2 in steady state = N * Ib1 + Ib3 - Ib2.
如此,当源极跟随器100接收到第一输入信号时,即源极跟随器100有大信号输入时,负反馈环路120可以向源极跟随器100的输出端OUT提供第二拉电流I_source2,且在瞬态响应过程中,第二拉电流I_source2逐渐减小直至稳定为N*Ib1+Ib3-Ib2,即稳定为预设电流Ipre。In this way, when the source follower 100 receives the first input signal, that is, when the source follower 100 has a large signal input, the negative feedback loop 120 can provide a second source current I_source2 to the output terminal OUT of the source follower 100, and during the transient response process, the second source current I_source2 gradually decreases until it stabilizes to N*Ib1+Ib3-Ib2, that is, it stabilizes to the preset current Ipre.
综上所述,当源极跟随器100接收到第一输入信号时,跟随电路110可以向源极跟随器100的输出端提供第一拉电流I_source1,负反馈环路120可以向源极跟随器100的输出端提供第二拉电流I_source2,且第二拉电流I_source2在瞬态响应过程中逐渐减小直至稳定为预设电流Ipre,在有大信号输入时由跟随电路110和负反馈环路120共同提供拉电流I_source,能够提升源极跟随器100的带载能力,故而能够实现快速瞬态响应。此外,无需增加电流源和输入管的尺寸,故而能够降低电路功耗和成本。In summary, when the source follower 100 receives the first input signal, the follower circuit 110 can provide the first pull current I_source1 to the output end of the source follower 100, and the negative feedback loop 120 can provide the second pull current I_source2 to the output end of the source follower 100, and the second pull current I_source2 gradually decreases during the transient response process until it stabilizes to the preset current Ipre. When there is a large signal input, the follower circuit 110 and the negative feedback loop 120 jointly provide the pull current I_source, which can improve the load capacity of the source follower 100, so that a fast transient response can be achieved. In addition, there is no need to increase the size of the current source and the input tube, so the circuit power consumption and cost can be reduced.
在一些实施例中,图3为本公开实施例提供的另一种源极跟随器的电路图,如图3所示,负反馈环路120包括电流镜模块121、第一晶体管M1、第二晶体管M2和第一电流源IB1。In some embodiments, FIG3 is a circuit diagram of another source follower provided in an embodiment of the present disclosure. As shown in FIG3 , the negative feedback loop 120 includes a current mirror module 121 , a first transistor M1 , a second transistor M2 and a first current source IB1 .
电流镜模块121的第一输入端连接第一电流源IB1的输出端和第二晶体管M2的控制端,电流镜模块121的第二输入端连接第一晶体管M1的第二端,第一电流源IB1的输入端和第一晶体管M1的第一端连接电源电压Vcc,电流镜模块121的输出端和第二晶体管M2的第一端接地,第二晶体管M2的第二端连接源极跟随器100的输出端OUT。The first input end of the current mirror module 121 is connected to the output end of the first current source IB1 and the control end of the second transistor M2, the second input end of the current mirror module 121 is connected to the second end of the first transistor M1, the input end of the first current source IB1 and the first end of the first transistor M1 are connected to the power supply voltage Vcc, the output end of the current mirror module 121 and the first end of the second transistor M2 are grounded, and the second end of the second transistor M2 is connected to the output end OUT of the source follower 100.
如图3所示,电流镜模块121可以包括第三晶体管M3和第四晶体管M4。其中,第三晶体管M3的第一端和第四晶体管M4的第一端接地,第三晶体管M3的控制端、第三晶体管M3的第二端和第四晶体管M4的控制端连接第一晶体管M1的第二端,第四晶体管M4的第二端连接第一电流源IB1的输入端和第二晶体管M2的控制端。As shown in Fig. 3, the current mirror module 121 may include a third transistor M3 and a fourth transistor M4. The first end of the third transistor M3 and the first end of the fourth transistor M4 are grounded, the control end of the third transistor M3, the second end of the third transistor M3 and the control end of the fourth transistor M4 are connected to the second end of the first transistor M1, and the second end of the fourth transistor M4 is connected to the input end of the first current source IB1 and the control end of the second transistor M2.
跟随电路110包括第五晶体管M5、第六晶体管M6、第二电流源IB2和第三电流源IB3,第二电流源IB2的输入端连接第五晶体管M5的第一端、第六晶体管M6的第二端和源极跟随器100的输出端OUT,第二电流源IB2的输出端接地,第五晶体管M5的控制端连接源极跟随器100的输入端IN,第五晶体管M5的第二端连接第六晶体管M6的控制端、第一晶体管M1的控制端和第三电流源IB3的输出端,第三电流源IB3的输入端和第六晶体管M6的第一端连接电源电压Vcc。The follower circuit 110 includes a fifth transistor M5, a sixth transistor M6, a second current source IB2 and a third current source IB3, the input end of the second current source IB2 is connected to the first end of the fifth transistor M5, the second end of the sixth transistor M6 and the output end OUT of the source follower 100, the output end of the second current source IB2 is grounded, the control end of the fifth transistor M5 is connected to the input end IN of the source follower 100, the second end of the fifth transistor M5 is connected to the control end of the sixth transistor M6, the control end of the first transistor M1 and the output end of the third current source IB3, and the input end of the third current source IB3 and the first end of the sixth transistor M6 are connected to the power supply voltage Vcc.
具体的,第一晶体管M1和第六晶体管M6为PMOS,第二晶体管M2、第三晶体管M3、第四晶体管M4和第五晶体管M5为NMOS。第二晶体管M2的源极、第三晶体管M3的源极和第四晶体管M4的源极接地,第二晶体管M2的漏极、第六晶体管M6的漏极、第五晶体管M5的源极和第二电流源IB2的输入端连接源极跟随器100的输出端OUT,第二晶体管M2的栅极连接第四晶体管M4的漏极和第一电流源IB1的输出端。Specifically, the first transistor M1 and the sixth transistor M6 are PMOS, and the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are NMOS. The source of the second transistor M2, the source of the third transistor M3 and the source of the fourth transistor M4 are grounded, the drain of the second transistor M2, the drain of the sixth transistor M6, the source of the fifth transistor M5 and the input end of the second current source IB2 are connected to the output end OUT of the source follower 100, and the gate of the second transistor M2 is connected to the drain of the fourth transistor M4 and the output end of the first current source IB1.
第一晶体管M1的源极和第六晶体管M6的源极连接电源电压Vcc,第一晶体管M1的漏极连接第三晶体管M3的漏极、第三晶体管M3的栅极和第四晶体管M4的栅极,第一晶体管M1的栅极连接第五晶体管M5的漏极、第六晶体管M6的栅极和第三电流源IB3的输出端,第五晶体管M5的栅极连接源极跟随器100的输入端IN。其中,第五晶体管M5和第三电流源IB3的连接点为第二参考节点X2,则负反馈环路120的输入端连接跟随电路110的第二参考节点X2,第二晶体管M2的栅极与第四晶体管M4的漏极的连接点为节点Y。The source of the first transistor M1 and the source of the sixth transistor M6 are connected to the power supply voltage Vcc, the drain of the first transistor M1 is connected to the drain of the third transistor M3, the gate of the third transistor M3 and the gate of the fourth transistor M4, the gate of the first transistor M1 is connected to the drain of the fifth transistor M5, the gate of the sixth transistor M6 and the output end of the third current source IB3, and the gate of the fifth transistor M5 is connected to the input end IN of the source follower 100. Among them, the connection point between the fifth transistor M5 and the third current source IB3 is the second reference node X2, then the input end of the negative feedback loop 120 is connected to the second reference node X2 of the follower circuit 110, and the connection point between the gate of the second transistor M2 and the drain of the fourth transistor M4 is the node Y.
第六晶体管M6的宽长比:第一晶体管M1的宽长比=N:1,其中,N为正整数,流经第一晶体管M1的电流为流经第六晶体管M6的电流的1/N,则流经第三晶体管M3的电流也为流经第六晶体管M6的电流的1/N。第三晶体管M3的宽长比:第四晶体管M4的宽长比=1:1,因此节点Y的下拉电流为流经第六晶体管M6的电流的1/N,而节点Y的上拉电流为第一电流源IB1的输出电流为Ib1。The width-to-length ratio of the sixth transistor M6: the width-to-length ratio of the first transistor M1 = N: 1, where N is a positive integer, and the current flowing through the first transistor M1 is 1/N of the current flowing through the sixth transistor M6, and the current flowing through the third transistor M3 is also 1/N of the current flowing through the sixth transistor M6. The width-to-length ratio of the third transistor M3: the width-to-length ratio of the fourth transistor M4 = 1: 1, so the pull-down current of the node Y is 1/N of the current flowing through the sixth transistor M6, and the pull-up current of the node Y is the output current of the first current source IB1, which is Ib1.
当向源极跟随器100的输入端IN输入一反向阶跃信号时,第五晶体管M5的阻抗变大,第二参考节点X2的电压被第三电流源IB3拉高至电源电压Vcc,则第一晶体管M1和第六晶体管M6关断。第二电流源IB2向源极跟随器100的输出端OUT提供第一灌电流I_sink1,即第一灌电流I_sink1为第二电流源IB2的输出电流Ib2。When a reverse step signal is input to the input terminal IN of the source follower 100, the impedance of the fifth transistor M5 increases, and the voltage of the second reference node X2 is pulled up to the power supply voltage Vcc by the third current source IB3, and the first transistor M1 and the sixth transistor M6 are turned off. The second current source IB2 provides the first sink current I_sink1 to the output terminal OUT of the source follower 100, that is, the first sink current I_sink1 is the output current Ib2 of the second current source IB2.
向源极跟随器100的输入端IN输入一反向阶跃信号可以表示源极跟随器100接收到第二输入信号,即源极跟随器100有大信号输出,此时,跟随电路110可以向源极跟随器100的输出端OUT提供第一灌电流I_sink1。Inputting a reverse step signal to the input terminal IN of the source follower 100 may indicate that the source follower 100 receives the second input signal, that is, the source follower 100 has a large signal output. At this time, the follower circuit 110 may provide a first sink current I_sink1 to the output terminal OUT of the source follower 100 .
此时,流经第六晶体管M6的电流为零,即节点Y的下拉电流为零,节点Y的电压被上拉电流Ib1拉高至电源电压Vcc,则第二晶体管M2导通。故而第二晶体管M2可以向源极跟随器100的输出端OUT提供第二灌电流I_sink2,则源极跟随器100的灌电流I_sink为I_sink1+I_sink2,显然源极跟随器100的灌电流I_sink变大,需要重新建立灌电流I_sink与拉电流I_source的平衡。At this time, the current flowing through the sixth transistor M6 is zero, that is, the pull-down current of the node Y is zero, and the voltage of the node Y is pulled up to the power supply voltage Vcc by the pull-up current Ib1, and the second transistor M2 is turned on. Therefore, the second transistor M2 can provide the second sink current I_sink2 to the output terminal OUT of the source follower 100, and the sink current I_sink of the source follower 100 is I_sink1+I_sink2. Obviously, the sink current I_sink of the source follower 100 becomes larger, and it is necessary to re-establish the balance between the sink current I_sink and the pull current I_source.
当灌电流I_sink>拉电流I_source时,开启第六晶体管M6,则有电流流经第六晶体管M6以提高拉电流I_source。此时,节点Y的下拉电流增加,节点Y的电压降低,流经第二晶体管M2的电流降低,即降低第二灌电流I_sink2,以降低灌电流I_sink,至此完成一轮负反馈。通过多轮负反馈调整,可以使灌电流I_sink=拉电流I_source,从而使得源极跟随器100达到稳态。When the sink current I_sink>source current I_source, the sixth transistor M6 is turned on, and current flows through the sixth transistor M6 to increase the source current I_source. At this time, the pull-down current of node Y increases, the voltage of node Y decreases, and the current flowing through the second transistor M2 decreases, that is, the second sink current I_sink2 is reduced to reduce the sink current I_sink, thus completing a round of negative feedback. Through multiple rounds of negative feedback adjustment, the sink current I_sink=source current I_source, so that the source follower 100 reaches a steady state.
故而,稳态时的灌电流拉电流I_source为Ib3+流经第六晶体管M6的电流,且流经第六晶体管M6的电流=N*流经第一晶体管M1的电流=N*Ib1,则稳态时满足:Ib2+I_sink2=N*Ib1+Ib3,即稳态时的I_sink2=N*Ib1+Ib3-Ib2。Therefore, the sink current and source current I_source in steady state is Ib3 + the current flowing through the sixth transistor M6, and the current flowing through the sixth transistor M6 = N * the current flowing through the first transistor M1 = N * Ib1, then in steady state it satisfies: Ib2 + I_sink2 = N * Ib1 + Ib3, that is, I_sink2 in steady state = N * Ib1 + Ib3 - Ib2.
如此,当源极跟随器100接收到第二输入信号时,即源极跟随器100有大信号输出时,负反馈环路120可以向源极跟随器100的输出端OUT提供第二灌电流I_sink2,且在瞬态响应过程中,第二拉灌电流I_sink2逐渐减小直至稳定为N*Ib1+Ib3-Ib2,即稳定为预设电流Ipre。In this way, when the source follower 100 receives the second input signal, that is, when the source follower 100 has a large signal output, the negative feedback loop 120 can provide a second sink current I_sink2 to the output terminal OUT of the source follower 100, and during the transient response process, the second source sink current I_sink2 gradually decreases until it stabilizes to N*Ib1+Ib3-Ib2, that is, it stabilizes to the preset current Ipre.
综上所述,当源极跟随器100接收到第二输入信号时,跟随电路110可以向源极跟随器100的输出端提供第一灌电流I_sink1,负反馈环路120可以向源极跟随器100的输出端提供第二灌电流I_sink2,且第二灌电流I_sink2在瞬态响应过程中逐渐减小直至稳定为预设电流Ipre,在有大信号输出时由跟随电路110和负反馈环路120共同提供灌电流,能够提升源极跟随器100的带载能力,故而能够实现快速瞬态响应。此外,无需增加电流源和输入管的尺寸,故而能够降低电路功耗和成本。In summary, when the source follower 100 receives the second input signal, the follower circuit 110 can provide the first sink current I_sink1 to the output end of the source follower 100, and the negative feedback loop 120 can provide the second sink current I_sink2 to the output end of the source follower 100, and the second sink current I_sink2 gradually decreases during the transient response process until it stabilizes to the preset current Ipre. When there is a large signal output, the follower circuit 110 and the negative feedback loop 120 jointly provide the sink current, which can improve the load capacity of the source follower 100, so that a fast transient response can be achieved. In addition, there is no need to increase the size of the current source and the input tube, so the circuit power consumption and cost can be reduced.
本公开实施例还提供了一种缓冲器,包括上述任一实施例提供的源极跟随器100。An embodiment of the present disclosure further provides a buffer, comprising the source follower 100 provided in any of the above embodiments.
本公开实施例提供的缓冲器包括上述任一实施例提供的源极跟随器100,具有与源极跟随器100相同的功能模块和有益效果,这里不再赘述。The buffer provided by the embodiment of the present disclosure includes the source follower 100 provided by any of the above embodiments, and has the same functional modules and beneficial effects as the source follower 100, which will not be repeated here.
本公开实施例还提供了一种稳压芯片,包括上述任一实施例提供的源极跟随器100。The embodiments of the present disclosure further provide a voltage stabilizing chip, comprising the source follower 100 provided in any of the above embodiments.
本公开实施例提供的稳压芯片包括上述任一实施例提供的源极跟随器100,具有与源极跟随器100相同的功能模块和有益效果,这里不再赘述。The voltage stabilizing chip provided in the embodiments of the present disclosure includes the source follower 100 provided in any of the above embodiments, and has the same functional modules and beneficial effects as the source follower 100, which will not be described in detail here.
除非上下文中另外明确地指出,否则在本文和所附权利要求中所使用的词语的单数形式包括复数,反之亦然。因而,当提及单数时,通常包括相应术语的复数。相似地,措辞“包含”和“包括”将解释为包含在内而不是独占性地。同样地,术语“包括”和“或”应当解释为包括在内的,除非本文中明确禁止这样的解释。在本文中使用术语“示例”之处,特别是当其位于一组术语之后时,所述“示例”仅仅是示例性的和阐述性的,且不应当被认为是独占性的或广泛性的。Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural, and vice versa. Thus, when referring to the singular, the plural of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive, unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.
适应性的进一步的方面和范围从本文中提供的描述变得明显。应当理解,本申请的各个方面可以单独或者与一个或多个其它方面组合实施。还应当理解,本文中的描述和特定实施例旨在仅说明的目的并不旨在限制本申请的范围。Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present application.
以上对本公开的若干实施例进行了详细描述,但显然,本领域技术人员可以在不脱离本公开的精神和范围的情况下对本公开的实施例进行各种修改和变型。本公开的保护范围由所附的权利要求限定。Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202410956102.4A CN118760316A (en) | 2024-07-16 | 2024-07-16 | A source follower |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202410956102.4A CN118760316A (en) | 2024-07-16 | 2024-07-16 | A source follower |
Publications (1)
Publication Number | Publication Date |
---|---|
CN118760316A true CN118760316A (en) | 2024-10-11 |
Family
ID=92943408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202410956102.4A Pending CN118760316A (en) | 2024-07-16 | 2024-07-16 | A source follower |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN118760316A (en) |
-
2024
- 2024-07-16 CN CN202410956102.4A patent/CN118760316A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6819142B2 (en) | Circuit for transforming a differential mode signal into a single ended signal with reduced standby current consumption | |
JP2907752B2 (en) | Output buffer current slew rate control integrated circuit | |
US7560957B2 (en) | High-speed CML circuit design | |
US7432762B2 (en) | Circuit having enhanced input signal range | |
US20080024172A1 (en) | Actively Compensated Buffering for High Speed Current Mode Logic Data Path | |
CN109327218B (en) | Level shift circuit and integrated circuit chip | |
US11979155B2 (en) | Semiconductor integrated circuit device and level shifter circuit | |
US6864732B2 (en) | Flip-flop circuit with reduced power consumption | |
US10367505B2 (en) | Low power general purpose input/output level shifting driver | |
CN103888093B (en) | Common-mode level reset circuit for differential signals | |
JP3047869B2 (en) | Output amplitude adjustment circuit | |
WO2023240856A1 (en) | Data processing circuit and method, and semiconductor memory | |
US6788103B1 (en) | Activ shunt-peaked logic gates | |
CN107463201B (en) | A kind of Voltage-current conversion circuit and device | |
TW201214952A (en) | Differential amplifier | |
CN118760316A (en) | A source follower | |
CN105428351A (en) | Integrated circuit with a plurality of transistors | |
CN113114214B (en) | Level conversion circuit | |
CN209345112U (en) | Operational Transconductance Amplifier | |
CN103427804B (en) | Delay circuit and its delay stages | |
CN109075886B (en) | Interference-free multiplexer | |
CN108170195B (en) | Source follower | |
US9553581B2 (en) | Package-aware state-based leakage power reduction | |
CN204810238U (en) | Auto bias CMOS difference amplifier and integrator | |
US8174291B1 (en) | Buffer circuit with improved duty cycle distortion and method of using the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |