CN118759804A - I-line lithography method - Google Patents

Abstract

The invention provides a line lithography method. Providing a mask plate, providing a wafer substrate, depositing a hard mask layer on the wafer substrate, and forming a photoresist layer on the surface of the hard mask layer; exposing and developing to form a photoetching pattern: in the exposure and development process, ultraviolet light with the wavelength of 365 nanometers is adopted to irradiate the photoresist layer, the mask pattern is subjected to exposure and development, and the focal length of the ultraviolet light with the wavelength of 365 nanometers is adjusted so as to reduce the photoetching feature size; after exposure and development are finished, heating the wafer substrate to soften and deform the photoresist so as to reduce the photoetching feature size to the required feature size; etching is performed to transfer the lithography pattern to the wafer substrate. By improving the exposure method, the exposure is carried out in multiple parts, in different exposure steps, the exposure focusing depth is adjusted, and a hot baking step is added after the exposure developing step, so that the photoresist is softened, expanded and deformed, and the feature size of the graph can be reduced.

Description

I-line lithography method

Technical Field

The present invention relates to the technical field of semiconductor processing, and in particular to an I-line photolithography method.

Background Art

The photolithography machine is the most important tool in chip manufacturing. The transistors of the chip are "engraved" by the photolithography machine. The photolithography machine determines the precision of chip processing. The process capability of the photolithography machine depends first on the wavelength of its light source. Depending on the wavelength of the light source used by the photolithography machine, the physical resolution of the photolithography machine is different. The shorter the wavelength of the light source used by the photolithography machine, the higher the resolution.

The light sources of photolithography machines include mercury lamp light sources, excimer laser light sources, and fluorine laser light sources. Among them, mercury lamp light source photolithography machines are widely used. According to the different wavelengths of the light sources of photolithography machines, photolithography machines are called G-line, H-line, and I-line. Among them, the wavelength of the light source of the G-line photolithography machine is 436nm, the wavelength of the light source of the H-line photolithography machine is 405nm, and the wavelength of the light source of the I-line photolithography machine is 365nm. The longer the wavelength, the worse the process capability, the larger the minimum size produced, and the more backward the process.

The 90nm, 65nm, 0.25um, 0.18um, etc. of semiconductors or chips are the main indicators of the advanced level of IC technology. These numbers represent the technology node (technology node) for making semiconductors or chips, also known as the process node. The minimum wire width that can be achieved by the IC production process has actual physical meanings such as "half pitch", "physical gate length", "process line width", etc. The smaller the line width, the more integrated components there are, and more circuit units can be integrated on the same area, and the power consumption is also lower. However, as the line width decreases, the required process equipment becomes more and more complex, the design difficulty increases, and the cost increases accordingly. This aspect needs to be considered comprehensively.

Critical Dimension (CD) is a key parameter used in semiconductor manufacturing to describe integrated circuit patterns. It refers to the minimum line width or space size formed during the photolithography process. The size of the feature size directly affects the performance, power consumption, and manufacturing cost of integrated circuits.

I-line lithography is a technology that uses ultraviolet light with a wavelength of 365 nanometers for the lithography process in semiconductor manufacturing. This lithography technology is suitable for pattern production with medium line widths. Limited by the wavelength of the light source used, the processing size of the I-line lithography machine is 0.25μm-0.35μm. In the existing lithography process, it is difficult to achieve processing with a feature size less than 0.25μm using an I-line lithography machine.

If you need to achieve processing with smaller feature sizes, you need to reduce the lithography wavelength, but this will increase the lithography cost. With the continuous advancement of integrated circuit manufacturing technology, lithography technology is also developing continuously. The wavelength of the light source has developed from the early mercury lamp to the current extreme ultraviolet (EUV) lithography technology, with a wavelength of 13.5nm, which enables lithography technology to meet the needs of integrated circuit manufacturing with smaller line widths.

For the development of power device chips, in order to realize electronic manufacturing, the I-line lithography process must meet the requirements of high resolution of (polysilicon gate/upper and lower layer vias) graphic size, high etching resistance, and thick film photoresist, without the need to use a wavelength of 248 nanometers (KrF) lithography process, which generates high costs and future bottlenecks in lithography process technology to solve the limitation of I-line lithography process on the size of vias and polysilicon gates of 0.2μm.

Summary of the invention

The object of the present invention is to solve one of the above technical problems and to provide an I-line lithography method to achieve processing with a feature size less than 0.25 μm in an i-line lithography process.

In order to achieve the above object, in some embodiments of the present invention, the following technical solutions are provided:

An I-line lithography method, comprising:

S1: providing a mask plate and a wafer substrate, depositing a hard mask layer on the wafer substrate, and forming a photoresist layer on the surface of the hard mask layer;

S2: performing exposure and development to form a photolithography pattern: wherein, during the exposure and development process, ultraviolet light with a wavelength of 365 nanometers is used to irradiate the photoresist layer, the mask pattern is exposed and developed, and the focal length of the ultraviolet light with a wavelength of 365 nanometers is adjusted to reduce the photolithography feature size;

S3: After the exposure and development are completed, the wafer substrate is heated to soften and deform the photoresist so as to reduce the photolithographic feature size to the required feature size;

S4: Etching is performed to transfer the photolithography pattern to the wafer substrate.

In some embodiments of the present invention, the exposure is performed in multiple steps, and in different exposure steps, the focus depth of the ultraviolet light with a wavelength of 365 nanometers is adjusted, and the focus depth is the distance between the focus of the ultraviolet light and the surface of the photoresist layer;

Wherein, in the previous exposure step, the ultraviolet light with a wavelength of 365 nanometers is located at a first focusing depth, and in the next exposure step, the ultraviolet light with a wavelength of 365 nanometers is located at a second focusing depth, and the first focusing depth is greater than the second focusing depth.

In some embodiments of the present invention, exposure is performed in multiple steps:

In the first exposure step, the photolithography focal length is adjusted so that the focus of the ultraviolet light with a wavelength of 365 nanometers is located at the bottom of the photoresist layer to form a first exposure pattern;

In the subsequent exposure step, the photolithography focal length is adjusted to move the focus of the ultraviolet light upward from the bottom of the photoresist, and the first exposure area pattern is corrected to obtain the second exposure pattern.

In some embodiments of the present invention, in a second exposure step after the first exposure step, the photolithography focus is adjusted so that the focus is located at the center of the photoresist in the thickness direction.

In some embodiments of the present invention, in step S2, the photoresist layer is sliced online along a direction perpendicular to the substrate to detect the characteristic size of the photolithography exposure pattern; the characteristic size of the sliced exposure pattern is compared with the characteristic size required by the standard pattern. If there is a deviation, the ultraviolet light intensity is adjusted to correct the exposure pattern.

In some embodiments of the present invention, in step S3, the wafer substrate is placed on a hot plate, and the wafer substrate is heated to a temperature of the photoresist higher than the conversion temperature of the photoresist, so that the photoresist softens, expands and deforms, thereby reducing the photolithographic feature size.

In some embodiments of the present invention, in step S3, the photoresist is sliced online along a direction perpendicular to the substrate to detect the characteristic size of the photolithography exposure pattern; the characteristic size of the slice exposure pattern is compared with the characteristic size required by the standard pattern, and if there is a deviation, the heating temperature of the wafer substrate is adjusted.

In some embodiments of the present invention, in the exposure and development steps, the photoresist at the bottom of the pattern is controlled to be removed during the development process.

In some embodiments of the present invention, the required feature size is 0.2 μm.

Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

1. By improving the exposure method, the exposure is carried out in multiple steps. In different exposure steps, the exposure focus depth is adjusted to control the graphic feature size, so that smaller feature sizes can be achieved under limited lithography machine resolution, especially under I-line machine resolution, especially feature sizes equal to or less than 0.2μm.

2. Add a heat baking step after the exposure and development steps, and adjust the heat baking process temperature to reach the conversion temperature of the photoresist, so that the photoresist softens, expands and deforms, thereby reducing the feature size of the pattern.

3. The feature size of the graphics can be monitored during the exposure and thermal baking steps, and the feature size can be corrected at any time based on the monitoring results.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

FIG. 1 is a schematic diagram of a wafer substrate exposure structure.

FIG. 2 is a schematic diagram of an exposure pattern obtained in the first exposure step.

FIG. 3 is a schematic diagram of an exposure pattern of normal size obtained in the second exposure step.

FIG. 4 is a flow chart of the I-line photolithography process method provided by the present invention.

DETAILED DESCRIPTION

In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

The light source types and process node data of common lithography machines are shown in Table 1. Different wavelengths are used as the light source of the lithography machine, and the corresponding lithography machines are called G-line, H-line, I-line, and DUV. The longer the wavelength, the worse the process capability, the larger the minimum size, and the more backward the process.

Table 1 Common lithography machine types and process parameters

The existing I-line lithography process can only achieve a process node of 800-250nm. The present invention proposes an I-line lithography method, which is a lithography process using ultraviolet light with a wavelength of 365nm for exposure, and can reduce the process node of the I-line lithography process to less than 250nm, reaching about 200nm.

The I-line photolithography process provided by the present invention refers to FIG4 , and specifically includes the following steps.

S1: providing a mask plate and a wafer substrate, depositing a hard mask layer on the wafer substrate, and forming a photoresist layer on the surface of the hard mask layer.

Referring to FIG. 1 , the left side figure is a wafer substrate, and the middle figure is a wafer substrate after being coated with a photoresist layer.

Before photoresist coating, the wafer can be cleaned to ensure that a layer of light-sensitive photoresist is evenly coated on the clean semiconductor wafer surface. The thickness and uniformity of the photoresist have an important impact on the final pattern quality. The performance of the photoresist directly affects the integration of the integrated circuit and the performance of the chip. Its main components include photosensitive resin, sensitizer and solvent.

After coating the photoresist, the wafer substrate may be preliminarily heated to remove the solvent in the photoresist and increase the adhesion of the photoresist to prevent flow during exposure.

S2: performing exposure and development to form a photolithography pattern: wherein, during the exposure and development process, ultraviolet light with a wavelength of 365 nanometers is used to irradiate the photoresist layer, and the mask pattern is exposed and developed. The exposure process can be continued in multiple exposure steps. In different exposure steps, the focal length of the ultraviolet light with a wavelength of 365 nanometers is adjusted to achieve focusing at different positions of the photoresist layer to reduce the photolithography feature size.

The photolithography exposure and development process requires precise control to ensure accurate pattern transfer and minimize defects. As the feature size of integrated circuits continues to shrink, the accuracy and resolution requirements of the photolithography process are becoming increasingly higher. At the beginning of the exposure and development steps, the wafer is transported to the I-line photolithography machine through a conveyor mechanism. During the exposure process, the circuit pattern designed on the mask is used to irradiate the photoresist on the wafer with a 365nm ultraviolet light source, causing a chemical reaction in the photoresist, changing its solubility.

The two most important parameters in exposure are exposure energy and focus. If the energy and focus are not adjusted properly, the required resolution and size of the image cannot be obtained. This is manifested as the key size of the image exceeding the required range.

Focus control in photolithography technology has a direct impact on exposure quality. During the exposure process, in order to ensure the yield, the exposure area needs to be within the depth of focus at all times.

In some embodiments of the present invention, the exposure is performed in multiple steps, and in different exposure steps, the focus depth of the ultraviolet light with a wavelength of 365 nanometers is adjusted, and the focus depth is the distance between the focus of the ultraviolet light and the surface of the photoresist layer;

In the previous exposure step, the ultraviolet light with a wavelength of 365 nanometers is located at a first focus depth, and in the next exposure step, the ultraviolet light with a wavelength of 365 nanometers is located at a second focus depth, and the first focus depth is greater than the second focus depth. That is, in the next exposure step, the focus of the ultraviolet light is adjusted toward the surface of the photoresist layer.

In a preferred embodiment, in the multi-step exposure process, the focus adjustment process is as follows.

In the first exposure step, the photolithography focal length is adjusted so that the focus of the ultraviolet light with a wavelength of 365 nanometers is located at the bottom of the photoresist layer to form a first exposure pattern;

In the subsequent exposure step, the photolithography focal length is adjusted to move the focus of the ultraviolet light upward from the bottom of the photoresist, and the first exposure area pattern is corrected to obtain the second exposure pattern.

In some embodiments of the present invention, in a second exposure step after the first exposure step, the photolithography focus is adjusted so that the focus is located at the center of the photoresist in the thickness direction.

In the above embodiments, the exposure step may include two steps, or more exposure steps may be included according to the requirements of the pattern size. In multiple exposure steps, in order to ensure the uniformity of the exposure pattern, a step-by-step method may be used to gradually adjust the photolithography focal length, for example, by gradually dividing multiple exposure steps at the same distance from the bottom of the photoresist layer to adjust the position of the photolithography focus point toward the top of the photoresist layer.

Continuing to refer to FIG. 1 , the right side figure in FIG. 1 is a schematic diagram of the photoresist layer after preliminary exposure. After the preliminary exposure, a number of inverted cone-shaped exposure patterns of different sizes are formed on the photoresist layer.

The exposure patterns of different sizes obtained in the first exposure step are further magnified in Figure 2. Since the focus of the photoresist in the first exposure step is located closer to the bottom of the photoresist layer, the initially formed exposure pattern is an inverted cone.

The inverted tapered pattern is obviously not in compliance with the specification. What we expect to obtain is an exposure pattern with uniform width from top to bottom as shown in Figure 3. Therefore, in order to adjust the shape of the exposure pattern, it is necessary to adjust the focal length during the exposure process and adjust the focus of the ultraviolet light toward the upper layer of the photoresist.

During the exposure process, it is necessary to check and correct the size of the graphic features. The prior art method is usually to use an optical microscope or an electron microscope to check the quality of the photoresist pattern to ensure that the size and shape of the pattern meet the design requirements. If there are defects, it may be necessary to correct or repeat the photolithography step.

In some embodiments of the present invention, the steps of checking and correcting the feature size of the pattern are improved. In step S2, the photoresist layer is sliced online along the direction perpendicular to the substrate to detect the feature size of the photolithography exposure pattern; the feature size of the sliced exposure pattern is compared with the feature size required by the standard pattern. If there is a deviation, the ultraviolet light intensity is adjusted to correct the exposure pattern.

Since there may be deviations in the adjustment of focus, light intensity, and leveling, deviations in the shape of the pattern may occur. For example, a photolithography pattern may be narrow at the top and wide at the bottom. In this case, the energy of the ultraviolet light needs to be adjusted to correct the photolithography pattern.

After exposure, the photoresist can be post-baked to further solidify the photochemical reaction. It should be noted that the post-baking process is to heat the photoresist after exposure to promote the completion of the photochemical reaction, thereby affecting the adhesion, light absorption and corrosion resistance of the photoresist. If the heating temperature of the post-baking process is too high or the time is too long, it may cause the photoresist to soften or even deform, affecting the final graphic quality. Therefore, the heating temperature needs to be controlled in the post-baking process to avoid softening and deformation of the photoresist as much as possible.

After exposure, the development step is performed, which can be performed after the post-bake process. The wafer is immersed in the developer, and depending on the type of photoresist (positive or negative), the photoresist in the unexposed area or the exposed area will be dissolved and removed. After the development process, a photoresist pattern corresponding to the mask pattern is left on the wafer surface.

In some embodiments of the present invention, in the exposure and development steps, the photoresist at the bottom of the pattern is controlled to be removed during the development process.

After development, hard baking is performed to further stabilize the photoresist pattern and remove residual developer.

S3: After the exposure and development are completed, the wafer substrate is heated to soften and deform the photoresist so as to reduce the photolithographic feature size to a desired feature size. In some embodiments of the present invention, the desired feature size is 0.2 μm, which is smaller than the feature size that can be achieved by an I-line lithography machine.

In some embodiments of the present invention, in step S3, the wafer substrate is placed on a hot plate and heated to a temperature of the photoresist higher than the conversion temperature of the photoresist, so that the photoresist softens, expands and deforms, thereby reducing the photolithographic feature size. The conversion temperature of the photoresist refers to the temperature at which the photoresist softens and deforms.

There are many types of photoresists, and the conversion temperatures of different photoresists are different. The conversion temperature is affected by the photoresist system. Most UV thin films based on phenolic resin (thickness <5um) usually have a conversion temperature of 100-110°C, while some photoresists with good thermal stability usually have a conversion temperature of 110-120°C, or even 130-135°C. It needs to be adjusted according to the material composition of the photoresist. The hot plate heating system can be designed with a temperature detection and control system to determine the conversion temperature of the photoresist according to the type of photoresist and achieve precise temperature control.

Furthermore, in some embodiments of the present invention, in step S3, the characteristic size can also be determined by a slicing monitoring method. The photoresist is sliced online along the direction perpendicular to the substrate to detect the characteristic size of the photolithography exposure pattern; the characteristic size of the slice exposure pattern is compared with the characteristic size required by the standard pattern, and if there is a deviation, the heating temperature of the wafer substrate is adjusted.

The online slicing method in step S3 and step S4 refers to online slicing processing of the wafer substrate during the lithography process. The online slicing process does not affect the normal lithography process, nor does it affect the execution of subsequent steps of the subsequent wafer lithography process.

S4: Etching is performed to transfer the photolithography pattern to the wafer substrate.

During the etching process, the photoresist pattern is used as a mask to transfer the pattern to the underlying material of the wafer, such as silicon, silicon dioxide or other dielectric layers, through wet or dry etching techniques.

After etching is complete, specific chemicals are used to remove the remaining photoresist in preparation for subsequent process steps.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. It should be pointed out that for those skilled in the art, any modification, equivalent replacement and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the patent application shall be based on the protection scope of the attached claims.

Claims (9)

1. An I-line lithography method, comprising: S1: providing a mask plate and a wafer substrate, depositing a hard mask layer on the wafer substrate, and forming a photoresist layer on the surface of the hard mask layer; S2: performing exposure and development to form a photolithography pattern: wherein, during the exposure and development process, using ultraviolet light with a wavelength of 365 nanometers to irradiate the photoresist layer, exposing and developing the mask pattern, and adjusting the focal length of the ultraviolet light with a wavelength of 365 nanometers; S3: After the exposure and development are completed, the wafer substrate is heated to soften and deform the photoresist so as to reduce the photolithographic feature size to the required feature size; S4: Etching is performed to transfer the photolithography pattern to the wafer substrate. 2. The I-line photolithography method according to claim 1, characterized in that in step S2, the exposure is performed in multiple steps, and in different exposure steps, the focus depth of the ultraviolet light with a wavelength of 365 nanometers is adjusted, and the focus depth is the distance between the focus of the ultraviolet light and the surface of the photoresist layer; Wherein, in the previous exposure step, the ultraviolet light with a wavelength of 365 nanometers is located at a first focusing depth, and in the next exposure step, the ultraviolet light with a wavelength of 365 nanometers is located at a second focusing depth, and the first focusing depth is greater than the second focusing depth. 3. The I-line photolithography method according to claim 2, characterized in that in step S2, the exposure is performed in multiple steps: In the first exposure step, the photolithography focal length is adjusted so that the focus of the ultraviolet light with a wavelength of 365 nanometers is located at the bottom of the photoresist layer to form a first exposure pattern; In the subsequent exposure step, the photolithography focal length is adjusted to move the focus of the ultraviolet light upward from the bottom of the photoresist, and the first exposure area pattern is corrected to obtain the second exposure pattern. 4. The I-line photolithography method according to claim 3, wherein in a second exposure step after the first exposure step, the photolithography focal length is adjusted so that the focal point is located at the center of the photoresist thickness direction. 5. The I-line lithography method according to any one of claims 1 to 4, characterized in that, in step S2, the photoresist layer is sliced online along a direction perpendicular to the substrate to detect the characteristic size of the lithography exposure pattern; the characteristic size of the sliced exposure pattern is compared with the characteristic size required by the standard pattern, and if there is a deviation, the ultraviolet light intensity is adjusted to correct the exposure pattern. 6. The I-line photolithography method as described in claim 1 is characterized in that in step S3, the wafer substrate is placed on a hot plate, and the wafer substrate is heated to a photoresist temperature higher than a conversion temperature of the photoresist, so that the photoresist softens, expands and deforms, thereby reducing the photolithography feature size. 7. The I-line lithography method as described in claim 1 or 6 is characterized in that in step S3, the photoresist is sliced online along the direction perpendicular to the substrate to detect the characteristic size of the lithography exposure pattern; the characteristic size of the sliced exposure pattern is compared with the characteristic size required by the standard pattern, and if there is a deviation, the heating temperature of the wafer substrate is adjusted. 8. The I-line photolithography method according to claim 1, wherein in the exposure and development step, the photoresist at the bottom of the pattern is controlled to be removed during the development process. 9 . The I-line lithography method according to claim 1 , wherein the required feature size is 0.2 μm.