CN118739848A - Voltage conversion chip and electronic equipment - Google Patents

Abstract

The embodiment of the present application provides a voltage conversion chip and an electronic device, which are applied to the field of integrated circuit technology. The voltage conversion chip is provided with a switch circuit, a current detection circuit, a duty cycle adjustment circuit, a driver, an oscillator and a voltage feedback circuit. Among them, the input port and the output port are coupled through the switch circuit. The output end of the voltage feedback circuit is coupled with the first input end of the driver. The input end of the duty cycle adjustment circuit is coupled with the oscillator. The output end of the duty cycle adjustment circuit is coupled with the second input end of the driver. The circuit detection circuit is also coupled with the duty cycle adjustment circuit. The duty cycle of the clock signal output by the duty cycle adjustment circuit can be adjusted by the detection signal of the current detection circuit. The driver controls the switch circuit according to the clock signal and the voltage signal output by the voltage feedback circuit to adjust the output voltage and output current of the output port, so that the output voltage and output current of the output port are more stable.

Description

Voltage conversion chip and electronic equipment

Technical Field

The present application relates to the technical field of integrated circuits, and in particular to a voltage conversion chip and an electronic device.

Background Art

A DC voltage converter (DC-DC converter, referred to as a DC-DC converter) can output DC output voltages of different values according to the DC input voltage to meet the power supply requirements of different components. Therefore, DC-DC converters have been widely used in the fields of uninterruptible power supplies, display screens, electric vehicles, fuel cell grid-connected power generation, photovoltaic grid-connected power generation, etc. Among them, in some application scenarios, two parallel DC-DC converters are required to jointly drive the load to meet the needs of high current output. At present, a common solution is to use one DC-DC converter as the master chip and the other DC-DC converter as the slave chip. When the load does not need to be powered by a large current, the voltage conversion is performed only through the master chip to power the load. When the load needs to be powered by a large current, the master chip controls the slave chip to start, and the two DC-DC converters are connected in parallel to power the load, thereby increasing the current of the load. However, the DC-DC converter in the above scheme only adjusts its own output through its own feedback current or feedback voltage, which is easy to affect the stability of the output current and output voltage.

Summary of the invention

The embodiments of the present application provide a voltage conversion chip and an electronic device to solve the problem of poor stability of output current and output voltage of a DC voltage converter.

In order to achieve the above objectives, the present application provides the following technical solutions:

In a first aspect, a voltage conversion chip is provided, which includes an input port, an output port, a switch circuit, a driver, an oscillator, a voltage feedback circuit, a current detection circuit, a duty cycle adjustment circuit and a control port. The switch circuit includes an input terminal, an output terminal and one or more control terminals, and each control terminal controls the conduction state of a switch in the switch circuit. At the same time, the input terminal of the switch circuit is coupled to the input port; the output terminal of the switch circuit is coupled to the output port; and each control terminal of the switch circuit is coupled to the driver. In addition, a detection point is provided at the input terminal or the output terminal of the switch circuit; the detection terminal of the current detection circuit and the input terminal of the voltage feedback circuit are coupled to the detection point. Further, the output terminal of the voltage feedback circuit is coupled to the first input terminal of the driver. The output terminal of the oscillator is coupled to the input terminal of the duty cycle adjustment circuit. The output terminal of the duty cycle adjustment circuit is coupled to the second input terminal of the driver. The output terminal of the current detection circuit is coupled to the control terminal of the duty cycle adjustment circuit. The current detection circuit, the voltage feedback circuit, the oscillator and the driver are also coupled to the control port. Based on this, the current detection circuit, the voltage feedback circuit, the oscillator and the driver can be started by the input voltage of the control port. The driver can control the switching circuit according to the voltage signal fed back by the voltage feedback circuit and the clock signal output by the duty cycle adjustment circuit; at the same time, the duty cycle adjustment circuit can adjust the duty cycle of the above clock signal according to the output result of the current detection circuit, so as to better control the control signal output by the driver to the switching circuit under the condition of large current output, so that the output current and output voltage of the output port are more stable.

In a possible implementation, the voltage conversion chip further includes: a first connection port and a second connection port. The first connection port is coupled to the output end of the voltage feedback circuit. The second connection port is coupled to the output end of the duty cycle adjustment circuit. The first connection port and the second connection port are used to connect to the slave voltage conversion chip. Based on this, the voltage conversion chip can be used as a master voltage conversion chip to send a voltage signal and a clock signal to a driver of the slave voltage conversion chip, thereby more accurately controlling the output voltage and output current of the slave voltage conversion chip.

In a possible implementation, the voltage conversion chip further includes: a duty cycle detection circuit, a first multiplexer, and a second multiplexer. The first input end of the first multiplexer is coupled to the output end of the duty cycle adjustment circuit. The output end of the first multiplexer is coupled to the second connection port. The input end of the duty cycle detection circuit is coupled to the second connection port. The output end of the duty cycle detection circuit is coupled to the first input end of the second multiplexer. The control end of the first multiplexer and the second input end and control end of the second multiplexer are all coupled to the control port. Based on this, when the control port inputs a high level, the voltage conversion chip can start the driver, the oscillator, the circuit current detection circuit, and the voltage feedback circuit according to the signal input by the control port; at the same time, the high level can make the first input end of the first multiplexer conductive with the output end, and make the second input end of the second multiplexer conductive with the output end, so that the voltage signal output through the first connection port and the clock signal output through the second connection port at the same time, so that when the two voltage conversion chips are interconnected, the voltage conversion chip can be used as the main chip. In addition, when the control port inputs a low level, the driver, the oscillator, the circuit current detection circuit and the voltage feedback circuit are not in operation, the second input terminal of the first multiplexer is connected to the output terminal, and the first input terminal of the second multiplexer is connected to the output terminal. The driver can control the switch circuit through the voltage signal input from the first connection port and the clock signal input from the second connection port, so that when the two voltage conversion chips are interconnected, the voltage conversion chip can be used as a slave chip.

In a possible implementation, the voltage conversion chip further includes: a frequency divider; an input end of the frequency divider is coupled to the second connection port; an output end of the frequency divider is coupled to the second input end of the driver. Based on this, the frequency of the clock signal received by the driver is half the frequency of the clock signal input by the second connection port. In this way, when the voltage conversion chip is used as a slave chip, there can be a phase difference with the signal of the master chip, so that the peak current of the slave chip is staggered from that of the master chip, reducing the impact of current ripple on the output current.

In a possible implementation, the voltage feedback circuit includes: a first resistor, a second resistor and an error amplifier. The first end of the first resistor is coupled to the detection point. The first end of the second resistor and the first input end of the error amplifier are both coupled to the second end of the first resistor, and the second end of the second resistor is grounded. The control end of the error amplifier is coupled to the control port. The output end of the error amplifier is coupled to the first input end of the driver. Based on this, the voltage feedback circuit can compare the feedback voltage with the reference voltage by voltage division and then output a corresponding feedback signal, thereby adjusting the drive signal of the driver.

In a second aspect, a voltage conversion chip is provided, which includes an input port, an output port, a switch circuit, a driver, a duty cycle detection circuit, a first connection port, and a second connection port. The switch circuit includes an input terminal, an output terminal, and one or more control terminals; each control terminal corresponds to controlling the conduction state of a switch in the switch circuit. The input terminal of the switch circuit is coupled to the input port. The output terminal of the switch circuit is coupled to the output port. Each control terminal of the switch circuit is coupled to the driver. The first input terminal of the driver is coupled to the first connection port. The second input terminal of the driver is coupled to the second connection port. The input terminal of the duty cycle detection circuit is coupled to the second connection port. The output terminal of the duty cycle detection circuit is coupled to the control terminal of the driver. Based on this, the driver of the voltage conversion chip can control the switch circuit according to the voltage signal input from the first connection port and the clock signal input from the second connection port, so that the output current and output voltage of the output port can be controlled more flexibly.

In a possible implementation, the voltage conversion chip further includes: a frequency divider. The input end of the frequency divider is coupled to the second connection port; the output end of the frequency divider is coupled to the second input end of the driver. Based on this, the frequency of the clock signal input to the second input end of the driver of the voltage conversion chip is half the frequency of the clock signal of the second connection port. Based on this, when the voltage conversion chip is used as a slave chip, the peak current of the voltage conversion chip can be staggered with the peak current of the master chip, reducing the impact of current ripple on the output current.

In a possible implementation, the voltage conversion chip further includes: a control port, an oscillator, a duty cycle adjustment circuit, a current detection circuit, a first multiplexer, and a voltage feedback circuit. A detection point is provided at the input or output of the switch circuit. The detection end of the current detection circuit and the input end of the voltage feedback circuit are both coupled to the detection point. The output end of the current detection circuit is coupled to the control end of the duty cycle adjustment circuit. The input end of the duty cycle adjustment circuit is coupled to the output end of the oscillator. The output end of the voltage feedback circuit is coupled to the first input end of the driver. The output end of the duty cycle adjustment circuit is coupled to the second input end of the driver. The current detection circuit, the voltage feedback circuit, the driver, and the oscillator are also coupled to the control port. The first input end of the first multiplexer is coupled to the output end of the duty cycle detection circuit; the second input end and the control end of the first multiplexer are both coupled to the control port. Based on this, when the control port inputs a voltage, the voltage conversion chip can also control the duty cycle adjustment circuit through the detection result of the current detection circuit, thereby adjusting the clock signal of the driver. At the same time, the voltage conversion chip can output a voltage signal through the first connection port and output a clock signal through the second connection port, thereby controlling another voltage conversion chip.

In a possible implementation, the voltage conversion chip further includes: a second multiplexer. The first input end of the second multiplexer is coupled to the output end of the duty cycle adjustment circuit. The output end of the second multiplexer is coupled to the second connection port. Based on this, the path of the second multiplexer can be controlled by the level signal of the input port, so as to control the switch circuit according to the voltage signal input by the first connection port and the clock signal input by the second connection port according to actual needs, or control another voltage conversion chip by the voltage signal output by the voltage feedback circuit and the clock signal output by the duty cycle adjustment circuit.

In a possible implementation, the voltage feedback circuit includes: a first resistor, a second resistor and an error amplifier. The first end of the first resistor is coupled to the detection point. The first end of the second resistor and the first input end of the error amplifier are both coupled to the second end of the first resistor. The second end of the second resistor is grounded. The control end of the error amplifier is coupled to the control port. The output end of the error amplifier is coupled to the first connection port. The voltage feedback circuit can compare the feedback voltage with the reference voltage by voltage division and then output a corresponding feedback signal, thereby adjusting the drive signal of the driver.

In a third aspect, an electronic device is provided, the electronic device comprising a circuit board, and a first voltage conversion chip and a second voltage conversion chip disposed on the circuit board. The first voltage conversion chip is coupled to the second voltage conversion chip; wherein the first voltage conversion chip is a voltage conversion chip in any possible implementation of the first aspect; and the second voltage conversion chip is a voltage conversion chip in any possible implementation of the second aspect.

Among them, the technical effects that can be brought about by the above-mentioned third aspect can be referred to the above-mentioned first and second aspects, and will not be repeated here.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of a use scenario of a DC-DC converter;

FIG2 is a schematic diagram of another use scenario of a DC-DC converter;

FIG3 is a schematic diagram of another use scenario of a DC-DC converter;

FIG4 is a schematic diagram of a driving mode corresponding to the DC-DC converter in FIG3 ;

FIG5 is a schematic diagram of the structure of a voltage conversion chip provided in an embodiment of the present application;

FIG6 is a schematic diagram of the structure of another voltage conversion chip provided in an embodiment of the present application;

FIG7 is a schematic diagram of the structure of a DC-DC converter provided in an embodiment of the present application;

FIG8 is a schematic diagram of the structure of another DC-DC converter provided in an embodiment of the present application;

FIG9 is a schematic diagram of the structure of another voltage conversion chip provided in an embodiment of the present application;

FIG10 is a schematic diagram of a working mode of a master chip and a slave chip provided in an embodiment of the present application;

FIG11 is a diagram showing a relationship between an output current and a clock signal provided in an embodiment of the present application;

FIG12 is a schematic diagram of the structure of another voltage conversion chip provided in an embodiment of the present application;

FIG13 is a schematic diagram of the structure of another voltage conversion chip provided in an embodiment of the present application;

FIG14 is a schematic diagram of the structure of another DC-DC converter provided in an embodiment of the present application;

FIG. 15 is a schematic diagram of the structure of another DC-DC converter provided in an embodiment of the present application.

DETAILED DESCRIPTION

The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

In the description of this application, unless otherwise specified, "/" indicates that the objects associated before and after are in an "or" relationship, for example, A/B can represent A or B; "and/or" in this application is only a kind of association relationship describing the associated objects, indicating that there can be three relationships, for example, A and/or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. In addition, in the description of this application, unless otherwise specified, "multiple" refers to two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c can be single or multiple. In addition, in order to facilitate the clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second" and the like are used to distinguish the same items or similar items with substantially the same functions and effects. Those skilled in the art will understand that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first", "second" and the like do not necessarily limit the differences. At the same time, in the embodiments of the present application, the words "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or design solutions. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete manner for easy understanding.

When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical contact or point contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical contact or electrical contact. However, the term "coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

At present, DC voltage converters are used in many electronic devices in the fields of communications, uninterruptible power supplies, display screens, electric vehicles, fuel cell grid-connected power generation, photovoltaic grid-connected power generation, etc. According to different usage scenarios, the current DC voltage converters are mainly divided into step-down DC voltage converters, step-up DC voltage converters, and DC voltage converters with both step-up and step-down functions. Among them, various types of DC voltage converters usually achieve different functions by changing the connection mode of external devices on the basis of voltage conversion chips. Taking the step-up DC voltage converter as an example, as shown in Figure 1, the current step-up DC voltage converter usually includes an inductor L1, a voltage conversion chip 100 and an output capacitor C1. Among them, the voltage conversion chip 100 usually includes an input port, a first switch K1, a second switch K2, a control circuit 110, an output detection circuit 120 and an output port. The first end of the inductor L1 is coupled to the DC power supply V. The second end of the first switch K1 is coupled to the first end of the output capacitor C1 and the positive electrode of the load Z through the output port. The second end of the output capacitor C1 and the negative electrode of the load Z are grounded, and the second end of the second switch K2 is grounded. The input end of the output detection circuit 120 is coupled to the output port. The control circuit 110 is coupled to the output end of the output detection circuit 120, the first switch K1, and the second switch K2, respectively. The output voltage and output current of the output port can be detected by the output detection circuit 120, and then the control circuit 110 controls the first switch K1 and the second switch K2 according to the detection result of the output detection circuit 120, so as to adjust the duty cycle of the output voltage and output stable current and voltage.

In some application scenarios, because there are restrictions on the size of components and requirements for the ripple of the output current, two parallel DC-DC converters are used to drive the load. Among them, the first voltage conversion chip in one DC-DC converter is used as the master chip, and the second voltage conversion chip in another DC-DC converter is used as the slave chip. The first voltage conversion chip is coupled to the second voltage conversion chip. The master chip can transmit a control signal to the slave chip, so that when the load needs to provide a large current, the slave chip is started, and the current is provided to the load through two DC-DC converters. Exemplarily, as shown in Figure 2, in some application scenarios, when two DC-DC converters are used to drive the load, the first DC-DC converter can use the DC-DC converter in Figure 1. The second DC-DC converter includes an inductor L2, a voltage conversion chip 200 and an output capacitor C2. Among them, the voltage conversion chip 200 includes an input port, an output port, a third switch K3, a fourth switch K4 and a driver 210. The first end of the inductor L2 is coupled to the DC power supply V. The first end of the third switch K3 and the first end of the fourth switch K4 are coupled to the second end of the inductor L2 through the input port. The second end of the third switch K3 is coupled to the first end of the output capacitor and the positive electrode of the load Z1 through the output port. The second end of the fourth switch K4 is grounded. The control circuit 110 in the first DC-DC converter is provided with a connection port. The driver 210 is coupled to the connection port on the first DC-DC converter through the connection port on the voltage conversion chip 200. When the output current of the output port of the first DC-DC converter detected by the output detection circuit 120 exceeds the set threshold, the control circuit 110 can also output a clock signal to the driver 210 in the second DC-DC converter through the connection port when outputting a pulse width modulation (PWM) signal to the first switch K1 and the second switch K2, thereby controlling the driver 210 to output a modulation signal to the third switch K3 and the fourth switch K4, so that the two DC-DC converters operate synchronously, thereby meeting the load's demand for large current. When the output current of the output port of the first DC-DC converter detected by the output detection circuit 120 is lower than the set threshold, the control circuit 110 can stop outputting the clock signal to the driver 210, thereby stopping the second DC-DC converter from running and reducing the current provided to the load.

However, the master chip and the slave chip are controlled only by the output current of the master chip, and the slave chip can only control the output current through the PWM signal, which can easily affect the stability of the overall output current and output voltage.

In some application scenarios, as shown in FIG3 , in order to facilitate the control of two interconnected DC-DC converters, the functions of the DC-DC converters can be switched according to the use requirements. At present, some voltage conversion chips are also provided with control ports MS of the master and slave chips, as well as signal input ports and signal output ports for interconnection. Among them, the signal input port includes a clock signal input port PWMI and a start signal input port SYNCI. The signal output port includes a clock signal output port PWMO and a start signal output port SYNCO. The input port of the master chip U1 is coupled to the input power supply V through the inductor L1; the output port of the master chip U1 is coupled to the positive electrode of the load Z1 through the grounding capacitor C1. The input port of the slave chip U2 is coupled to the input power supply V through the inductor L2; the output port of the slave chip U2 is coupled to the positive electrode of the load Z1 through the grounding capacitor C1. Further, the clock signal input port PWMI and the start signal input port SYNCI of the voltage conversion chip as the master chip U1 are both grounded, and the control port MS is coupled to the input power supply V. The clock signal input port PWMI of the voltage conversion chip of the slave chip U2 is coupled to the clock signal output port PWMO of the master chip U1, and its start signal input port SYNCI is coupled to the start signal output port SYNCO of the master chip U1. The control port MS of the slave chip U2 is grounded, and the clock signal output port PWMO and the start signal output port SYNCO are in an unconnected state.

When supplying power to the load Z1, the signals output by the clock signal output port PWMO and the start signal output port SYNCO of the master chip U1, as well as the output currents of the master chip U1 and the slave chip U2 are shown in Figure 4. When the output current of the master chip U1 is lower than the set threshold, although the master chip U1 will also transmit the PWM signal to the clock signal input port PWMI of the slave chip through the clock signal output port PWMO, the start signal output port SYNCO of the master chip U1 will only output a low level, and the slave chip will not run at this time. When the output current of the master chip U1 exceeds the set threshold, the master chip U1 can output a high level through the start signal output port SYNCO, and the slave chip U2 can output current according to the PWM signal, thereby increasing the overall current of the load Z1.

However, through the above method, although the master chip U1 can send a start signal to the slave chip U2, the master chip U1 and the slave chip U2 are only controlled by the output current of the master chip U1, and the slave chip U2 can only control the output current through the PWM signal, which is easy to affect the stability of the overall output current and output voltage.

In order to solve the above problems, as shown in FIG5 , an embodiment of the present application provides a voltage conversion chip 500, which includes an input port Vin, a switch circuit 510, a driver 520, an oscillator 530, a voltage feedback circuit 540, a current detection circuit 550, a duty cycle adjustment circuit 560, an output port Vout, and a control port MS. The switch circuit 510 includes an input terminal, an output terminal, and one or more control terminals; each control terminal controls the conduction state of a switch in the switch circuit 510. The input terminal of the switch circuit 510 is coupled to the input port Vin. The output terminal of the switch circuit 510 is coupled to the output port Vout; each control terminal of the switch circuit 510 is coupled to the driver 520. The input terminal or the output terminal of the switch circuit 510 is provided with a detection point; the detection terminal of the current detection circuit 550 and the input terminal of the voltage feedback circuit 540 are both coupled to the detection point. Further, the output terminal of the voltage feedback circuit 540 is coupled to the first input terminal of the driver 520. The output terminal of the oscillator 530 is coupled to the input terminal of the duty cycle adjustment circuit 560. The output terminal of the duty cycle adjustment circuit 560 is coupled to the second input terminal of the driver 520. The output terminal of the current detection circuit 550 is coupled to the control terminal of the duty cycle adjustment circuit 560. The current detection circuit 550, the voltage feedback circuit 540, the oscillator 530 and the driver 520 are also coupled to the control port MS.

When the voltage conversion chip is used alone, a voltage can be input to the control port MS to supply power to the current detection circuit 550, the voltage feedback circuit 540, the oscillator 530 and the driver 520. At this time, the voltage feedback circuit 540 can output a real-time voltage signal to the driver 520 according to the output voltage. The current detection circuit 550 sends a control signal to the duty cycle adjustment circuit 560 according to the output current of the output port Vout. Among them, when the output current of the output port Vout is lower than the set threshold, a first control signal can be output to the duty cycle adjustment circuit 560, so that the duty cycle adjustment circuit 560 outputs a first clock signal. The driver 520 can control the conduction state of the switch in the switch circuit according to the first clock signal and the real-time first voltage signal. When the output current of the output port Vout exceeds the set threshold, a second control signal can be output to the duty cycle adjustment circuit 560, so that the duty cycle adjustment circuit 560 outputs a second clock signal. The driver 520 can control the conduction state of the switch in the switch circuit according to the second clock signal and the real-time second voltage signal.

Exemplarily, the duty cycle adjustment circuit 560 can select a duty cycle adjustable pulse circuit that can output at least two duty cycle clock signals. For example, when the output current of the output port Vout is lower than the set threshold, the duty cycle adjustment circuit 560 can adjust the signal output by the oscillator 530 to a clock signal with a 20% duty cycle as the first clock signal. When the output current of the output port Vout exceeds the set threshold, the duty cycle adjustment circuit 560 can adjust the signal output by the oscillator 530 to a clock signal with a 80% duty cycle as the second clock signal. The driver 520 can control the switch circuit to output a lower voltage through the first clock signal and the first voltage signal, thereby making the output current of the output port Vout lower. The driver 520 can control the switch circuit to output a higher voltage through the second clock signal and the second voltage signal, thereby increasing the output current of the output port Vout.

In the above implementation process, the duty cycle adjustment circuit 560 can be implemented by a microprocessor or a logic circuit, and the embodiment of the present application does not impose specific restrictions on this. Further, the two duty cycle clock signals output by the duty cycle adjustment circuit 560 can also be adjusted according to actual needs, and are not limited to the above 20% and 80%.

In a possible implementation, the voltage conversion chip may further include a first connection port EA and a second connection port CLK2X. The first connection port EA is coupled to the output end of the voltage feedback circuit 540; the second connection port CLK2X is coupled to the output end of the duty cycle adjustment circuit 560. The first connection port EA and the second connection port CLK2X may be coupled to another slave voltage conversion chip. Through the voltage signal of the first connection port EA and the clock signal output from the second connection port CLK2X, when the two voltage conversion chips are connected in parallel to supply power to the load, the slave voltage conversion chip may be controlled through the voltage conversion chip.

In a possible implementation, the voltage feedback circuit 540 includes: a first resistor R1, a second resistor R2 and an error amplifier U0. The first end of the first resistor R1 is coupled to the detection point. The first end of the second resistor R2 and the first input end of the error amplifier U0 are both coupled to the second end of the first resistor R1. The second end of the second resistor R2 is grounded. The control end of the error amplifier U0 is coupled to the control port MS. The output end of the error amplifier U0 is coupled to the first input end of the driver 520. After the feedback voltage of the voltage signal of the output port Vout is divided by the first resistor R1 and the second resistor R2, it is compared with the reference voltage Ref by the error amplifier U0, and the corresponding voltage signal can be output. For example, when the feedback voltage is higher than the reference voltage Ref, a higher feedback voltage can be output; when the feedback voltage is lower than the reference voltage Ref, a lower feedback voltage signal can be output. The above-mentioned current detection circuit 550 can select various conventional current detection circuits, and the embodiment of the present application does not make specific restrictions on this.

In one embodiment, as shown in FIG6 , the voltage conversion chip 500 may further include a duty cycle detection circuit 580, a first multiplexer A1, and a second multiplexer A2. The first input terminal of the first multiplexer A1 is coupled to the output terminal of the duty cycle adjustment circuit 560; the output terminal of the first multiplexer A1 is coupled to the second connection port CLK2X. The input terminal of the duty cycle detection circuit 580 is coupled to the second connection port CLK2X. The output terminal of the duty cycle detection circuit 580 is coupled to the first input terminal of the second multiplexer A2; the control terminal of the first multiplexer A1 and the second input terminal and the control terminal of the second multiplexer A2 are coupled to the control port MS. When the control port MS has no input voltage (i.e., grounded or empty), the voltage conversion chip 500 can be used as a slave voltage conversion chip. The duty cycle detection circuit 580 can detect whether the clock signal input to the second connection port CLK2X meets the requirements for enabling the driver 520. If the clock signal input by the second connection port CLK2X meets the requirements for enabling the driver 520, the duty cycle detection circuit 580 can transmit an enable signal to the driver 520, so that the driver 520 can control the switch circuit 510 according to the clock signal input by the second connection port CLK2X and the voltage signal input by the first connection port EA, thereby adjusting the output current of the output port Vout.

The duty cycle detection circuit 580 can enable the driver 520 when the duty cycle of the clock signal inputted from the second connection port CLK2X is 80%, and stop enabling the driver 520 when the duty cycle of the clock signal inputted from the second connection port CLK2X is 20%.

In the above implementation process, the above duty cycle detection circuit 580 can be implemented by a microprocessor or a logic circuit, and the embodiment of the present application does not impose specific restrictions on this. Further, when the duty cycle detection circuit 580 outputs an enable signal to the driver 520, the duty cycle of the corresponding clock signal can also be adjusted according to actual needs, and is not limited to the above 20% and 80%.

In a possible implementation, as shown in FIG7 , a boost-type DC-DC converter can be built using the voltage conversion chip 500. The switch circuit 510 may include a first switch K1 and a second switch K2. The first end of the first switch K1 and the first end of the second switch K2 are coupled to the first end of the inductor L1 through the input port Vin. The second end of the first switch K1 is grounded, and the second end of the second switch K2 is coupled to the output port Vout. The second end of the inductor L1 is coupled to the input power supply U. The grounding capacitor C1 and the load Z are both coupled to the output port Vout. The detection point can be set between the second end of the second switch K2 and the output port Vout. The detection end of the current detection circuit 550 and the input end of the voltage feedback circuit 540 are both coupled to the detection point.

When the output current of the output port Vout is lower than the set threshold, the driver 520 can control the conduction state of the first switch K1 and the second switch K2 according to the first clock signal and the first voltage signal, thereby controlling the output current of the output port Vout. Exemplarily, when the first switch K1 is turned on and the second switch K2 is turned off, the inductor L1 can be charged. When the first switch K1 is turned off and the second switch K2 is turned on, it can be discharged through the inductor L1, thereby increasing the output voltage of the output port Vout, thereby increasing the output current. The driver 520 can control the first switch K1 to be turned on for a shorter time through the above-mentioned first clock signal and the first voltage signal, thereby reducing the output voltage of the output port Vout, thereby reducing the output current. The driver 520 can also control the first switch K1 to be turned on for a longer time through the above-mentioned second clock signal and the second voltage signal, thereby increasing the output voltage of the output port Vout, thereby increasing the output current.

In a possible implementation, as shown in FIG8 , the voltage conversion chip 500 can also be used to build a step-down DC-DC converter. Among them, the switch circuit 510 may include a first switch K1 and a second switch K2. The first end of the first switch K1 and the first end of the second switch K2 are coupled to the first end of the inductor L1 through the output port Vout. The second end of the first switch K1 is grounded, and the second end of the second switch K2 is coupled to the input port Vin. The second end of the inductor L1 is coupled to the first end of the grounded capacitor C1 and the positive electrode of the load Z, respectively. The negative electrode of the load Z and the second end of the grounded capacitor C1 are both grounded. The detection point can be set between the coupling point of the second switch K2 and the first switch K1 and the output port Vout, and at the same time, the detection end of the current detection circuit 550 and the input end of the voltage feedback circuit 540 are both coupled to the detection point.

In the implementation corresponding to FIG. 7 and FIG. 8 , the second switch K2 may also be replaced by a diode. The driver 520 may also control the output voltage by controlling the on-time and off-time of the first switch K1. Furthermore, the switch circuit 510 may also select other types of switch circuit structures, which are not specifically limited in the present application.

In a possible implementation, as shown in FIG9 , the embodiment of the present application further provides a voltage conversion chip 900, which includes an input port Vin, an output port Vout, a switch circuit 910, a driver 920, a duty cycle detection circuit 930, a first connection port EA, and a second connection port CLK2X. The switch circuit 910 includes an input terminal, an output terminal, and one or more control terminals; each control terminal controls the conduction state of a switch in the switch circuit 910. The input terminal of the switch circuit 910 is coupled to the input port Vin; the output terminal of the switch circuit 910 is coupled to the output port Vout. Each control terminal of the switch circuit 910 is coupled to the driver 920. The first input terminal of the driver 920 is coupled to the first connection port EA. The second input terminal of the driver 920 is coupled to the second connection port CLK2X. The input terminal of the duty cycle detection circuit 930 is coupled to the second connection port CLK2X. The output terminal of the duty cycle detection circuit 930 is coupled to the control terminal of the driver 920.

In the above manner, the duty cycle detection circuit 930 can enable the driver 920 according to the clock signal input by the second connection port CLK2X, and the driver 920 can control the switch circuit according to the clock signal input by the second connection port CLK2X and the voltage signal input by the first connection port EA, thereby adjusting the output current of the output port Vout. The voltage conversion chip can be coupled with the main voltage conversion chip through the first connection port EA and the second connection port CLK2X, or coupled with a specific controller or control circuit, so as to output a more stable output current according to the clock signal input by the second connection port CLK2X and the voltage signal input by the first connection port EA.

In a possible implementation, the voltage conversion chip may also be provided with a frequency divider 940. The input end of the frequency divider 940 is coupled to the second connection port CLK2X; the output end of the frequency divider 940 is coupled to the second input end of the driver 920. Through the frequency divider 940, the frequency of the clock signal input to the second input end of the driver 920 may be converted to half the frequency of the clock signal input to the second connection port CLK2X, so that the peak value of the current outputted by the output port Vout of the voltage conversion chip 900 may be better staggered with the main voltage conversion chip, thereby reducing the influence of the current ripple on the load current.

Exemplarily, when the voltage conversion chip 900 in FIG. 9 is used as a slave chip and the voltage conversion chip 500 in FIG. 5 is used as a master chip. The working mode of the two voltage conversion chips is shown in FIG. 10. Among them, when the voltage signal output by the voltage feedback circuit 540 in the master chip is lower than the set threshold value, the output current of the output port Vout of the master chip is lower than the set threshold value, then the duty cycle of the clock signal output by the second connection port CLK2X of the master chip is 20%. At this time, the duty cycle detection circuit 930 provides a low level to the enable end of the driver 920, and the slave chip does not operate. When the voltage signal output by the voltage feedback circuit 540 is higher than the set threshold value, the output current of the output port Vout of the master chip exceeds the set threshold value, then the duty cycle of the clock signal output by the second connection port CLK2X of the master chip is 80%. At this time, the duty cycle detection circuit 930 can provide a high level to the enable end of the driver 920 in the next clock signal cycle, so that the slave chip operates, and the load Z is powered by the master chip and the slave chip in parallel, thereby increasing the current of the load Z. When the voltage signal output by the voltage feedback circuit 540 is lower than the set threshold again, the output current of the output port Vout of the master chip is lower than the set threshold, and the duty cycle of the clock signal output by the second connection port CLK2X of the master chip is 20%. At this time, the duty cycle detection circuit 930 provides a low level to the enable terminal of the driver 920, and the slave chip stops running.

In the above process, the relationship between the output current of the master chip and the slave chip and the clock signal of the second connection port CLK2X is shown in FIG11. Specifically, when the duty cycle of the clock signal output by the second connection port CLK2X of the master chip is 20%, the master chip normally outputs a PWM signal to the switch circuit 510. When the duty cycle of the clock signal output by the second connection port CLK2X of the master chip is 80%, the driver 920 in the slave chip outputs a PWM signal to the corresponding switch circuit 910 in the next signal cycle. Considering that the frequency divider 940 makes the frequency of the clock signal twice that of the PWM signal output by the driver 920, the above method can make the PWM signals of the master chip and the slave chip have a phase difference of 180 degrees, thereby staggering the peak currents of the master chip and the slave chip to reduce the influence of the current ripple on the stability of the load current.

In the above implementation process, the duty cycle of the clock signal can also be adjusted according to actual needs, and is not limited to the above 20% and 80%.

In a possible implementation, as shown in FIG12 , the voltage conversion chip 900 may further include a control port MS, an oscillator 950, a duty cycle adjustment circuit 960, a current detection circuit 970, a first multiplexer A1, and a voltage feedback circuit 980. Among them, a detection point is provided at the input end or the output end of the switch circuit 910. The detection end of the current detection circuit 970 and the input end of the voltage feedback circuit 980 are both coupled to the detection point. The output end of the current detection circuit 970 is coupled to the control end of the duty cycle adjustment circuit 960. The input end of the duty cycle adjustment circuit 960 is coupled to the output end of the oscillator 950. The output end of the voltage feedback circuit 980 is coupled to the first input end of the driver 920. The output end of the duty cycle adjustment circuit 960 is coupled to the second input end of the driver 920. The current detection circuit 970, the voltage feedback circuit 980, the driver 920, and the oscillator 950 are also coupled to the control port MS. The first input end of the first multiplexer A1 is coupled to the output end of the duty cycle detection circuit 930. The second input terminal and the control terminal of the first multiplexer A1 are coupled to the control port MS. The voltage feedback circuit 980 may adopt the structure of the voltage feedback circuit 540 in FIG. 5 to FIG. 8 , and the embodiment of the present application will not be described in detail here.

In the above manner, in addition to controlling the output current through the voltage signal input from the first connection port EA and the clock signal input from the second connection port CLK2X, the voltage conversion chip 900 can also start the current detection circuit 970, the voltage feedback circuit 980, the driver 920 and the oscillator 950 when the voltage is input to the control port MS. At this time, the voltage feedback circuit 980 can provide a feedback voltage signal for the driver 920. The duty cycle adjustment circuit 960 can adjust the basic signal output by the oscillator 950 to a clock signal with a preset duty cycle through the detection signal of the current detection circuit 970, and transmit the clock signal to the driver 920. The driver 920 controls the switch circuit 910 according to the above voltage signal and clock signal, so as to output a more stable current.

In a possible implementation, as shown in FIG. 13 , the voltage conversion chip 900 may further include a second multiplexer A2. The first input terminal of the second multiplexer A2 is coupled to the output terminal of the duty cycle adjustment circuit 960. The output terminal of the second multiplexer A2 is coupled to the second connection port CLK2X. When the control port MS inputs a voltage, the second input terminal of the second multiplexer A2 is connected to the output terminal, and the first input terminal of the first multiplexer A1 is connected to the output terminal. At this time, the driver 920 can control the switch circuit 910 through the voltage signal output by the voltage feedback circuit 980 and the clock signal output by the duty cycle adjustment circuit 960. When the control port MS has no input voltage (i.e., grounded or empty), the first input terminal of the second multiplexer A2 is connected to the output terminal, and the second input terminal of the first multiplexer A1 is connected to the output terminal. At this time, the driver 920 can control the switch circuit 910 through the voltage signal received by the first connection port EA and the clock signal received by the second connection port CLK2X.

In a possible implementation, as shown in FIG14 , the voltage conversion chip 900 can be used to build a boost DC-DC converter. The switch circuit 910 may include a first switch K1 and a second switch K2. The first end of the first switch K1 and the first end of the second switch K2 are coupled to the first end of the inductor L1 through the input port Vin. The second end of the first switch K1 is grounded, and the second end of the second switch K2 is coupled to the output port Vout. The second end of the inductor L1 is coupled to the input power supply U, and the load Z and the grounding capacitor C1 are both coupled to the output port Vout. The detection point can be set between the second end of the second switch K2 and the output port Vout. The detection end of the current detection circuit 970 and the input end of the voltage feedback circuit 980 are both coupled to the detection point.

Exemplarily, when there is no input voltage to the control port MS, the duty cycle detection circuit 930 can start the driver 920 when the duty cycle of the clock signal input to the second connection port CLK2X meets the preset value. The driver 920 can control the on-time and off-time of the first switch K1 and the second switch K2 according to the clock signal input to the second connection port CLK2X and the voltage signal input to the first connection port EA. When the first switch K1 is turned on and the second switch K2 is turned off, the inductor L1 can be charged. When the first switch K1 is turned off and the second switch K2 is turned on, it can be discharged through the inductor L1, thereby increasing the output voltage of the output port Vout, and then increasing the output current. The on-control process of the first switch K1 and the second switch K2 can refer to the corresponding description in Figure 7, and the embodiment of the present application will not be repeated.

Furthermore, when a voltage is input to the control port MS, if the output current of the output port Vout is lower than the set threshold, the driver 920 can also control the conduction state of the first switch K1 and the second switch K2 according to the voltage signal output by the voltage feedback circuit 980 and the clock signal output by the duty cycle adjustment circuit 960, thereby controlling the output current of the output port Vout.

In a possible implementation, as shown in FIG15 , the voltage conversion chip 900 can also be used to build a step-down DC-DC converter. Among them, the switch circuit 910 may include a first switch K1 and a second switch K2. The first end of the first switch K1 and the first end of the second switch K2 are coupled to the first end of the inductor L1 through the output port Vout. The second end of the first switch K1 is grounded, and the second end of the second switch K2 is coupled to the input port Vin. The second end of the inductor L1 is coupled to the first end of the grounded capacitor C1 and the positive electrode of the load Z, respectively. The negative electrode of the load Z and the second end of the grounded capacitor C1 are both grounded. The detection point can be set between the coupling point of the second switch K2 and the first switch K1 and the output port Vout, and at the same time, the detection end of the current detection circuit 970 and the input end of the voltage feedback circuit 980 are both coupled to the detection point.

In the implementations corresponding to FIG. 14 and FIG. 15 , the second switch K2 may also be replaced by a diode. The driver 920 may also control the output voltage by controlling the on-time and off-time of the first switch K1. Furthermore, the switch circuit 910 may also select other types of switch circuit structures, which are not specifically limited in the embodiments of the present application.

Those of ordinary skill in the art will appreciate that the functions of the circuits of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

In the several embodiments provided in the present application, it should be understood that the disclosed circuits and electronic devices can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of modules is only a logical function division, and there may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.

In addition, each voltage conversion chip in each embodiment of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (11)

1. A voltage conversion chip, characterized in that it includes an input port, an output port, a switch circuit, a driver, an oscillator, a voltage feedback circuit, a current detection circuit, a duty cycle adjustment circuit and a control port; The switch circuit comprises an input terminal, an output terminal and one or more control terminals; each of the control terminals correspondingly controls the conduction state of a switch in the switch circuit; The input end of the switch circuit is coupled to the input port; the output end of the switch circuit is coupled to the output port; each control end of the switch circuit is coupled to the driver; The input end or the output end of the switch circuit is provided with a detection point; the detection end of the current detection circuit and the input end of the voltage feedback circuit are both coupled to the detection point; An output terminal of the voltage feedback circuit is coupled to a first input terminal of the driver; The output end of the oscillator is coupled to the input end of the duty cycle adjustment circuit; the output end of the duty cycle adjustment circuit is coupled to the second input end of the driver; The output end of the current detection circuit is coupled to the control end of the duty cycle adjustment circuit; The current sensing circuit, the voltage feedback circuit, the oscillator, and the driver are also coupled to the control port. 2. The voltage conversion chip according to claim 1, further comprising: a first connection port and a second connection port; The first connection port is coupled to an output end of the voltage feedback circuit; The second connection port is coupled to an output end of the duty cycle adjustment circuit; The first connection port and the second connection port are used to connect to a slave voltage conversion chip. 3. The voltage conversion chip according to claim 2, further comprising: a duty cycle detection circuit, a first multiplexer and a second multiplexer; The first input end of the first multiplexer is coupled to the output end of the duty cycle adjustment circuit; the output end of the first multiplexer is coupled to the second connection port; The input end of the duty cycle detection circuit is coupled to the second connection port; the output end of the duty cycle detection circuit is coupled to the first input end of the second multiplexer; The control end of the first multiplexer and the second input end and the control end of the second multiplexer are coupled to the control port. 4. The voltage conversion chip according to claim 2 or 3 is characterized in that it also includes: a frequency divider; an input end of the frequency divider is coupled to the second connection port; and an output end of the frequency divider is coupled to the second input end of the driver. 5. The voltage conversion chip according to any one of claims 1 to 4, characterized in that the voltage feedback circuit comprises: a first resistor, a second resistor and an error amplifier; The first end of the first resistor is coupled to the detection point; the first end of the second resistor and the first input end of the error amplifier are both coupled to the second end of the first resistor; The second end of the second resistor is grounded; The control terminal of the error amplifier is coupled to the control port; An output terminal of the error amplifier is coupled to a first input terminal of the driver. 6. A voltage conversion chip, characterized in that it comprises an input port, an output port, a switch circuit, a driver, a duty cycle detection circuit, a first connection port and a second connection port; The switch circuit comprises an input terminal, an output terminal and one or more control terminals; each of the control terminals correspondingly controls the conduction state of a switch in the switch circuit; The input end of the switch circuit is coupled to the input port; the output end of the switch circuit is coupled to the output port; each control end of the switch circuit is coupled to the driver; The first input terminal of the driver is coupled to the first connection port; the second input terminal of the driver is coupled to the second connection port; The input end of the duty cycle detection circuit is coupled to the second connection port; the output end of the duty cycle detection circuit is coupled to the control end of the driver. 7. The voltage conversion chip according to claim 6, further comprising: a frequency divider; The input end of the frequency divider is coupled to the second connection port; the output end of the frequency divider is coupled to the second input end of the driver. 8. The voltage conversion chip according to claim 6 or 7, characterized in that it further comprises: a control port, an oscillator, a duty cycle adjustment circuit, a current detection circuit, a first multiplexer and a voltage feedback circuit; The input end or the output end of the switch circuit is provided with a detection point; the detection end of the current detection circuit and the input end of the voltage feedback circuit are both coupled to the detection point; The output end of the current detection circuit is coupled to the control end of the duty cycle adjustment circuit; An input end of the duty cycle adjustment circuit is coupled to an output end of the oscillator; The output end of the voltage feedback circuit is coupled to the first input end of the driver; the output end of the duty cycle adjustment circuit is coupled to the second input end of the driver; The current sensing circuit, the voltage feedback circuit, the driver and the oscillator are also coupled to the control port; The first input terminal of the first multiplexer is coupled to the output terminal of the duty cycle detection circuit; the second input terminal and the control terminal of the first multiplexer are both coupled to the control port. 9. The voltage conversion chip according to claim 8, further comprising: a second multiplexer; The first input terminal of the second multiplexer is coupled to the output terminal of the duty cycle adjustment circuit; and the output terminal of the second multiplexer is coupled to the second connection port. 10. The voltage conversion chip according to claim 8 or 9, characterized in that the voltage feedback circuit comprises: a first resistor, a second resistor and an error amplifier; The first end of the first resistor is coupled to the detection point; the first end of the second resistor and the first input end of the error amplifier are both coupled to the second end of the first resistor; The second end of the second resistor is grounded; The control terminal of the error amplifier is coupled to the control port; An output terminal of the error amplifier is coupled to the first connection port. 11. An electronic device, characterized in that it includes a circuit board, and a first voltage conversion chip and a second voltage conversion chip arranged on the circuit board; the first voltage conversion chip is coupled with the second voltage conversion chip; wherein the first voltage conversion chip is the voltage conversion chip described in any one of claims 1-5; the second voltage conversion chip is the voltage conversion chip described in any one of claims 6-10.