CN118738033B - Multi-die package structure and forming method thereof - Google Patents
Multi-die package structure and forming method thereof Download PDFInfo
- Publication number
- CN118738033B CN118738033B CN202410954849.6A CN202410954849A CN118738033B CN 118738033 B CN118738033 B CN 118738033B CN 202410954849 A CN202410954849 A CN 202410954849A CN 118738033 B CN118738033 B CN 118738033B
- Authority
- CN
- China
- Prior art keywords
- metal ion
- die
- ion implantation
- protection layer
- insulating protection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 48
- 229910021645 metal ion Inorganic materials 0.000 claims abstract description 95
- 238000005468 ion implantation Methods 0.000 claims abstract description 83
- 239000011241 protective layer Substances 0.000 claims abstract description 27
- 229910052751 metal Inorganic materials 0.000 claims abstract description 22
- 239000002184 metal Substances 0.000 claims abstract description 22
- 230000008569 process Effects 0.000 claims abstract description 22
- 238000004806 packaging method and process Methods 0.000 claims abstract description 12
- 239000010410 layer Substances 0.000 claims description 121
- 239000000758 substrate Substances 0.000 claims description 32
- 239000011159 matrix material Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 8
- 238000000137 annealing Methods 0.000 claims description 6
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 abstract description 9
- 238000005516 engineering process Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- -1 silver ions Chemical class 0.000 description 2
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000005054 agglomeration Methods 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910000484 niobium oxide Inorganic materials 0.000 description 1
- URLJKFSTXLNXLG-UHFFFAOYSA-N niobium(5+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Nb+5].[Nb+5] URLJKFSTXLNXLG-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910002027 silica gel Inorganic materials 0.000 description 1
- 239000000741 silica gel Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
本发明涉及一种多管芯封装结构及其形成方法，涉及半导体技术领域。在本发明中，通过在第一绝缘保护层中形成多个分离设置的第一金属离子注入区，通过在第二绝缘保护层中形成多个分离设置的第二金属离子注入区，接着对第一绝缘保护层以及第二绝缘保护层进行退火处理，使得所述第一金属离子注入区转变为第一金属纳米晶区域，并使得所述第二金属离子注入区转变为第二金属纳米晶区域，通过上述工艺使得第一绝缘保护层以及所述第二绝缘保护层具有优异的导热性能。
The present invention relates to a multi-die packaging structure and a method for forming the same, and to the field of semiconductor technology. In the present invention, a plurality of first metal ion implantation regions are formed in a first insulating protective layer, a plurality of second metal ion implantation regions are formed in a second insulating protective layer, and then the first insulating protective layer and the second insulating protective layer are annealed, so that the first metal ion implantation region is transformed into a first metal nanocrystalline region, and the second metal ion implantation region is transformed into a second metal nanocrystalline region. Through the above process, the first insulating protective layer and the second insulating protective layer have excellent thermal conductivity.
Description
Technical Field
The present disclosure relates to semiconductor technology, and more particularly, to a multi-die package structure and a method for forming the same.
Background
The semiconductor package structure has various forms, and mainly comprises a DIP dual in-line package, a BGA ball grid array package, a QFP plastic square flat package, a PFP plastic flat component package, a PGA pin grid array package, a MCM multi-chip module package, a CSP chip size package and other package structures. In order to reduce the temperature of the semiconductor chip package module, a heat sink is usually required, and a conventional heat sink is usually bonded to the semiconductor chip by a heat-conducting adhesive, so that how to change the heat conduction mode between the heat sink and the semiconductor chip is a problem of great concern in the industry.
Disclosure of Invention
The present invention is directed to overcoming the above-mentioned deficiencies of the prior art and providing a multi-die package structure and a method of forming the same.
In order to achieve the above object, the present invention provides a method for forming a multi-die package structure, which includes providing a package substrate on which a first die and a second die are disposed. And forming a first insulating protection layer and a second insulating protection layer on the first die and the second die respectively. And performing a first metal ion implantation process on the first insulating protection layer on the first die to form a plurality of first metal ion implantation regions which are arranged in a separated mode in the first insulating protection layer. And then performing a second metal ion implantation process on the second insulating protection layer on the second die to form a plurality of second metal ion implantation regions which are arranged in a separated mode in the second insulating protection layer, wherein the metal ion concentration of the first metal ion implantation region is greater than that of the second metal ion implantation region. And annealing the first insulating protection layer and the second insulating protection layer to convert the first metal ion implantation region into a first metal nanocrystalline region and convert the second metal ion implantation region into a second metal nanocrystalline region. And then, arranging a heat conduction frame on the first insulating protection layer and the second insulating protection layer, wherein a containing cavity is arranged between the heat conduction frame and the packaging substrate. And injecting a resin material into the accommodating cavity to form the packaging layer.
Preferably, the first die and the second die are each electrically connected to the package substrate.
Preferably, the thickness of the first die is greater than the thickness of the second die.
Preferably, the thickness of the first insulating protection layer is smaller than the thickness of the second insulating protection layer, so that the upper surface of the first insulating protection layer and the upper surface of the second insulating protection layer are on the same plane.
Preferably, the plurality of first metal ion implantation regions are arranged in a matrix, the plurality of second metal ion implantation regions are arranged in a matrix, and the number of the first metal ion implantation regions is greater than the number of the second metal ion implantation regions.
Preferably, a first heat conduction buffer layer and a second heat conduction buffer layer are respectively disposed on the first insulating protection layer and the second insulating protection layer before the heat conduction frame is disposed on the first insulating protection layer and the second insulating protection layer.
Preferably, the heat conductive frame includes a first heat conductive frame and a second heat conductive frame, the first heat conductive frame is in direct contact with the first heat conductive buffer layer, and the second heat conductive frame is in direct contact with the second heat conductive buffer layer.
Preferably, the heat conducting frame is provided with a plurality of through holes.
The invention also provides a multi-die packaging structure, which is manufactured and formed by adopting the forming method.
Compared with the prior art, the multi-die packaging structure and the forming method thereof have the advantages that the first insulating protective layer and the second insulating protective layer have excellent heat conduction performance through the process, the metal ion concentration of the first insulating protective layer is higher than that of the second metal ion implantation region, the heat conduction performance of the first insulating protective layer is better than that of the second insulating protective layer, the insulating protective layers with different performances are arranged for the dies with different heat generation amounts, the insulating protective layers with the metal nanocrystalline regions are arranged to enable the first metal ion implantation region to be converted into the first metal nanocrystalline regions, the second metal ion implantation region to be converted into the second metal nanocrystalline regions, the first insulating protective layer and the second insulating protective layer have excellent heat conduction performance through the process, the metal ion concentration of the first metal ion implantation region is higher than that of the second metal ion implantation region, the heat conduction performance of the first insulating protective layer is better than that of the second insulating protective layer, the semiconductor die with different heat generation amounts is effectively protected, and meanwhile, the semiconductor die is effectively protected from being directly contacted by the heat conduction adhesive, and the stability of the packaging structure is further avoided.
Drawings
Fig. 1 is a schematic view of a structure in which a first die and a second die are disposed on a package substrate in a method for forming a multi-die package structure according to the present invention.
Fig. 2 is a schematic structural diagram of forming a first insulating protection layer and a second insulating protection layer on a first die and a second die, respectively, in a method for forming a multi-die package structure according to the present invention.
Fig. 3 is a schematic structural diagram of forming a plurality of first metal ion implantation regions separately disposed in a first insulating protection layer and forming a plurality of second metal ion implantation regions separately disposed in a second insulating protection layer in a method for forming a multi-die package structure according to the present invention.
Fig. 4 is a schematic structural diagram of a first metal ion implantation region converted into a first metal nanocrystalline region and a second metal ion implantation region converted into a second metal nanocrystalline region in the forming method of the multi-die package structure according to the present invention.
Fig. 5 is a schematic structural diagram of a multi-die package structure according to the present invention, in which a heat conductive frame is disposed on a first insulating protection layer and a second insulating protection layer.
Fig. 6 is a schematic structural diagram of a method for forming a multi-die package structure according to the present invention, in which a resin material is injected into a receiving cavity to form a package layer.
Reference numerals illustrate 100, a package substrate, 201, a first die, 202, a second die, 301, a first insulating protective layer, 302, a second insulating protective layer, 401, a first metal ion implantation region, 402, a second metal ion implantation region, 501, a first metal nanocrystalline region, 502, a second metal nanocrystalline region, 601, a first heat conductive frame, 602, a second heat conductive frame, 700, and a package layer.
Detailed Description
For a better understanding of the technical solution of the present invention, the following detailed description of the embodiments of the present invention refers to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Please refer to fig. 1-6. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the illustration, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
As shown in fig. 1 to 6, the present embodiment provides a method for forming a multi-die package structure, which includes the following steps:
As shown in fig. 1, a package substrate 100 is provided, a first die 201 and a second die 202 are disposed on the package substrate 100,
In a specific embodiment, the first die 201 and the second die 202 are each electrically connected to the package substrate 100.
In a specific embodiment, the thickness of the first die 201 is greater than the thickness of the second die 202.
In a specific embodiment, the package substrate 100 includes a carrier substrate and a circuit layer disposed on the carrier substrate, where the carrier substrate may be a semiconductor substrate, a ceramic substrate, or a metal substrate, more specifically, the carrier substrate is a silicon substrate, a sapphire substrate, an aluminum nitride ceramic substrate, a copper substrate, or a stainless steel substrate, and further, the circuit layer is disposed on the carrier substrate, more specifically, an insulating protection layer may be disposed between the carrier substrate and the circuit layer, so that both the first die 201 and the second die 202 are electrically connected to the circuit layer (not shown).
In a specific embodiment, the first die 201 and the second die 202 each include a conductive pad, and the first die 201 and the second die 202 are further electrically connected to the package substrate 100 through respective conductive pads.
As shown in fig. 2, a first insulating protection layer 301 and a second insulating protection layer 302 are formed on the first die 201 and the second die 202, respectively;
In a specific embodiment, the thickness of the first insulating protection layer 301 is smaller than the thickness of the second insulating protection layer 302, so that the upper surface of the first insulating protection layer 301 and the upper surface of the second insulating protection layer 302 are in the same plane.
In a specific embodiment, the materials of the first insulating protection layer 301 and the second insulating protection layer 302 include one or more of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, zirconium oxide, and niobium oxide, and further the first insulating protection layer 301 and the second insulating protection layer 302 are formed by any suitable process such as magnetron sputtering, ALD, PECVD, thermal oxidation, and the like.
In a specific embodiment, the thickness of the first insulating protection layer 301 is 20-100 micrometers, and the thickness of the second insulating protection layer 302 is 50-150 micrometers, so as to ensure that the thickness of the first insulating protection layer 301 is smaller than the thickness of the second insulating protection layer 302.
As shown in fig. 3, a first metal ion implantation process is performed on the first insulating protection layer 301 on the first die 201 to form a plurality of first metal ion implantation regions 401 disposed separately in the first insulating protection layer 301, and then a second metal ion implantation process is performed on the second insulating protection layer 302 on the second die 202 to form a plurality of second metal ion implantation regions 402 disposed separately in the second insulating protection layer 302, wherein the metal ion concentration of the first metal ion implantation regions 401 is greater than the metal ion concentration of the second metal ion implantation regions 402.
In a specific embodiment, the plurality of first metal ion implantation regions 401 that are separately disposed are arranged in a matrix, the plurality of second metal ion implantation regions 402 that are separately disposed are arranged in a matrix, and the number of the first metal ion implantation regions 401 is greater than the number of the second metal ion implantation regions 402.
In a specific embodiment, the metal ions in the first metal ion implantation process and the second metal ion implantation process are made of silver, copper, aluminum, tungsten, nickel or molybdenum.
In a specific embodiment, the implantation energy in the first metal ion implantation process and the second metal ion implantation process is 30kev to 100kev, more specifically, the implantation energy is 30kev, 50kev, 60kev, 80kev or 100kev.
In a specific embodiment, the implantation energy in the first metal ion implantation process and the second metal ion implantation process is 60kev, and the implantation ions in the first metal ion implantation process and the second metal ion implantation process are copper ions, silver ions or aluminum ions, so that the metal ion concentration of the first metal ion implantation region 401 is 3×10 20cm-3-5×1022 cm-3, and the metal ion concentration of the second metal ion implantation region 402 is 5×10 18cm-3-4×1021 cm-3.
In a specific embodiment, the first metal ion implantation regions 401 are arranged in a 4×4 matrix, and the second metal ion implantation regions 402 are arranged in a 3×3 matrix.
As shown in fig. 4, the first insulating protection layer 301 and the second insulating protection layer 302 are annealed, so that the first metal ion implantation region 401 is converted into a first metal nanocrystalline region 501, and the second metal ion implantation region 402 is converted into a second metal nanocrystalline region 502.
In a specific embodiment, the annealing treatment is a laser annealing treatment, that is, the local surfaces of the first insulating protection layer 301 and the second insulating protection layer 302 are irradiated with laser, so that the first insulating protection layer 301 and the second insulating protection layer 302 are heated, which is favorable for aggregation and agglomeration of metal ions, so that the first metal ion implantation region 401 is converted into the first metal nanocrystalline region 501, and the second metal ion implantation region 402 is converted into the second metal nanocrystalline region 502, and the annealing treatment time is 1-10 minutes.
As shown in fig. 5, a heat conducting frame is disposed on the first insulating protection layer 301 and the second insulating protection layer 302, and a receiving cavity is formed between the heat conducting frame and the package substrate 100.
In a specific embodiment, before the heat conductive frames are disposed on the first insulating protection layer 301 and the second insulating protection layer 302, a first heat conductive buffer layer (not shown) and a second heat conductive buffer layer (not shown) are disposed on the first insulating protection layer 301 and the second insulating protection layer 302, respectively, where the first heat conductive buffer layer and the second heat conductive buffer layer are any suitable resin material with heat conductivity and elasticity, such as heat conductive silica gel, so as to prevent the first die 201 and the second die 202 from being damaged in the process of installing the heat conductive frames.
In a specific embodiment, the heat conductive frame includes a first heat conductive frame 601 and a second heat conductive frame 602, the first heat conductive frame 601 is in direct contact with the first heat conductive buffer layer (not shown), and the second heat conductive frame 602 is in direct contact with the second heat conductive buffer layer (not shown).
In a specific embodiment, the heat conductive frame has a plurality of through holes (not shown), and more specifically, the first heat conductive frame 601 and the second heat conductive frame 602 each have a plurality of through holes (not shown), and further, the encapsulating material enters the accommodating cavity through the through holes so as to encapsulate the first die 201 and the second die 202.
As shown in fig. 6, a resin material is injected into the receiving cavity to form an encapsulation layer 700.
In a specific embodiment, the encapsulation layer 700 is an epoxy.
As shown in fig. 6, the present invention also proposes a multi-die package structure manufactured by the above-described forming method.
In other embodiments, a method of forming a multi-die package structure includes the steps of:
A package substrate is provided on which a first die and a second die are disposed.
And forming a first insulating protection layer and a second insulating protection layer on the first die and the second die respectively.
And performing a first metal ion implantation process on the first insulating protection layer on the first die to form a plurality of first metal ion implantation regions which are arranged in a separated mode in the first insulating protection layer.
And then performing a second metal ion implantation process on the second insulating protection layer on the second die to form a plurality of second metal ion implantation regions which are arranged in a separated mode in the second insulating protection layer, wherein the metal ion concentration of the first metal ion implantation region is greater than that of the second metal ion implantation region.
And annealing the first insulating protection layer and the second insulating protection layer to convert the first metal ion implantation region into a first metal nanocrystalline region and convert the second metal ion implantation region into a second metal nanocrystalline region.
And then, arranging a heat conduction frame on the first insulating protection layer and the second insulating protection layer, wherein a containing cavity is arranged between the heat conduction frame and the packaging substrate.
And injecting a resin material into the accommodating cavity to form the packaging layer.
According to one embodiment of the invention, the first die and the second die are each electrically connected to the package substrate.
According to one embodiment of the invention, the thickness of the first die is greater than the thickness of the second die.
According to an embodiment of the present invention, the thickness of the first insulating protection layer is smaller than the thickness of the second insulating protection layer, so that the upper surface of the first insulating protection layer and the upper surface of the second insulating protection layer are on the same plane.
According to one embodiment of the present invention, the plurality of first metal ion implantation regions are arranged in a matrix, the plurality of second metal ion implantation regions are arranged in a matrix, and the number of the first metal ion implantation regions is greater than the number of the second metal ion implantation regions.
According to one embodiment of the present invention, a first heat conductive buffer layer and a second heat conductive buffer layer are provided on the first insulating protection layer and the second insulating protection layer, respectively, before the heat conductive frames are provided on the first insulating protection layer and the second insulating protection layer.
According to one embodiment of the invention, the thermally conductive frame comprises a first thermally conductive frame in direct contact with the first thermally conductive buffer layer and a second thermally conductive frame in direct contact with the second thermally conductive buffer layer.
According to one embodiment of the invention, the heat conducting frame is provided with a plurality of through holes.
According to an embodiment of the present invention, the present invention also proposes a multi-die package structure formed by manufacturing using the above-described forming method.
According to the invention, the plurality of first metal ion implantation regions which are arranged separately are formed in the first insulating protection layer, the plurality of second metal ion implantation regions which are arranged separately are formed in the second insulating protection layer, then the first insulating protection layer and the second insulating protection layer are subjected to annealing treatment, so that the first metal ion implantation regions are converted into first metal nanocrystalline regions, the second metal ion implantation regions are converted into second metal nanocrystalline regions, the first insulating protection layer and the second insulating protection layer have excellent heat conduction performance through the process, the metal ion concentration of the first metal ion implantation regions is higher than that of the second metal ion implantation regions, the heat conduction performance of the first insulating protection layer is better than that of the second insulating protection layer, and then the insulating protection layers with different heat conduction performances are arranged for different heat generating capacity of the die.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (9)
1. A method for forming a multi-die package structure is characterized by comprising the following steps:
Providing a packaging substrate, and arranging a first die and a second die on the packaging substrate;
forming a first insulating protection layer and a second insulating protection layer on the first die and the second die, respectively;
performing a first metal ion implantation process on the first insulating protection layer on the first die to form a plurality of first metal ion implantation regions which are arranged in a separated mode in the first insulating protection layer;
Performing a second metal ion implantation process on the second insulating protection layer on the second die to form a plurality of second metal ion implantation regions in the second insulating protection layer, wherein the metal ion concentration of the first metal ion implantation region is greater than that of the second metal ion implantation region;
Annealing the first insulating protection layer and the second insulating protection layer to enable the first metal ion implantation region to be converted into a first metal nanocrystalline region and enable the second metal ion implantation region to be converted into a second metal nanocrystalline region;
setting a heat conduction frame on the first insulating protection layer and the second insulating protection layer, wherein a containing cavity is arranged between the heat conduction frame and the packaging substrate;
And injecting a resin material into the accommodating cavity to form the packaging layer.
2. The method of forming a multi-die package structure of claim 1, wherein the first die and the second die are each electrically connected to the package substrate.
3. The method of forming a multi-die package structure of claim 1, wherein a thickness of the first die is greater than a thickness of the second die.
4. The method of forming a multi-die package structure of claim 1, wherein the thickness of the first insulating protective layer is less than the thickness of the second insulating protective layer such that the upper surface of the first insulating protective layer and the upper surface of the second insulating protective layer are in the same plane.
5. The method of forming a multi-die package structure of claim 1, wherein the plurality of separately disposed first metal ion implantation regions are arranged in a matrix, the plurality of separately disposed second metal ion implantation regions are arranged in a matrix, and the number of first metal ion implantation regions is greater than the number of second metal ion implantation regions.
6. The method of forming a multi-die package structure of claim 1, wherein a first thermally conductive buffer layer and a second thermally conductive buffer layer are disposed on the first insulating protective layer and the second insulating protective layer, respectively, before a thermally conductive frame is disposed on the first insulating protective layer and the second insulating protective layer.
7. The method of forming a multi-die package structure of claim 6, wherein the thermally conductive frame comprises a first thermally conductive frame and a second thermally conductive frame, the first thermally conductive frame being in direct contact with the first thermally conductive buffer layer, the second thermally conductive frame being in direct contact with the second thermally conductive buffer layer.
8. The method of forming a multi-die package structure of claim 1, wherein the thermally conductive frame has a plurality of through holes.
9. A multi-die package structure, characterized in that the multi-die package structure is manufactured by the forming method according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410954849.6A CN118738033B (en) | 2024-07-17 | 2024-07-17 | Multi-die package structure and forming method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410954849.6A CN118738033B (en) | 2024-07-17 | 2024-07-17 | Multi-die package structure and forming method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN118738033A CN118738033A (en) | 2024-10-01 |
| CN118738033B true CN118738033B (en) | 2024-11-29 |
Family
ID=92858744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410954849.6A Active CN118738033B (en) | 2024-07-17 | 2024-07-17 | Multi-die package structure and forming method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN118738033B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6017829A (en) * | 1997-04-01 | 2000-01-25 | Micron Technology, Inc. | Implanted conductor and methods of making |
| CN104766848A (en) * | 2014-01-07 | 2015-07-08 | 英飞凌科技奥地利有限公司 | Chip-Embedded Packages with Backside Die Connection |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013065316A1 (en) * | 2011-11-02 | 2013-05-10 | 富士電機株式会社 | Power converter |
-
2024
- 2024-07-17 CN CN202410954849.6A patent/CN118738033B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6017829A (en) * | 1997-04-01 | 2000-01-25 | Micron Technology, Inc. | Implanted conductor and methods of making |
| CN104766848A (en) * | 2014-01-07 | 2015-07-08 | 英飞凌科技奥地利有限公司 | Chip-Embedded Packages with Backside Die Connection |
Also Published As
| Publication number | Publication date |
|---|---|
| CN118738033A (en) | 2024-10-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10636678B2 (en) | Semiconductor die assemblies with heat sink and associated systems and methods | |
| TW554500B (en) | Flip-chip package structure and the processing method thereof | |
| US7892882B2 (en) | Methods and apparatus for a semiconductor device package with improved thermal performance | |
| CN108538734B (en) | Substrate with embedded stacked through-silicon-via die | |
| TWI233172B (en) | Non-leaded semiconductor package and method of fabricating the same | |
| US20080093733A1 (en) | Chip package and manufacturing method thereof | |
| CN111276447B (en) | Double-sided cooling power module and manufacturing method thereof | |
| JP2016092300A (en) | Semiconductor device and semiconductor device manufacturing method | |
| CN113764396B (en) | Semiconductor packaging structure based on rewiring layer and packaging method thereof | |
| US20220352121A1 (en) | Semiconductor package having passive support wafer | |
| US10381288B2 (en) | Packaged semiconductor die and CTE-engineering die pair | |
| CN109037164A (en) | Semiconductor packaging structure and manufacturing method thereof | |
| CN118738033B (en) | Multi-die package structure and forming method thereof | |
| US11621211B2 (en) | Semiconductor package structure | |
| WO2022063069A1 (en) | Packaging structure and manufacturing method therefor, and electronic device | |
| JP3547303B2 (en) | Method for manufacturing semiconductor device | |
| TWI790054B (en) | Integrated antenna package structure | |
| US9892985B2 (en) | Semiconductor device and method for manufacturing the same | |
| CN115579298A (en) | Chip packaging method and packaged chip | |
| CN115692222A (en) | Chip packaging structure and preparation method | |
| CN118156222B (en) | Packaging module of semiconductor chip and preparation method thereof | |
| CN118507359B (en) | Heat dissipation type packaging component and forming method thereof | |
| CN103325741A (en) | A package based on a substrate and adopting liquid plastic sealing and its manufacturing process | |
| US20210358894A1 (en) | Multi-Tier Processor/Memory Package | |
| TWI225697B (en) | Dendrite-prevented heat spreader and method for fabricating semiconductor package substrate with the heat spreader |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |