CN118731657B - A chip testing system - Google Patents
A chip testing system Download PDFInfo
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- CN118731657B CN118731657B CN202411215873.4A CN202411215873A CN118731657B CN 118731657 B CN118731657 B CN 118731657B CN 202411215873 A CN202411215873 A CN 202411215873A CN 118731657 B CN118731657 B CN 118731657B
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- plane
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- hole
- main body
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- 238000012360 testing method Methods 0.000 title claims abstract description 119
- 239000011810 insulating material Substances 0.000 claims abstract description 46
- 239000000523 sample Substances 0.000 claims description 29
- 239000000463 material Substances 0.000 claims description 9
- 230000008054 signal transmission Effects 0.000 abstract description 10
- 230000008878 coupling Effects 0.000 abstract description 6
- 238000010168 coupling process Methods 0.000 abstract description 6
- 238000005859 coupling reaction Methods 0.000 abstract description 6
- 238000010992 reflux Methods 0.000 abstract description 6
- 239000002344 surface layer Substances 0.000 abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract description 3
- 238000006731 degradation reaction Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2889—Interfaces, e.g. between probe and tester
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention discloses a chip testing system which comprises a second surface of a socket main body, wherein the second surface of the socket main body comprises a step surface, the step surface is adjacent to a first through hole, the step surface comprises a first plane, a first vertical surface and a second plane, a first insulating material is arranged in the first through hole, the distance between the surface of the first insulating material and the first surface is larger than that between the first plane and the first surface, the line width of a first area of a convex wiring is smaller than that of a second area and an end part, the projection of the first area on the socket main body is located on the first plane, the projection of the second area on the socket main body overlaps with the second plane, the projection of the connection position of the first area and the end part is located on the first vertical surface, and the projection of the connection position of the first area and the end part on the junction surface of the first insulating material and the first plane. The socket main body is used as a reference reflux path of the surface layer wiring of the test circuit board, so that a wider signal transmission bandwidth is obtained, and the coupling performance degradation of the surface layer wiring of the test circuit board and the socket main body can be avoided.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to a chip testing system.
Background
In the prior art, when testing a chip, the chip is usually fixed on a test socket and connected with a test circuit board through the test socket. In order to avoid the performance degradation caused by the surface layer wiring of the test circuit board and the coupling of the test socket body, the conventional chip test generally uses a plastic test socket, but the bandwidth of the plastic test socket is usually less than 20Gh, so that the signal transmission bandwidth is reduced.
Disclosure of Invention
The invention provides a chip test system, which uses the socket main body of a chip test socket as a reference reflux path of the surface layer wiring of a test circuit board, so that the chip test system has wider signal transmission bandwidth, and can avoid the coupling degradation of the surface layer wiring of the test circuit board and the socket main body.
According to an aspect of the present invention, there is provided a chip test system including:
a chip test socket and a test circuit board;
The chip testing socket comprises a socket main body, wherein the first surface of the socket main body comprises a chip placing groove, and the chip placing groove is used for placing a chip to be tested;
A first through hole and a second through hole are formed in the chip placing groove, and the first through hole and the second through hole penetrate through the socket main body;
A first test probe is arranged in the first through hole, a first end of the first test probe is electrically connected with a signal pin of the chip to be tested, and a second end of the first test probe is electrically connected with an end part of a convex wiring on the surface of a test circuit board, wherein the test circuit board is arranged on a second surface of the socket main body, and the second surface and the first surface are arranged oppositely;
A second test probe is arranged in the second through hole, a first end of the second test probe is electrically connected with a grounding pin of the chip to be tested, and a second end of the second test probe is electrically connected with a grounding pin of the test circuit board;
the second surface of the socket main body comprises a step surface, wherein the step surface is adjacent to the first through hole and surrounds a partial area of the first through hole, and the step surface comprises a first plane, a first vertical surface and a second plane which are sequentially arranged along a direction away from the first through hole;
A first insulating material is arranged in the first through hole, surrounds the second end of the first test probe, and the distance between the surface of the first insulating material, which is far away from the first surface, and the first surface is larger than the distance between the first plane and the first surface;
The convex wiring comprises an end part, a first area and a second area which are sequentially connected, the line width of the first area is smaller than that of the second area and that of the end part, the vertical projection of the first area on the socket main body is located in the first plane, the vertical projection of the second area on the socket main body is overlapped with the second plane, the vertical projection of the connection part of the first area and the second area on the socket main body is located on the first vertical plane, and the vertical projection of the connection part of the first area and the end part on the connection surface of the first insulating material and the first plane.
On the basis of the above embodiment, optionally, the distance between the first plane and the second plane is greater than the distance between the first plane and the surface of the first insulating material away from the first plane.
On the basis of the embodiment, the distance between the first plane and the second plane is 0.6mm-1.5mm, and the distance between the surface of the first insulating material far away from the first surface and the first plane is 0.03mm-0.07mm;
The line width of the first area of the convex wiring is 0.1mm-0.2mm, and the line width of the second area of the convex wiring is 0.2mm-0.3mm.
On the basis of the above embodiment, optionally, the socket body includes a main structure, a first structure, and a second structure;
The first structure is arranged between the main structure and the second structure, and the surface of the main structure far away from the first structure is the first surface;
The first through hole and the second through hole penetrate through the main structure, the first structure and the second structure, the second structure covers the central area of the first structure, the part area exposed by the first structure is the second plane, the area, located between the first through hole and the second plane, of the surface of the second structure, away from the first structure is the first plane, and the side surface, connected with the first plane, of the second structure is the first vertical plane.
On the basis of the above embodiment, optionally, the second structure includes a first edge portion, a first center portion, and a second edge portion, where the first center portion is disposed between the first edge portion and the second edge portion, and the first edge portion, the first center portion, and the second edge portion are disposed in an i shape;
The first structure includes a third edge portion, a second center portion and a fourth edge portion, the second center portion is located between the third edge portion and the fourth edge portion, the first center portion covers the second center portion, the third edge portion and the fourth edge portion are both disposed between the first edge portion and the second edge portion, and the third edge portion and the fourth edge portion are not covered by the second structure.
On the basis of the above embodiment, optionally, a surface of the main structure adjacent to the first structure includes a first clamping groove and a second clamping groove, the first structure is disposed in the first clamping groove, and the second structure is disposed in the second clamping groove;
the main structure, the first structure and the second structure are fixedly connected through a connecting piece.
On the basis of the above embodiment, optionally, the main structure, the first structure and the second structure are made of the same material.
Based on the above embodiment, optionally, the chip test system further includes:
a second insulating material surrounding the first end of the first test probe;
the first insulating material and the second insulating material are not in contact.
Optionally, on the basis of the above embodiment, the chip test socket further includes a chip fixing structure;
The chip fixing structure is arranged in the chip placing groove;
The surface of the chip fixing structure, which is far away from the socket main body, is provided with a fixing groove, and the chip to be tested is arranged in the fixing groove.
On the basis of the above embodiment, optionally, the material used for the chip fixing structure is an insulating material.
The second surface of the socket main body comprises a step surface, the step surface is adjacent to the first through hole and surrounds a partial area of the first through hole, the step surface comprises a first plane, a first vertical surface and a second plane which are sequentially arranged along a direction far away from the first through hole, the distance between the second plane and the first surface is smaller than the distance between the first plane and the first surface, a first insulating material is arranged in the first through hole, the first insulating material surrounds the second end of the first test probe, the distance between the surface of the first insulating material far away from the first surface and the first surface is larger than the distance between the first plane and the first surface, the convex wiring comprises an end part, a first area and a second area which are sequentially connected, the linewidth of the first area is smaller than the linewidth of the second area and the end part, the vertical projection of the first area on the socket main body is located in the first plane, the vertical projection of the second area on the socket main body is overlapped with the second plane, the connection between the first area and the second area is located on the first vertical plane, the connection between the first area and the connection between the first area and the first chip passes through the first insulation material and the first chip to be tested. The embodiment enables the convex wiring to have wider signal transmission bandwidth by taking the socket main body as a reference reflux path of the convex wiring, and the step structure of the socket main body is arranged, and different width areas of the convex wiring correspond to different step surfaces, so that the impedance of the convex wiring is prevented from being coupled with the test socket and the convex wiring, and the convex wiring is better matched with the impedance of the test circuit board and the chip to be tested.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a three-dimensional view from a top view of a chip testing system according to an embodiment of the present invention;
FIG. 2 is a three-dimensional view of a bottom view of a chip test system according to an embodiment of the present invention;
FIG. 3 is a top two-dimensional view of a chip testing system provided by an embodiment of the present invention;
FIG. 4 is a cross-section of the chip testing system of FIG. 3 along section line GG;
FIG. 5 is an enlarged view of a portion of FIG. 4;
FIG. 6 is an enlarged view of a portion of FIG. 2;
FIG. 7 is a bottom two-dimensional view of a chip test system according to an embodiment of the present invention;
FIG. 8 is an enlarged view of a portion of FIG. 7;
FIG. 9 is a partial schematic view of a test circuit board;
FIG. 10 is a schematic diagram of a single-ended signal line transmission model;
FIG. 11 is a schematic view of a second structure adjacent to a surface of a first structure provided by an embodiment of the present invention;
FIG. 12 is a cross-sectional view of the second structure of FIG. 11 taken along section line EE;
FIG. 13 is a schematic view of a surface of a second structure remote from a first structure provided by an embodiment of the present invention;
fig. 14 is a partial enlarged view of fig. 4.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
An embodiment of the present invention provides a chip testing system, fig. 1 is a three-dimensional diagram of a top view of the chip testing system provided by the embodiment of the present invention, fig. 2 is a three-dimensional diagram of a bottom view of the chip testing system provided by the embodiment of the present invention, fig. 3 is a top two-dimensional diagram of the chip testing system provided by the embodiment of the present invention, fig. 4 is a section of the chip testing system along a section line GG in fig. 3, fig. 5 is a partial enlarged view of fig. 4, fig. 6 is a partial enlarged view of fig. 2, fig. 7 is a bottom two-dimensional diagram of the chip testing system provided by the embodiment of the present invention, and fig. 8 is a partial enlarged view of fig. 7. Referring to fig. 1 to 8, the chip test system includes:
A chip test socket 10 and a test circuit board 20;
The chip test socket 10 comprises a socket body 11, wherein a first surface 101 of the socket body 11 comprises a chip placing groove 12, and the chip placing groove 12 is used for placing a chip 30 to be tested;
A first through hole 121 and a second through hole 122 are arranged in the chip placing groove 12, and the first through hole 121 and the second through hole 122 penetrate through the socket main body 11;
the first through hole 121 is internally provided with a first test probe 41, a first end of the first test probe 41 is electrically connected with a signal pin of the chip 30 to be tested, and a second end of the first test probe 41 is electrically connected with an end part of the convex wiring 21 on the surface of the test circuit board 20, wherein the test circuit board 20 is arranged on a second surface of the socket main body 11, and the second surface is opposite to the first surface 101;
The second through hole 122 is internally provided with a second test probe 42, a first end of the second test probe 42 is electrically connected with a grounding pin of the chip 30 to be tested, and a second end of the second test probe 42 is electrically connected with the grounding pin 22 of the test circuit board 20;
The second face of the socket body 11 includes a stepped face 50, the stepped face 50 being adjacent to the first through hole 121 and surrounding a partial region of the first through hole 121, the stepped face 50 including a first plane 51, a first vertical face 52, and a second plane 53 sequentially arranged in a direction away from the first through hole 121, the second plane 53 being spaced from the first face 101 by a distance smaller than that of the first plane 51 from the first face 101;
The first through hole 121 is provided with a first insulating material 60, the first insulating material 60 surrounds the second end of the first test probe 41, and the distance between the surface 61 of the first insulating material 60 away from the first surface and the first surface 101 is greater than the distance between the first plane 51 and the first surface 101;
The convex trace 21 includes an end 211, a first region 212 and a second region 213 connected in sequence, wherein the linewidth of the first region 212 is smaller than the linewidth of the second region 213 and the end 211, the vertical projection of the first region 212 on the socket body 11 is located in the first plane 51, the vertical projection of the second region 213 on the socket body 11 overlaps the second plane 53, the vertical projection of the connection of the first region 212 and the second region 213 on the socket body 11 is located on the first vertical plane 52, and the vertical projection of the connection of the first region 212 and the end 211 on the interface of the first insulating material 60 and the first plane 51.
Fig. 5 is an enlarged view of the first partial region 100 in fig. 4, and fig. 8 is an enlarged view of the second partial region 200 in fig. 7. The chip test socket 10 is used for placing a chip 30 to be tested and connecting the chip 30 to be tested and the test circuit board 20. The socket body 11 is made of a conductive material, and may be made of a metal material such as copper, iron, aluminum, or the like, for example. The number of the first through holes 121 and the second through holes 122 may be one, two or more, and specifically, may be set according to signal transmission requirements. Illustratively, the socket body 11 includes two first through holes 121 and a plurality of second through holes 122, the plurality of second through holes 122 being disposed around the two first through holes 121. Fig. 9 is a partial schematic view of a test circuit board, and with reference to fig. 9, corresponding ground pins 22 are disposed around the pins connected to the male trace 21. In this embodiment, the pin connected to the convex wire 21 is regarded as a part of the convex wire 21, and the end 211 of the convex wire 21 is the pin connected to the convex lead 21.
With continued reference to fig. 1-9, the second test probe 42 is electrically connected to the side wall contact of the second through hole 122, that is, the ground pin of the chip 30 to be tested, the ground pin 22 of the test circuit board 20, and the socket body 11 are electrically connected, and the socket body 11 serves as a reference reflow path of the convex trace 21 on the surface layer of the test circuit board 20, so that signal transmission at the interconnection of the convex trace 21 and the chip 30 to be tested is matched. The surface 61 of the first insulating material 60 away from the first face 101, the first plane 51 and the second plane 53 of the socket body 11 are distributed in a step shape, so that the impedance of the trace segment of the convex trace 21 opposite to the socket body 11 is better matched with the chip 30 to be tested and the test circuit board 20.
Specifically, fig. 10 is a schematic diagram of a single-ended signal line transmission model, and referring to fig. 10, the single-ended signal line is the most common transmission line type, and the single-ended signal line transmission model includes a signal line 2, a dielectric layer 3, and a ground layer 1. The design of the socket body will be described below using a single-ended signal line as an example. The impedance of the single-ended signal line satisfies the following formula:
The factors affecting the impedance of the signal line include the dielectric constant D k of the dielectric layer, the thickness H of the dielectric layer, the width W of the signal line and the thickness T of the signal line.
With continued reference to fig. 1-9, the gap medium reserved between the socket body 11 and the test circuit board 20 is air, i.e., the dielectric layer between the male trace 21 and the socket body 11 (ground layer) is air, and the D k value is determined to be 1. In general, the thickness of the convex trace 21 is a constant value, and the range is generally about 0.03mm, i.e., T is a constant value. In addition, if the circuit board design is considered alone, the thickness of the dielectric layer of the convex trace 21 is generally about 0.15mm according to the design of the circuit board, that is, the H value is also a constant value. At this time, Z 0 and width W are in one-to-one correspondence. The socket main body 11 is also used as the grounding layer of the convex wiring 21, at this time, as the grounding layer becomes more, the capacitance increases, the Z 0 of the convex wiring 21 decreases, in order to match the impedance of the convex wiring 21 with the impedance of the test circuit board 20 and the chip 30 to be tested, the wiring is set as the convex wiring, that is, the convex wiring 21 includes three sections, namely, the end 211, the first section 212 and the second section 213, the width of the first section 212 is smaller, and the second surface of the socket main body 11 is set with a step structure.
Specifically, the vertical projection of the first region 212 on the socket body 11 is located in the first plane 51, the vertical projection of the second region 213 on the socket body 11 overlaps the second plane 53, the vertical projection of the socket body 11 at the junction of the first region 212 and the second region 213 is located on the first vertical plane 52, the vertical projection of the socket body 11 at the junction of the first region 212 and the end 211 is located on the interface of the first insulating material 60 and the first plane 51, i.e., the end 211 is opposite to the first insulating material 60, the first region 212 is opposite to the first plane 51, and the second region 213 is opposite to the second plane 53. Since the second plane 53 is farther from the male trace 21, it is possible to avoid the coupling of the second plane 53 with the socket body 11 to increase the capacitance of the male trace 21 and to avoid affecting the impedance of the male trace 21. The first plane 51 is opposite to and nearer to the first area 212 of the convex wire 21, in the first area 212, the reference reflux path of the convex wire 21 is changed from the ground layer on the test circuit board below the convex wire 21 to the ground layer on the socket main body 11 and the test circuit board, and the width of the first area 212 is smaller than that of the second area 213 and the width of the end 211, so that the impedance of the first area 212 is matched with the impedance of the test circuit board 20 and the chip 30 to be tested, and the impedance of the end 211 of the convex wire 21 is better matched with the impedance of the test circuit board 20 and the chip 30 to be tested by setting the surface of the first insulating material 60, which is far from the first plane 101, to be higher than the first plane 51.
In summary, the present embodiment makes the convex trace 21 have a wide signal transmission bandwidth by using the socket body 11 as a reference reflow path of the convex trace 21, and sets the step structure of the socket body 11, and makes different width regions of the convex trace 21 correspond to different step surfaces, so that the coupling of the chip test socket 10 and the convex trace 21 to the impedance of the convex trace 21 can be avoided, and the convex trace 21 is better matched with the impedance of the test circuit board 20 and the chip 30 to be tested. The inventor verifies through simulation experiment that the signal transmission bandwidth of the chip test system of the embodiment can reach 90Ghz.
Based on the above embodiment, optionally, the first plane 51 is spaced from the second plane 53 by a distance greater than the distance of the first plane 51 and the first insulating material 60 from the surface 61 of the first face 101.
This arrangement makes it possible to better avoid the coupling of the socket body 11 at the second plane 51 with the male trace 21 affecting the impedance of the male trace 21 by making the second plane 53 farther from the male trace 21.
Based on the above embodiment, the distance between the first plane 51 and the second plane 53 is optionally 0.6mm-1.5mm, and the distance between the surface 61 of the first insulating material 60, which is far from the first plane 101, and the first plane 51 is 0.03mm-0.07mm;
The linewidth of the first region 212 of the male trace 21 is 0.1mm-0.2mm and the linewidth of the second region 213 of the male trace 21 is 0.2mm-0.3mm.
Illustratively, the first plane 51 is spaced from the second plane 53 by 0.8mm, 1mm, 1.2mm, or the like. Setting the distance of the second plane 53 from the first plane 51 to be 0.6mm to 1.5mm, the socket body 11 at the second plane 53 has been calculated to have substantially no influence on the impedance of the male trace 21, and thus the line width of the second region 213 of the male trace 21 disposed opposite to the second plane 53 may be set in accordance with the conventional line width on the test circuit board, and the line width of the second region 213 of the male trace 21 is 0.2mm to 0.3mm.
The socket body 11 at the first plane 51 is closer to the male trace 21, where the socket body 11 increases the reference return path of the male trace 21, where the capacitance of the male trace 21 increases, and if the line width of the male trace 21 is not changed, the impedance of the male trace 21 may decrease, and by providing the surface 61 of the first insulating material 60 remote from the first plane 101 at a distance of 0.03mm-0.07mm from the first plane 51, the line width of the first region 212 of the male trace 21 is 0.1mm-0.2mm, such that the male trace 21 is impedance matched to the test circuit board 20, and the line width of the male trace 21 may be 0.15mm, for example.
On the basis of the above-described embodiment, optionally, the socket body 11 includes a main structure 110, a first structure 111, and a second structure 112;
the first structure 111 is disposed between the main structure 110 and the second structure 112, and a surface of the main structure 110 away from the first structure 111 is the first surface 101;
The first through hole 121 and the second through hole 122 penetrate through the main structure 110, the first structure 111 and the second structure 112, the second structure 112 covers the central area of the first structure 111, the exposed partial area of the first structure 111 is the second plane 53, the area, located between the first through hole 121 and the second plane 53, of the surface of the second structure 112 far away from the first structure 111 is the first plane 51, and the side surface, connected with the first plane 51, of the second structure 112 is the first vertical plane 52.
Specifically, the main structure 110 is a main structure of the socket main body 11, and the first structure 111 and the second structure 112 are fixedly connected to the main structure 110 through a connecting member such as a screw. By arranging the socket body 11 to include a three-layer structure, when the socket body 11 is used as a reference reflux path of the convex wiring 21, the socket body can be better matched with the convex wiring 21, so that the impedance of the convex wiring 21 is more matched with the test circuit board 20 and the chip 30 to be tested, and the signal transmission bandwidth of the convex wiring 21 is wider.
Fig. 11 is a schematic view of a surface of a second structure adjacent to a first structure according to an embodiment of the present invention, fig. 12 is a cross-sectional view of the second structure along a section line EE in fig. 11, and fig. 13 is a schematic view of a surface of the second structure away from the first structure according to an embodiment of the present invention. Referring to fig. 11 to 13, in addition to the above embodiment, the second structure 112 may include a first edge portion 81, a first center portion 80, and a second edge portion 82, where the first center portion 80 is disposed between the first edge portion 81 and the second edge portion 82, and the first edge portion 81, the first center portion 80, and the second edge portion 82 are disposed in an i shape;
The first structure 111 includes a third edge portion 83, a second center portion and a fourth edge portion 84, the second center portion is located between the third edge portion 83 and the fourth edge portion 84, the first center portion 80 covers the second center portion, the third edge portion 83 and the fourth edge portion 84 are each disposed between the first edge portion 81 and the second edge portion 82, and the third edge portion 83 and the fourth edge portion 84 are not covered by the second structure 112.
Specifically, the fourth edge 84 is not covered by the second structure 112, and a surface of the fourth edge 84 away from the main structure 110 is the second plane 53. The first edge portion 81 and the second edge portion 82 are symmetrically disposed with respect to the first center portion 80. The third edge portion 83 and the fourth edge portion 84 are symmetrically disposed with respect to the second center portion. The first structure 111 and the second structure 112 may each be a symmetrical structure. Illustratively, the second structure 112 may be rectangular in shape.
Optionally, referring to fig. 2, a surface of the main structure 110 adjacent to the first structure 111 includes a first slot 71 and a second slot 72, the first structure 111 is disposed in the first slot 71, and the second structure 112 is disposed in the second slot 72;
the main structure 110, the first structure 111 and the second structure 112 are fixedly connected by a connecting member.
Specifically, the first clamping groove 71 plays a role in clamping and fixing the first structure 111, and the second clamping groove 72 plays a role in clamping and fixing the second structure 112. Threaded holes may be provided in the main structure 110, the first structure 111, and the second structure 112, and the connection member may be a detachable connection member such as a screw, a bolt, or the like.
Alternatively, the main structure 110, the first structure 111 and the second structure 112 may be made of the same material based on the above embodiment.
Specifically, the main structure 110, the first structure 111, and the second structure 112 may be made of a metal material such as copper, iron, or aluminum. The main structure 110, the first structure 111 and the second structure 112 are made of the same material, so that the main structure 110, the first structure 111 and the second structure 112 can be manufactured by the same process, and the process cost is reduced. And when the first structure 111 and the second structure 112 are made of the same material, the conductivity of the three materials is consistent, so that the impedance influence on the convex wiring 21 when the three materials are used as the reference reflux path of the convex wiring 21 is convenient to determine, and the size of the convex wiring 21 and the size design difficulty of the socket main body 11 can be reduced.
Fig. 14 is a partial enlarged view of fig. 4, referring to fig. 4, 5 and 14, based on the above embodiment, optionally, the chip test system further includes:
a second insulating material 90, the second insulating material 90 surrounding the first ends of the first test probes 41;
The first insulating material 60 and the second insulating material 90 do not contact.
Specifically, fig. 14 is an enlarged view of the third partial region 300 in fig. 4. The first insulating material 60 and the second insulating material 90 are used for insulating the first test probe 41 and the socket body 11, and by providing two different insulating layer materials, the first insulating material 60 and the second insulating material 90 are not contacted, that is, a gap is formed between the first insulating material 60 and the second insulating material 90, so that the impedance of the convex wiring 21, the chip to be tested and the test circuit board 20 can be matched at the first test probe 41, and the signal transmission bandwidth is improved.
Optionally, referring to fig. 1, the chip test socket 10 further includes a chip fixing structure 13;
the chip fixing structure 13 is arranged in the chip placing groove 12;
the surface of the chip fixing structure 13 far away from the socket body 11 is provided with a fixing groove 131, and the chip 30 to be tested is arranged in the fixing groove 131.
Specifically, the chip fixing structure 13 is used for fixing a chip, so as to improve test stability.
Alternatively, the chip fixing structure 13 may be made of an insulating material based on the above embodiment. This arrangement can avoid the chip fixing structure 13 from affecting the impedance matching between the chip to be tested and the probe.
In addition, referring to fig. 1 and 2, the main structure 110 may further include a fixing hole 130, a fixing column 140, and other structures, where the fixing column 140 is disposed in the fixing hole 130, and is used for fixing the chip test socket 10, so as to facilitate chip testing. In addition, referring to fig. 2, the main structure 110 may further include a thinned region 150 or other structural region, so as to make the socket body 11 more lightweight and stable.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (10)
1. A chip testing system, comprising:
a chip test socket and a test circuit board;
The chip testing socket comprises a socket main body, wherein the first surface of the socket main body comprises a chip placing groove, and the chip placing groove is used for placing a chip to be tested;
A first through hole and a second through hole are formed in the chip placing groove, and the first through hole and the second through hole penetrate through the socket main body;
A first test probe is arranged in the first through hole, a first end of the first test probe is electrically connected with a signal pin of the chip to be tested, and a second end of the first test probe is electrically connected with an end part of a convex wiring on the surface of a test circuit board, wherein the test circuit board is arranged on a second surface of the socket main body, and the second surface and the first surface are arranged oppositely;
A second test probe is arranged in the second through hole, a first end of the second test probe is electrically connected with a grounding pin of the chip to be tested, and a second end of the second test probe is electrically connected with a grounding pin of the test circuit board;
the second surface of the socket main body comprises a step surface, wherein the step surface is adjacent to the first through hole and surrounds a partial area of the first through hole, and the step surface comprises a first plane, a first vertical surface and a second plane which are sequentially arranged along a direction away from the first through hole;
A first insulating material is arranged in the first through hole, surrounds the second end of the first test probe, and the distance between the surface of the first insulating material, which is far away from the first surface, and the first surface is larger than the distance between the first plane and the first surface;
The convex wiring comprises an end part, a first area and a second area which are sequentially connected, the line width of the first area is smaller than that of the second area and that of the end part, the vertical projection of the first area on the socket main body is located in the first plane, the vertical projection of the second area on the socket main body is overlapped with the second plane, the vertical projection of the connection part of the first area and the second area on the socket main body is located on the first vertical plane, and the vertical projection of the connection part of the first area and the end part on the connection surface of the first insulating material and the first plane.
2. The chip testing system according to claim 1, wherein:
the first plane is spaced from the second plane by a distance greater than the distance between the first plane and the surface of the first insulating material remote from the first face.
3. The chip test system according to claim 2, wherein:
the distance between the first plane and the second plane is 0.6mm-1.5mm, and the distance between the surface of the first insulating material far away from the first surface and the first plane is 0.03mm-0.07mm;
The line width of the first area of the convex wiring is 0.1mm-0.2mm, and the line width of the second area of the convex wiring is 0.2mm-0.3mm.
4. The chip testing system according to claim 1, wherein:
the socket main body comprises a main structure, a first structure and a second structure;
The first structure is arranged between the main structure and the second structure, and the surface of the main structure far away from the first structure is the first surface;
The first through hole and the second through hole penetrate through the main structure, the first structure and the second structure, the second structure covers the central area of the first structure, the part area exposed by the first structure is the second plane, the area, located between the first through hole and the second plane, of the surface of the second structure, away from the first structure is the first plane, and the side surface, connected with the first plane, of the second structure is the first vertical plane.
5. The chip testing system according to claim 4, wherein:
the second structure comprises a first edge part, a first central part and a second edge part, wherein the first central part is arranged between the first edge part and the second edge part, and the first edge part, the first central part and the second edge part are arranged in an I shape;
The first structure includes a third edge portion, a second center portion and a fourth edge portion, the second center portion is located between the third edge portion and the fourth edge portion, the first center portion covers the second center portion, the third edge portion and the fourth edge portion are both disposed between the first edge portion and the second edge portion, and the third edge portion and the fourth edge portion are not covered by the second structure.
6. The chip testing system according to claim 4, wherein:
The surface of the main structure adjacent to the first structure comprises a first clamping groove and a second clamping groove, the first structure is arranged in the first clamping groove, and the second structure is arranged in the second clamping groove;
the main structure, the first structure and the second structure are fixedly connected through a connecting piece.
7. The chip testing system according to claim 4, wherein:
The main structure, the first structure and the second structure are made of the same material.
8. The chip testing system of claim 1, further comprising:
a second insulating material surrounding the first end of the first test probe;
the first insulating material and the second insulating material are not in contact.
9. The chip testing system according to claim 1, wherein:
the chip test socket further comprises a chip fixing structure;
The chip fixing structure is arranged in the chip placing groove;
The surface of the chip fixing structure, which is far away from the socket main body, is provided with a fixing groove, and the chip to be tested is arranged in the fixing groove.
10. The chip testing system according to claim 9, wherein:
The chip fixing structure is made of insulating materials.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411215873.4A CN118731657B (en) | 2024-09-02 | 2024-09-02 | A chip testing system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202411215873.4A CN118731657B (en) | 2024-09-02 | 2024-09-02 | A chip testing system |
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| CN118731657A CN118731657A (en) | 2024-10-01 |
| CN118731657B true CN118731657B (en) | 2024-12-03 |
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| CN101031808A (en) * | 2005-07-26 | 2007-09-05 | 株式会社理光 | Device for inspecting electronic component package |
| CN113748346A (en) * | 2019-05-14 | 2021-12-03 | 兰迪斯+盖尔股份有限公司 | Access protection assembly for utility meters and meter device comprising same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1766649A (en) * | 2005-10-10 | 2006-05-03 | 王云阶 | Apparatus for detecting electronic element, circuit and circuit board |
| CN115133339A (en) * | 2021-03-22 | 2022-09-30 | 华为技术有限公司 | Cable assembly, signal transmission assembly and communication system |
| US20240329080A1 (en) * | 2021-07-15 | 2024-10-03 | Smiths Interconnect Americas, Inc. | Systems and methods for coaxial test socket and printed circuit board interfaces |
| US11693025B2 (en) * | 2021-08-30 | 2023-07-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Testing apparatus and method of using the same |
| CN115047217B (en) * | 2022-04-14 | 2025-07-22 | 恒为科技（上海）股份有限公司 | Circuit board for chip test |
| CN117288987A (en) * | 2022-06-17 | 2023-12-26 | 华为技术有限公司 | Socket assembly for chip test and chip test system |
| KR102805950B1 (en) * | 2022-12-22 | 2025-05-13 | 리노공업주식회사 | Test socket |
| CN117279197B (en) * | 2023-11-23 | 2024-01-23 | 零壹半导体技术(常州)有限公司 | High-frequency bandwidth differential wiring structure for chip test and test circuit board |
| CN117954423A (en) * | 2023-12-29 | 2024-04-30 | 厦门天马显示科技有限公司 | Display panel and display device |
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2024
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101031808A (en) * | 2005-07-26 | 2007-09-05 | 株式会社理光 | Device for inspecting electronic component package |
| CN113748346A (en) * | 2019-05-14 | 2021-12-03 | 兰迪斯+盖尔股份有限公司 | Access protection assembly for utility meters and meter device comprising same |
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| Publication number | Publication date |
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| CN118731657A (en) | 2024-10-01 |
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