CN118659334B - A high performance DC power supply parallel system and control method - Google Patents
A high performance DC power supply parallel system and control method Download PDFInfo
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- CN118659334B CN118659334B CN202411055734.XA CN202411055734A CN118659334B CN 118659334 B CN118659334 B CN 118659334B CN 202411055734 A CN202411055734 A CN 202411055734A CN 118659334 B CN118659334 B CN 118659334B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J1/00—Circuit arrangements for DC mains or DC distribution networks
- H02J1/10—Parallel operation of DC sources
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
- H02J13/00006—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network characterised by information or instructions transport means between the monitoring, controlling or managing units and monitored, controlled or operated power network element or electrical equipment
- H02J13/00016—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network characterised by information or instructions transport means between the monitoring, controlling or managing units and monitored, controlled or operated power network element or electrical equipment using a wired telecommunication network or a data transmission bus
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
- H02J13/00032—Systems characterised by the controlled or operated power network elements or equipment, the power network elements or equipment not otherwise provided for
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
- H02J13/00032—Systems characterised by the controlled or operated power network elements or equipment, the power network elements or equipment not otherwise provided for
- H02J13/00036—Systems characterised by the controlled or operated power network elements or equipment, the power network elements or equipment not otherwise provided for the elements or equipment being or involving switches, relays or circuit breakers
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- Power Engineering (AREA)
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- Direct Current Feeding And Distribution (AREA)
Abstract
The invention discloses a high-performance direct-current power supply parallel operation control system and a control method, which belong to the technical field of direct-current power supplies and comprise a loop control module, a signal following module and a communication module, wherein the loop control module comprises a voltage outer ring control circuit and a current outer ring control circuit to realize accurate control of voltage and current, the signal following module comprises two identical following circuits to realize voltage following and power amplification, the communication module comprises an STM32 control circuit, a differential driving circuit and an RS485 communication circuit to realize current control, start-stop control, alarm control and other signal communication between a host computer and a slave computer, and the differential circuit ensures that analog signals are transmitted without attenuation. The invention can be applied to parallel operation control of direct current power supplies of the same model, and when a plurality of power supplies are connected in parallel, the analog circuit is used for transmitting a voltage outer ring control signal, the signal is continuously transmitted, the transmission speed is high, and the dynamic performance of the power supplies is ensured.
Description
Technical Field
The invention relates to the technical field of direct current power supplies, in particular to a high-performance direct current power supply parallel operation system and a control method.
Background
In order to expand the application of the power supply, the power supply parallel operation technology is particularly important to improve the flexibility and the expandability of the power supply. The total output capacity of the system is improved by adding the output capacities of the power supply devices, and a user can reduce or increase the power supply devices according to load demands so as to adapt to the application of different scales and power requirements.
The direct current power supply parallel operation control is generally to control the power supply parallel operation in an analog master-slave control mode, the host computer controls the slave computers, the signal transmission is mainly based on analog signal transmission, and as the host computer and the slave computers have differences in analog control circuits, the output current of each power supply has larger differences, the number of the slave computers cannot be increased or reduced flexibly, and the total current accuracy of the power supply parallel operation output cannot be ensured.
Disclosure of Invention
The invention aims to provide a high-performance direct-current power supply parallel operation control method, which realizes power supply parallel operation control by using a mixed control mode of an analog circuit and a digital circuit, ensures uninterrupted continuous transmission of signals by adopting analog circuit control on output signals of a voltage outer ring, ensures the dynamic performance of the power supply, can flexibly increase or reduce the number of parallel operation by adopting an RS485 digital communication control mode, ensures the parallel operation current precision, and ensures the safe and reliable operation of the power supply by adopting digital communication control mode to control the signal transmission such as power supply start, stop and alarm.
The invention aims to achieve the aim, and the aim is achieved by the following technical scheme:
A high-performance direct-current power supply parallel operation system comprises N power supplies with the same structure, wherein the N power supplies comprise a host power supply and N-1 slave power supplies, and N is a positive integer;
All power supplies are connected in parallel, each power supply comprises a loop control module, a following module, a differential circuit and a communication module, and the output end of the loop control module is connected with the input end of the following module;
the loop control module comprises a voltage outer loop control circuit and a current outer loop control circuit, the following module comprises a first following circuit and a second following circuit, and the communication module comprises an STM32 circuit, a differential driving circuit and an RS485 circuit which are sequentially connected.
Further, the input end of the voltage outer loop control circuit is respectively a voltage sampling Vmom signal and a given Vref signal, the input end of the current outer loop control circuit is respectively a current sampling Imom signal and a given Iref signal, the output end of the current outer loop control circuit is connected with the input end of the first follower circuit, the first output end of the voltage outer loop control circuit is a voltage sampling Vmom signal and the output signal of the given Vref signal through PI regulation and a voltage follower, the signal is connected with the input end of the relay S1, the output end of the relay S1 is connected with the input end of the first follower circuit, the output end Vslave signal of the differential circuit is connected with the input end of the relay S2, the Vslave signal is a signal obtained by differential operation of a share+ signal and a Share-signal of the power parallel host, the output end of the relay S2 is connected with the input end of the first follower circuit, the output end of the first follower circuit is connected with the input end of the current inner loop control circuit, the second output end Vmaster of the voltage outer loop control circuit is connected with the input end of the second follower circuit, the Vmaster signal is a signal which is output after a voltage sampling Vmom signal and a given Vref signal are regulated through PI, the output end Vmaster-OUT signal of the second follower circuit is connected with the input end of a relay S3, the input end Vslave-IN signal of a differential circuit is connected with the input end of a relay S4, the Vslave-IN signal is a share+ signal sent by a host when a power supply is connected, the output ends of the relays S3 and S4 are connected to the share+ signal, the GND signal is connected with the Share-signal through a relay S5, the GND-IN signal is connected with the Share-signal through a relay S6, the GND-IN signal is the GND signal of the host when the power supply is connected, the RS485-A signal and the RS485-B signal are output by the RS485-B signal, and the data bus connects the host, the same signals of the slave power supply are respectively connected, and the master is connected with the output end of the slave power supply in positive and negative connection.
Further, the voltage outer loop control circuit comprises an operational amplifier U1, an operational amplifier U7, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R19, a capacitor C1 and a diode D1, wherein the left side of the resistor R1 is connected with a voltage sampling Vmon signal, the right side of the resistor R1 and the left side of the resistor R3 are connected with an inverting input end of the operational amplifier U1 together, the left side of the resistor R2 is connected with a voltage setting Vref signal, the right side of the resistor R2 is connected with an in-phase input end of the operational amplifier U1, the right side of the resistor R3 is connected with the left side of the capacitor C1, the right side of the capacitor C1 and an anode of the diode D1 are connected with an in-phase input end of the operational amplifier U7 together, a cathode of the diode D1 is connected with an output end of the operational amplifier U1 in series, the inverting input end of the operational amplifier U7 and the right side of the resistor R19 are connected with an input end of the relay S1 together, and the left side of the resistor R19 is connected with an output end of the operational amplifier U7;
The current outer loop control circuit comprises an operational amplifier U2, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C2 and a diode D2, wherein the left side of the resistor R5 is connected with a current sampling Imon signal, the right side of the resistor R5 and the left side of the resistor R6 are connected with the inverting input end of the operational amplifier U2 together, the left side of the resistor R7 is connected with a voltage given Iref signal, the right side of the resistor R7 is connected with the non-inverting input end of the operational amplifier U2, the right side of the resistor R6 is connected with the anode of the diode D2 and the output end of the relay S1 in series after being connected with the capacitor C2, and the resistor R8 is connected between the cathode of the diode D2 and the output end of the operational amplifier U2 in series;
The differential circuit comprises an operational amplifier U5, a resistor R15, a resistor R16, a resistor R17 and a resistor R18, wherein the left side of the resistor R15 is connected with the input end of a relay S6, the right side of the resistor R15 and the left side of the resistor R16 are connected with the inverting input end of the operational amplifier U5 together, the right side of the resistor R16 is respectively connected with the output end of the operational amplifier U5 and the input end of a relay S2, the left side of the resistor 17 is connected with the input end of a relay S4, the right side of the resistor 17 and the upper side of the resistor 18 are connected with the non-inverting input end of the U5 together, and the lower side of the resistor R18 is connected with the input end of the relay S5;
The first follower circuit comprises an operational amplifier U3, a resistor R9, a resistor R10, a resistor R11, a capacitor C3, a capacitor C4, a diode D3 and a triode Q1, wherein the non-inverting input end of the operational amplifier U3 is respectively connected with the output end of the relay S1 and the output end of the relay S2, the inverting input end of the operational amplifier U3 is respectively connected with the left side of the resistor R9, the left side of the capacitor C3 and the left side of the capacitor C4, the output end of the operational amplifier U3 is respectively connected to the right side of the capacitor C4, the cathode of the diode D3 and the base of the triode Q1, the right side of the capacitor C3 is respectively connected with the anode of the diode D3, the upper side of the resistor R11, the left side of the resistor R10 and the emitter of the triode Q1, the right side of the resistor R9 is connected with the right side of the resistor R10, a current inner loop given signal is generated on the right side of the resistor R10 and is connected with the input end of the current inner loop control circuit, the collector of the triode Q1 is connected with +VCC power supply, and the lower side of the resistor R11 is connected with VCC power supply;
The second follower circuit comprises an operational amplifier U4, a resistor R12, a resistor R13, a resistor R14, a capacitor C5, a capacitor C6, a diode D4 and a triode Q2, wherein the in-phase input end of the operational amplifier U4 is connected with the in-phase input end of the operational amplifier U7, the reverse-phase input end of the operational amplifier U4 is respectively connected with the left side of the resistor R12, the left side of the capacitor C5 and the left side of the capacitor C6, the output end of the operational amplifier U4 is respectively connected to the right side of the capacitor C6, the cathode of the diode D4 and the base of the triode Q2, the right side of the capacitor C5 is respectively connected with the anode of the diode D4, the upper side of the resistor R14, the left side of the resistor R13 and the emitter of the triode Q2, the right side of the resistor R12 is respectively connected with the right side of the resistor R13, the input end of the relay S3 is a Share+ signal, the collector of the triode Q2 is connected with +VCC power supply, and the lower side of the resistor R14 is connected with VCC power supply.
Further, the operational amplifier U3 and U4 have identical device models, the diode D3 and D4 have identical device models, the capacitor C4 and C6 have identical device models, the capacitor C3 and C5 have identical device models, the resistor R9 and R12 have identical device models, the resistor R10 and R13 have identical device models, the resistor R11 and R14 have identical device models, the triode Q1 and Q2 have identical device models, and the resistor R15=R16=R17=R18.
A parallel operation control method for high-performance DC power supply includes such steps as providing single power supply, parallel operation of power supply, constant-voltage mode or constant-current mode, operating voltage external control circuit, and operating current external control circuit.
Further, when the power supply is single, the output end of the voltage outer loop control circuit is connected with the input end of the first follower circuit in parallel, the output end of the first follower circuit is connected with the current inner loop control circuit, the current inner loop control circuit is connected with the PWM control circuit to drive the main power circuit, the output Vmaster of the voltage outer loop control circuit is connected with the input end of the second follower circuit, the output end of the second follower circuit is connected to a share+ signal through a relay S3, and the GND signal is connected with the Share-signal through a relay S5.
Further, when the power supplies are connected in parallel, and the power supplies of the host and the N-1 slaves are in a power supply constant voltage mode, the voltage outer loop control circuit of the host is used by the power supplies of the host and the N-1 slaves:
when Vref is larger than Vmon, the voltage outer loop control circuit increases Vmaster output through PI regulation, and finally Vref=Vmon is reached;
when Vref is less than Vmon, the Vmaster output is reduced by PI regulation, eventually reaching vmon=vref;
when vref=vmon, vmaster remains relatively stable;
The voltage outer loop control circuit of the N-1 slaves does not participate in loop regulation, and an analog circuit is used for transmitting voltage outer loop output signals.
When the power supply is connected in parallel, when the host power supply and N-1 slaves work in a constant voltage mode, a host power supply signal transmission path is formed by connecting a voltage outer loop control circuit with a current outer loop control circuit in parallel, wherein the output end of the voltage outer loop control circuit is connected with the input end of a first follower circuit, the output end OUT signal of the first follower circuit is connected with a current inner loop control circuit, and the current inner loop control circuit is connected with a PWM control circuit to finish driving a main power circuit;
The N-1 slave power supplies receive a host power supply voltage outer ring control signal transmission path, wherein a voltage outer ring control output Vmaster signal of the host power supply is connected with a second follower circuit input end of the host power supply, a host power supply second follower circuit output end Vmaster-OUT signal is connected with a share+ signal through a host power supply relay S3, a GND signal is connected with the share+ signal through a host power supply relay S5, the host power supply is correspondingly connected with the share+ signal and the Share-signal IN each slave power supply by using a data bus, a relay S4 of each slave power supply is closed, an input end of the relay S4 is connected with a Vslave-IN signal, an input end of each slave power supply relay S6 is closed, an input end of the relay S6 is connected with a GND-IN signal, an output end Vslave signal of each slave power supply differential circuit is connected with an input end of the slave power supply relay S2, an output end OUT signal of the first follower circuit is connected with a current inner ring control circuit, and the current inner ring control circuit is connected with a PWM control circuit to complete the driving of the master power circuit.
Further, when the power supply is connected in parallel, and the host power supply and the N-1 slaves are in a power supply working constant current mode, the current outer loop control circuit works:
When Iref is greater than Imon, the current outer loop increases the output of the current outer loop through PI adjustment, and finally iref= Imon is reached;
when Iref is less than Imon, the current outer loop reduces the current outer loop output through PI adjustment, finally Imon =iref is reached;
when iref= Imon, the current outer loop output remains relatively stable;
setting the total set current value of the host The current value is actually set by the single power supply of the host machine and N-1 slaves,The value error is within 1mA, the magnitude of the given signal Iref signal of the power supply current outer loop of the master machine is the same as that of the given signal Iref signal of the power supply current outer loop of N-1 slave machines, the sampling current Imon is a Imon signal of each power supply or slave machine, the output current of each power supply is consistent, and each power supply current outer loop circuit is independently regulated.
Furthermore, when the power supplies are connected in parallel, the STM32 main control chip completes interconnection of the host computer and the slaves through RS485 digital communication, and the host computer and the N-1 slaves synchronously start, stop, transmit alarm signals and set and display digital control power supply current.
The invention has the advantages that the parallel control of the power supply is realized by using a mixed control mode of an analog circuit and a digital circuit, the output signal of the voltage outer ring is controlled by adopting the analog circuit to ensure uninterrupted continuous transmission of the signal, the transmission speed is high, and the dynamic performance of the power supply is ensured;
the first follower circuit is used for enhancing the output signal driving capability of the loop regulating module, and the second power follower circuit of the host power supply is used for guaranteeing the output signal driving capability of the voltage outer loop control circuit when the power supplies are connected in parallel, so that the number of cascade connection of analog circuits is reduced, and the analog error is reduced;
The system adopts an RS485 digital communication control mode, the STM32 control circuit completes communication between a host and N-1 slave power supplies in real time through RS485 communication, the amplitude of given signals Iref of power supply current outer rings of the host and N-1 slaves is guaranteed to be the same, the output current of each power supply is guaranteed to be consistent, the current display value of each slave is communicated with the host STM32 in real time through RS485 communication, the total display value is obtained through summation of each power supply, the current precision of the combined power supply is guaranteed, the user operation is not needed, the current outer ring circuit of each power supply is convenient to adjust independently, the transmission of the output signals of the host and the slave current outer rings is not involved, the number of the power supplies of the slave can be increased or reduced according to actual conditions, the digital communication control power supplies are started, stopped, alarm and other signal transmission, and safe and reliable operation of a plurality of power supplies is guaranteed.
Drawings
FIG. 1 is a schematic diagram of a high performance DC power supply parallel operation control system connection in accordance with embodiment 1 of the present invention;
FIG. 2 is a schematic diagram showing the connection of each functional module of the parallel operation control system for high-performance DC power supply according to embodiment 1 of the present invention, and a circuit
FIG. 3 is a power circuit diagram of embodiment 1 of the present invention;
fig. 4 is a schematic connection diagram of a parallel operation control method of a high-performance dc power supply according to embodiment 2 of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
Example 1
The embodiment discloses a high-performance direct-current power supply parallel operation system, please refer to fig. 1, the system comprises N power supplies with the same structure, the N power supplies comprise a host power supply and N-1 slave power supplies, N is a positive integer, parallel operation control only needs 4 signals, namely a share+ signal, a Share-signal, an RS485-A signal and an RS485-B signal, and the parallel operation control only needs the same signal line connection, wherein the share+ signal, the Share-signal are analog signals, the RS485-A signal and the RS485-B signal are digital signals, parallel operation control is completed in an analog and digital mixed control mode, and the host power supply output end is connected with a positive power supply, and the host power supply output end is connected with a negative power supply in a negative mode.
Referring to FIG. 2, all power supplies are connected in parallel, each power supply comprises a loop control module, a following module, a differential circuit and a communication module, the output end of the loop control module is connected with the input end of the following module, the loop control module comprises a voltage outer loop control circuit and a current outer loop control circuit, the following module comprises a first following circuit and a second following circuit, and the communication module comprises an STM32 circuit, a differential driving circuit and an RS485 circuit which are sequentially connected.
Referring to fig. 3, the voltage outer loop control circuit includes an operational amplifier U1, an operational amplifier U7, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R19, a capacitor C1, and a diode D1, wherein the left side of the resistor R1 is connected to a voltage sampling Vmon signal, the right side of the resistor R1 is connected to the left side of the resistor R3 together with an inverting input terminal of the operational amplifier U1, the left side of the resistor R2 is connected to a voltage given Vref signal, the right side of the resistor R2 is connected to the non-inverting input terminal of the operational amplifier U1, the right side of the resistor R3 is connected to the left side of the capacitor C1, the right side of the capacitor C1 is connected to the anode of the diode D1 together with the non-inverting input terminal of the operational amplifier U7 to output Vmaster, the cathode of the diode D1 is connected to the output terminal of the operational amplifier U1 after being serially connected to the resistor R4, the inverting input terminal of the operational amplifier U7 is connected to the right side of the resistor R19 together with the input terminal of the relay S1, and the left side of the resistor R19 is connected to the output terminal of the operational amplifier U7. The power supply works in a Constant Voltage (CV) mode, vref voltage is larger than Vmon, vmaster output is increased through PI regulation by the voltage outer ring, vref=Vmon is finally achieved, vmaster output is reduced through PI regulation by the voltage outer ring when Vref voltage is smaller than Vmon, vmon=Vref is finally achieved, vref=Vmon and Vmaster are maintained relatively stable, and when an operational amplifier U7 and a resistor R19 in the circuit form a circuit to be connected in parallel, a current outer ring output signal of a host machine is prevented from being transmitted to a slave machine.
The current outer loop control circuit comprises an operational amplifier U2, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C2 and a diode D2, wherein the left side of the resistor R5 is connected with a current sampling Imon signal, the right side of the resistor R5 is connected with the left side of the resistor R6 together to form an inverted input end of the operational amplifier U2, the left side of the resistor R7 is connected with a voltage given Iref signal, the right side of the resistor R7 is connected with the non-inverting input end of the operational amplifier U2, the right side of the resistor R6 is connected with the anode of the diode D2 and the output end of the relay S1 in series after being connected with the capacitor C2, and the resistor R8 is connected between the cathode of the diode D2 and the output end of the operational amplifier U2 in series. The voltage of Iref is larger than Imon, the output of the current outer ring is increased through PI regulation, and finally Iref= Imon is achieved, when Iref is smaller than Imon, the output of the current outer ring is reduced through PI regulation, imon =Iref is achieved, and when Iref= Imon, the output of the current outer ring is kept relatively stable.
The differential circuit comprises an operational amplifier U5, a resistor R15, a resistor R16, a resistor R17 and a resistor R18, wherein the left side of the resistor R15 is connected with the input end of a relay S6, the right side of the resistor R15 and the left side of the resistor R16 are connected with the inverting input end of the operational amplifier U5, the right side of the resistor R16 is respectively connected with the signal of the output end Vslave of the operational amplifier U5 and the input end of a relay S2, the left side of the resistor 17 is connected with the input end Vslave-IN signal of the relay S4, the output end of the relay S4 is connected to a share+ signal, the right side of the resistor 17 and the upper side of the resistor 18 are connected with the non-inverting input end of the U5, and the lower side of the resistor R18 is connected with the input end of the relay S5. The resistor r15=r16=r17=r18, the power supply multiple parallel operation data bus wire bundles can be longer, and the differential circuit is used for preventing deviation of the GND network when the analog signal is transmitted for a long distance, so that the analog signal is offset.
The first follower circuit comprises an operational amplifier U3, a resistor R9, a resistor R10, a resistor R11, a capacitor C3, a capacitor C4, a diode D3 and a triode Q1, wherein the in-phase input end of the operational amplifier U3 is respectively connected with the output end of the relay S1 and the output end of the relay S2, the inverting input end of the operational amplifier U3 is respectively connected with the left side of the resistor R9, the left side of the capacitor C3 and the left side of the capacitor C4, the output end of the operational amplifier U3 is respectively connected to the right side of the capacitor C4, the cathode of the diode D3 and the base of the triode Q1, the right side of the capacitor C3 is respectively connected with the anode of the diode D3, the upper side of the resistor R11, the left side of the resistor R10 and the emitter of the triode Q1, the right side of the resistor R9 is connected with the right side of the resistor R10, the current inner loop given signal OUT signal is connected with the input end of the current inner loop control circuit, the collector of the triode Q1 is connected with +VCC, and the lower side of the resistor R11 is connected with-VCC power supply. The power supply has the functional principle that when an OUT signal drives a plurality of modules, the voltage of the modules is reduced, and when the in-phase input end of an operational amplifier U3 is larger than the OUT signal, the output voltage of the operational amplifier U3 is increased, the output current capacity of Q1 is increased, and the driving capacity of the OUT signal is enhanced.
The second follower circuit comprises an operational amplifier U4, a resistor R12, a resistor R13, a resistor R14, a capacitor C5, a capacitor C6, a diode D4 and a triode Q2, wherein the in-phase input end of the operational amplifier U4 is connected with Vmaster signals, the inverting input end of the operational amplifier U4 is respectively connected with the left side of the resistor R12, the left side of the capacitor C5 and the left side of the capacitor C6, the output end of the operational amplifier U4 is respectively connected with the right side of the capacitor C6, the cathode of the diode D4 and the base of the triode Q2, the right side of the capacitor C5 is respectively connected with the anode of the diode D4, the upper side of the resistor R14, the left side of the resistor R13 and the emitter of the triode Q2, the right side of the resistor R12 is respectively connected with the right side of the resistor R13 and the input end Vmaster-OUT signals of the relay S3, the output end of the relay S3 is a Share+ signal, the collector of the triode Q2 is connected with +VCC power supply, and the lower side of the resistor R14 is connected with-VCC power supply. The principle is the same as the first follower circuit, but the driving capability of the voltage outer loop output signal of the host power supply is increased. The device models used at the same positions of the first follower circuit and the second follower circuit in the follower circuit module are identical, the operational amplifiers U3 and U4 are identical in device model, the diodes D3 and D4 are identical in device model, the capacitors C4 and C6 are identical in device model, the capacitors C3 and C5 are identical in device model, the resistors R9 and R12 are identical in device model, the resistors R10 and R13 are identical in device model, the resistors R11 and R14 are identical in device model, the triodes Q1 and Q2 are identical in device model, and the fact that the external loop transmission signals of the host voltage are respectively conducted to the current inner loop of the host and transmitted to the follower power supply follower circuit is guaranteed.
GND signal is connected with Share-signal through relay S5, GND-IN signal is connected with Share-signal through relay S6, RS485 circuit outputs RS485-A signal, RS485-B signal.
Example 2
A parallel operation control method for high-performance DC power supply includes such steps as providing single power supply, parallel operation of power supply, constant-voltage mode or constant-current mode, operating voltage external control circuit, and operating current external control circuit.
When the power supply is connected in parallel, please refer to the connection relation of fig. 4, the power supply uses its own voltage outer loop control circuit and current outer loop control circuit, the voltage outer loop control circuit is connected in parallel with the current outer loop control circuit, the relay control logic is that the S1, S3, S5 is closed, the S2, S4, S6 is opened, the relay control logic is that the S1, S3, S5 is opened, the S2, S4, S6 is opened, the relay control logic is that the S1, S2, S4, S6 is opened, and the power supply signal transmission needs the data bus to connect the same signals as the share+ signal, share-signal, RS485-A signal, RS485-B signal, etc. of the master, the slave power supply and the slave power supply output end are connected positively and negatively, the voltage outer loop control circuit is shared by the master and N-1 slave, and the master and N-1 slave use their own current outer loop control circuits.
When the power supply is connected in parallel, the output end of the voltage outer loop control circuit is connected with the input end of the first follower circuit after being connected in parallel with the current outer loop control circuit, the output end OUT of the first follower circuit is connected with the current inner loop control circuit, and the current inner loop control circuit is connected with the PWM control circuit to finish driving the main power circuit.
The N-1 slave power supplies receive a host power supply voltage outer ring control signal transmission path, wherein a voltage outer ring control output Vmaster signal of the host power supply is connected with a second follower circuit input end of the host power supply, a host power supply second follower circuit output end Vmaster-OUT signal is connected with a share+ signal through a host power supply relay S3, a GND signal is connected with the share+ signal through a host power supply relay S5, the host power supply is correspondingly connected with the share+ signal and the Share-signal IN each slave power supply by using a data bus, a relay S4 of each slave power supply is closed, an input end of the relay S4 is connected with a Vslave-IN signal, an input end of each slave power supply relay S6 is closed, an input end of the relay S6 is connected with a GND-IN signal, an output end Vslave signal of each slave power supply differential circuit is connected with an input end of the slave power supply relay S2, an output end OUT signal of the first follower circuit is connected with a current inner ring control circuit, and the current inner ring control circuit is connected with a PWM control circuit to complete the driving of the master power circuit.
When the power supply is connected in parallel, when the host power supply and N-1 slaves are in a power supply working Constant Current (CC) mode, the current outer loop control circuit works to set the total set current value of the hostThe current value is actually set by the single power supply of the host machine and N-1 slaves,The value error is within 1mA, the magnitudes of the Iref signals of the given signals of the power supply current outer rings of the master machine and the N-1 slave machines are the same, the sampling current Imon samples the Imon signals of the power supply of each master machine or slave machine, the output current of each power supply is consistent, the output signals of the power supply current outer rings of each power supply are independently regulated, the transmission of the output signals of the power supply outer rings of the master machine and the slave machines is not involved, the number of the power supply of the slave machines can be increased or reduced according to actual conditions, the total current precision is not required to be calibrated, and the operation of a user is convenient.
When the power supply is connected in parallel, the STM32 main control chip completes interconnection of the host computer and the slave computers through RS485 digital communication, and the host computer and the N-1 slave computers synchronously start, stop, transmit alarm signals and set and display digital control power supply current.
Example 3
When the power supply is single, the output end of the voltage outer loop control circuit is connected with the input end of the first follower circuit in parallel, the output end of the first follower circuit is connected with the current inner loop control circuit, the current inner loop control circuit is connected with the PWM control circuit to drive the main power circuit, the voltage outer loop control circuit output Vmaster is connected with the input end of the second follower circuit, the output end of the second follower circuit is connected to a share+ signal through the relay S3, and the GND signal is connected with the Share-signal through the relay S5.
Finally, it should be understood that the foregoing description is merely illustrative of the preferred embodiments of the present invention and is not intended to limit the invention to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and scope of the invention.
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