CN118573028A - DC-DC converter and zero voltage turn-on control method thereof - Google Patents

Abstract

The present disclosure relates to a DC-DC converter and a zero voltage turn-on control method thereof. The zero voltage turn-on control method for a phase-shifted full-bridge DC-DC converter includes: calculating the primary side resonant current at the turn-off moment of one of the one or more lagging switch tubes among the multiple switch tubes on the primary side of the DC-DC converter; determining the critical resonant current for realizing the zero voltage turn-on of the DC-DC converter based on the capacitor voltage integral formula; comparing the calculated primary side resonant current with the determined critical resonant current; in response to the calculated primary side resonant current being less than the critical resonant current, increasing the output voltage of the DC-DC converter by a predetermined adjustment step as a first adjusted output voltage; and repeating steps (a)-(d) based on the first adjusted output voltage until the calculated primary side resonant current is greater than or equal to the critical resonant current.

Description

DC-DC converter and zero voltage switching control method thereof

This application is a divisional application of the Chinese patent application with the application date of May 15, 2024, application number 202410610080.6, and name “DC-DC converter and its zero voltage turn-on control method”.

Technical Field

The present disclosure relates to the field of electricity, and more specifically, to a DC-DC converter and a zero voltage switching control method thereof.

Background Art

In recent years, with the increasing depletion of fossil energy and the intensification of the greenhouse effect, the future society is facing a huge energy crisis and environmental deterioration risk. In order to meet this challenge, countries around the world have begun to develop new power generation technologies such as photovoltaics, wind turbines, fuel cells, and supporting energy storage technologies. In order to more efficiently accept renewable energy power generation systems such as direct current and non-industrial frequency alternating current, and to supply power to energy storage units, electric vehicles and other DC loads, the research on DC microgrids has also received great attention. The DC-DC converter is the core component of the DC microgrid, especially the converter that regulates the DC bus voltage. Its performance is crucial to indicators such as the overall efficiency and power density of the microgrid system.

In the DC-DC converter topology, isolated bridge converters are widely used because of their wide gain and simple modulation. Furthermore, in order to pursue higher power density, the switching frequency of the converter needs to be continuously increased to reduce the volume of magnetic components, but the cost is that hard switching will lead to high switching losses and electromagnetic compatibility (EMC) problems. Therefore, a wide zero voltage switching (Zero Voltage Switching; ZVS) operating range is crucial for the efficient and stable operation of high-frequency converters. However, isolated bridge converters inherently face two major disadvantages: duty cycle loss at heavy loads and hard switching operation of lagging switches at light loads.

Existing technologies for expanding the zero voltage switching range of the Phase Shifted Full Bridge (PSFB) converter include increasing the size of the discrete inductor, thereby increasing the energy stored in the discrete inductor, so that more charges on the switch junction capacitance can be released in the same dead zone. However, this technology will increase the duty cycle loss of the phase shifted full bridge converter and reduce the gain, while increasing the discrete inductor will increase the size of the converter.

It is also possible to increase the soft switching range by adding a set of switch tube bridge arms and discrete inductors and modulating the external bridge arms to increase the soft-opening current at the commutation moment. However, this technology is more complicated to control and requires precise control of the on-off moment of the external bridge arms. At the same time, the added bridge arms and discrete inductors will also increase the overall size of the converter.

Summary of the invention

In order to solve one or more problems including reducing the size of the converter to improve the power density, expanding the zero voltage switching (Zero Voltage Switching; ZVS) range without increasing the duty cycle loss, reducing the converter switching loss, and improving the converter efficiency, the present disclosure provides an improved DC-DC converter and an optimized zero voltage switching control method.

According to one aspect of the present disclosure, a DC-DC converter is provided. The DC-DC converter includes a bridge circuit, a rectifier circuit and a transformer, and does not include a discrete inductor. The bridge circuit is located on the primary side of the DC-DC converter. The bridge circuit includes a plurality of switch tubes. The rectifier circuit is located on the secondary side of the DC-DC converter. The transformer is connected between the bridge circuit and the rectifier circuit, the leakage inductance of the transformer is used to act as the resonant inductance of the bridge circuit, and the transformer has an air gap, which is configured to reduce the excitation inductance of the transformer to increase the excitation current, and the excitation current is used to compensate for the resonant current of the bridge circuit. In the implementation of the present disclosure, the excitation inductance of the transformer is reduced to such that when the DC-DC converter is at the highest output voltage and the maximum output power, the junction capacitance of the switch tube that is turned off at the beginning of the dead time in the multiple switch tubes of the bridge circuit is charged to the input voltage of the DC-DC converter during the dead time, and the junction capacitance of the switch tube that is turned on after the dead time in the multiple switch tubes is discharged to 0 volts during the dead time.

According to another aspect of the present disclosure, a zero voltage turn-on control method for a DC-DC converter is provided. The DC-DC converter is a phase-shifted full-bridge converter. The transformer leakage inductance of the DC-DC converter acts as its primary side resonant inductance. The control method includes the following steps: (a) calculating the primary side resonant current at the time when one of the lagging switch tubes among one or more lagging switch tubes of the multiple switch tubes on the primary side of the DC-DC converter is turned off; (b) determining the critical resonant current for realizing zero voltage turn-on of the DC-DC converter based on the capacitor voltage integral formula; (c) comparing the calculated primary side resonant current with the determined critical resonant current; (d) in response to the calculated primary side resonant current being less than the critical resonant current, increasing the output voltage of the DC-DC converter by a predetermined adjustment step as a first adjusted output voltage; and (e) repeating steps (a)-(d) based on the first adjusted output voltage until the calculated primary side resonant current is greater than or equal to the critical resonant current.

According to yet another aspect of the present disclosure, a DC-DC converter is provided, wherein the DC-DC converter adopts the zero voltage switching control method for the DC-DC converter described in the present disclosure.

According to yet another aspect of the present disclosure, an energy storage device is provided, which includes the DC-DC converter described in the present disclosure or is connected to the DC-DC converter described in the present disclosure.

According to yet another aspect of the present disclosure, a computer-readable storage medium is provided. The computer-readable storage medium stores instructions, and when the instructions are executed by a processor, the steps of the zero voltage switching control method for a DC-DC converter described in the present disclosure are implemented.

According to yet another aspect of the present disclosure, a computer program product is provided, which includes instructions, and when the instructions are executed by a processor, the steps of the zero voltage switch-on control method for a DC-DC converter described in the present disclosure are implemented.

Compared with the existing converters and control methods, the implementation of the present disclosure has at least one or more of the following advantages: the DC-DC converter of the present disclosure does not include discrete inductors, thereby reducing the volume of the converter and improving the power density; the DC-DC converter of the present disclosure does not substantially increase the duty cycle loss due to the small value of the transformer leakage inductance; the DC-DC converter of the present disclosure and/or its zero voltage switching control method can relatively simply and efficiently expand the ZVS range, and even achieve full range ZVS, thereby reducing the switching loss of the converter and improving the operating efficiency of the converter. The DC-DC converter of the present disclosure can be used in scenarios with high switching frequencies.

These and other aspects and features of the present disclosure will become more apparent from the following detailed description, which proceeds with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to be able to understand the present disclosure in detail, a more specific description of the present disclosure briefly summarized above can be obtained by reference to the embodiments, some of which are shown in the accompanying drawings. In order to facilitate understanding, similar reference numerals have been used as much as possible to indicate similar elements common to the various figures. However, it should be noted that the drawings only show typical embodiments of the present disclosure and therefore should not be considered to limit the scope of the present disclosure, as the present disclosure may allow other equivalent embodiments. In the accompanying drawings:

FIG. 1 is a schematic block diagram of an example DC-DC converter according to an embodiment of the present disclosure.

FIG. 2 is a schematic topology diagram of an example full-bridge converter according to an embodiment of the present disclosure.

FIG. 3 is a schematic topology diagram of an example half-bridge converter according to an embodiment of the present disclosure.

FIG. 4 is a control loop block diagram of the example full-bridge converter of FIG. 2 .

FIG. 5 is a working waveform diagram of the exemplary full-bridge converter of FIG. 2 .

FIG. 6 is an operating waveform diagram of the exemplary half-bridge converter of FIG. 3 .

FIG. 7 is a schematic diagram showing changes in the current and drain-source voltage of the hysteresis switch tube of the example full-bridge converter of FIG. 2 within the dead time.

FIG8 is a schematic flow chart of a zero voltage turn-on control method for a full-bridge converter according to an embodiment of the present disclosure.

FIG. 9 is another schematic flow chart of a zero voltage turn-on control method for a full-bridge converter according to an embodiment of the present disclosure.

It is contemplated that elements of one embodiment of the disclosure may be beneficially applied to other embodiments without further recitation.

DETAILED DESCRIPTION

The specific embodiments of the present disclosure are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but it should be understood by those skilled in the art that the present disclosure can be implemented without some or all of these specific details, and therefore the present disclosure is not limited to the specific embodiments disclosed below. On the other hand, no specific description of well-known processes or procedures, etc., is provided to avoid unnecessarily obscuring the present disclosure.

Furthermore, it is to be appreciated that the various embodiments shown in the figures are illustrative and that the figures are not necessarily drawn to scale.

The present disclosure uses specific words to describe the embodiments of the present disclosure. For example, "one embodiment", "an embodiment", and/or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present disclosure. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different locations of the present disclosure does not necessarily refer to the same embodiment. In addition, certain features, structures or characteristics in one or more embodiments of the present disclosure may be appropriately combined.

In the present disclosure, unless otherwise specified, the technical terms or scientific terms used in the claims and the specification shall have the usual meanings understood by ordinary technicians in the technical field to which the present disclosure belongs. "First", "second", "(a)", "(b)", "(c)", "(d)", and similar expressions used in the present disclosure and the claims do not indicate any order, quantity or importance, but are only used to distinguish different components. In addition, similar words such as "include" or "comprise" mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalent elements, and do not exclude other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, nor are they limited to direct or indirect connections. In addition, in the present disclosure, the use of similar words such as "about" or "approximately" means within the range of ±10% of the nominal value.

The technology described in the present disclosure may be implemented at least in part in hardware, software, firmware, or any combination thereof. The terms "processor", "processing circuit", "controller", "control unit", or "control module" used in the present disclosure may include, but are not limited to, one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuits, and any combination of such components embodied in a programmer. The term "phase-shifted duty cycle ( _Dp )" used in the present disclosure may refer to the ratio of the time difference between the conduction signal of the lagging switch tube and the leading switch tube and the switching period.

Exemplary embodiments of the present disclosure are described in more detail below with reference to the accompanying drawings.

DC-DC Converter

In conventional DC-DC converters, since the resonant current generated by the leakage inductance of the transformer is not sufficient to achieve a wide zero voltage switching (Zero Voltage Switching; ZVS) operating range that is critical to the efficient and stable operation of high-frequency converters, the converter usually uses a discrete inductor for assistance. On the other hand, it is generally believed in the art that the excitation inductance of the transformer is infinite, so the excitation current in the circuit can be ignored, so people have never considered using the excitation inductance of the transformer as an auxiliary inductor for the DC-DC converter. For example, in the prior art, for the most common 400V, 10kW platform, the leakage inductance of the transformer is generally around 1uH, and the excitation inductance is generally around 2mH. In order to achieve a wider ZVS range, an external discrete inductor of about 10uH is required.

The DC-DC converter disclosed in the present invention overcomes this prejudice by reducing the transformer's excitation inductance by grinding the transformer's air gap (for example, reducing the transformer's excitation inductance to the level of tens of uH), so that the transformer's excitation inductance can be used as an auxiliary inductance of the DC-DC converter. Therefore, the excitation current can be suitable for compensating for the resonant current on the primary side of the DC-DC converter, thereby achieving a wider soft switching range without the need for an external discrete inductor.

Referring now to FIG. 1 , FIG. 1 shows a schematic block diagram of an example DC-DC converter 100 according to one or more embodiments of the present disclosure. The DC-DC converter 100 may include a bridge circuit 110 on its primary side, a rectifier circuit 130 on its secondary side, and a transformer 120 connected between the bridge circuit 110 and the rectifier circuit 130.

The bridge circuit 110 may include a plurality of switch tubes, which may include one or more leading switch tubes and one or more corresponding lagging switch tubes.

In the embodiment of the present disclosure, the leakage inductance 1203 of the transformer acts as the resonant inductance of the bridge circuit 110. Since the transformer leakage inductance is used as the resonant inductance, no additional volume is occupied, and since the leakage inductance value is usually small, the duty cycle loss is basically not increased.

The transformer 120 may have an air gap 1201, for example, by grinding the air gap. The air gap 1201 can reduce the excitation inductance 1202 of the transformer 120, thereby increasing the excitation current. The excitation current can compensate for the resonant current of the bridge circuit 110. Therefore, the DC-DC converter 100 of the present disclosure may not include a discrete inductor. Since the excitation inductance is obtained by opening an air gap in the transformer 120, it does not occupy additional volume, and the elimination of discrete inductance can further reduce the volume of the converter and improve the power density of the converter. On the other hand, by compensating the resonant current with the excitation current, the ZVS range can be expanded until the full range ZVS is achieved, which helps to reduce the switching loss of the converter and improve the overall operating efficiency of the converter.

The DC-DC converter 100 of the present disclosure can be used for energy storage devices (not shown). In some embodiments, the DC-DC converter 100 can be included in the energy storage device. In other embodiments, the DC-DC converter 100 can be connected to the energy storage device. In one or more embodiments, the energy storage device can be, for example, a photovoltaic energy storage device, a wind turbine energy storage device, a fuel cell, etc. In one or more embodiments, the energy storage device can use a DC microgrid.

In the embodiments of the present disclosure, the bridge circuit 110 may be a full-bridge circuit or a half-bridge circuit. The following describes examples of a full-bridge converter based on a full-bridge circuit and a half-bridge converter based on a half-bridge circuit with reference to FIGS. 2 to 7 . However, it should be understood that the described embodiments are merely illustrative, and the present invention may cover other suitable converter topologies.

Full-bridge converter

2, a schematic topology diagram of an exemplary full-bridge converter 200 according to an embodiment of the present disclosure is shown. The full-bridge converter 200 may include a bridge circuit 210 on its primary side, a rectifier circuit 230 on its secondary side, and a transformer 220 connected between the bridge circuit 210 and the rectifier circuit 230.

The bridge circuit 210 may include an input DC source V _bat , an input capacitor C _in , and switches S ₁ -S ₄ . Among the switches S ₁ and S ₂ may be leading switches, and S ₃ and S ₄ may be corresponding lagging switches. In an embodiment, the switches S ₁ -S ₄ may be field effect transistors (such as MOSFETs), IGBTs, BJTs, or thyristor switches.

The transformer 220 may include a transformer body T _x , a transformer leakage inductance L _{lk — T} used as a resonant inductance of the bridge circuit 210 , and a magnetizing inductance L _m used as an auxiliary inductance.

The rectifier circuit 230 may include rectifiers _S5 and _S6 , a filter inductor _Lf , a bus capacitor _Cdc , and a DC output _Vdc . In an embodiment, the rectifiers _S5 and _S6 may be field effect transistors (such as MOSFETs), silicon diodes, fast recovery diodes, or Schottky diodes.

In conjunction with the converter operation waveform 500 shown in FIG5 , an example of a specific operation process of the full-bridge converter 200 is described below. As shown in the figure, waveform 510 may represent the waveform of the drive signal of the leading switch tubes _S1 and _S2 , waveform 512 may represent the waveform of the drive signal of the lagging switch tubes _S3 and _S4 , waveform 520 may represent the waveform of the excitation current i _Lm , waveform 522 may represent the waveform of the corresponding resonant current i _r , waveform 530 may represent the waveform of the drain-source voltage v _ds of the switch tubes _S2 and _S3 , and waveform 540 may represent the waveform of the rectified current i _SD . The present disclosure takes a half cycle (t ₀ -t ₅ ) of the full-bridge converter 200 as an example for description; the analysis of the other half cycle is the same as that of the half cycle (t ₀ -t ₅ ), and will not be repeated here.

Mode 1 (t ₀ -t ₁ ): At time t ₀ , S ₄ is turned on, S ₁ , L _{lk_T} , L _m and S ₄ form a loop, and start to charge the junction capacitance of S ₂ and S _3. During _{t 0} -t ₁ , S ₁ and S ₄ are both in the on state; the excitation current i _Lm and the resonant current i _r both increase linearly; and the rectifier tube S ₅ on the secondary side is turned on, the rectifier tube S ₆ is turned off, and the rectifier current i _SD is equal to i _S5 . In an embodiment, the rectifier current can be equal to the difference between i _r and i _Lm converted to the secondary side, for example, i _S5 =n(i _r -i _Lm ), where n is the turns ratio of the primary coil to the secondary coil of the transformer, also known as the transformation ratio.

Mode 2 (t ₁ -t ₂ ): At t ₁ , S ₁ is turned off. At this time, due to the existence of the resonant inductance L _{lk_T} and the excitation inductance L _m , the resonant current i _r begins to decrease but does not change suddenly, and begins to charge the junction capacitance of S ₁ and discharge the junction capacitance of S _2. Due to the effect of the junction capacitance of S ₁ and S ₂ , the turn-off of S ₁ achieves ZVS. During _{t 1} -t ₂ , only S ₄ is in the on state; the drain-source voltage v _dsS1 of S ₁ gradually increases (not shown), and the drain-source voltage v _dsS2 of S ₂ gradually decreases; in addition, on the secondary side of the converter 200, S ₅ is still on, S ₆ is off, and the rectified current i _S5 decreases.

Mode 3 (t ₂ -t ₃ ): At t ₂ , the junction capacitance of S ₂ is discharged, the body diode of S ₂ is turned on, and the drain-source voltage v _dsS2 of S ₂ is clamped to 0 volts, so that the conduction of S ₂ realizes ZVS. At this time, the junction capacitance of S ₁ has also been charged. During _{t 2} -t ₃ , the resonant current i _r continues to decrease; on the secondary side of the converter 200, S ₅ continues to be turned on, S ₆ continues to be turned off, and the rectified current i _S5 continues to decrease.

Mode 4 (t ₃ -t ₄ ): At time t ₃ , S ₄ is turned off, and the resonant current i _r begins to discharge the junction capacitance of S ₃ and charge the junction capacitance of S _4. Due to the effect of the junction capacitance of S ₃ and S ₄ , the turn-off of S ₄ realizes ZVS. During _{t 3} -t ₄ , only S ₂ is in the on state; the resonant current i _r drops sharply; the drain-source voltage v _dsS3 of S ₃ gradually decreases, and the drain-source voltage v _dsS4 of S ₄ gradually increases (not shown); in addition, the rectifier tube S ₆ on the secondary side also starts to turn on, so the secondary-side rectifier tubes S ₅ and S ₆ are turned on at the same time, the voltage across the transformer T _x is clamped to 0 volts, the rectifier current i _S5 drops sharply, and i _S6 rises sharply.

Mode 5 (t ₄ -t ₅ ): At time t ₄ , the rectified current i _S5 decreases to 0A, and all the rectified current flows through S _6. In this case, the current satisfies i _S6 (t ₄ ) = i _S5 (t ₃ ), i _r (t ₃ ) - i _Lm (t ₃ ) = i _Lm (t ₄ ) - i _r (t ₄ ). During t ₄ -t ₅ , the resonant current i _r continues to discharge the junction capacitance of S ₃ and charge the junction capacitance of S _4. When the junction capacitance of S ₃ is completely discharged, the body diode of S ₃ is turned on and the drain-source voltage v _dsS2 of S ₃ is clamped to 0 volts, so that the conduction of S ₃ realizes ZVS.

Now referring to FIG. 4, FIG. 4 shows a control loop block diagram of the example full-bridge converter 200 of FIG. The control loop of the full-bridge converter 200 may include a control unit 410, a proportional integral (PI) controller 420, and a drive unit 430. In an embodiment, the control unit 410 may be configured to generate a reference voltage according to the ZVS optimization strategy of the present disclosure. In an embodiment, the PI controller 420 may be configured to control the bus output voltage. In an embodiment, the drive unit 430 may be configured to generate a drive signal and drive the converter 200 with the drive signal.

The control unit 410, the PI controller 420 and the drive unit 430 may include hardware, software and/or firmware implementations. In some embodiments, the control unit 410, the PI controller 420 and the drive unit 430 may include, for example, a central control chip. In some embodiments, the control unit 410, the PI controller 420 and the drive unit 430 may include program codes that implement corresponding operations when these program codes are executed. In some embodiments, the control unit 410, the PI controller 420 and the drive unit 430 may be implemented inside the full-bridge converter 200. In some embodiments, the control unit 410, the PI controller 420 and the drive unit 430 may be implemented outside the full-bridge converter 200. In some embodiments, the control unit 410, the PI controller 420 and the drive unit 430 may be partially implemented inside the full-bridge converter 200 and partially implemented outside the converter 200.

In one example, the control unit 410 may determine the excitation current i Lm (t _{3 ) at the turn-off time t 3 of} the lagging switch S ₄ among the switches S ₁ -S ₄ based on the input voltage V _bat , the output voltage V _dc and the phase-shift duty cycle _{D p} of the converter 200 .

In one example, the control unit 410 may calculate the resonant current i _r (t ₃ ) at the turn-off time t ₃ of the lagging switch tube S ₄ among the switch tubes S ₁ -S ₄ , for example, based on at least the excitation current i _Lm (t ₃ ) at the turn-off time t ₃ of S ₄ to calculate the resonant current i _r (t ₃ ) at this time. The control unit 410 may also determine the critical resonant current i _{ZVS_con} for implementing the ZVS of the converter 200 based on, for example, a capacitor voltage integral formula. In this example, the control unit 410 may further compare the calculated resonant current i _r (t ₃ ) with the determined critical resonant current i _{ZVS_con} . If i _r (t ₃ ) ≥ i _{ZVS_con} , it means that S ₄ of the converter 200 can implement the ZVS operation. If i _r ( t ₃ ) < i _{ZVS _ con} , it means that S ₄ has not reached the condition for achieving ZVS. At this time, the control unit 410 can generate a first reference voltage V _{dc _ ref1} , which can be the sum of the output voltage V _dc and a predetermined adjustment step ΔV _{dc_mod} . In one or more examples of the present disclosure, the predetermined adjustment step ΔV _{dc_mod} can be, for example, 1‰-1% of the output voltage V _dc .

When i _r (t ₃ ) ≥ i _{ZVS_con} , in some examples, the control unit 410 may further compare the calculated resonant current i _r (t ₃ ) with the sum of the critical resonant current i _{ZVS_con} and the hysteresis H. The hysteresis H may be set according to actual needs, for example, may be set to 1. In these examples, if i _r (t ₃ )>i _{ZVS_con} +H, the control unit 410 may generate a second reference voltage V _{dc_ref2} , and the second reference voltage V _{dc_ref2} may be the difference between the output voltage V _dc and a certain proportion of a predetermined adjustment step ΔV _{dc_mod} . In some examples, the certain proportion may be, for example, 1/3, 1/4, 1/5, 1/6, or 1/10 of the predetermined adjustment step ΔV _{dc_mod} . The predetermined adjustment step ΔV _{dc_mod} may be, for example, 1‰-1% of the output voltage V _dc . The setting of the hysteresis H may prevent excessive conduction loss. In addition, the setting of the hysteresis loop H can also avoid the continuous jump and jitter of parameters that may be caused by stopping the operation directly when i _r (t ₃ )=i _{ZVS_con} .

In one example, the PI controller 420 may receive a first reference voltage V _{dc_ref1} from the control unit 410, and adjust the output voltage V _dc of the converter 200 to the first reference voltage V _{dc_ref1} , thereby forming a first adjusted output voltage. In another example, the PI controller 420 may receive a second reference voltage V _{dc_ref2} from the control unit 410, and adjust the output voltage V _dc of the converter 200 to the second reference voltage V _{dc_ref2} , thereby forming a second adjusted output voltage.

In one example, the driving unit 430 may receive a first regulated output voltage from the PI controller 420, generate a first driving signal associated with the switch tubes S ₁ -S ₄ based on the first regulated output voltage, and apply the first driving signal to the converter 200, thereby obtaining a new output voltage V _dc regulated in real time according to the actual operating conditions. In another example, the driving unit 430 may receive a second regulated output voltage from the PI controller 420, generate a second driving signal associated with the switch tubes S ₁ -S ₄ based on the second regulated output voltage, and apply the second driving signal to the converter 200, thereby obtaining a new output voltage V _dc regulated in real time according to the actual operating conditions.

In practice, the phase-shift duty cycle _Dp can be used to adjust the output voltage _Vdc of the converter 200, thereby adjusting the voltage magnitude and duration across the excitation inductance _Lm of the transformer _Tx . According to the inductance integral formula, the magnitude of the excitation current _iLm can be adjusted to further compensate for the resonant current _iR , thereby expanding the ZVS range of the converter, and even achieving full-range ZVS, thereby reducing the converter switching loss and improving the converter operating efficiency.

In the embodiment of the present disclosure, based on the new output voltage V _dc , the control unit 410 may start a new round of optimization control.

The ZVS implementation of the hysteresis switch tube _S4 is described above, and the ZVS implementation of the hysteresis switch tube _S3 is similar thereto.

Half-bridge converter

3, a schematic topology diagram of an exemplary half-bridge converter 300 according to an embodiment of the present disclosure is shown. The half-bridge converter 300 may include a bridge circuit 310 on its primary side, a rectifier circuit 330 on its secondary side, and a transformer 320 connected between the bridge circuit 310 and the rectifier circuit 330.

The bridge circuit 310 may include an input DC source V _bat , an input capacitor C _in , switches S ₁ and S ₂ , and DC blocking capacitors C _h1 and C _h2 . The switch S ₁ may be a leading switch, and S ₂ may be a corresponding lagging switch. In an embodiment, the switches S ₁ and S ₂ may be field effect transistors (such as MOSFETs), IGBTs, BJTs, or thyristor switches.

The transformer 320 may include a transformer body T _x , a transformer leakage inductance L _{lk — T} used as a resonant inductor of the bridge circuit 310 , and a magnetizing inductance L _m used as an auxiliary inductor.

The rectifier circuit 330 may include rectifiers _S5 and _S6 , a filter inductor _Lf , a bus capacitor _Cdc , and a DC output _Vdc . In an embodiment, the rectifiers _S5 and _S6 may be field effect transistors (such as MOSFETs), silicon diodes, fast recovery diodes, or Schottky diodes.

In conjunction with the converter operation waveform 600 shown in FIG6 , an example of a specific operation process of the half-bridge converter 300 is described below. The waveform of the half-bridge converter 300 can be obtained by setting D _p = 0 on the basis of the full-bridge solution, and the principles of other parts are consistent with those of the full-bridge converter 200. As shown in the figure, waveform 610 can represent the waveform of the drive signal of the switch tubes S ₁ and S ₂ , waveform 620 can represent the waveform of the excitation current i _Lm , waveform 622 can represent the waveform of the corresponding resonant current i _r , waveform 630 can represent the waveform of the drain-source voltage v _ds of the switch tubes S ₁ and S ₂ , and waveform 640 can represent the waveform of the rectified current i _SD . The present disclosure takes a half cycle (t ₀ -t ₃ ) of the half-bridge converter 300 as an example for description; the analysis of the other half cycle is the same as that of the half cycle (t ₀ -t ₃ ), and will not be repeated here.

Mode 1 (t ₀ -t ₁ ): At time t ₀ , S ₁ is turned on. During t ₀ -t ₁ , the excitation current i _Lm and the resonant current i _r both increase linearly; the rectifier tube S ₅ on the secondary side of the transformer is turned on, the rectifier tube S ₆ is turned off, and the rectifier current i _SD is equal to i _S5 . In an embodiment, the rectifier current can be equal to the difference between i _r and i _Lm converted to the secondary side, for example, i _S5 =n(i _r -i _Lm ), where n is the turns ratio of the primary coil to the secondary coil of the transformer, also known as the transformation ratio.

Mode 2 (t ₁ -t ₂ ): At t ₁ , S ₁ is turned off, and the resonant current i _r starts to charge the junction capacitance of S ₁ and discharge the junction capacitance of S _2. Due to the effect of the junction capacitance of S ₁ and S ₂ , the turn-off of S ₁ achieves ZVS. During _{t 1} -t ₂ , the drain-source voltage v _dsS1 of S ₁ gradually increases, and the drain-source voltage v _dsS2 of S ₂ gradually decreases.

Mode 3 (t ₂ -t ₃ ): At t ₂ , the junction capacitance of S ₂ is discharged, the body diode of S ₂ is turned on, and the drain-source voltage v _dsS2 of S ₂ is clamped to 0 volts, so that the conduction of S ₂ realizes ZVS. For the secondary side of the transformer, the current on S ₅ is commutated to S ₆ , and S ₆ starts to conduct.

In an embodiment, in order to optimize ZVS, the half-bridge converter may apply complementary 50% duty cycle signals to the primary-side switches _S1 and _S2 , respectively.

Determination of excitation inductance

According to different designs of hardware circuits, the items involved in the calculation process of the excitation inductance L _m may be slightly different, but the basic principle is the same. The following takes the full-bridge converter 200 shown in FIG2 and the half-bridge converter 300 shown in FIG3 as examples to describe the process of determining the excitation inductance L _m .

One purpose of the design of the excitation inductor L _m disclosed in the present invention is to promote the realization of wide range or even full range ZVS. For a bridge converter, the key to achieving ZVS is to complete the charging of the junction capacitance of the off switch tube and the discharge of the junction capacitance of the switch tube to be turned on within the dead time, that is, to charge the junction capacitance of the off switch tube to the input voltage of the converter within the dead time, and to discharge the junction capacitance of the switch tube to be turned on to 0 volts. Whether this process can be completed depends on the magnitude and direction of the resonant current i _r at the time when the switch tube is turned off.

In the embodiment of the full-bridge converter, since the resonant current of the leading switch is larger than that of the lagging switch at the turn-off time, it can release more junction capacitance charge, so it is easier to achieve ZVS for the leading switch, while it is more difficult to achieve ZVS for the lagging switch. Therefore, for the full-bridge converter, the key is to achieve ZVS for the lagging switch.

In the embodiment of the full-bridge converter 200 shown in FIG2 , the changes of the resonant current i _r and the switch drain-source voltages v _dsS3 and v _dsS4 in the dead time between the lagging switch S ₄ being turned off and the lagging switch S ₃ being turned on can be represented by FIG7 . If the resonant current i _r can charge the junction capacitance of the turned-off switch S ₄ and discharge the junction capacitance of the switch S ₃ to be turned on in the dead time, that is, the junction capacitance of the turned-off switch S ₄ can be charged to the input voltage V _bat and the junction capacitance of the switch S ₃ to be turned on can be discharged to 0 volts in the dead time, then the ZVS described in the present disclosure is achieved. Considering that the same type of switch is generally used for S ₁ -S ₄ , its junction capacitance can be represented as C _eq . According to the capacitor voltage integral formula, to achieve ZVS, the formula is satisfied: According to this formula, in order to determine whether ZVS can be achieved, it is also necessary to combine the change of the resonant current i _r in the dead time t _{dead zone} . Combined with the above modal analysis, during the period t ₃ -t ₄ , the voltage across the transformer T _x is clamped to 0 volts. According to the inductor current integral formula Since the time from t ₄ to t ₅ is very short, the current during t ₄ to _{t 5} can be considered constant, so i _r (t) = i _r (t ₄ ). When the resonant current i _r is large enough, i _r can make the drain-source voltage of the switch tube drop to 0 volts during the dead time. Combining the change of the resonant current i _r during the dead time and the ZVS realization conditions, the above formula It can be obtained that when ZVS is realized, the resonant current i _r at the turn-off time (such as t ₃ ) of the hysteresis switch (such as S ₄ ) can be expressed as being greater than or equal to the critical resonant current i _{ZVS — con} , as expressed in equation (1.1) which is the final result of the following derivation process:

Among them, the critical resonant current Wherein, Δt=t ₄ -t ₃ , t ₃ is the turn-off time of S ₄ , t ₄ is the time when rectifier tubes S ₅ and S ₆ complete the commutation; t _{dead zone} is the dead zone time; C _eq is the equivalent junction capacitance of the switch tube; V _bat is the input voltage of the converter; and L _{lk_T} is determined by the hardware circuit.

Further, based on Kirchhoff's current law, the resonant current i _r (t ₃ ) can be determined based on the excitation current i _Lm (t ₃ ) and the rectifier current i _S5 (t ₃ ), for example:

Combining the various modal analyses of the full-bridge converter 200 shown in FIG. 2 and based on Kirchhoff's voltage law and inductance integral theorem, we can obtain Where V _Lm is the voltage across the excitation inductor L _m in each mode. It can be seen that at t ₀ -t ₂ , Satisfied when t ₂ -t ₅ At the same time, combined with Kirchhoff's current law, we can get n(i _r -i _Lm ) = i _S5 . In steady state, the current value of the DC-DC converter in half a switching cycle is opposite, that is, i _Lm (t ₅ ) = -i _Lm (t ₀ ). Combining the above equations, we can get the following set of equations:

Taking the turn-off moment of the lagging switch tube _S4 as an example (other switch tubes are similar), that is, at the moment _t3 , the excitation current _iLm can be expressed by the following formula (1.2):

Among them, T is the switching period of the converter; n is the turns ratio of the primary coil and the secondary coil of the transformer, also known as the "transformation ratio"; V _bat is the input voltage of the converter; D _p is the phase shift duty cycle, that is, the ratio of the time difference between the conduction signal of the lagging switch tube and the leading switch tube and the switching period; and L _{lk_T} and L _f are determined by the hardware circuit; the bus output voltage V _dc is determined by the input of the DC-DC converter. And, from formula (1.2), it can be seen that the excitation current i _Lm (t ₃ ) is associated with the excitation inductance L _m .

For the rectified current i _S5 (t ₃ ), it is only necessary to subtract half of the ripple current from the output average current. The ripple current can be derived based on the principle of inductor current integration. Therefore, the rectified current i _S5 (t ₃ ) can be expressed by the following formula (1.3):

Where T is the switching period of the converter; n is the turns ratio of the transformer; P _o is the output power of the converter; D _p is the phase shift duty cycle; V _dc is the output voltage of the converter; and L _{lk_T} and L _f are determined by the hardware circuit. In addition, from formula (1.3), it can be seen that the rectifier current i _S5 (t ₃ ) is related to the excitation inductance L _m .

Substituting equation (1.2) and equation (1.3) into The following formula (1.4) can be obtained to represent the resonant current i _r (t ₃ ), and accordingly, i _r (t ₃ ) is related to the excitation inductance L _m :

Further, combined with the above description, it can be seen that under the same conditions, the smaller L _{m is} , the larger the excitation current i _{Lm is} , and thus the greater the compensation for i _r (t ₃ ), the easier it is to meet the ZVS implementation condition of i _r (t ₃ ) ≥ i _{ZVS_con} . However, the reduction of L _m will also bring about power circulation, thereby causing an increase in conduction loss. According to equations (1.1) and (1.4), under the same output power, the larger the V _dc is and the smaller the D _{p is} , the easier it is to meet the ZVS implementation condition; and the larger the output power P _{o is} , the more difficult it will be to achieve ZVS. Therefore, in order to make L _m just meet the soft switching implementation condition and not bring about excessive conduction loss, L _m can be configured so that the ZVS implementation condition can be met when the output voltage is the highest (V _dc = V _{dc_max} ) and the output power is the largest (P _o = P _{o_max} ), and D _p is set to 0. Combining equations (1.1) and (1.4), the magnetizing inductance _Lm of the full-bridge converter 200 can be designed by equation (1.5) which is the final result of the following derivation process:

Wherein, V _{dc_max} is the maximum value of the adjustable output voltage V _dc of the DC bus; and P _{o_max} is the maximum value of the output power P _o .

For a half-bridge converter, such as the half-bridge converter 300 shown in FIG. 3 , the principle of determining the magnetizing inductance L _m is substantially the same as that of the full-bridge converter 200, except that the half-bridge converter cannot control the phase shift, so the D _p mentioned in the above description can be set to 0, and the magnetizing inductance L m can be used. Alternative

Based on this, based on the description of equation (1.1) above, a similar equation (2.1) can be obtained to express the conditions that the half-bridge converter must meet to achieve ZVS:

Wherein, Δt=t ₂ -t ₁ , t ₁ is the turn-off time of S ₁ , t ₂ is the time when rectifier tubes S ₅ and S ₆ complete the commutation; t _{dead zone} is the dead zone time; C _eq is the equivalent junction capacitance of the switch tube; V _bat is the input voltage of the converter; and L _{lk_T} is determined by the hardware circuit.

Furthermore, the resonant current i _r (t ₁ ) of the half-bridge converter when the switch tube S ₁ is turned off can also be determined based on the excitation current i _Lm (t ₁ ) and the rectifier current i _S5 (t ₁ ), for example:

Combining the various modal analyses of the half-bridge converter 300 shown in FIG3 , it can be seen that at t ₀ -t ₃ , At the same time, combined with Kirchhoff's current law, we can get n(i _r -i _Lm ) = i _S5 . In steady state, the current value of the converter half switching cycle is opposite, that is, i _Lm (t ₃ ) = -i _Lm (t ₀ ). Combining the above equations, it can be deduced that the excitation current i _Lm at the S ₁ turn-off time t ₁ can be expressed by the following formula (2.2):

Where T is the switching period of the converter; n is the turns ratio of the primary coil to the secondary coil of the transformer, also known as the "transformation ratio"; V _bat is the input voltage of the converter; and L _{lk_T} and L _f are determined by the hardware circuit; the bus output voltage V _dc is determined by the input of the DC-DC converter. In addition, from formula (2.2), it can be seen that the excitation current i _Lm (t ₁ ) is related to the excitation inductance L _m .

Similarly, the rectified current i _S5 (t ₁ ) of the half-bridge converter 300 can be expressed by the following equation (2.3):

Wherein, T is the switching period of the converter; n is the turns ratio of the transformer; P _o is the output power of the converter; V _dc is the output voltage of the converter; and L _{lk T} and L _f are determined by the hardware circuit.

Substituting equation (2.2) and equation (2.3) into The following equation (2.4) can be obtained to represent the resonant current i _r (t ₁ ) of the half-bridge converter 300 . Accordingly, i _r (t ₁ ) is associated with the magnetizing inductance L _m :

Further, based on the derivation process similar to that of equation (1.5), the magnetizing inductance _Lm of the half-bridge converter 300 can be designed by the following equation (2.5):

Wherein, V _{dc_max} is the maximum value of the adjustable output voltage V _dc of the DC bus; and P _{o_max} is the maximum value of the output power P _o .

Combined with the above determination process of the excitation inductance L _m , it can be more easily understood that for a bridge circuit, by reducing the excitation inductance L _m , the excitation current i _Lm will increase. According to Kirchhoff's current law, the excitation current i _Lm will compensate for the resonant current i _r , and the increase in the resonant current i _r can improve the discharge capacity of the switching tube capacitor junction during the dead time, thereby expanding the ZVS range of the converter and promoting the realization of full-range ZVS.

Zero voltage switching control method for DC-DC converter

The zero voltage switching (ZVS) control method disclosed in the present invention can be widely used in scenarios such as DC microgrids and DC multi-port power supplies to adjust the DC bus voltage of a phase-shifted full-bridge converter.

For the phase-shifted full-bridge converter, as mentioned above, since the resonant current of the leading switch is larger than that of the lagging switch at the turn-off time, it can release more junction capacitance charge, so it is easier for the leading switch to achieve ZVS, while it is more difficult to achieve ZVS for the lagging switch. Therefore, the key to the ZVS control method disclosed in the present invention is to optimize the control of the ZVS of the lagging switch.

The ZVS control method disclosed in the present invention can adjust the output voltage of the phase-shifted full-bridge converter in real time according to the actual operating conditions to expand the ZVS range of the converter, ultimately achieve full-range ZVS, and reduce the switching loss of the converter, thereby improving the operating efficiency of the converter. The ZVS control method disclosed in the present invention only needs to adjust the output voltage of the phase-shifted full-bridge, adopts the most basic phase-shift modulation method, does not require complex switch timing control, reduces the complexity of control, and improves the reliability of the system. The ZVS control method disclosed in the present invention does not require additional sensors to measure the current in the resonant cavity, thereby reducing costs, and since there is no need to use instantaneous quantities such as the current in the resonant cavity, the requirements for measurement accuracy are reduced, making the ZVS control method disclosed in the present invention easier to implement. Therefore, the ZVS control method disclosed in the present invention is relatively simple and efficient.

The operation process of the ZVS control method of the present disclosure is described below with reference to FIG. 8 and FIG. 9 .

Fig. 8 shows a schematic flow chart of a ZVS control method 800 for a full-bridge converter according to an embodiment of the present disclosure. The control method 800 may include steps 820-850.

In step 820, the primary side resonant current i _r at the time of turning off one of the one or more lagging switches among the multiple switches on the primary side of the phase-shifted full-bridge converter can be calculated. The one lagging switch can be, for example, the switch S ₄ of the full-bridge converter 200 shown in FIG2 . As shown in FIG5 , S ₄ is turned off at time t ₃ .

In step 830 , a critical resonant current i _{ZVS — con} for implementing ZVS of the phase-shifted full-bridge converter may be determined based on a capacitor voltage integral formula.

Then, in step 840, the calculated primary-side resonant current i _r may be compared with the determined critical resonant current i _{ZVS_con} . If the calculated primary-side resonant current i _r is less than the critical resonant current i _{ZVS_con} , the output voltage V _dc of the phase-shifted full-bridge converter may be increased by a predetermined adjustment step ΔV _{dc_mod} in step 850 as a first adjusted output voltage; and steps 820-850 may be subsequently repeated based on the first adjusted output voltage until the calculated primary-side resonant current i _r is greater than or equal to the critical resonant current i _{ZVS_con} .

In one or more embodiments, step 850 may be performed by a series of operations of a control loop of the converter. First, in response to the calculated primary-side resonant current i _r being less than the critical resonant current i _{ZVS_con} , a first reference voltage V _{dc_ref1} may be generated by a control unit of the converter (e.g., the control unit 410 shown in FIG. 4 ). The first reference voltage V _{dc_ref1} may be equal to the sum of the converter output voltage V _dc and a predetermined adjustment step ΔV _{dc_mod} . Next, the converter output voltage V _dc may be adjusted to the first reference voltage V _{dc_ref1} by a PI controller of the converter (e.g., the PI controller 420 shown in FIG. 4 ) to form a first adjusted output voltage. Then, based on the first adjusted output voltage, a first drive signal may be generated by a drive unit of the converter (e.g., the drive unit 430 shown in FIG. 4 ). The first drive signal may be applied to the converter, thereby executing a new round of control loop.

In practice, this regulation of the output voltage V _dc can be achieved by shifting the duty cycle D _p to adjust the voltage and duration across the excitation inductance L _m of the transformer T _x . According to the inductance integral formula, this can in turn adjust the magnitude of the excitation current i _Lm to further compensate for the resonant current i _r , thereby expanding the ZVS range of the converter and even achieving full-range ZVS, thereby reducing the converter switching loss and improving the converter operating efficiency.

In an embodiment of the present disclosure, when the control method 800 is initially executed, the initial value of the first reference voltage V _{dc_ref1} is equal to the converter output voltage V _dc . In one or more embodiments, the predetermined adjustment step ΔV _{dc_mod} may be equal to, for example, 1‰-1% of the converter output voltage V _dc .

In some embodiments of the present disclosure, if the control method 800 determines in the comparison process of step 840 that the calculated primary-side resonant current i _r is greater than or equal to the critical resonant current i _{ZVS — con} , the ZVS implementation process of the control method 800 may be terminated.

In other embodiments of the present disclosure, when it is determined in the comparison process of step 840 that the calculated primary side resonant current i _r is greater than or equal to the critical resonant current i _{ZVS_con} , the ZVS implementation process may not be terminated immediately, but the hysteresis loop may be used for optimization, as shown in FIG9 . FIG9 shows a schematic flow chart of a ZVS control method 900 for a full-bridge converter. Compared with the ZVS control method 800 shown in FIG8 , steps 920-950 of the ZVS control method 900 shown in FIG9 are the same as steps 820-850 of the control method 800 , except that the control method 900 preferably further compares the calculated primary side resonant current i _r with the sum of the critical resonant current i _{ZVS_con} and the hysteresis loop H after determining that the calculated primary side resonant current i _r is greater than or equal to the critical resonant current i _{ZVS_con} (step 960). The hysteresis loop H may be set according to actual needs, for example, it may be set to 1. The setting of the hysteresis loop H may prevent excessive conduction loss, and may also avoid the continuous jump and jitter of parameters caused by immediately stopping the control cycle when the calculated primary side resonant current is equal to the critical resonant current.

In the embodiment shown in FIG9 , if it is determined in the comparison process of step 960 that the calculated primary-side resonant current i _r is greater than the sum of the critical resonant current i _{ZVS_con} and the hysteresis band H, the converter output voltage V _dc may be reduced by a certain proportion of a predetermined adjustment step ΔV _{dc_mod} as a second adjusted output voltage in step 970; and the control loop shown in FIG9 may then be repeated based on the second adjusted output voltage until the calculated primary-side resonant current i _r is greater than or equal to the critical resonant current i _{ZVS_con} and less than or equal to the sum of the critical resonant current i _{ZVS_con} and the hysteresis band H.

In one or more embodiments, step 970 may also be performed by a series of operations of the control loop of the converter. First, in response to the calculated primary resonant current i _r being greater than the sum of the critical resonant current i _{ZVS_con} and the hysteresis loop H, a second reference voltage V _{dc_ref2} may be generated by a control unit of the converter (e.g., the control unit 410 shown in FIG. 4 ). The second reference voltage V _{dc_ref2} may be equal to the difference between the converter output voltage V _dc and the predetermined adjustment step ΔV _{dc_mod} of the certain proportion. Next, the converter output voltage V _dc may be adjusted to the second reference voltage V _{dc_ref2} by a PI controller of the converter (e.g., the PI controller 420 shown in FIG. 4 ) to form a second adjusted output voltage. Then, based on the second adjusted output voltage, a second drive signal may be generated by a drive unit of the converter (e.g., the drive unit 430 shown in FIG. 4 ). The second drive signal may be applied to the converter, thereby executing a new round of control loop.

Similar to step 850, the adjustment of the output voltage V _dc in step 970 can also be achieved by shifting the duty cycle D _p .

In one or more embodiments, the predetermined adjustment step ΔV _{dc_mod} may be equal to, for example, 1‰-1% of the converter output voltage V _dc . In one or more embodiments, the certain proportion may be equal to, for example, 1/3, 1/4, 1/5, 1/6 or 1/10 of the predetermined adjustment step ΔV _{dc_mod} .

Although the ZVS control method of the present invention is described in the above order, the execution of the ZVS control method of the present invention should not be limited to the above order. On the contrary, some steps of the ZVS control method of the present invention (such as 820 and 830, or 920 and 930) can be executed in an order different from the above order or executed simultaneously. In some alternative embodiments, some steps may not be executed. In addition, any step of the ZVS control method of the present invention can be executed by a module, a unit, a circuit or any other suitable technical means for executing these steps.

The following describes the calculation examples in the specific execution process of the ZVS control method of the present disclosure, taking the full-bridge converter 200 shown in Figures 2, 5 and 7 as an example. It should be noted that, according to different designs of hardware circuits, the items involved in the calculation of various quantities when implementing the control method may be slightly different, but the basic principles are the same.

The primary side bridge circuit 210 of the full-bridge converter 200 has switches _S1 - _S4 . Among the switches, _S1 and _S2 are leading switches, and _S3 and _S4 are corresponding lagging switches. The present disclosure takes _S4 as an example for description, but it should be noted that the ZVS control method of the present disclosure is also applicable to _S3 .

As mentioned above, at time _t3 , the lagging switch _S4 is turned off and the dead time _tdeadtime begins. According to the circuit structure of the converter 200 shown in FIG2 , the resonant current i _r ( _t3 ) on the primary side can be calculated based on Kirchhoff's current law by to calculate.

Further, from the previous description of the present disclosure, it can be known that the excitation current i _Lm (t ₃ ) at time t ₃ can be determined by the following formula (3.1) based on the input voltage, output voltage and phase shift duty cycle of the converter (different from the design of the excitation inductance L _m , in this case L _m is predetermined):

Among them, T is the switching period of the converter; n is the turns ratio of the transformer, also known as the "transformation ratio"; V _bat is the input voltage of the converter; D _p is the phase shift duty cycle, that is, the ratio of the turn-on signal time difference between the lagging switch tube and the leading switch tube and the switching period; and L _m , L _{lk_T} and L _f are determined by the hardware circuit; the bus output voltage V _dc is determined by the input of the converter.

It can be seen from formula (3.1) that by changing the output voltage V _dc of the front-stage phase-shifted full-bridge, the excitation current i _Lm at the time when the switch tube is turned off can be controlled.

In addition, the rectified current i _S5 (t ₃ ) at time t ₃ can be determined by the following formula (3.2):

Wherein, T is the switching period of the converter; n is the turns ratio of the transformer; P _o is the output power of the converter; D _p is the phase shift duty cycle; V _dc is the output voltage of the converter; and L _m , L _{lk_T} and L _f are determined by the hardware circuit.

Substituting equation (3.1) and equation (3.2) into The following formula (3.3) can be obtained to determine the resonant current i _r (t ₃ ):

It can be seen from formula (3.3) that the excitation current i _Lm can compensate the resonant current i _r , and by adjusting the phase-shifted full-bridge output voltage V _dc , the resonant current i _r at the time when the lagging switch tube is turned off can be adjusted.

Further, as described above when discussing the determination of the excitation inductance, the condition for the phase-shifted full-bridge converter to achieve ZVS can be determined based on the capacitor voltage integral formula, thereby comparing the resonant current i _r (t ₃ ) and the critical resonant current i _{ZVS_con} for achieving ZVS of the phase-shifted full-bridge converter, as shown in the following formula (3.4):

Among them, the critical resonant current Wherein, Δt=t ₄ -t ₃ , t ₃ is the turn-off time of S ₄ , t ₄ is the time when rectifier tubes S ₅ and S ₆ complete the commutation; t _{dead zone} is the dead zone time; C _eq is the equivalent junction capacitance of the switch tube; V _bat is the input voltage of the converter; and L _{lk_T} is determined by the hardware circuit.

Substituting equation (3.3) into equation (3.4), we can obtain the following equation (3.5):

Combined with formula (3.5), it can be seen that when the power is constant, for the full-bridge converter, when full-switch ZVS cannot be achieved, the resonant current i _r (t ₃ ) can be increased by increasing the output voltage V _dc so that the resonant current i _r (t ₃ ) satisfies formula (3.5), thereby achieving full-switch ZVS of the converter, thereby reducing the converter switching loss and improving the converter operating efficiency.

According to an embodiment of the present disclosure, a computer-readable medium may be further provided, on which instructions are stored, and when the instructions are executed by a processor, the steps of the zero voltage turn-on control method for a DC-DC converter of the present disclosure are implemented. The computer-readable medium may include, but is not limited to, a non-transient tangible arrangement of an item manufactured or formed by a machine or device, including a storage medium, such as: a hard disk; any other type of disk, including a floppy disk, an optical disk, a read-only compact disk memory (CD-ROM), a read-write compact disk memory (CD-RW), and a magneto-optical disk; a semiconductor device, such as a read-only memory (ROM), a random access memory (RAM) such as a dynamic random access memory (DRAM) and a static random access memory (SRAM), an erasable programmable read-only memory (EPROM), a flash memory, an electrically erasable programmable read-only memory (EEPROM); a phase change memory (PCM); a magnetic card or an optical card; or any other type of medium suitable for storing electronic instructions. The computer-readable medium may be installed in an imaging device, or in a separate control device or computer that remotely controls the imaging device.

According to an embodiment of the present disclosure, a computer program product may be further provided. The computer program product includes instructions. When the instructions are executed by a processor, the steps of the zero voltage turn-on control method for a DC-DC converter of the present disclosure are implemented.

The following provides a number of exemplary embodiments of the present disclosure. Various details in the examples can be used in one or more embodiments of the present disclosure, and can be appropriately combined with each other to form a unique embodiment.

Example 1 is a DC-DC converter. The DC-DC converter may include: a bridge circuit, the bridge circuit is located on the primary side of the DC-DC converter, the bridge circuit may include a plurality of switch tubes; a rectifier circuit, the rectifier circuit is located on the secondary side of the DC-DC converter; and a transformer, the transformer is connected between the bridge circuit and the rectifier circuit, the transformer leakage inductance of the transformer is used to act as the resonant inductance of the bridge circuit, and the transformer may have an air gap, the air gap is configured to reduce the excitation inductance of the transformer to increase the excitation current, the excitation current is used to compensate for the resonant current of the bridge circuit, wherein the excitation inductance of the transformer can be reduced to such that when the DC-DC converter is at the highest output voltage and the maximum output power, the junction capacitance of the switch tube of the multiple switch tubes of the bridge circuit that is turned off at the beginning of the dead time is charged to the input voltage of the DC-DC converter during the dead time, and the junction capacitance of the switch tube of the multiple switch tubes that is turned on at the end of the dead time is discharged to 0 volts during the dead time.

Example 2 includes the DC-DC converter according to Example 1, wherein the bridge circuit can be a full-bridge circuit or a half-bridge circuit.

Example 3 includes a DC-DC converter according to Example 1 or 2, wherein the excitation inductance of the transformer can be determined by comparing the resonant current of the bridge circuit at the beginning of the dead time with the critical resonant current for achieving zero voltage turn-on of the DC-DC converter, wherein the DC-DC converter is at a maximum output voltage and a maximum output power, and wherein the resonant current is greater than or equal to the critical resonant current.

Example 4 includes the DC-DC converter according to Example 3, wherein the resonant current can be determined based on the excitation current and the rectifier current of the rectifier circuit.

Example 5 includes the DC-DC converter of Example 4, wherein each of the magnetizing current and the rectifier current is associated with the magnetizing inductance.

Example 6 includes the DC-DC converter of Example 3, wherein the critical resonant current can be determined based on a capacitor-voltage integral formula.

Example 7 includes a DC-DC converter according to Example 1, wherein the DC-DC converter can be a phase-shifted full-bridge converter, and the multiple switching tubes of the bridge circuit can include one or more leading switching tubes and corresponding one or more lagging switching tubes, and the DC-DC converter can further include a control unit, which can be configured to: determine the excitation current at the turn-off moment of one of the one or more lagging switching tubes based on the input voltage, output voltage and phase-shift duty cycle of the DC-DC converter; calculate the resonant current at the turn-off moment of the one lagging switching tube based on at least the determined excitation current; determine the critical resonant current for achieving zero voltage turn-on of the DC-DC converter based on a capacitor voltage integral formula; compare the calculated resonant current with the determined critical resonant current; and when the calculated resonant current is less than the critical resonant current, generate a first reference voltage, the first reference voltage being equal to the sum of the output voltage and a predetermined adjustment step.

Example 8 includes a DC-DC converter according to Example 7, wherein the DC-DC converter may further include a PI controller, which may be configured to: receive the first reference voltage from the control unit; and adjust the output voltage of the DC-DC converter to the first reference voltage to form a first adjusted output voltage.

Example 9 includes a DC-DC converter according to Example 8, wherein the DC-DC converter may further include a drive unit, which may be configured to: receive the first regulated output voltage from the PI controller; generate a first drive signal based on the first regulated output voltage; and apply the first drive signal to the DC-DC converter.

Example 10 includes a DC-DC converter according to any one of Examples 7-9, wherein the control unit can also be configured to: compare the calculated resonant current with the sum of the critical resonant current and the hysteresis band when the calculated resonant current is greater than or equal to the critical resonant current; and generate a second reference voltage in response to the calculated resonant current being greater than the sum of the critical resonant current and the hysteresis band, wherein the second reference voltage is equal to the output voltage and a certain proportion of the predetermined adjustment step.

Example 11 includes a DC-DC converter according to Example 10, wherein the DC-DC converter may further include a PI controller, which may be configured to: receive the second reference voltage from the control unit; and adjust the output voltage of the DC-DC converter to the second reference voltage to form a second adjusted output voltage.

Example 12 includes a DC-DC converter according to Example 11, wherein the DC-DC converter may further include a drive unit, which may be configured to: receive the second regulated output voltage from the PI controller; generate a second drive signal based on the second regulated output voltage; and apply the second drive signal to the DC-DC converter.

Example 13 includes the DC-DC converter according to any one of Examples 7-12, wherein the predetermined adjustment step may be 1‰-1% of the output voltage.

Example 14 includes the DC-DC converter of any one of Examples 10-12, wherein the certain proportion may be one-third, one-quarter, one-fifth, one-sixth, or one-tenth.

Example 15 includes the DC-DC converter of any of Examples 1-14, wherein the DC-DC converter may be included in an energy storage device or may be connected to an energy storage device.

Example 16 includes the DC-DC converter of any of Examples 1-15, wherein the DC-DC converter may not include a discrete inductor.

Example 17 is an energy storage device. The energy storage device may include the DC-DC converter according to any one of Examples 1-16 or may be connected to the DC-DC converter according to any one of Examples 1-16.

Example 18 is a zero voltage turn-on control method for a DC-DC converter. Wherein, the DC-DC converter can be a phase-shifted full-bridge converter. The control method may include the following steps: (a) calculating the primary side resonant current at the time when one of the lagging switch tubes among one or more lagging switch tubes of the multiple switch tubes on the primary side of the DC-DC converter is turned off; (b) determining the critical resonant current for achieving zero voltage turn-on of the DC-DC converter based on the capacitor voltage integral formula; (c) comparing the calculated primary side resonant current with the determined critical resonant current; (d) in response to the calculated primary side resonant current being less than the critical resonant current, increasing the output voltage of the DC-DC converter by a predetermined adjustment step as a first adjusted output voltage; and (e) repeating steps (a)-(d) based on the first adjusted output voltage until the calculated primary side resonant current is greater than or equal to the critical resonant current.

Example 19 includes a control method according to Example 18, wherein step (d) may further include: in response to the calculated primary side resonant current being less than the critical resonant current, generating a first reference voltage by the control unit of the DC-DC converter, the first reference voltage being equal to the sum of the output voltage and the predetermined adjustment step; adjusting the output voltage of the DC-DC converter to the first reference voltage by the PI controller of the DC-DC converter to form the first adjusted output voltage; and based on the first adjusted output voltage, generating a first drive signal by the drive unit of the DC-DC converter for application to the DC-DC converter.

Example 20 includes a control method according to Example 18 or 19, wherein the control method may further include: in response to the primary side resonant current calculated in step (c) being greater than or equal to the critical resonant current, the control method ends.

Example 21 includes a control method according to Example 18 or 19, wherein the control method may further include: in response to the calculated primary side resonant current in step (c) being greater than or equal to the critical resonant current, (f) comparing the calculated primary side resonant current with the sum of the critical resonant current and the hysteresis band; (g) when the calculated primary side resonant current is greater than the sum of the critical resonant current and the hysteresis band, reducing the output voltage by a certain proportion of the predetermined adjustment step as a second adjusted output voltage; and (h) repeating steps (a)-(c) and (f)-(g) based on the second adjusted output voltage until the calculated primary side resonant current is greater than or equal to the critical resonant current and less than or equal to the sum of the critical resonant current and the hysteresis band.

Example 22 includes a control method according to Example 21, wherein step (g) may further include: in response to the calculated primary-side resonant current being greater than the sum of the critical resonant current and the hysteresis loop, generating a second reference voltage by the control unit of the DC-DC converter, the second reference voltage being equal to the difference between the output voltage and the predetermined adjustment step of the certain proportion; adjusting the output voltage of the DC-DC converter to the second reference voltage by the PI controller of the DC-DC converter to form the second regulated output voltage; and based on the second regulated output voltage, generating a second drive signal by the drive unit of the DC-DC converter for application to the DC-DC converter.

Example 23 includes the control method according to any one of Examples 18-22, wherein the predetermined adjustment step may be 1‰-1% of the output voltage.

Example 24 includes the control method according to any one of Examples 21-23, wherein the certain proportion may be one-third, one-quarter, one-fifth, one-sixth, or one-tenth.

Example 25 includes a control method according to any one of Examples 18-24, wherein the transformer leakage inductance of the DC-DC converter can act as the primary-side resonant inductance of the DC-DC converter, and the excitation current generated by the excitation inductance of the DC-DC converter can be used to compensate for the primary-side resonant current of the DC-DC converter.

Example 26 includes the control method of Example 25, wherein the DC-DC converter does not include a discrete inductor.

Example 27 includes a control method according to Example 25 or 26, wherein step (a) may further include: determining the excitation current at the time when the one lagging switch tube is turned off based on the input voltage, output voltage and phase-shift duty cycle of the DC-DC converter; and calculating the primary side resonant current at the time when the one lagging switch tube is turned off based on at least the determined excitation current.

Example 28 is a DC-DC converter. The DC-DC converter may adopt the control method described in any one of Examples 18-27.

Example 29 is an energy storage device. The energy storage device may include the DC-DC converter according to Example 28 or may be connected to the DC-DC converter according to Example 28.

Example 30 is a computer-readable storage medium. The computer-readable storage medium may store instructions, and when the instructions are executed by a processor, the steps of the control method described in any one of Examples 18-27 may be implemented.

Example 31 is a computer program product. The computer program product may include instructions, and when the instructions are executed by a processor, the steps of the control method described in any one of Examples 18-27 can be implemented.

It should be noted that in order to simplify the description of this application and thus facilitate the understanding of one or more embodiments, in the foregoing description of the embodiments, multiple features are sometimes grouped into one embodiment, drawing, or description thereof. However, this description method does not mean that the subject matter of this application requires more features than those mentioned in the claims. In fact, the features of an embodiment may be less than all the features of a single embodiment disclosed above.

Although the present disclosure is described with reference to the above specific embodiments, it should be understood by those skilled in the art that the above embodiments are only illustrative and not restrictive. Those skilled in the art may make various equivalent changes, modifications or substitutions without departing from the spirit and scope of the present disclosure, and therefore these changes, modifications and substitutions all fall within the scope of protection of the claims of the present disclosure.

Claims (12)

1. A zero voltage switching control method for a DC-DC converter, characterized in that the DC-DC converter is a phase-shifted full-bridge converter, and the control method comprises the following steps: (a) calculating a primary-side resonant current at a time when one of the one or more lagging switching tubes among the plurality of switching tubes on the primary side of the DC-DC converter is turned off; (b) determining a critical resonant current for achieving zero voltage switching of the DC-DC converter based on a capacitor voltage integral formula; (c) comparing the calculated primary resonant current with the determined critical resonant current; (d) in response to the calculated primary-side resonant current being less than the critical resonant current, increasing the output voltage of the DC-DC converter by a predetermined adjustment step as a first adjusted output voltage; and (e) Repeating steps (a) to (d) based on the first regulated output voltage until the calculated primary-side resonant current is greater than or equal to the critical resonant current. 2. The control method according to claim 1, characterized in that step (d) further comprises: In response to the calculated primary-side resonant current being less than the critical resonant current, a control unit of the DC-DC converter generates a first reference voltage, wherein the first reference voltage is equal to a sum of the output voltage and the predetermined adjustment step size; regulating the output voltage of the DC-DC converter to the first reference voltage by a PI controller of the DC-DC converter to form the first regulated output voltage; and Based on the first regulated output voltage, a first driving signal is generated by a driving unit of the DC-DC converter for application to the DC-DC converter. 3. The control method according to claim 1 is characterized in that the control method further comprises: in response to the primary side resonant current calculated in step (c) being greater than or equal to the critical resonant current, the control method ends. 4. The control method according to claim 1, characterized in that the control method further comprises: in response to the primary side resonant current calculated in step (c) being greater than or equal to the critical resonant current, (f) comparing the calculated primary-side resonant current with the sum of the critical resonant current and the hysteresis loop; (g) when the calculated primary-side resonant current is greater than the sum of the critical resonant current and the hysteresis loop, reducing the output voltage by a certain proportion of the predetermined adjustment step size as a second adjusted output voltage; and (h) Repeating steps (a)-(c) and (f)-(g) based on the second regulated output voltage until the calculated primary-side resonant current is greater than or equal to the critical resonant current and less than or equal to the sum of the critical resonant current and the hysteresis loop. 5. The control method according to claim 4, characterized in that step (g) further comprises: In response to the calculated primary-side resonant current being greater than the sum of the critical resonant current and the hysteresis band, a control unit of the DC-DC converter generates a second reference voltage, wherein the second reference voltage is equal to a difference between the output voltage and the predetermined adjustment step of the certain proportion; regulating the output voltage of the DC-DC converter to the second reference voltage by a PI controller of the DC-DC converter to form the second regulated output voltage; and Based on the second regulated output voltage, a second driving signal is generated by a driving unit of the DC-DC converter for application to the DC-DC converter. 6 . The control method according to claim 1 , wherein the predetermined adjustment step is 1‰ to 1% of the output voltage. 7. The control method according to claim 4 or 5, characterized in that the certain proportion is one third, one quarter, one fifth, one sixth, or one tenth. 8. The control method according to any one of claims 1 to 5, characterized in that the transformer leakage inductance of the DC-DC converter serves as the primary-side resonant inductance of the DC-DC converter, and the excitation current generated by the excitation inductance of the DC-DC converter is used to compensate for the primary-side resonant current of the DC-DC converter. 9 . The control method according to claim 8 , wherein the DC-DC converter does not include a discrete inductor. 10. The control method according to claim 9, characterized in that step (a) further comprises: Determine the excitation current at the turn-off moment of the one lagging switch tube based on the input voltage, output voltage and phase shift duty ratio of the DC-DC converter; and The primary-side resonant current at the turn-off moment of the one lagging switch tube is calculated based on at least the determined excitation current. 11. A DC-DC converter, characterized by adopting the control method according to any one of claims 1 to 10. 12 . An energy storage device, comprising the DC-DC converter according to claim 11 or connected to the DC-DC converter according to claim 11 .