CN118572804A

CN118572804A - Charging control method and device, electronic equipment and storage medium

Info

Publication number: CN118572804A
Application number: CN202310184215.2A
Authority: CN
Inventors: 钱平; 彭旺林
Original assignee: Beijing Xiaomi Mobile Software Co Ltd
Current assignee: Beijing Xiaomi Mobile Software Co Ltd
Priority date: 2023-02-28
Filing date: 2023-02-28
Publication date: 2024-08-30

Abstract

The disclosure relates to a charging control method and device, an electronic device and a storage medium. The electronic device includes a first charging loop and a battery; the first charging loop comprises a power management chip, an inductance device and a mode switching switch; the inductance device is connected with the mode switching switch in parallel; the power management chip is used for switching off the mode switching switch when in a step-down charging mode so that the first charging loop charges the battery in the step-down charging mode; the power management chip is used for conducting the mode switching switch when in a charge pump charging mode, so that the first charging loop charges the battery in the charge pump charging mode. In this embodiment, the charging mode of the power management chip is adjusted by the mode switch, and the power management chip is equivalent to adding a charge pump circuit when operating in the charge pump charging mode, so that the number of charging loops can be reduced, and the charging efficiency can be improved.

Description

Charging control method and device, electronic equipment and storage medium

Technical Field

The disclosure relates to the field of charging technologies, and in particular, to a charging control method and device, an electronic device, and a storage medium.

Background

As electronic devices are increasingly used, their power consumption increases, and so does the user's interest in the charging rate of the electronic device.

Existing electronic devices are typically provided with a charging loop that includes a power management chip PMIC. However, the charging mode of the existing charging circuit is generally fixed, which is disadvantageous for improving the charging efficiency.

Disclosure of Invention

The present disclosure provides a charging control method and apparatus, an electronic device, and a storage medium, to solve the deficiencies of the related art.

According to a first aspect of embodiments of the present disclosure, there is provided an electronic device including a first charging loop and a battery; the first charging loop comprises a power management chip, an inductance device and a mode switching switch; the inductance device is connected with the mode switching switch in parallel;

The power management chip is used for switching off the mode switching switch when in a step-down charging mode so that the first charging loop charges the battery in the step-down charging mode;

The power management chip is used for conducting the mode switching switch when in a charge pump charging mode, so that the first charging loop charges the battery in the charge pump charging mode.

Optionally, the power management chip includes a power input pin, a power output pin, a first control pin, a second control pin, and a third control pin;

The power input pin of the power management chip is electrically connected with the adapter, and the power output pin of the power management chip is electrically connected with the battery; the inductance device is connected in series between the first control pin and the second control pin; the mode switching switch is connected with the inductance device in parallel, and the control end of the mode switching switch is electrically connected with the third control pin.

Optionally, the first charging loop includes a first capacitor, a second capacitor, and a third capacitor; the power management chip comprises a first capacitor pin, a second capacitor pin, a third capacitor pin, a fourth capacitor pin and a fifth capacitor pin;

The first end of the first capacitor is electrically connected with the first capacitor pin, and the second end of the first capacitor is electrically connected with the fourth capacitor pin;

the first end of the second capacitor is electrically connected with the second capacitor pin, and the second end of the second capacitor is electrically connected with the fifth capacitor pin;

the first end of the third capacitor is electrically connected with the third capacitor pin, and the second end of the third capacitor is electrically connected with the fourth capacitor pin.

Optionally, the power management chip includes a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, and a tenth switching device;

The first end of the first switching device is electrically connected with the power input pin, and the second end of the first switching device is electrically connected with the first end of the second switching device and the first capacitor pin of the power management chip respectively;

The first end of the third switching device is electrically connected with the second end of the second switching device and the second capacitor pin of the power management chip respectively, and the second end of the third switching device is electrically connected with the first end of the fourth switching device and the third capacitor pin of the power management chip respectively;

the first end of the fifth switching device is electrically connected with the second end of the fourth switching device, and the second end of the fifth switching device is electrically connected with the first end of the sixth switching device and the fourth capacitor pin of the power management chip respectively; a second end of the sixth switching device is grounded;

the first end of the eighth switching device is electrically connected with the second end of the fourth switching device, and the second end of the eighth switching device is electrically connected with the first end of the seventh switching device and the fourth capacitor pin of the power management chip respectively; a second end of the seventh switching device is grounded;

a first end of the ninth switching device is electrically connected with a second end of the second switching device, and a second end of the ninth switching device is electrically connected with the second control pin;

a first end of the tenth switching device is electrically connected with a first end of the eighth switching device, and a second end of the tenth switching device is electrically connected with the second control pin;

the first control pin is electrically connected with the power output pin.

Optionally, the power management chip includes a processing chip, where the processing chip is electrically connected to control ends of the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eighth switching device, the ninth switching device, and the tenth switching device, and the processing chip is further electrically connected to a third control pin of the power management chip.

Optionally, the charge pump charging mode includes a first charge pump charging mode; in a first charge pump charging mode, the processing chip is used for controlling the ninth switching device to be always disconnected and controlling the tenth switching device to be always connected; the odd-numbered switching devices and the even-numbered switching devices are controlled to be alternately conducted, so that the ratio of the input voltage to the output voltage of the power management chip is a first preset proportion, and the ratio of the input current to the output current is the inverse of the first preset proportion;

The first capacitor, the second capacitor and the third capacitor are respectively pre-charged with a first preset voltage, a second preset voltage and a third preset voltage; the difference voltage between the input voltage of the power management chip and the first preset voltage is equal to the third preset voltage, and the difference voltage between the second preset voltage and the third preset voltage is equal to the third preset voltage.

Optionally, the charge pump charging mode includes a second charge pump charging mode; in a second charge pump charging mode, the processing chip is used for controlling the second switching device, the third switching device and the tenth switching device to be always on and controlling the ninth switching device to be always off; and controlling the first switching device, the fifth switching device, the eighth switching device, the fourth switching device, the sixth switching device, and the seventh switching device to be alternately turned on, so that the ratio of the input voltage to the output voltage of the power management chip is a second preset ratio and the ratio of the input current to the output current is the inverse of the second preset ratio;

The first capacitor, the second capacitor and the third capacitor are respectively pre-charged with a second preset voltage.

Optionally, in the buck charging mode, the processing chip is configured to control the fourth switching device, the fifth switching device, and the ninth switching device to be always on, and control the seventh switching device, the eighth switching device, and the tenth switching device to be always off; and controlling the four groups of switching devices, namely the first switching device, the third switching device, the sixth switching device, the second switching device, the sixth switching device and the third switching device and the sixth switching device to be sequentially and circularly conducted.

Optionally, the electronic device further comprises a second charging loop; the second charging loop is electrically connected with the adapter and the battery respectively and is used for charging the battery in a charge pump charging mode.

According to a second aspect of embodiments of the present disclosure, there is provided a power management chip electrically connected to an external inductance device and a mode switching switch; the inductance device is connected with the mode switching switch in parallel;

The power input pin of the power management chip is electrically connected with an external adapter, and the power output pin of the power management chip is electrically connected with the battery; the inductance device is connected in series between the first control pin and the second control pin; the mode switching switch is connected with the inductance device in parallel, and the control end of the mode switching switch is electrically connected with the third control pin.

the first control pin is electrically connected with the power output pin.

There is also provided in accordance with an embodiment of the present disclosure a power management chip including a first switching device, a second switching device, a third switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, and a tenth switching device;

the first end of the first switching device is electrically connected with the power input pin of the power management chip, and the second end of the first switching device is electrically connected with the first end of the second switching device and the first capacitor pin of the power management chip respectively;

The first end of the third switching device is electrically connected with the second end of the second switching device and the second capacitor pin of the power management chip respectively, and the second end of the third switching device is electrically connected with the first end of the fifth switching device and the third capacitor pin of the power management chip respectively;

The second end of the fifth switching device is electrically connected with the first end of the sixth switching device and the fourth capacitor pin of the power management chip respectively; a second end of the sixth switching device is grounded;

The first end of the eighth switching device is electrically connected with the second end of the third switching device, and the second end of the eighth switching device is electrically connected with the first end of the seventh switching device and the fourth capacitor pin of the power management chip respectively; a second end of the seventh switching device is grounded;

the first control pin is electrically connected with the power output pin.

According to a third aspect of embodiments of the present disclosure, there is provided a charging control method, which is applicable to a power management chip of the electronic device; the method comprises the following steps:

acquiring a charging mode;

the conduction state of the mode change-over switch is adjusted according to the charging mode;

And controlling the power management chip to form a charging circuit matched with the charging mode.

Optionally, adjusting the conduction state of the mode switch according to the charging mode includes:

the mode change-over switch is disconnected when the voltage-reducing charging mode is adopted, so that a first charging loop of the electronic equipment adopts the voltage-reducing charging mode to charge the battery;

and when the charge pump is in a charging mode, the mode switching switch is conducted so that the first charging loop charges the battery in the charging mode of the charge pump.

Optionally, controlling the power management chip to form a charging circuit matched with the charging mode includes:

When the charge pump charging mode is the first charge pump charging mode, the ninth switching device and the tenth switching device are controlled to be always on; and controlling odd-numbered switching devices and even-numbered switching devices in the first to eighth switching devices to be alternately turned on, so that the ratio of the input voltage to the output voltage of the power management chip is a first preset ratio and the ratio of the input current to the output current is the inverse of the first preset ratio;

The first capacitor, the second capacitor and the third capacitor of the first charging loop are respectively pre-charged with a first preset voltage, a second preset voltage and a third preset voltage; the difference voltage between the input voltage of the power management chip and the first preset voltage is equal to the third preset voltage, and the difference voltage between the second preset voltage and the third preset voltage is equal to the third preset voltage.

When the charge pump charging mode is a second charge pump charging mode, controlling the second switching device, the third switching device, the ninth switching device and the tenth switching device to be always on; and controlling the first switching device, the fifth switching device and the eighth switching device and the fourth switching device, the sixth switching device and the seventh switching device to be alternately conducted so that the ratio of the input voltage to the output voltage of the power management chip is a second preset ratio and the ratio of the input current to the output current is the inverse of the second preset ratio;

the first capacitor, the second capacitor and the third capacitor of the first charging loop are respectively pre-charged with a third preset voltage.

in the buck charging mode, the fourth switching device, the fifth switching device and the ninth switching device are controlled to be always on, and the seventh switching device, the eighth switching device and the tenth switching device are controlled to be always off; and the four groups of switching devices, namely the first switching device, the third switching device, the sixth switching device, the second switching device, the sixth switching device and the third switching device and the sixth switching device, are controlled to be sequentially and circularly conducted.

According to a fourth aspect of embodiments of the present disclosure, there is provided a charging control device adapted to a power management chip of the electronic apparatus; the device comprises:

The charging mode acquisition module is used for acquiring a charging mode;

The conduction state acquisition module is used for adjusting the conduction state of the mode change-over switch according to the charging mode;

and the charging circuit forming module is used for controlling the power management chip to form a charging circuit matched with the charging mode.

Optionally, the charging circuit forming module includes:

the first control unit is used for controlling the ninth switching device and the tenth switching device to be always conducted when the charge pump charging mode is the first charge pump charging mode;

The second control unit is used for controlling the odd-numbered switching devices and the even-numbered switching devices in the first switching device to the eighth switching device to be alternately conducted so that the ratio of the input voltage to the output voltage of the power management chip is a first preset ratio and the ratio of the input current to the output current is the reciprocal of the first preset ratio;

Optionally, the charging circuit forming module includes:

The third control unit is used for controlling the second switching device, the third switching device, the ninth switching device and the tenth switching device to be always on when the charge pump charging mode is the second charge pump charging mode;

The fourth control unit is used for controlling the first switching device, the fifth switching device, the eighth switching device, the fourth switching device, the sixth switching device and the seventh switching device to be alternately conducted so that the ratio of the input voltage to the output voltage of the power management chip is a second preset proportion and the ratio of the input current to the output current is the inverse of the second preset proportion;

The fifth control unit is used for controlling the fourth switching device, the fifth switching device and the ninth switching device to be always on in the step-down charging mode;

a sixth control unit for controlling the seventh switching device, the eighth switching device and the tenth switching device to be always turned off;

And the seventh control unit is used for controlling the first switching device, the third switching device, the sixth switching device, the second switching device, the sixth switching device and the fourth switching device to be sequentially and circularly conducted.

According to a fifth aspect of embodiments of the present disclosure, there is provided an electronic device, comprising:

a memory and a processor;

The memory is used for storing a computer program executable by the processor;

the processor is configured to execute the computer program in the memory to implement the method as described above.

Optionally, the processor includes a processing chip of the electronic device or a processing chip of a power management chip within the electronic device.

According to a sixth aspect of embodiments of the present disclosure, there is provided a non-transitory computer readable storage medium, which when executed by a processor, is capable of carrying out a method as described above.

The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects:

The electronic device provided by the embodiment of the disclosure comprises a first charging loop and a battery; the first charging loop comprises a power management chip, an inductance device and a mode switching switch; the inductance device is connected with the mode switching switch in parallel; the power management chip is used for switching off the mode switching switch when in a step-down charging mode so that the first charging loop charges the battery in the step-down charging mode; the power management chip is used for conducting the mode switching switch when in a charge pump charging mode, so that the first charging loop charges the battery in the charge pump charging mode. Like this, this embodiment adjusts the charging mode of power management chip through mode change over switch, can be applicable to different scene of charging, is favorable to improving charge efficiency. In addition, when the power management chip works in the charge pump charging mode, a charge pump circuit is added, so that the number of charging loops can be reduced, and the size of the electronic equipment is reduced.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.

Fig. 1 is a block diagram of an electronic device, according to an example embodiment.

Fig. 2 is a schematic diagram illustrating the connection of a power management chip according to an exemplary embodiment.

Fig. 3 is an equivalent circuit diagram of a first charging loop, shown according to an exemplary embodiment.

Fig. 4 is an equivalent circuit diagram of another first charging loop shown according to an exemplary embodiment.

Fig. 5 is an equivalent circuit diagram of yet another first charging loop, shown according to an exemplary embodiment.

Fig. 6 is an equivalent circuit diagram of a first charge loop in a second charge pump charging mode, according to an exemplary embodiment.

Fig. 7 is an equivalent circuit diagram of another first charging loop in a second charge pump charging mode, according to an example embodiment.

Fig. 8 is an equivalent circuit diagram of another first charging loop in a second charge pump charging mode, according to an example embodiment.

Fig. 9 is an equivalent circuit diagram of a first charging loop in a buck charging mode, according to an example embodiment.

Fig. 10 is an equivalent circuit diagram of another first charging loop in a buck charging mode, according to an example embodiment.

Fig. 11 is an equivalent circuit diagram of still another first charging loop in a buck charging mode, according to an example embodiment.

Fig. 12 is an equivalent circuit diagram of still another first charging loop in a buck charging mode, according to an example embodiment.

Fig. 13 is a circuit diagram of a power management chip, according to an example embodiment.

Fig. 14 is a flowchart illustrating a charge control method according to an exemplary embodiment.

Fig. 15 is a block diagram illustrating a charge control device according to an exemplary embodiment.

Fig. 16 is a block diagram of an electronic device, according to an example embodiment.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The embodiments described by way of example below are not representative of all embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus consistent with some aspects of the disclosure as detailed in the accompanying claims. The features of the following examples and embodiments may be combined with each other without any conflict.

As electronic devices are increasingly used, their power consumption increases, and so does the user's interest in the charging rate of the electronic device. At present, the charging power of the existing charger is higher and higher, so that the effect of rapidly charging the electronic equipment is achieved. For example, the output voltage of the existing charger is 20V, and the charging power can reach 100W, which still cannot meet the requirement of faster charging.

In order to solve the technical problems, embodiments of the present disclosure provide a charging control method and apparatus, an electronic device, and a storage medium. Figure 1 is a block diagram of an electronic device shown in accordance with an exemplary embodiment,

Referring to fig. 1, an electronic device includes a first charging loop and a battery. The first charging loop includes a power management chip PMIC, a battery B, and an inductance device L. Wherein the inductance device L is connected in parallel with the mode switching switch Q0. The power management chip PMIC is used for switching off the mode switching switch Q0 when in a step-down charging mode so that the first charging loop charges the battery in the step-down charging mode; the power management chip PMIC is configured to conduct the mode switch when in the charge pump charging mode, and at this time, the mode switch Q0 may short-circuit the inductance device L, so that the first charging loop charges the battery in the charge pump charging mode. Like this, this embodiment adjusts the charging mode of power management chip through mode change over switch, can be applicable to different scene of charging, is favorable to improving charge efficiency. In addition, when the power management chip works in the charge pump charging mode, a charge pump circuit is added, so that the number of charging loops can be reduced, and the size of the electronic equipment is reduced.

IN an embodiment, referring to fig. 2, the power management chip PMIC includes a power input pin usb_in, a power output pin Vout, a first control pin Vc, a second control pin VSW, and a third control pin byp_en. The power supply input pin USB_IN of the power supply management chip PMIC is electrically connected with an adapter (adapter), and the power supply output pin Vout of the power supply management chip PMIC is electrically connected with a battery B; the inductance device L is connected in series between the first control pin Vc and the second control pin VSW; the mode switching switch Q0 is connected in parallel with the inductance device L and a control terminal of the mode switching switch Q0 is electrically connected to the third control pin byp_en. In this way, the processing chip of the power management chip PMIC may generate and transmit the control signal to the mode switching switch Q0 through the third control pin byp_en. For example, when the control signal is at the first level, the mode switch Q0 is turned on; since the mode switching switch Q0 is connected in parallel to two ends of the inductance device L, the mode switching switch Q0 may short the inductance device L at this time, i.e., the inductance device L is switched out of the circuit and does not operate. When the control signal is at the second level, the mode switch Q0 is turned off (or turned off), and the inductor L is added to the circuit to operate.

With continued reference to fig. 2, the first charging loop includes a first capacitor C1, a second capacitor C2, and a third capacitor C3; the power management chip PMIC includes a first capacitor pin PC1, a second capacitor pin PC2, a third capacitor pin PC3, a fourth capacitor pin PC4, and a fifth capacitor pin PC5. The first end of the first capacitor C1 is electrically connected with the first capacitor pin PC1, and the second end of the first capacitor C1 is electrically connected with the fourth capacitor pin PC 4; the first end of the second capacitor C2 is electrically connected with the second capacitor pin PC2, and the second end of the second capacitor C2 is electrically connected with the fifth capacitor pin PC 5; the first end of the third capacitor C3 is electrically connected to the third capacitor pin PC3, and the second end of the third capacitor C3 is electrically connected to the fourth capacitor pin PC 4.

With continued reference to fig. 2, the power management chip PMIC includes a first switching device Q1, a second switching device Q2, a third switching device Q3, a fourth switching device Q4, a fifth switching device Q5, a sixth switching device Q6, a seventh switching device Q7, an eighth switching device Q8, a ninth switching device Q9, and a tenth switching device Q10. Wherein,

The first end of the first switching device Q1 is electrically connected with the power input pin USB_IN, and the second end of the first switching device Q1 is electrically connected with the first end of the second switching device Q2 and the first capacitor pin of the power management chip PMIC respectively;

The first end of the third switching device Q3 is respectively and electrically connected with the second end of the second switching device Q2 and the second capacitor pin PC2 of the power management chip PMIC, and the second end of the third switching device Q3 is respectively and electrically connected with the first end of the fourth switching device Q4 and the third capacitor pin PC3 of the power management chip PMIC;

A first end of the fifth switching device Q5 is electrically connected with a second end of the fourth switching device Q4, and a second end of the fifth switching device Q5 is electrically connected with a first end of the sixth switching device Q6 and a fourth capacitor pin PC4 of the power management chip PMIC respectively; the second end of the sixth switching device Q6 is grounded;

The first end of the eighth switching device Q8 is electrically connected with the second end of the fourth switching device Q4, and the second end of the eighth switching device Q8 is electrically connected with the first end of the seventh switching device Q7 and the fourth capacitor pin PC4 of the power management chip PMIC respectively; the second end of the seventh switching device Q7 is grounded;

a first end of the ninth switching device Q9 is electrically connected to the second end of the second switching device Q2, and a second end of the ninth switching device Q9 is electrically connected to the second control pin VSW;

a first end of the tenth switching device Q10 is electrically connected to a first end of the eighth switching device Q8, and a second end of the tenth switching device Q10 is electrically connected to the second control pin VSW;

The first control pin Vc is electrically connected with a power output pin.

In this embodiment, the power management chip PMIC further includes a processing chip (not shown in the drawing). The processing chip is electrically connected with control ends of the first switching device Q1, the second switching device Q2, the third switching device Q3, the fourth switching device Q4, the fifth switching device Q5, the sixth switching device Q6, the seventh switching device Q7, the eighth switching device Q8, the ninth switching device Q9 and the tenth switching device Q10 respectively, and the processing chip is also electrically connected with a third control pin BYP_EN of the power management chip.

Therefore, the processing chip can acquire the charging mode of the electronic equipment, and then the on-off state of each switching device is controlled according to the charging mode, so that the effect of the corresponding charging mode is achieved. In this embodiment, the charging modes may include a first charge pump charging mode, a second charge pump charging mode, and a buck charging mode.

In an example, the ratio of the input voltage to the output voltage of the power management chip PMIC (or the first charging loop) in the first charge pump charging mode is a first preset ratio, and the first preset ratio may be 4:1, the ratio of the input current to the output current is the inverse of the first preset ratio, namely 1:4.

In an example, the ratio of the input voltage to the output voltage of the power management chip PMIC (or the first charging loop) in the second charge pump charging mode is a second preset ratio, and the second preset ratio may be 2:1, the ratio of the input current to the output current is the inverse of the second preset ratio, namely 1:2.

In an example, the ratio of the input voltage to the output voltage of the power management chip PMIC (or the first charging loop) in the buck charging mode is a third preset ratio, and the third preset ratio may be 2: 1.3: 1 or 4:1, etc., may be set according to a specific scene, and is not limited herein.

In an embodiment, when the processing chip determines that the charging mode of the electronic device is the first charge pump charging mode, with continued reference to fig. 2, the processing chip may control the mode switching switch Q0 and the tenth switching device Q10 to be always on, and control the ninth switching device Q9 to be always off; and controlling the odd-numbered switching devices (namely Q1/Q3/Q5/Q7) and the even-numbered switching devices (namely Q2/Q4/Q6/Q8) to be alternately conducted so that the ratio of the input voltage to the output voltage of the PMIC is a first preset ratio and the ratio of the input current to the output current is the inverse of the first preset ratio; at this time, the first capacitor C1, the second capacitor C2, and the third capacitor C3 are respectively pre-charged with a first preset voltage, a second preset voltage, and a third preset voltage; the difference voltage between the input voltage of the PMIC and the first preset voltage is equal to a third preset voltage, and the difference voltage between the second preset voltage and the third preset voltage is equal to the third preset voltage; or the ratio of the input voltage of the PMIC to the third preset voltage is the first preset ratio. In an example, the input voltage, the first preset voltage, the second preset voltage, and the third preset voltage of the power management chip PMIC are 20V, 15V, 10V, and 5V, respectively.

In the first charge pump charging mode, the circuit shown in fig. 2 may be converted into an equivalent circuit shown in fig. 3.

In this embodiment, the processing chip may control the odd switching devices (i.e., Q1/Q3/Q5/Q7) and the even switching devices (i.e., Q2/Q4/Q6/Q8) to be alternately turned on, so that the first charging loop (i.e., the portion of the circuit between the adapter and the battery) provides a 5V charging voltage for the battery.

In this embodiment, each four alternate turns on forms a charging cycle, so each charging cycle is formed by 4 phases, including:

In the first stage, the odd switching devices (i.e., Q1/Q3/Q5/Q7) are turned on, while the even switching devices (i.e., Q2/Q4/Q6/Q8) are turned off, and the equivalent circuit is shown in fig. 4.

At this time, the first charging circuit has a current path of:

adapter- > power supply input pin usb_in- > first switching device Q1- > first capacitor C1- > fifth switching device Q5- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on IN charge case) - > battery.

Considering that the first capacitor C1 is pre-charged with the first preset voltage, the voltage at the power output pin Vout is a difference voltage between the input voltage and the first preset voltage. Taking the example that the input voltage of the power management chip PMIC is 20V and the first preset voltage is 15V, the voltage at the power output pin Vout is 20-15=5v.

In the second phase, the even switching devices (i.e., Q2/Q4/Q6/Q8) are turned on, while the odd switching devices (i.e., Q1/Q3/Q5/Q7) are turned on, and the equivalent circuit is shown in fig. 5.

At this time, the first charging circuit has a current path of:

Sixth switching device Q6- > first capacitor C1- > second switching device Q2- > second capacitor C2- > eighth switching device Q8- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on in charge case) - > battery.

Considering that the first capacitor C1 is pre-charged with a first preset voltage, the second capacitor C2 is pre-charged with a second preset voltage, and at this time, the voltage at the power output pin Vout is the difference voltage between the first preset voltage and the second preset voltage. Taking the example that the first preset voltage is 15V and the second preset voltage is 10V, the voltage at the power output pin Vout is 15-10=5v.

In the third stage, the odd switching devices (i.e., Q1/Q3/Q5/Q7) are turned on, while the even switching devices (i.e., Q2/Q4/Q6/Q8) are turned off, and the equivalent circuit is shown in fig. 4.

At this time, the first charging circuit has a current path of:

Seventh switching device Q7- > second capacitor C2- > third switching device Q3- > third capacitor C3- > fifth switching device Q5- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on in charge case) - > battery.

Considering that the second capacitor C2 is pre-charged with the second preset voltage, the third capacitor C3 is pre-charged with the third preset voltage, and at this time, the voltage at the power output pin Vout is the difference voltage between the second preset voltage and the third preset voltage. Taking the second preset voltage as 10V and the third preset voltage as 5V as an example, the voltage at the power output pin Vout is 10-5=5v.

In the fourth stage, the even switching devices (i.e., Q2/Q4/Q6/Q8) are turned on, while the odd switching devices (i.e., Q1/Q3/Q5/Q7) are turned on, and the equivalent circuit is shown in fig. 5.

At this time, the first charging circuit has a current path of:

The sixth switching device Q6- > third capacitor C3- > fourth switching device Q4- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on in charge case) - > battery.

Considering that the third capacitor C3 is pre-charged with the third preset voltage, the voltage at the power output pin Vout is the third preset voltage. When the third preset voltage is 5V, the voltage at the power output pin Vout is 5V.

In an embodiment, when the processing chip determines that the charging mode of the electronic device is the second charge pump charging mode, with continued reference to fig. 2, the processing chip may control the mode switching switch Q0, the second switching device Q2, the third switching device Q3, and the tenth switching device Q10 to be always on, and control the ninth switching device Q9 to be always off; and the first switching device Q1, the fifth switching device Q5, and the eighth switching device Q8, and the fourth switching device Q4, the sixth switching device Q6, and the seventh switching device Q7 are controlled to be alternately turned on (Q1/Q5/Q8 is a group, and Q4/Q6/Q7 is a group) so that the ratio of the input voltage to the output voltage of the power management chip PMIC is a second preset ratio and the ratio of the input current to the output current is an inverse of the second preset ratio. The first capacitor C1, the second capacitor C2, and the third capacitor C3 are respectively pre-charged with a second preset voltage. In an example, the input voltage, the first preset voltage, the second preset voltage, and the third preset voltage of the power management chip PMIC are 10V, 5V, and 5V, respectively.

In the second charge pump charging mode, the circuit shown in fig. 2 may be converted into an equivalent circuit shown in fig. 6.

In this embodiment, the processing chip may control the first switching device Q1, the fifth switching device Q5, and the eighth switching device Q8, and the two sets of switching devices of the fourth switching device Q4, the sixth switching device Q6, and the seventh switching device Q7 to be alternately turned on, so that the first charging loop (i.e., the part of the circuit between the adapter and the battery) provides a 5V charging voltage for the battery. In this embodiment, each two alternate conduction forms a charging cycle, so each charging cycle is formed by 2 phases, including:

In the first stage, the first, fifth and eighth switching devices Q1, Q5 and Q8 are turned on, and the fourth, sixth and seventh switching devices Q4, Q6 and Q7 are turned off, with an equivalent circuit as shown in fig. 7.

At this time, the first charging circuit has a current path of:

Pathway (1): adapter- > power supply input pin usb_in- > first switching device Q1- > first capacitor C1- > fifth switching device Q5- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on IN charge case) - > battery.

Considering that the first capacitor C1 is pre-charged with the second preset voltage, the voltage at the power output pin Vout is the difference voltage between the input voltage and the second preset voltage. Taking the power management chip PMIC with an input voltage of 10V and a second preset voltage of 5V as an example, the voltage at the power output pin Vout is 10-5=5v.

Pathway (2): adapter- > power supply input pin usb_in- > first switching device Q1- > second capacitor C2- > eighth switching device Q8- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on IN charge case) - > battery.

Considering that the second capacitor C2 is pre-charged with the second preset voltage, the voltage at the power output pin Vout is the difference voltage between the input voltage and the second preset voltage. Taking the power management chip PMIC with an input voltage of 10V and a second preset voltage of 5V as an example, the voltage at the power output pin Vout is 10-5=5v.

Pathway (3): adapter- > power supply input pin usb_in- > first switching device Q1- > third capacitor C3- > fifth switching device Q5- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on IN charge case) - > battery.

Considering that the third capacitor C3 is pre-charged with the second preset voltage, the voltage at the power output pin Vout is the difference voltage between the input voltage and the second preset voltage. Taking the power management chip PMIC with an input voltage of 10V and a second preset voltage of 5V as an example, the voltage at the power output pin Vout is 10-5=5v.

In the second stage, the first, fifth and eighth switching devices Q1, Q5 and Q8 are turned off, and the fourth, sixth and seventh switching devices Q4, Q6 and Q7 are turned on, with an equivalent circuit as shown in fig. 8.

At this time, a current path exists in the first charging loop, which comprises:

pathway (1): sixth switching device Q6- > first capacitor C1- > fourth switching device Q4- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on in charge case) - > battery.

Considering that the first capacitor C1 is pre-charged with the second preset voltage, the voltage at the power output pin Vout is the second preset voltage. Taking the second preset voltage as an example, the voltage at the power output pin Vout is 5V.

Pathway (2): the seventh switching device Q7- > the second capacitor C2- > the fourth switching device Q4- > the second control pin VSW- > the mode switch Q0- > the battery charging switch QBAT (always on in charging case) - > the battery.

Considering that the second capacitor C2 is pre-charged with the second preset voltage, the voltage at the power output pin Vout is the second preset voltage. Taking the second preset voltage as an example, the voltage at the power output pin Vout is 5V.

Pathway (3): the sixth switching device Q6- > third capacitor C3- > fourth switching device Q4- > second control pin VSW- > mode switch Q0- > battery charge switch QBAT (always on in charge case) - > battery.

Considering that the third capacitor C3 is pre-charged with the second preset voltage, the voltage at the power output pin Vout is the second preset voltage. Taking the second preset voltage as an example, the voltage at the power output pin Vout is 5V.

In the buck charging mode, the circuit shown in fig. 2 may be converted into an equivalent circuit shown in fig. 9.

In this embodiment, referring to fig. 9, the processing chip may control the fourth switching device Q4, the fifth switching device Q5, and the ninth switching device Q9 to be always on, and control the mode switching switch Q0, the seventh switching device Q7, the eighth switching device Q8, and the tenth switching device Q10 to be always off; and, the four sets of switching devices of the first and third switching devices Q1 and Q3, the third and sixth switching devices Q3 and Q6, the second and sixth switching devices Q2 and Q6, and the third and sixth switching devices Q3 and Q6 are controlled to be sequentially turned on in a cyclic manner. Alternatively, the four sets of switching devices are turned on once per cycle to form a charging cycle, so each charging cycle is formed of 4 phases, including:

First stage

The processing chip controls the first switch Q1 and the third switch Q3 to be conducted, the second switch Q2 and the sixth switch Q6 to be disconnected, and the equivalent circuit is shown in FIG. 10.

Adapter- > power supply input pin usb_in- > first switching device Q1- > first capacitor C1- > third capacitor C3- > second control pin VSW- > inductor device L- > battery charging switch QBAT (always on IN charging case) - > battery.

In the first stage, assuming that the input voltage is Vin, the first capacitor C1 and the third capacitor C3 divide, that is, the voltages of the first capacitor C1 and the third capacitor C3 are Vin/2, respectively. In one example, the input voltage Vin may be 9V. During this phase, the inductive device L stores electrical energy and charges the battery.

Second stage

The processing chip controls the third switch Q3 and the sixth switch Q6 to be conducted, the first switch Q1 and the second switch Q2 are disconnected, and the equivalent circuit is shown in FIG. 11.

Sixth switching device Q6- > third switching device Q3- > second control pin VSW- > inductive device L- > battery charge switch QBAT (always on in the charge case) - > battery. During this phase, the inductive device L discharges electrical energy to charge the battery.

Third stage

The processing chip controls the second switch device Q2 to be conducted with the sixth switch device Q6, the first switch device Q1 to be disconnected with the third switch device Q3, and the equivalent circuit is shown in FIG. 12.

Sixth switching device Q6- > first capacitance C1- > second switching device Q2- > second control pin VSW- > inductance device L- > battery charge switch QBAT (always on in charge case) - > battery. During this phase, the first capacitor C1 discharges, charging the battery and the inductive device L stores electrical energy.

Fourth stage

The processing chip controls the third switch Q3 and the sixth switch Q6 to be conducted, the first switch Q1 and the second switch Q2 are disconnected, and the equivalent circuit is shown in FIG. 11. At this time, a current path exists in the first charging loop, which comprises:

sixth switching device Q6- > third switching device Q3- > second control pin VSW- > inductive device L- > battery charge switch QBAT (always on in the charge case) - > battery. During this phase, the inductive device L discharges to charge the battery.

In an embodiment, the electronic device further comprises a second charging loop. The second charging loop is electrically connected with the adapter and the battery respectively and is used for charging the battery in a charge pump charging mode. With continued reference to fig. 1-12, the second charging loop includes a charge pump chip electrically connected to the adapter and the battery, respectively, for converting an input voltage provided by the adapter into a preset voltage to charge the battery. The ratio of the input voltage to the output voltage of the charge pump chip may be 2: 1. 3: 1. 4: 1. 4: 2. 6:2 or 8: and 4, selecting according to specific scenes, wherein the corresponding scheme falls into the protection scope of the disclosure. Thus, in this embodiment, a charging loop may be added, and the charging current of the battery may be increased, for example, the charging current may be increased from 5 to 10A to 20A, and the charging power of the battery is 320W, taking the charging current of 20A and the charging voltage of 36V as an example, so as to achieve the effect of increasing the charging power.

It should be noted that the second charging circuit and the first charging circuit may operate separately or simultaneously. Taking the first charging loop and the second charging loop as an example, the output voltages of the first charging loop and the second charging loop, that is, the voltages reaching the battery, are the same, so as to meet the charging requirement.

On the basis of the electronic device provided by the embodiment of the present disclosure, the embodiment of the present disclosure further provides a power management chip, where the power management chip is electrically connected with the external inductance device L and the mode switching switch Q0, and the inductance device L and the mode switching switch Q0 are connected in parallel, and a specific circuit connection manner may refer to a connection manner of the PMIC shown in fig. 2 to 12 and contents of the corresponding embodiments thereof. The power management chip is used for switching off the mode change-over switch when in a step-down charging mode so that the first charging loop charges the battery in the step-down charging mode; the power management chip is used for conducting a mode change-over switch when in a charge pump charging mode so that the first charging loop charges the battery in the charge pump charging mode.

In an embodiment, the power management chip includes a power input pin, a power output pin, a first control pin, a second control pin, and a third control pin;

In an embodiment, the power management chip includes a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, and a tenth switching device;

the first control pin is electrically connected with the power output pin.

In an embodiment, the power management chip includes a processing chip, where the processing chip is electrically connected to control terminals of the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eighth switching device, the ninth switching device, and the tenth switching device, and the processing chip is further electrically connected to a third control pin of the power management chip.

In an embodiment, the charge pump charging mode comprises a first charge pump charging mode; in a first charge pump charging mode, the processing chip is used for controlling the ninth switching device to be always disconnected and controlling the tenth switching device to be always connected; the odd-numbered switching devices and the even-numbered switching devices are controlled to be alternately conducted, so that the ratio of the input voltage to the output voltage of the power management chip is a first preset proportion, and the ratio of the input current to the output current is the inverse of the first preset proportion;

In an embodiment, the charge pump charging mode comprises a second charge pump charging mode; in a second charge pump charging mode, the processing chip is used for controlling the second switching device, the third switching device and the tenth switching device to be always on and controlling the ninth switching device to be always off; and controlling the first switching device, the fifth switching device, the eighth switching device, the fourth switching device, the sixth switching device, and the seventh switching device to be alternately turned on, so that the ratio of the input voltage to the output voltage of the power management chip is a second preset ratio and the ratio of the input current to the output current is the inverse of the second preset ratio;

the first capacitor, the second capacitor and the third capacitor are respectively pre-charged with a second preset voltage. In an embodiment, in the buck charging mode, the processing chip is configured to control the fourth switching device, the fifth switching device, and the ninth switching device to be always on, and to control the seventh switching device, the eighth switching device, and the tenth switching device to be always off; and controlling the four groups of switching devices, namely the first switching device, the third switching device, the sixth switching device, the second switching device, the sixth switching device and the third switching device and the sixth switching device to be sequentially and circularly conducted.

It should be noted that, the power management chip embodiment shown in the embodiment is matched with the content of the above-mentioned electronic device embodiment, and reference may be made to the content of the above-mentioned electronic device embodiment, which is not described herein.

On the basis of the electronic equipment provided by the embodiment of the present disclosure, the embodiment of the present disclosure further provides a power management chip, referring to fig. 13, where the power management chip includes a first switching device, a second switching device, a third switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, and a tenth switching device;

the first control pin is electrically connected with the power output pin.

It should be noted that, the power management chip embodiment shown in the present embodiment is matched with the content of the above-mentioned electronic device embodiment, and the difference is that the fourth switching device Q4 is replaced by a wire, and the content of the above-mentioned electronic device embodiment may be referred to specifically, which is not described herein again.

On the basis of the electronic equipment provided by the embodiment of the present disclosure, the embodiment of the present disclosure further provides a charging control method, see fig. 14, which is applicable to a power management chip of the electronic equipment; the method comprises the steps 141 to 143:

In step 141, a charging mode is acquired.

In this step, the power management chip may communicate with the processing chip of the electronic device, so that the charging modes determined by the processing chip of the electronic device, that is, the first charge pump charging mode, the second charge pump charging mode, and the buck charging mode, may be obtained.

In step 142, the conduction state of the mode switch is adjusted according to the charging mode.

In this step, the power management chip may adjust the on state of the mode switch according to the charging mode. For example, in the buck charging mode, the mode changeover switch is controlled to be turned off so that the inductance device participates in the buck charging process; for another example, the mode switch is controlled to turn on in the charge pump charging mode to short the inductive device, so that the inductive device does not refer to the charging process.

In step 143, the power management chip is controlled to form a charging circuit that matches the charging mode.

In this step, the power management chip may control itself to form a charging circuit matched with the charging mode, and specifically, refer to the contents of the examples shown in fig. 1 to 12, which are not described herein again.

In an embodiment, adjusting the conduction state of the mode switch according to the charging mode includes:

In one embodiment, controlling the power management chip to form a charging circuit matched with the charging mode includes:

Like this, this embodiment adjusts the charging mode of power management chip through mode change over switch, can be applicable to different scene of charging, is favorable to improving charge efficiency. In addition, when the power management chip works in the charge pump charging mode, a charge pump circuit is added, so that the number of charging loops can be reduced, and the size of the electronic equipment is reduced.

On the basis of the charging control method provided by the embodiment of the disclosure, the embodiment of the disclosure also provides a charging control device which is suitable for the power management chip of the electronic equipment; referring to fig. 15, comprising:

a charging mode acquisition module 151 for acquiring a charging mode;

a conducting state obtaining module 152, configured to adjust a conducting state of the mode switch according to the charging mode;

the charging circuit forming module 153 is configured to control the power management chip to form a charging circuit matched with the charging mode.

In one embodiment, the charging circuit forming module includes:

It should be noted that, the embodiment of the apparatus shown in this embodiment is matched with the content of the embodiment of the method, and reference may be made to the content of the embodiment of the method shown above, which is not described herein again.

Fig. 16 is a block diagram of an electronic device, according to an example embodiment. For example, electronic device 1600 may be a smart phone, computer, digital broadcast terminal, tablet device, medical device, exercise device, personal digital assistant, or the like. The electronic device includes the first charging loop, the second charging loop, and the voltage regulation chip illustrated in fig. 1.

Referring to fig. 16, the electronic device 1600 may include one or more of the following components: a processing component 1602, a memory 1604, a power component 1606, a multimedia component 1608, an audio component 1610, an input/output (I/O) interface 1612, a sensor component 1614, a communication component 1616, and an image acquisition component 1618.

The processing component 1602 generally controls overall operation of the electronic device 1600, such as operations associated with display, telephone call, data communication, camera operation, and recording operation. The processing component 1602 may include one or more processors 1620 to execute computer programs. In addition, the processing component 1602 may include one or more modules that facilitate interactions between the processing component 1602 and other components. For example, the processing component 1602 may include a multimedia module to facilitate interactions between the multimedia component 1608 and the processing component 1602.

The memory 1604 is configured to store various types of data to support operations at the electronic device 1600. Examples of such data include computer programs, contact data, phonebook data, messages, pictures, videos, and the like for any application or method operating on electronic device 1600. The memory 1604 may be implemented by any type of volatile or nonvolatile memory device or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

The power supply component 1606 provides power to the various components of the electronic device 1600. Power supply component 1606 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for electronic device 1600. The power component 1606 may include a power chip and the controller may communicate with the power chip to control the power chip to turn on or off the switching device, causing the battery to power the motherboard circuit or not.

The multimedia component 1608 includes a screen between the electronic device 1600 and the target object that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input information from a target object. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or sliding action, but also the duration and pressure associated with the touch or sliding operation.

The audio component 1610 is configured to output and/or input audio file information. For example, the audio component 1610 includes a Microphone (MIC) configured to receive external audio file information when the electronic device 1600 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio file information may be further stored in the memory 1604 or transmitted via the communication component 1616. In some embodiments, the audio component 1610 further includes a speaker for outputting audio file information.

The I/O interface 1612 provides an interface between the processing component 1602 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc.

The sensor assembly 1614 includes one or more sensors for providing status assessment of various aspects of the electronic device 1600. For example, the sensor assembly 1614 may detect an on/off state of the electronic device 1600, a relative positioning of the assemblies, such as a display and keypad of the electronic device 1600, the sensor assembly 1614 may also detect a change in position of the electronic device 1600 or one of the assemblies, the presence or absence of a target object in contact with the electronic device 1600, an orientation or acceleration/deceleration of the electronic device 1600, and a change in temperature of the electronic device 1600. In this example, the sensor assembly 1614 may include a magnetic force sensor, a gyroscope, and a magnetic field sensor, wherein the magnetic field sensor includes at least one of: hall sensors, thin film magneto-resistive sensors, and magnetic liquid acceleration sensors.

The communication component 1616 is configured to facilitate communication between the electronic device 1600 and other devices, either wired or wireless. The electronic device 1600 may access a wireless network based on a communication standard, such as WiFi,2G, 3G, 4G, 5G, or a combination thereof. In one exemplary embodiment, the communication component 1616 receives broadcast information or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component 1616 also includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the electronic device 1600 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital information processors (DSPs), digital information processing devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. An electronic device comprising a first charging loop and a battery; the first charging loop comprises a power management chip, an inductance device and a mode switching switch; the inductance device is connected with the mode switching switch in parallel;

2. The electronic device of claim 1, wherein the power management chip comprises a power input pin, a power output pin, a first control pin, a second control pin, and a third control pin;

3. The electronic device of claim 1, wherein the first charging loop comprises a first capacitance, a second capacitance, and a third capacitance; the power management chip comprises a first capacitor pin, a second capacitor pin, a third capacitor pin, a fourth capacitor pin and a fifth capacitor pin;

4. The electronic device according to any one of claims 1 to 3, wherein the power management chip includes a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, and a tenth switching device;

the first control pin is electrically connected with the power output pin.

5. The electronic device of claim 4, wherein the power management chip comprises a processing chip electrically connected to control terminals of the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eighth switching device, the ninth switching device, and the tenth switching device, respectively, the processing chip further electrically connected to a third control pin of the power management chip.

6. The electronic device of claim 5, wherein the charge pump charging mode comprises a first charge pump charging mode; in a first charge pump charging mode, the processing chip is used for controlling the ninth switching device to be always disconnected and controlling the tenth switching device to be always connected; the odd-numbered switching devices and the even-numbered switching devices are controlled to be alternately conducted, so that the ratio of the input voltage to the output voltage of the power management chip is a first preset proportion, and the ratio of the input current to the output current is the inverse of the first preset proportion;

7. The electronic device of claim 5, wherein the charge pump charging mode comprises a second charge pump charging mode; in a second charge pump charging mode, the processing chip is used for controlling the second switching device, the third switching device and the tenth switching device to be always on and controlling the ninth switching device to be always off; and controlling the first switching device, the fifth switching device, the eighth switching device, the fourth switching device, the sixth switching device, and the seventh switching device to be alternately turned on, so that the ratio of the input voltage to the output voltage of the power management chip is a second preset ratio and the ratio of the input current to the output current is the inverse of the second preset ratio;

8. The electronic device of claim 5, wherein in buck charging mode, the processing chip is configured to control the fourth switching device, the fifth switching device, and the ninth switching device to be always on, and to control the seventh switching device, the eighth switching device, and the tenth switching device to be always off; and controlling the four groups of switching devices, namely the first switching device, the third switching device, the sixth switching device, the second switching device, the sixth switching device and the third switching device and the sixth switching device to be sequentially and circularly conducted.

9. The electronic device of claim 1, further comprising a second charging loop; the second charging loop is electrically connected with the adapter and the battery respectively and is used for charging the battery in a charge pump charging mode.

10. The power management chip is characterized in that the power management chip is electrically connected with an external inductance device and a mode switching switch; the inductance device is connected with the mode switching switch in parallel;

11. The power management chip of claim 10, wherein the power management chip comprises a power input pin, a power output pin, a first control pin, a second control pin, and a third control pin;

12. The power management chip of claim 10 or 11, wherein the power management chip comprises a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, and a tenth switching device;

the first control pin is electrically connected with the power output pin.

13. The power management chip of claim 12, wherein the power management chip comprises a processing chip electrically connected to control terminals of the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eighth switching device, the ninth switching device, and the tenth switching device, respectively, the processing chip further electrically connected to a third control pin of the power management chip.

14. The power management chip of claim 13, wherein the charge pump charging mode comprises a first charge pump charging mode; in a first charge pump charging mode, the processing chip is used for controlling the ninth switching device to be always disconnected and controlling the tenth switching device to be always connected; the odd-numbered switching devices and the even-numbered switching devices are controlled to be alternately conducted, so that the ratio of the input voltage to the output voltage of the power management chip is a first preset proportion, and the ratio of the input current to the output current is the inverse of the first preset proportion;

15. The power management chip of claim 13, wherein the charge pump charging mode comprises a second charge pump charging mode; in a second charge pump charging mode, the processing chip is used for controlling the second switching device, the third switching device and the tenth switching device to be always on and controlling the ninth switching device to be always off; and controlling the first switching device, the fifth switching device, the eighth switching device, the fourth switching device, the sixth switching device, and the seventh switching device to be alternately turned on, so that the ratio of the input voltage to the output voltage of the power management chip is a second preset ratio and the ratio of the input current to the output current is the inverse of the second preset ratio;

16. The power management chip of claim 13, wherein in a buck charging mode, the processing chip is configured to control the fourth switching device, the fifth switching device, and the ninth switching device to be always on, and to control the seventh switching device, the eighth switching device, and the tenth switching device to be always off; and controlling the four groups of switching devices, namely the first switching device, the third switching device, the sixth switching device, the second switching device, the sixth switching device and the third switching device and the sixth switching device to be sequentially and circularly conducted.

17. A power management chip, wherein the power management chip comprises a first switching device, a second switching device, a third switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device and a tenth switching device;

the first control pin is electrically connected with the power output pin.

18. A charge control method is characterized in that the method is suitable for a power management chip of electronic equipment; the method comprises the following steps:

acquiring a charging mode;

19. The method of claim 18, wherein adjusting the conduction state of the mode switch according to the charging mode comprises:

20. The method of claim 18, wherein controlling the power management chip to form a charging circuit that matches the charging pattern comprises:

21. The method of claim 18, wherein controlling the power management chip to form a charging circuit that matches the charging pattern comprises:

When the charge pump charging mode is the second charge pump charging mode, the second switching device, the third switching device, the ninth switching device and the tenth switching device are controlled to be always on; and controlling the first switching device, the fifth switching device and the eighth switching device and the fourth switching device, the sixth switching device and the seventh switching device to be alternately conducted so that the ratio of the input voltage to the output voltage of the power management chip is a second preset ratio and the ratio of the input current to the output current is the inverse of the second preset ratio;

22. The method of claim 18, wherein controlling the power management chip to form a charging circuit that matches the charging pattern comprises:

23. A charge control device is characterized in that the charge control device is suitable for a power management chip of electronic equipment; the device comprises:

The charging mode acquisition module is used for acquiring a charging mode;

24. An electronic device, comprising:

a memory and a processor;

The memory is used for storing a computer program executable by the processor;

The processor is configured to execute a computer program in the memory to implement the method of any one of claims 18 to 22.

25. The electronic device of claim 24, wherein the processor comprises a processing chip of the electronic device or a processing chip of a power management chip within the electronic device.

26. A non-transitory computer readable storage medium, characterized in that the method of any of claims 18-22 is enabled when an executable computer program in the storage medium is executed by a processor.