CN118566248A - Chip patch precision visual detection method - Google Patents

Abstract

The invention discloses a chip patch precision visual detection method which comprises a chip identification and positioning system, wherein the chip identification and positioning system comprises an image display assembly, a template assembly and an ink dot interface assembly. An image display component for displaying the acquired image and setting a template, ink points, a range of search areas on the image and displaying the identified search results; the template component is provided with a template selection, a template training, a template storage and a template loading; and the ink dot interface component is used for analyzing the ink dots according to the positions, the ranges, the sizes and the closing values of the ink dots in the a, and displaying the frames of the ink dots on the image display component. The chip patch precision visual detection method overcomes the defects of traditional manual visual inspection and machine centering, and realizes the detection of the chip with high precision, high speed and high reliability.

Description

A visual inspection method for chip placement accuracy

Technical Field

The present invention relates to the technical field of chip patch detection, and in particular to a chip patch accuracy visual detection method.

Background Art

With the pursuit of high density, high reliability, miniaturization and low cost in the electronics industry, high integration and various new electronic devices generally adopt surface mount packaging. Surface mount technology came into being. It is a comprehensive technology involving components, assembly equipment, welding methods and assembly auxiliary materials, which is used to mount electronic components on printed circuit boards. It is considered a revolution in electronic assembly technology. The assembly line is mainly composed of screen printing machines, mounters and welding machines, and the mounter is the most critical equipment and the equipment with the highest technical content. Its price usually accounts for the total price of the assembly line, so it has always been the focus of technical research. The fully automatic mounter is a device used to accurately place the chip on the target frame on the chip production line. It is one of the key equipment necessary for the chip automation production line. Today's popular high-performance mounters have a common feature that they all use auxiliary positioning systems based on machine vision technology. Because machine vision has unique advantages in improving detection accuracy and enhancing detectability, it has been increasingly widely used in surface mount components, surface mount product quality inspection and other fields. Now, almost all high-precision placement machine systems use visual subsystems to replace traditional mechanical positioning. Through this subsystem, the original position information of the target is sensed and processed, and the feedback information required by the machine is obtained, providing correct correction data for accurate placement of components.

At present, the technology in foreign countries has basically matured in this field, and the development of equipment has also been completed, and it has gradually developed in the direction of intelligentization and highly centralized management. At present, foreign mid-to-high-end placement machine manufacturers have implemented a strict blockade policy on core technologies. At present, the products of these companies occupy most of the domestic market. However, these products are expensive, and only strong companies can afford them, while some small and medium-sized customers cannot or are unwilling to afford such expensive equipment.

As one of the key technologies of the placement machine, high-speed visual recognition technology determines the placement capability of the placement machine and directly affects the placement accuracy and speed of the placement machine. Therefore, the study of the detection system of the placement machine based on machine vision will help to develop and enrich the basic theory and methods of visual positioning, and provide certain basic theories and unit technologies for the development of high-performance packaging equipment with independent intellectual property rights in China.

The rapid and precise positioning of mechanical motion systems is a comprehensive technology, and its basis is the machine vision system. The machine vision system provides the position of the moving target and is composed of optical lighting system, optical imaging system, camera device, image processing software and other parts. Among them, high-precision image processing methods play a decisive role in the accuracy of the machine vision system.

In machine vision systems, visual information processing technology mainly relies on image processing methods, which include image enhancement, smoothing filtering, image segmentation, morphological analysis, edge sharpening, edge detection, feature extraction, template matching, Fourier transform and other image recognition and understanding contents. After these processes, the quality of the output image is improved to a considerable extent, which not only improves the visual effect of the image, but also facilitates the computer to analyze, process and recognize the image.

Generally speaking, machine vision image processing software is mainly used in the following three aspects: surface inspection, image measurement, and image recognition. Depending on the application purpose, each system focuses on different image processing methods. There are many image processing methods, and there is no specific type dedicated to machine vision inspection, but it is obvious that many methods cannot meet the needs of machine vision inspection. Image processing methods suitable for machine vision inspection are those that emphasize target feature application and real-time image processing methods, as well as visual inspection systems based on industrial control computers and the integration of methods therein.

The placement machine is a precision manufacturing equipment that integrates optics, machinery, electricity, computer vision, and automation technology to accurately pick up and place various electronic components on the target frame. It uses a certain method to accurately pick up surface mount components and place them on the specified position on the target frame by moving the suction head. There are several positioning methods for high-precision automatic placement machines, including mechanical positioning, visual positioning, and laser positioning. Visual positioning uses a high-magnification imaging system and image processing technology to significantly improve positioning accuracy and placement efficiency. It is currently the dominant positioning method. The current fully automatic placement machine mainly uses machine vision technology to analyze and process chip images through image processing and pattern recognition methods to complete chip identification and positioning and defect detection. Identification and positioning is to give motion control parameters and determine the precise position of the chip. Defect detection requires the completion of ink spots, missing corners, broken edges, scratches, and adjacent chips. The positioning of the chip can pass the precise information of the chip position to the motion control module, so that the control module can adjust the control parameters in real time. According to the connection between visual inspection and motion control, the structure of the placement machine visual inspection system is shown in Figure 1.

In Figure 1, the light source, lens, camera, and image acquisition card belong to the image acquisition device, whose main function is to complete the acquisition of chip images and send them to the control computer. The industrial control computer is an image processing device, which mainly completes the processing and analysis of chip images, converts the processing results into motion control parameters, and transmits them to the motion control part. The motion control part generates motion control instructions based on the transmitted control parameters and controls the movement of the chip stage to make the chip reach the target position. The image processing part of the industrial control computer specifically uses digital image processing technology to perform necessary preliminary processing such as preprocessing, edge detection, and image segmentation on the acquired images, so as to facilitate the special component positioning method for the specific detected target. The component positioning method is mainly aimed at the complexity and diversity of the packaging forms of the patch components. The rules are summarized to design targeted positioning methods for components of various packaging types to meet the high-speed and high-precision requirements of the patch machine vision system.

In the placement machine equipment, after the nozzle head picks up the specified type of chip, it is necessary to first perform defect inspection on the chip. If the chip is found to be intact, the chip is then positioned to prepare for the next step of precise placement. Early developed placement machines all used manual visual inspection and mechanical centering to detect and locate chips. The accuracy and efficiency of their detection and positioning are far from meeting the placement requirements of placement machines. On the one hand, the primitive method of manual visual inspection is easily affected by many subjective factors, such as individual detection standards, physical and psychological conditions, and eye fatigue, which all lead to instability and unreliability of the detection results. In addition, the increase in chip integration and miniaturization bring inevitable troubles to manual detection. Some minor defects can no longer be detected by the human eye. At the same time, the increase in the number of chip output terminals also makes manual visual inspection very inefficient, which cannot keep up with the rapid development of automated production lines and has high labor costs. On the other hand, mechanical centering positioning is a contact-based mechanical positioning method, which is applicable to a limited number of chip types. Using a mechanical clamping head to contact the chip itself may damage the chip pins. The reference of the positioning system is also easily affected by the contact state, resulting in low mechanical positioning accuracy. In addition, the movement of the machine requires a certain amount of time, and its positioning speed and efficiency are not impressive.

With the development of computer technology and digital image processing technology, machine vision has emerged and has been widely used. Its main functions are tracking, identifying and detecting targets. Its main application areas are security monitoring, quality inspection and intelligent robots used to replace places that are difficult for humans to reach. Machine vision is a technology that uses machines to replace human eyes and brains. It is a comprehensive technology with a wide range of applications. It originated in the 1950s. It uses optical devices and non-contact sensors to obtain target images and processes the target images to obtain the required feature information. In addition, machine vision can also transmit the obtained information to the control unit, thereby driving the actuator to make corresponding actions to achieve control and guidance. It can be seen that the machine vision system includes light sources, cameras, lenses, image acquisition cards, computer hardware and software, and related external devices, which respectively realize image acquisition functions, judgment and recognition functions, and automatic control functions. Machine vision overcomes the various drawbacks of traditional manual visual inspection and machine alignment. As a high-precision, high-speed, and high-reliability technology, it is used in the detection and positioning system of placement machines and has become one of the necessary systems for high-performance placement machines. At the same time, in the surface mount technology production line, there are many places where machine vision technology is used, such as positioning the reference point and chip position of the PCB board, detecting the welding quality of the PCB board after mounting, and correcting the parameters of the fixed camera and the flying camera in the mounter, which reduces the difficulty of the mechanical design of the equipment. In summary, the main role of machine vision in the surface mount production line is component capture and placement, detection target, target recognition, navigation and trajectory control, which can be fully reflected in the screen printer, the mounter and the automatic optical inspection equipment. In the whole mounter machine independently studied by the research group used in the research of the present invention, its detection and positioning system is designed based on machine vision, and the schematic diagram of the machine vision system of the mounter is shown in Figure 2.

In the machine vision system of the placement machine in Figure 2, PCB12 is fixed on the PCB support plate 11, the chip 13 is mounted on the PCB12, the placement head 18 is fixed on the XYZθ four-axis motion module, and a suction nozzle 17 is fixed on the placement head 18. The suction nozzle 17 sucks the component 15, and the placement head 18 is driven by the XYZθ four-axis motion module to move in the XYZθ four-axis direction. The placement head 18 drives the suction nozzle 17 and the component 15 to move, and the visual positioning system 19 controls the upward camera 14 and the downward camera 16.

There are two image acquisition devices, namely a reference camera with a downward field of view (also known as a downward-looking camera 16) and a fixed camera with an upward field of view (also known as an upward-looking camera 14). These two cameras belong to two visual subsystems, namely the reference point positioning visual subsystem and the chip detection and positioning visual subsystem. These two subsystems play a vital role in the working process of the placement machine, and their accuracy and speed restrict the working efficiency of the placement machine.

(1) The reference point positioning system uses a reference camera installed on the placement head to collect reference point images. The reference camera moves with the placement head and can reach above the reference points at different positions. After processing and analyzing the collected images, the position of the reference points in the placement machine coordinate system is obtained, thereby determining the position of the PCB board, completing the positioning of the PCB board, and then obtaining the accurate coordinate position of the chip to be mounted.

(2) The detection and positioning system uses a fixed camera installed on the base of the placement machine to collect chip images. The fixed camera cannot move, so the chip image can only be collected by the nozzle installed on the placement head after the chip is sucked up and the placement head moves to the top of the fixed camera. After the chip image is processed and analyzed, the chip detection is completed and the chip positioning information is obtained. When the chip is confirmed to be intact, the chip posture information is fed back to the computer, thereby realizing the chip suction error compensation and preparing for the subsequent precise placement. The present invention studies a chip detection and positioning system. In the process of chip mounting, chip detection and positioning are indispensable processes and also key links. Firstly, the integrity of the chip itself is a prerequisite for mounting. If the chip has solder balls that are too large or too small, the solder balls are not in the correct position, or there is solder leakage or redundant solder balls, subsequent work will become meaningless. Secondly, after determining that the chip has no defects, during the process of the nozzle head sucking the chip, the position sucked by the nozzle head cannot coincide with the center of the chip, and the chip will inevitably produce a deflection angle with the machine coordinate axis of the mounter. If the chip posture is not compensated and corrected, it will be mounted on the PCB board in the wrong position, resulting in failure of the mounting work.

After introducing the workflow of the chip detection and positioning system, it can be found that in addition to the mechanical structure design and software and hardware selection of the system, the image processing method in chip detection and positioning is of paramount importance. The accuracy, speed and robustness of the method will directly affect the accuracy, speed and applicable scope of detection and positioning. Therefore, the present invention mainly studies the detection and positioning method of the chip. In the detection and positioning system of this chip mounter, it is necessary to perform a teaching process and a detection process on the chip. The teaching process is to obtain the data information of the chip after a series of method processes are performed on the complete and defect-free chip without any prior data, and save it in the database as the standard data of the detection process; the detection process is to design a set of methods to obtain the data to be detected from the chip to be detected, and compare it with the standard data. After determining that the various data of the chip are within the standard range, the corresponding method is designed for the chip to complete the positioning process. The teaching process is consistent with the method involved in the detection process, and the method studied by the present invention is applicable to both processes.

Summary of the invention

In view of the deficiencies in the prior art, the technical problem to be solved by the present invention is to provide a visual inspection method for chip placement accuracy. The purpose of the present invention is to complete chip identification and positioning and defect detection. Identification and positioning is to determine the position of the chip and give the result parameters such as the center position coordinates and rotation angle of the chip that meet certain accuracy requirements. Defect detection is to complete the detection of ink dots, missing corners, etc. The method flow, system functions and implementation effects of the chip identification and positioning system implemented in the vc++6.0 environment are introduced and evaluated.

To solve the above technical problems, the present invention is implemented by the following scheme: A chip patch accuracy visual detection method of the present invention includes a chip recognition and positioning system, and the chip recognition and positioning system includes:

a. An image display component, used to display the acquired image and set the template, ink dots, the range of the search area on the image and display the identified search results;

b. Template component, which has functions of selecting template, training template, saving and loading template;

c. an ink dot interface component, which performs ink dot analysis according to the position, range, size and closed value of the ink dot in a, and then displays the border of the ink dot on the image display component;

The chip placement accuracy visual detection method comprises the following steps:

Step 1: Specify the search area on the captured image and perform comparative analysis based on the set similarity and template;

Step 2, marking the analysis result of step 1 on the image display component, and marking the calculated result angle with a border and the center coordinates of the result angle with a cross;

Step 3: When ink dot analysis is optional, the relative position of the ink dot is calculated according to the template range and the position of the ink dot. On each result, ink dot analysis is performed according to the relative position of the ink dot, the search range of the ink dot, the size of the ink dot, and the threshold of the ink dot to determine whether there is an ink dot. If the ink dot exists, the border of the ink dot is displayed on the image display component.

Step 4: The program finally provides the center coordinates, angle, and whether there is an ink dot for each chip found on the image;

Step 5: Set ink dot parameters and search parameters:

The ink dot parameters include ink dot pattern, grayscale closed value, and spot size. When the chip brightness is high and the ink dot brightness is low, the ink dot pattern is black dots with white background. When the chip brightness is low and the ink dot brightness is high, the ink dot pattern is white dots with black background. The grayscale closed value is used to segment the image for connected domain analysis, and the spot size is used to filter out connected domains that do not meet the ink dot size.

The search parameters include at least the number of searches, the similarity score, and the search angle. The number of searches is used to limit the maximum number of chips to be searched in the current scene. The similarity score is used to limit the minimum similarity between the chip and the template. The search angle is used to limit the angle range of the chips that meet the search conditions.

Step 6, implementing chip feature matching according to the ink dot parameters and search parameters set in step 5, wherein the chip feature matching includes feature 1 and feature 2, wherein feature 1 is shape feature matching of a single chip, and feature 2 is corner feature matching of a single chip;

The shape feature matching is obtained based on the length, width and area of the single chip and through connected domain analysis, which is to perform histogram waveform analysis on the filtered single chip image. When there is a closed value that results in a closed connected domain after binarization of the image according to the closed value, the largest one of these connected domains is selected. The connected domain represents the internal area of the chip, and the length, width, area and center of the connected domain are calculated as the shape feature of the single chip.

The corner point feature matching is to extract the corner points in the single chip image for matching.

Furthermore, the chip placement accuracy visual inspection method further includes template processing, and the template processing includes acquiring a template image, preprocessing the template image, determining whether the template selection is appropriate, and template training;

The template image is obtained by dragging a rectangle on the loaded chip image with a mouse;

The template image preprocessing is to preprocess the template image after obtaining the template image and before extracting the template features. The template image preprocessing adopts filtering processing to eliminate the noise in the chip image.

The judgment of whether the template is properly selected is to judge whether the template image is properly selected after the template image is filtered;

The template training is to perform template training when the template is selected. The template training is to extract the template features. The template feature extraction refers to the chip feature matching.

Furthermore, the judgment of whether the template selection is appropriate is based on a multi-objective segmentation method of cluster analysis, and the selected template includes at least a complete chip area to extract its shape features;

First, the histogram waveform analysis is performed on the filtered template image. When there is a grayscale value at a certain trough so that there is a closed connected domain after the image is binarized according to the closed value, and the white is surrounded by a black, then the white is called a closed connected domain, and vice versa. If the area is within a certain range, then the closed value is a reasonable closed value, and the template is selected properly; otherwise, within a certain fluctuation range of the average grayscale of the template, the grayscale of the closed connected domain with an area that meets the requirements is found as a reasonable minimum value. When no reasonable minimum value is found within this range, the template selection is considered unreasonable, and a prompt is given to reselect the template.

Furthermore, the chip placement accuracy visual inspection method further includes a search area processing module. After the template is set, the search area processing module finds the chip contained in a rectangle dragged out of any search area on the chip image according to the following steps:

4.1, Search area image preprocessing: Through filtering, it is used to eliminate various noises in the chip image;

4.2. Multi-target segmentation of search area image: Perform histogram waveform analysis on the search area image to find the grayscale values corresponding to all the troughs. For each grayscale value, use it as the interpretation value to segment the image and analyze it. Filter the linked list according to the shape features of the template to find the grayscale value that meets the conditions the most as the final reasonable interpretation value. Each of the linked lists obtained with it as the interpretation value is a potential chip, and each chip is accurately matched and located.

4.3. Accurate matching of suspected chips and exclusion of defective chips: Take an image block larger than the chip template in each vicinity, perform local histogram waveform analysis, and find a reasonable closed value for the local image block. If it does not exist, discard the suspected chip. If it does exist, first check whether the system requires the ink dot chip to be abandoned. If it is required to exclude the ink dot chip, binarize the local block with a reasonable closed value, and then analyze it. Use the ink dot parameters to filter the linked list. If there are ink dots, it is a defective chip and no longer requires precise positioning. If there are no ink dots, continue to extract the corner point features of the suspected chip and match them with the corner points of the template chip. If the matching degree is greater than the set value, in this system, the closed value is set as the product of the maximum matching point logarithm and the allowed similarity coefficient. Then, a rectangular fitting is performed on the edge of the suspected chip to obtain the angle and center of the suspected chip. If the angle is within the specified search range, it is a qualified chip.

Furthermore, the chip placement accuracy visual inspection method also includes a defective chip elimination module, which detects defective chips through image processing and eliminates chips that fail the inspection.

Furthermore, the defective chip rejection module is used to reject defective ink dot chips, defective angle offset chips, and defective incomplete chips;

The ink dot chip is an ink dot mark made by a wafer circuit inspection machine on the surface of a chip with unqualified electrical performance, and the ink dot mark has an obvious peak on the image histogram;

The angle-shifted chip is a chip whose edge has a certain angle with the horizontal and vertical lines due to the chip's position shift;

The defective chip is a chip with a chip surface having a missing corner or being damaged.

Furthermore, the defective chip rejection module includes an ink spot chip rejection step, an angle deviation chip rejection step, and a defective chip rejection method;

The ink dot chip removal step comprises:

Step 1: Binarize the image of each suspected chip area obtained after rough positioning using a set grayscale value;

Step 2: Perform Blob analysis on the binary suspected chip to obtain a Blob linked list;

Step 3: Filter all connected domains with the specified spot area. After filtering, if there is no connected domain that meets the requirements, it is a qualified chip. Otherwise, it indicates that there are ink spots on the suspected chip, and the chip with ink spots will be removed.

The steps of angle offset chip rejection include:

Step 1: matching the suspected chip with the template chip;

Step 2: If the match is successful, the edge of the connected domain of the suspected chip is fitted with a minimum area circumscribed rectangle to obtain the angle of the chip;

Step 3: Determine whether the angle of the chip is within the allowable range. If it is beyond the allowable range, it will be removed;

The defective chip elimination method is to compare the area of the target chip with the area of the template chip to determine whether the area of the target chip meets the requirements, and then make a decision to eliminate or retain.

Compared with the prior art, the beneficial effects of the present invention are:

1. The chip patch accuracy visual detection method of the present invention first pre-processes the pictures taken by the camera, accurately judges the light intensity through intuitive judgment of the histogram and gray value calculation, analyzes the principles and advantages and disadvantages of various filtering methods, and proposes an adaptive median method for denoising and protecting edge information to effectively remove salt and pepper noise. Based on the gray value image segmentation method, a two-dimensional OTSU method and a watershed method based on the traditional OTSU method are proposed, and the segmentation results and running time of the three methods are analyzed. The OTSU method with the shortest running time and satisfactory segmentation results is still selected.

2. A method for obtaining chip information is proposed. The principles and shortcomings of the traditional crawler method are analyzed, and the eight-neighborhood tracking method is used to extract the contour of the image. At the same time, considering that the OTSU method is global and cannot meet local requirements, the contour is effectively screened again. A k-means clustering method with improved initial center points is proposed to achieve the segmentation of the upper and lower pins, a method based on the minimum circumscribed rectangle of the convex hull is proposed to achieve rough positioning of the chip, and the affine transformation method is used to positively rotate the chip contour. The vertical projection method is used to mark the upper and lower pins, and the pin foot and root are segmented according to the coordinate characteristics. Two parameter detection methods based on the projection method and the direct method are proposed. The accuracy of the methods is compared, and the latter is selected to achieve high-precision chip parameter detection.

3. Aiming at the characteristics of TR type chips, the present invention proposes three chip positioning methods. The method based on image segmentation is based on obtaining the upper and lower foot contours through image segmentation, and is implemented according to the foot fitting straight line and the minimum circumscribed rectangle of the contour. Both edge grayscale matching and edge gradient matching belong to contour matching methods. Both extract edge grayscale values and gradient values as features, respectively, and propose pyramid scaling to improve the efficiency of the method. The possible defects of chip offset angles, missing pins, height offset, and position offset are analyzed, and a defect detection system for the chip is designed according to the characteristics of the defective pins, so that defective chips can be detected.

4. Test the accuracy and stability of the method. The test is divided into two parts: pin parameter method test and positioning method test. The error range of the pin parameter method is within ±0.1mm, and the accuracy of the method meets the requirements. At the same time, the method is basically stable when the illumination changes. The accuracy of the three positioning methods is compared through multiple sets of data. All of them can meet the accuracy requirement of ±0.2°. The time and complexity of the methods are compared, and the positioning method based on image segmentation is selected. At the same time, the stability of the method is tested, and the positioning results of the same chip under different illumination conditions are compared. The results are relatively concentrated, not greatly affected by illumination, and the method is relatively stable.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a visual inspection system for a chip placement machine in the prior art.

FIG. 2 is a structural diagram of a machine vision system of a chip placement machine in the prior art.

FIG3 is a flow chart of chip identification and positioning according to the present invention.

FIG. 4 is a photograph of a qualified template chip and an unqualified template chip according to the present invention and the corresponding closed connected domains and unclosed connected domains.

FIG. 5 is a chip image and an image corrected for uneven illumination of the processing result when the salt and pepper noise intensity is 0.01 according to the present invention.

FIG. 6 is an Otsu binary image and a morphologically processed image of the processing result when the salt and pepper noise intensity is 0.01 according to the present invention.

FIG. 7 is a set of key edge points of solder balls and a least squares fitting solder ball position image of the processing result when the salt and pepper noise intensity is 0.01 according to the present invention.

FIG8 is a chip image and an image corrected for uneven illumination of the processing result when the salt and pepper noise intensity is 0.1 according to the present invention.

FIG. 9 is an Otsu binary image and a morphologically processed image of the processing result when the salt and pepper noise intensity is 0.1 according to the present invention.

FIG. 10 is a set of key edge points of solder balls and a least squares fitting solder ball position image of the processing result when the salt and pepper noise intensity is 0.1 according to the present invention.

FIG. 11 is a flow chart of the teaching process of the present invention.

FIG. 12 is a flow chart of the detection process of the present invention.

Markings in the accompanying drawings: PCB support plate 11, PCB 12, chip 13, upward camera 14, component 15, downward camera 16, suction nozzle 17, patch head 18, and visual positioning system 19.

DETAILED DESCRIPTION

The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more explicit definition of the protection scope of the present invention. Obviously, the embodiments described in the present invention are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

Embodiment 1: The specific structure of the present invention is as follows:

Referring to Figures 3-4, a chip placement accuracy visual inspection method of the present invention includes a chip recognition and positioning system, and the chip recognition and positioning system includes:

a. An image display component, used to display the acquired image and set the template, ink dots, the range of the search area on the image and display the identified search results;

b. Template component, which has functions of selecting template, training template, saving and loading template;

c. an ink dot interface component, which performs ink dot analysis according to the position, range, size and closed value of the ink dot in a, and then displays the border of the ink dot on the image display component;

The chip placement accuracy visual detection method comprises the following steps:

Step 1: Specify the search area on the captured image and perform comparative analysis based on the set similarity and template;

Step 2, marking the analysis result of step 1 on the image display component, and marking the calculated result angle with a border and the center coordinates of the result angle with a cross;

Step 3: When ink dot analysis is optional, the relative position of the ink dot is calculated according to the template range and the position of the ink dot. On each result, ink dot analysis is performed according to the relative position of the ink dot, the search range of the ink dot, the size of the ink dot, and the threshold of the ink dot to determine whether there is an ink dot. If the ink dot exists, the border of the ink dot is displayed on the image display component.

Step 4: The program finally provides the center coordinates, angle, and whether there is an ink dot for each chip found on the image;

Step 5: Set ink dot parameters and search parameters:

The ink dot parameters include ink dot pattern, grayscale closed value, and spot size. When the chip brightness is high and the ink dot brightness is low, the ink dot pattern is black dots with white background. When the chip brightness is low and the ink dot brightness is high, the ink dot pattern is white dots with black background. The grayscale closed value is used to segment the image for connected domain analysis, and the spot size is used to filter out connected domains that do not meet the ink dot size.

The search parameters include at least the number of searches, the similarity score, and the search angle. The number of searches is used to limit the maximum number of chips to be searched in the current scene. The similarity score is used to limit the minimum similarity between the chip and the template. The search angle is used to limit the angle range of the chips that meet the search conditions.

Step 6, implementing chip feature matching according to the ink dot parameters and search parameters set in step 5, wherein the chip feature matching includes feature 1 and feature 2, wherein feature 1 is shape feature matching of a single chip, and feature 2 is corner feature matching of a single chip;

The shape feature matching is obtained based on the length, width and area of the single chip and through connected domain analysis, which is to perform histogram waveform analysis on the filtered single chip image. When there is a closed value that results in a closed connected domain after binarization of the image according to the closed value, the largest one of these connected domains is selected. The connected domain represents the internal area of the chip, and the length, width, area and center of the connected domain are calculated as the shape feature of the single chip.

The corner point feature matching is to extract the corner points in the single chip image for matching.

A preferred technical solution of this embodiment: the chip placement accuracy visual inspection method further includes template processing, and the template processing includes acquiring a template image, preprocessing the template image, judging whether the template selection is appropriate, and template training;

The template image is obtained by dragging a rectangle on the loaded chip image with a mouse;

The template image preprocessing is to preprocess the template image after obtaining the template image and before extracting the template features. The template image preprocessing adopts filtering processing to eliminate the noise in the chip image.

The judgment of whether the template is properly selected is to judge whether the template image is properly selected after the template image is filtered;

The template training is to perform template training when the template is selected. The template training is to extract the template features. The template feature extraction refers to the chip feature matching.

A preferred technical solution of this embodiment: the judgment of whether the template selection is appropriate is based on a multi-target segmentation method of cluster analysis, and the selected template includes at least a complete chip area to extract its shape features;

First, the histogram waveform analysis is performed on the filtered template image. When there is a grayscale value at a certain trough so that there is a closed connected domain after the image is binarized according to the closed value, and the white is surrounded by a black, then the white is called a closed connected domain, and vice versa. If the area is within a certain range, then the closed value is a reasonable closed value, and the template is selected properly; otherwise, within a certain fluctuation range of the average grayscale of the template, the grayscale of the closed connected domain with an area that meets the requirements is found as a reasonable minimum value. When no reasonable minimum value is found within this range, the template selection is considered unreasonable, and a prompt is given to reselect the template.

A preferred technical solution of this embodiment: the chip placement accuracy visual inspection method further includes a search area processing module. After the template is set, the search area processing module finds the chip contained in the rectangle dragged out by any search area on the chip image according to the following steps:

4.1, Search area image preprocessing: Through filtering, it is used to eliminate various noises in the chip image;

4.2. Multi-target segmentation of search area image: Perform histogram waveform analysis on the search area image to find the grayscale values corresponding to all the troughs. For each grayscale value, use it as the interpretation value to segment the image and analyze it. Filter the linked list according to the shape features of the template to find the grayscale value that meets the conditions the most as the final reasonable interpretation value. Each of the linked lists obtained with it as the interpretation value is a potential chip, and each chip is accurately matched and located.

4.3. Accurate matching of suspected chips and exclusion of defective chips: Take an image block larger than the chip template in each vicinity, perform local histogram waveform analysis, and find a reasonable closed value for the local image block. If it does not exist, discard the suspected chip. If it does exist, first check whether the system requires the ink dot chip to be abandoned. If it is required to exclude the ink dot chip, binarize the local block with a reasonable closed value, and then analyze it. Use the ink dot parameters to filter the linked list. If there are ink dots, it is a defective chip and no longer requires precise positioning. If there are no ink dots, continue to extract the corner point features of the suspected chip and match them with the corner points of the template chip. If the matching degree is greater than the set value, in this system, the closed value is set as the product of the maximum matching point logarithm and the allowed similarity coefficient. Then, a rectangular fitting is performed on the edge of the suspected chip to obtain the angle and center of the suspected chip. If the angle is within the specified search range, it is a qualified chip.

A preferred technical solution of this embodiment: the chip mounting accuracy visual inspection method also includes a defective chip elimination module, which detects defective chips through image processing and eliminates chips that fail the inspection.

A preferred technical solution of this embodiment: the defective chip removal module removes defective ink dot chips, defective angle offset chips, and defective incomplete chips;

The ink dot chip is an ink dot mark made by a wafer circuit inspection machine on the surface of a chip with unqualified electrical performance, and the ink dot mark has an obvious peak on the image histogram;

The angle-shifted chip is a chip whose edge has a certain angle with the horizontal and vertical lines due to the chip's position shift;

The defective chip is a chip with a chip surface having a missing corner or being damaged.

A preferred technical solution of this embodiment: the defective chip removal module includes an ink spot chip removal step, an angle deviation chip removal step and a defective chip removal method;

The ink dot chip removal step comprises:

Step 1: Binarize the image of each suspected chip area obtained after rough positioning using a set grayscale value;

Step 2: Perform Blob analysis on the binary suspected chip to obtain a Blob linked list;

Step 3: Filter all connected domains with the specified spot area. After filtering, if there is no connected domain that meets the requirements, it is a qualified chip. Otherwise, it indicates that there are ink spots on the suspected chip, and the chip with ink spots will be removed.

The steps of angle offset chip rejection include:

Step 1: matching the suspected chip with the template chip;

Step 2: If the match is successful, the edge of the connected domain of the suspected chip is fitted with a minimum area circumscribed rectangle to obtain the angle of the chip;

Step 3: Determine whether the angle of the chip is within the allowable range. If it is beyond the allowable range, it will be removed;

The defective chip elimination method is to compare the area of the target chip with the area of the template chip to determine whether the area of the target chip meets the requirements, and then make a decision to eliminate or retain.

Embodiment 2:

The following is a detailed implementation process of the chip placement accuracy visual detection method of the present invention:

2. Overall system design:

2.1 The main task of the vision system of the fully automatic placement machine is to complete the recognition and positioning of the chip and defect detection. Recognition and positioning is to determine the position of the chip and give the result parameters such as the center position coordinates and rotation angle of the chip that meet certain accuracy requirements. Defect detection is to complete the detection of ink dots, missing corners, etc. The method flow, system functions and implementation effects of the chip recognition and positioning system implemented in the vc++6.0 environment are introduced and evaluated.

2.2 Design of chip identification and positioning system workflow:

Studying image recognition methods and processes is the key to visual recognition systems. The system recognition accuracy and speed are mainly reflected in the visual methods and recognition processes. What methods and processes should be adopted to obtain accurate component information at the fastest speed to achieve component recognition while meeting the component recognition accuracy requirements is one of the key issues studied in this section.

During the execution of the visual system of the fully automatic placement machine, the following order is usually followed: parameter setting, template setting, chip identification and positioning, and defective chip removal. The basic processing flow of the present invention is shown in FIG3 .

2.2.1 Parameter settings and feature description:

According to actual requirements, the parameters in this system mainly include two parts: ink dot parameters and search parameters.

(1) Ink dot parameters

The ink dot parameters are mainly used to determine whether there are artificially marked ink dots on the chip during defective chip detection, mainly including ink dot mode, grayscale closing value, and spot size. When the chip brightness is high and the ink dot brightness is low, the ink dot mode is "black dots with white background", and when the chip brightness is low and the ink dot brightness is high, the ink dot mode is "white dots with black background". The grayscale closing value is used to segment the image for connected domain analysis. The spot size is used to filter out connected domains that do not meet the ink dot size.

(2) Search parameters

The search parameters mainly include the number of searches, similarity score, search angle, etc. The number of searches is used to limit the maximum number of chips to be searched in the current scene. The similarity score is used to limit the minimum similarity between the chip and the template. The search angle is used to limit the angle range of the chips that meet the search conditions.

The feature matching scheme adopted by this system includes two types of features. These two features and their extraction methods are described as follows.

(1) Shape characteristics of a single chip, such as length, width, and area

The shape features of a single chip are obtained through connected domain analysis. First, the filtered single chip image is analyzed by histogram waveform. If there is a closed value that results in a closed connected domain after the image is binarized according to the closed value, then the largest of these connected domains is selected, and the connected domain represents the internal area of the chip. The length, width, area, and center of the connected domain are calculated as the shape features of the single chip.

(2) Corner features of a single chip:

Among several corner point extraction methods, the method has high efficiency and strong noise resistance. Therefore, the present invention selects the corner point extraction method to extract the corner points in the single-chip image.

2.2.2 Template processing:

The chip identification and positioning system implemented by the present invention is implemented based on template matching. Therefore, before accurately positioning a qualified chip, the chip template must first be set and the features of the chip template must be extracted.

(1) Acquisition of template image:

The template image can be obtained by dragging a rectangular selection on the loaded chip image with the mouse.

(2) Template image preprocessing:

After obtaining the template image, the template image must be preprocessed before extracting the template features. The main processing is filtering, which is used to eliminate various noises in the chip image. Since filtering can well protect the edges and corners of the chip image while filtering out the noise in the image, it is very suitable for the idea of image matching based on features in this paper. Therefore, the present invention selects filtering.

(3) Whether the template selection is appropriate:

After the template image is filtered, it is first necessary to judge whether the template image is properly selected. Since the present invention adopts a multi-target segmentation method based on cluster analysis, it is required that the selected template must include at least a complete chip area to extract its shape features. First, the filtered template image is subjected to a histogram waveform analysis. If there is a grayscale value of a certain trough so that a closed connected domain exists after the image is binarized according to the closed value, such as a white surrounded by a black, then the white is called a closed connected domain, and vice versa, and the area is within a certain range, then the closed value is a reasonable closed value, and the template is properly selected. Otherwise, within a certain fluctuation range of the average grayscale of the template, the grayscale of the closed connected domain with an area that meets the requirements is found as a reasonable value. If no reasonable value can be found within this range, it is considered that the template selection is unreasonable, and a prompt is given to reselect the template. As shown in Figure 4, qualified template chips and unqualified template chips and their corresponding closed connected domains and unclosed connected domains are shown.

(4) Template training

When the template is selected, the template training can be performed, that is, the extraction of template features. As mentioned above, the template features include two aspects of features. The shape feature extraction method is to use a reasonable threshold to binarize the template image, analyze the binarized image, select the largest of these connected domains, and calculate the length, width, area, and center of the connected domain as the shape feature of the template. The corner feature extraction method is to use the SUSAN method to extract feature points from the template image and calculate the features.

2.2.3 Search Area Processing

After the template is set, for any search area, drag the rectangle on the chip image to find the chip it contains according to the following steps:

(1) Search area image preprocessing

The main process is filtering, which is used to eliminate various noises in the chip image. The present invention uses filtering.

(2) Multi-target segmentation of search area images

Perform histogram waveform analysis on the search area image to find the grayscale values corresponding to all the troughs. For each grayscale value, use it as the threshold to segment the image and analyze it. Filter the linked list according to the shape characteristics of the template to find the grayscale value that meets the conditions the most as the final reasonable threshold. Each of the linked lists obtained with it as the threshold is a potential chip that needs to be accurately matched and located.

(3) Accurate matching of suspected chips and elimination of defective chips

Take an image block slightly larger than the chip template in each vicinity, perform local histogram waveform analysis, and find a reasonable closed value for the local image block. If it does not exist, discard the suspected chip. If it does exist, first check whether the system requires the ink dot chip to be abandoned. If it is required to exclude the ink dot chip, first use a reasonable closed value to binarize the local block, then analyze it, and use the ink dot parameter to filter the linked list. If there is an ink dot, it is a defective chip and no longer needs to be accurately positioned. If there is no ink dot, continue to extract the corner point features of the suspected chip and match them with the corner points of the template chip. If the matching degree is greater than the set interpretation value, in this system, the closed value is set as the product of the maximum matching point logarithm and the allowed similarity coefficient, then the edge of the suspected chip is rectangular fitted to obtain the angle and center of the suspected chip. If the angle is within the limited search range, it is a qualified chip.

2.2.4 Defective chip removal

The inherent characteristic of semiconductor chip manufacturing is the irrecoverability of defects in the manufacturing process. Defective chips will not be able to be recovered, resulting in a serious loss of yield. Chip defect detection is to detect defective chips through image processing methods and eliminate unqualified chips. It is a very important part of visual inspection. Figure 1 shows several common defective chips, including ink dot chips, defective chips, angle offset chips, etc.

In the present invention, defective chips mainly refer to ink dot chips. Ink dot chips are the most common type of defective chips. Ink dots are marks made by the wafer circuit inspection machine on the surface of chips with unqualified electrical performance. Ink dots are generally stable in color, position, size and shape, and have obvious peaks on the image histogram. Other types of defective chips include angle-shifted chips, defective chips, etc. An angle-shifted chip refers to a chip whose edge has a certain angle with the horizontal and vertical lines due to position offset. A defective chip refers to a chip with missing corners, damage, etc. on the surface of the chip. In the present invention, a corresponding method is also adopted to eliminate such defective chips.

(1) Removal of ink dot chips

The detection of ink dot chips requires the set ink dot parameters "grayscale value" and "spot area". The basic idea of ink dot detection is to find a connected domain composed of black pixels in the ink dot detection area. If such a connected domain exists, determine whether its area is greater than the set closed value. If it is greater than the value, it is determined that there are ink dots in the chip.

Here are the steps:

(a) After rough positioning, each suspected chip area is binarized using a set grayscale value;

(b) Performing Blob analysis on the binary suspected chip to obtain a Blob linked list;

(c) All connected domains are filtered using the specified spot area. If there are no connected domains that meet the requirements after filtering, it means that there may be qualified chips. Otherwise, it means that there are ink spots on the suspected chip and it should be discarded.

(2) Elimination of other defective chips

The elimination of angle-shifted chips requires the set "search angle range" parameter. First, angle detection is performed. The task of angle detection is to calculate the chip angle, and then determine whether the chip has angle shifted based on the calculated result, and whether the chip angle shift is within the allowable range. The chip angle here refers to the angle between the lower edge or upper edge of the chip and the axis.

Here are the steps:

(a) The suspected chip is matched with the template chip;

(b) If the match is successful, the minimum area circumscribed rectangle is fitted to the edge of the connected domain of the suspected chip, thereby obtaining the angle of the chip;

(c) Determine whether the angle of the chip is within the allowable range. If it is beyond the allowable range, it will be rejected.

The removal of defective chips is mainly done by comparing the target chip with the template chip area to determine whether the chip area meets the requirements, and then making a decision to remove or retain it.

As shown in Figure 11-12, before the chip mounter mounts the chip, it is necessary to perform defect detection and position acquisition on the chip. On the one hand, it is used to ensure the integrity of the chip to be mounted and remove defective chips; on the other hand, it is used to obtain the position information of the chip to be mounted for subsequent position compensation of the chip. In summary, in the workflow of the chip mounter, defect detection and position acquisition of the chip are the key to ensure that the chip can be mounted correctly. In the detection and positioning system of the chip of this chip mounter, the chip needs to be taught and tested. The teaching process is to obtain the chip data information after a series of method processes for the complete and defect-free chip without any prior data, and save it in the database as the standard data of the detection process; the detection process is to design a set of methods to obtain the data required for detection from the chip to be detected, and compare it with the standard data. After confirming that all the data of the chip are within the standard range, the corresponding method is designed for the chip to complete the positioning process. The flowchart of the teaching process is shown in Figure 11, and the detection process is shown in Figure 12. It can be seen that the teaching process and the detection process of the chip are completely consistent in the image preprocessing and image feature extraction steps. The method has high reusability and reduces the memory occupied by the method. When detecting and positioning the chip, it is first necessary to select an intact chip as the input image of the teaching process, obtain the data information of the chip and save it in the database, and then use the same type of chip to be detected as the input image of the detection process to realize chip defect detection without prior data. After confirming that the chip has no defects, the chip is positioned to prepare for the placement machine to achieve precise placement.

In order to verify the robustness of the method, it is necessary to add salt and pepper noise of different intensities to the acquired original image, and apply the detection and positioning method designed by the present invention to the chip image after the noise is added. The intensity of the salt and pepper noise is gradually increased from 0.01 to 0.1, and the step size is 0.01. Figures 5-7 are schematic diagrams of the processing results of each step of the method when the salt and pepper noise intensity is 0.01, and Figures 8-10 are schematic diagrams of the processing results of each step of the method when the salt and pepper noise intensity is 0.1.

It can be seen from Figures 5-7 and 8-10 that after adding salt and pepper noise of different intensities, after image preprocessing algorithms such as illumination unevenness correction, maximum inter-class variance method, and morphological opening and closing operations, the chip image contaminated by salt and pepper noise can also obtain an ideal binary image. The subsequent extraction of the key edge point set of the solder ball is not affected by the noise, and the least squares circle fitted by the solder ball key point set is accurate. Table 1 lists the results of chip detection and positioning after being contaminated by salt and pepper noise of different intensities:

From the test results, it can be seen that after adding salt and pepper noise of different intensities, the detection and positioning results of the chip are very stable, the detection results of the number of solder balls remain unchanged, the maximum error of the change in solder ball diameter is 0.03mm, the maximum error of the x offset between the chip center and the image center is 0.021mm, the maximum error of the y offset between the chip center and the image center is 0.016mm, and the maximum error of the chip deflection angle is 0.186 degrees, which can well meet the placement accuracy of the placement machine.

The following are the differences between the present invention and the prior art:

(1) First, the images taken by the camera are preprocessed, and the light intensity is accurately judged through intuitive judgment of the histogram and grayscale value calculation. The principles and advantages and disadvantages of various filtering methods are analyzed, and an adaptive median algorithm that removes noise and protects edge information is proposed to effectively remove salt and pepper noise. Based on the grayscale image segmentation method, a two-dimensional OTSU algorithm and a watershed algorithm based on the traditional OTSU algorithm are proposed. The segmentation results and running time of the three methods are analyzed, and the OTSU algorithm with the shortest running time and satisfactory segmentation results is still selected.

(2) An algorithm for acquiring chip information is proposed. The principles and shortcomings of the traditional crawler method are analyzed, and the eight-neighborhood tracking algorithm is used to extract the contour of the image. At the same time, considering that the OTSU algorithm is global and cannot meet local requirements, the contour is effectively screened again. An improved k-means clustering algorithm with the initial center point is proposed to achieve the segmentation of the upper and lower pins. A method based on the minimum circumscribed rectangle of the convex hull is proposed to achieve rough positioning of the chip, and the affine transformation method is used to correct the chip contour. The vertical projection method is used to mark the upper and lower pins, and the pin foot and root are segmented according to the coordinate characteristics. Two parameter detection methods based on the projection method and the direct method are proposed. The accuracy of the algorithm is compared, and the latter is selected to achieve high-precision chip parameter detection.

(3) Aiming at the characteristics of TR type chips, this patent proposes three chip positioning methods. The method based on image segmentation is based on obtaining the upper and lower foot contours through image segmentation, and is implemented according to the foot fitting straight line and the minimum circumscribed rectangle of the contour. Both edge grayscale matching and edge gradient matching belong to contour matching methods. Both extract edge grayscale values and gradient values as features, respectively, and propose pyramid scaling to improve the efficiency of the algorithm. The possible defects of chip offset angles, missing pins, height offset, and position offset are analyzed, and a defect detection system for the chip is designed according to the characteristics of the defective pins, so that defective chips can be detected.

(4) The test algorithm mainly tests the accuracy and stability of the algorithm. The test is divided into two parts: pin parameter algorithm test and positioning algorithm test. The error range of the pin parameter algorithm is within ±0.1mm, and the algorithm accuracy meets the requirements. At the same time, when the illumination changes, the algorithm basically remains stable. The accuracy of the three positioning algorithms is compared through multiple sets of data. They can all meet the accuracy requirement of ±0.2°. The algorithm time and complexity are compared, and the positioning method based on image segmentation is selected. At the same time, the stability of the method is tested, and the positioning results of the same chip under different illumination conditions are compared. The results are relatively concentrated, not greatly affected by illumination, and the algorithm is relatively stable.

The above description is only a preferred embodiment of the present invention, and does not limit the scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the present invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the protection scope of the present invention.

Claims (7)

1. The chip patch precision visual detection method is characterized by comprising a chip identification and positioning system, wherein the chip identification and positioning system comprises the following components:

a. An image display component for displaying the acquired image and setting a template, ink points, a range of search areas on the image and displaying the identified search results;

b. The template component is provided with a template selection, a template training, a template storage and a template loading;

c. the ink dot interface component is used for analyzing the ink dots according to the positions, the ranges, the sizes and the closing values of the ink dots in the a, and displaying the frames of the ink dots on the image display component;

the chip patch precision visual detection method comprises the following steps:

Step one, designating a search area on a captured image, and comparing and analyzing according to the set similarity and a template;

Marking the analysis result in the first step on the image display component, and marking the calculated result angle marking frame and the center coordinates of the result angle marking frame by a cross;

Thirdly, when the ink dot analysis is optional, calculating the relative position of the ink dot according to the template range and the position of the ink dot, carrying out ink dot analysis on each result according to the relative position of the ink dot, the searching range of the ink dot, the size of the ink dot and the threshold value of the ink dot, judging whether the ink dot exists, and displaying the frame of the ink dot on the image display component when the ink dot exists;

Step four, the program finally provides the searched central coordinates and angles of each chip on the image and whether ink points exist or not;

step five, setting ink point parameters and search parameters:

The ink dot parameters comprise an ink dot mode, a gray scale closed value and a spot size, wherein the ink dot mode is a black dot white background when the brightness of a chip is higher and the brightness of the ink dot is lower, the ink dot mode is a white dot black background when the brightness of the chip is lower and the brightness of the ink dot is higher, the gray scale closed value is used for dividing an image to perform connected domain analysis, and the spot size is used for filtering out the connected domain which does not accord with the size of the ink dot;

the search parameters at least comprise search number, similarity score and search angle, wherein the search number is used for limiting the number of chips which are searched most in the current scene, the similarity score is used for limiting the minimum similarity degree of the chips and the templates, and the search angle is used for limiting the angle range of the chips which meet the search condition;

Step six, according to the ink dot parameters and the search parameters set in the step five, chip feature matching is implemented, wherein the chip feature matching comprises feature one and feature two, the feature one is single chip shape feature matching, and the feature two is single chip corner feature matching;

The shape feature matching is obtained according to the length, width and area of a single chip and through connected domain analysis, wherein the shape feature matching is to conduct histogram waveform analysis on a filtered single chip image, when a certain closed value exists to enable the image to be binarized according to the closed value and then a closed connected domain exists, the largest one of the connected domains is selected, the connected domain represents the inner area of the chip, and the length, width, area and center of the connected domain are calculated and used as the shape feature of the single chip;

the corner feature matching is to extract corners in the single chip image for matching.

2. The chip mounting precision visual inspection method according to claim 1, further comprising template processing, wherein the template processing comprises template image acquisition, template image preprocessing, template selection judging whether the template is proper or not, and template training;

the template image is obtained by dragging a rectangle on the loaded chip image by using a mouse;

The preprocessing of the template image is to preprocess the template image after the template image is obtained and before the template features are extracted, and the preprocessing of the template image adopts filtering processing to eliminate noise in the chip image;

Judging whether the template is properly selected or not when the template image is subjected to filtering treatment, and judging whether the template image is properly selected or not;

The template training is to perform template training when a template is selected, wherein the template training is extraction of template features, and the extraction of the template features refers to the chip feature matching.

3. The visual inspection method of chip mounting accuracy according to claim 2, wherein the template selection is a multi-objective segmentation method based on mass analysis, the selected template including at least one complete chip area to extract its shape features;

Firstly, carrying out histogram waveform analysis on a filtered template image, when a gray value of a certain trough exists so that a closed connected domain exists after binarizing the image according to the closed value, wherein white is surrounded by black, the white is called as the closed connected domain, and vice versa, and the area is in a certain range, the closed value is a reasonable closed value, and the template is selected properly; otherwise, searching the gray level of the closed connected domain with the available area meeting the requirement in a certain fluctuation range of the average gray level of the template to be used as a reasonable girlfriend value, and when the reasonable threshold value cannot be found in the range, judging that the template selection is unreasonable, and prompting the template reselection.

4. The visual inspection method of chip mounting accuracy according to claim 1, further comprising a search area processing module, wherein the search area processing module is configured to find the chip contained in any rectangle dragged by the search area on the chip image after the template is set, according to the following steps:

4.1, search area image preprocessing: the method is used for eliminating various noises in the chip image through filtering;

4.2, search area image multi-target segmentation: carrying out histogram waveform analysis on the search area image, finding gray values corresponding to all wave troughs, dividing the image by taking each gray value as an illustration value, analyzing, filtering a linked list according to the shape characteristics of a template, finding the most gray value meeting the condition as a final reasonable illustration value, taking each linked list obtained by taking the gray value as the illustration value as a potential chip, and carrying out accurate matching and positioning on each chip;

4.3, accurately matching suspected chips and eliminating defective chips: and (3) taking an image block larger than a chip template nearby each image block, carrying out local histogram waveform analysis, finding out a reasonable closed value of the local image block, discarding the suspected chip if the reasonable closed value does not exist, firstly checking whether the system requires discarding the ink dot chip, binarizing the local block by using the reasonable closed value when the ink dot chip is required to be removed, carrying out analysis, filtering a linked list by using ink dot parameters, if the ink dot exists, carrying out accurate positioning no longer, if the ink dot does not exist, continuing to extract the corner characteristic of the suspected chip, matching with the corner of the template chip, if the matching degree is larger than the set value, setting the closed value as the product of the maximum matching point logarithm and the allowable similarity coefficient, carrying out rectangular fitting on the edge of the suspected chip, and obtaining the angle and the center of the suspected chip, and if the angle is within a limited search range, obtaining the qualified chip.

5. The visual inspection method of chip mounting accuracy according to claim 1, further comprising a defective chip removing module that detects defective chips by image processing and rejects chips that are not qualified for inspection.

6. The visual inspection method of chip mounting accuracy according to claim 5, wherein the defective chip removing module removes defective ink dot chips, defective angle offset chips, defective chips;

The ink dot chip is an ink dot mark marked on the surface of the chip with unqualified electrical performance by the wafer circuit detector, and the ink dot mark has obvious peak value on an image histogram;

The angle offset chip is a chip with a certain included angle between the edge of the chip and the horizontal and vertical lines due to the offset of the chip;

The incomplete chip is a chip with unfilled corners and broken surfaces.

7. The method according to claim 6, wherein the defective chip removing module includes an ink dot chip removing step, an angle offset chip removing step, and a defective chip removing method;

The ink dot chip removing step comprises the following steps:

Firstly, binarizing an image by adopting a set gray-scale value in each suspected chip area obtained after coarse positioning;

secondly, performing Blob analysis on the binary suspected chip to obtain a Blob linked list;

step three, filtering all the connected domains by using the appointed spot area, if the connected domains meeting the requirements are not available after the filtering is finished, the chips are qualified, otherwise, the suspected chips are indicated to have ink points, and the chips with the ink points are removed;

The angle offset chip removing step comprises the following steps:

step one, matching a suspected chip with a template chip;

If the matching is successful, performing minimum area circumscribed rectangle fitting on the edge of the communication domain of the suspected chip, thereby obtaining the angle of the chip;

judging whether the angle of the chip is within an allowable range or not, and if the angle exceeds the allowable range, rejecting;

the incomplete chip removing method is to compare the area of the target chip with the area of the template chip to judge whether the area of the target chip meets the requirement or not, so as to make a removing or retaining decision.