CN118550747A - PCIe fatal error quick positioning method, system, electronic equipment and medium - Google Patents

Abstract

The disclosure provides a method, a system, electronic equipment and a medium for quickly positioning PCIe fatal errors, belongs to the field of PCIe error positioning, and aims to solve the problem that the PCIe fatal errors cannot be effectively positioned by the traditional method and the problem that the processing progress of the problem cannot meet the production or user requirements. The method comprises the following steps: under the condition that PCIe equipment is in error, abnormal information is reported to PCIe root nodes of the CPU; the abnormal information carries an error type; determining an on-condition of an advanced error reporting function in case the error type is an unrecoverable fatal error; under the condition that the advanced error reporting function is not started, according to BIOS setting, a query command is sent to the PCIe equipment to obtain information of the PCIe equipment; and storing the information of the PCIe device to a baseboard management controller.

Description

A PCIe fatal error rapid positioning method, system, electronic device and medium

Technical Field

The present disclosure relates to the field of PCIe error positioning, and in particular to a method, system, electronic device and medium for quickly positioning a PCIe fatal error.

Background Art

In the server, most of the internal transmission of data information is transmitted using PCIe (peripheral component interconnect express) signals. In the process of PCIe information transmission, due to the extremely fast link transmission rate and abnormal port information processing, PCIe link abnormality errors are often caused.

Fatal errors require a system restart on the link, resulting in data loss. As a result, for fatal errors that occur after a long period of work or occur probabilistically, it is impossible to effectively locate the location of the error or find the cause of the error, which complicates the processing process and the problem handling progress cannot meet production or user requirements.

Therefore, there is an urgent need for a method that can quickly locate the PCIe link position and error cause of a fatal error.

Summary of the invention

In order to overcome the problems existing in the related art, the present disclosure provides a method, system, electronic device and medium for quickly locating PCIe fatal errors. The technical solution of the present disclosure is as follows:

According to a first aspect of an embodiment of the present disclosure, a method for quickly locating a PCIe fatal error is provided, the method comprising:

When an error occurs in a PCIe device, report abnormal information to the PCIe root node of the CPU; the abnormal information carries the error type; the error type includes: recoverable error, unrecoverable non-fatal error and unrecoverable fatal error;

In the case where the error type is an unrecoverable fatal error, determining whether an advanced error reporting function is enabled;

When the advanced error reporting function is not enabled, according to the BIOS setting, a query command is sent to the PCIe device to obtain information of the PCIe device; the information includes at least one or more of the following: identification information of the error device, the cause of the error, all error configuration space register information in the configuration space of the PCIe device, and configuration space register information of the upper layer device to which the PCIe device belongs;

The information of the PCIe device is stored in a baseboard management controller.

Optionally, sending a query command to the PCIe device according to BIOS settings to obtain information of the PCIe device includes:

According to the BIOS setting, a first query command is sent to the error device through the PCIe link; the error device is: the PCIe device that reports the abnormal information;

In the case where the erroneous device responds to the first query command, querying the configuration space register of the erroneous device to obtain the error cause of the erroneous device and all erroneous configuration space register information in the configuration space of the erroneous device;

In the case that the erroneous device does not respond to the first query command, determining an upper layer device to which the erroneous device belongs;

Sending a second query command to an upper layer device to which the erroneous device belongs;

When the upper layer device to which the erroneous device belongs responds to the second query command, the configuration space register of the upper layer device to which the erroneous device belongs is queried to obtain the error cause of the erroneous device and the configuration space register information of the upper layer device to which the erroneous device belongs.

Optionally, storing the information of the PCIe device in a baseboard management controller includes:

Collecting target information transmitted between the CPU and the PCIe device;

Collecting target log information related to the running status of the PCIe device from the log information of the PCIe device;

The information of the PCIe device, the target information and the target log information are stored in the baseboard management controller.

Optionally, before reporting the abnormal information to the PCIe root node of the CPU, the method further comprises: detecting whether an error occurs in the running state of the PCIe device according to PCIe specification requirements;

In the case where an error occurs in the PCIe device, registering relevant data corresponding to the abnormal information in a configuration space register of the PCIe device; the relevant data corresponding to the abnormal information includes the error type;

According to the relevant data corresponding to the abnormal information, the abnormal information carrying the error type is generated. Optionally, when the error type is an unrecoverable fatal error and the advanced error reporting function is enabled, the method further includes:

From the uncorrectable error status register, obtain the error cause in the relevant data corresponding to the exception information; the relevant data corresponding to the exception information is: the PCIe device automatically uploads the uncorrectable error status register and the error status severity register; the relevant data corresponding to the exception information also includes: all error configuration space register information in the configuration space corresponding to the advanced error reporting function.

Optionally, the method further comprises:

In response to the reporting of the abnormal information, triggering an interrupt event corresponding to the error type according to the error type;

After storing the information of the PCIe device in the baseboard management controller, the method further includes:

Obtaining a preset processing solution; the preset processing solution includes: processing methods corresponding to each error type; the processing methods include: shielding errors, resetting the device, and restarting the system;

Determine a target processing method according to the preset processing scheme and the error type carried by the abnormal information;

Processing the error occurring in the PCIe device according to the target processing method;

After the error occurring in the PCIe device is processed, the interrupt event is released.

Optionally, the method further comprises:

When the error type is the recoverable error or the unrecoverable non-fatal error, the interrupt event is released.

According to a second aspect of an embodiment of the present disclosure, a fast positioning system for PCIe fatal errors is provided, the fast positioning system for PCIe fatal errors comprising: a PCIe device, a CPU, a BIOS and a baseboard management controller; the PCIe device is used to report abnormal information to a PCIe root node of the CPU when an error is detected in itself; the abnormal information carries an error type; the error type comprises: a recoverable error, an unrecoverable non-fatal error and an unrecoverable fatal error;

The PCIe fatal error rapid positioning system is used to determine the activation status of the advanced error reporting function when the error type is an unrecoverable fatal error;

The PCIe fatal error rapid positioning system is used to send a query command to the PCIe device according to the BIOS setting when the advanced error reporting function is not enabled, so as to obtain information of the PCIe device; the information includes at least one or more of the following: identification information of the error device, the cause of the error, all error configuration space register information in the configuration space of the PCIe device, and configuration space register information of the upper layer device to which the PCIe device belongs;

The baseboard management controller is used to store the information of the PCIe device.

According to a third aspect of an embodiment of the present disclosure, there is provided an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the method for rapidly locating a PCIe fatal error as described in the first aspect are implemented.

According to a fourth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method for quickly locating a PCIe fatal error as described in the first aspect are implemented.

According to a fifth aspect of an embodiment of the present disclosure, a computer program product is provided, including a computer program, which, when executed by a processor, implements the steps of the method for quickly locating PCIe fatal errors described in the first aspect.

In the embodiment of the present disclosure, when PCIe reports exception information, it can carry the error type to which the exception information belongs, so that by classifying the errors, the system can take corresponding processing measures according to the severity and type of the errors, thereby ensuring the stability of the system and the integrity of the data; when the error type is an unrecoverable fatal error and the advanced error reporting function is not enabled, the present disclosure obtains the relevant information of the PCIe device that reports the exception information according to the BIOS settings, and can obtain the error record information and the cause of the problem in the configuration space register of the erroneous device through a query command, thereby quickly determining the location and cause of the erroneous device; by analyzing the cause of the error, it is possible to avoid and optimize the design in subsequent designs to reduce the occurrence of similar problems.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the description of the embodiments of the present disclosure will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

FIG1 is a schematic diagram of the steps of a method for quickly locating a PCIe fatal error according to an embodiment of the present disclosure;

FIG2 is a flowchart of an error location shown in an embodiment of the present disclosure;

FIG3 is a problem handling flow chart shown in an embodiment of the present disclosure;

FIG4 is a hardware architecture diagram of a system for quickly locating a PCIe fatal error shown in an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of an electronic device according to an embodiment of the present disclosure.

DETAILED DESCRIPTION

The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

The terms "first", "second", etc. in the specification and claims of the present disclosure are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable when appropriate, so that the embodiments of the present disclosure can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and/or" in the specification and claims represents at least one of the connected objects, and the character "/" generally indicates that the objects associated with each other are in an "or" relationship.

In the relevant technical background, for unrecoverable fatal errors, the system resets the PCIe link by restarting. This processing method will cause data loss, and it is impossible to obtain the cause of the error in the PCIe device. This will make the repair efficiency of fatal errors that occur after a long period of work or occur probabilistically unable to meet production or user requirements.

In order to solve the above technical problems, the present disclosure proposes a method and system for quickly locating a PCIe fatal error, which can ensure that a PCIe device with a fatal error can be quickly located and the cause of the error of the PCIe device can be obtained.

First, for ease of understanding, some nouns or terms that appear in the description of the embodiments of the present disclosure are explained as follows:

BIOS (Basic Input Output System): is an industry-standard firmware interface whose main function is to provide the lowest-level and most direct hardware settings and controls for the computer.

PCIe: is a high-speed serial expansion bus standard used to connect external devices in computer systems, such as graphics cards, network adapters, storage controllers, etc.

PCIe root node: The initial location of the PCIe tree topology, representing the CPU to communicate with the rest of the system. BMC (Baseboard Management Controller): Performs out-of-band management of the server and performs a series of monitoring and control functions.

A method for quickly locating a PCIe fatal error provided by an embodiment of the present disclosure is applied to a system for quickly locating a PCIe fatal error. The system for quickly locating a PCIe fatal error includes: a PCIe device, a CPU, a BIOS, and a baseboard management controller, wherein the CPU includes a PCIe root node.

FIG1 is a schematic diagram of the steps of a method for quickly locating a PCIe fatal error shown in an embodiment of the present disclosure. As shown in FIG1 , the method for quickly locating a PCIe fatal error may specifically include the following steps:

Step S11: When an error occurs in the PCIe device, report abnormal information to the PCIe root node of the CPU; the abnormal information carries the error type; the error type includes: recoverable error, unrecoverable non-fatal error and unrecoverable fatal error.

The PCIe specification contains requirements and guidelines for error reporting that define how PCIe devices should report various types of errors and what error information they should provide.

PCIe devices usually automatically detect errors through hardware and firmware. These errors may involve transmission problems, power problems, configuration errors, etc., which can help improve system stability and reliability, as well as quickly diagnose and solve problems.

According to the PCIe specification requirements, the PCIe device automatically detects errors and registers them in the configuration space register. The PCIe device selects the error type to which the current error belongs based on the various pre-set error types, and reports the error message carrying the error type to the register of the PCIe root node. After receiving the error message reported by the PCIe device, the PCIe root node generates a corresponding interrupt event based on the error type carried by the error message. The error types include: recoverable errors, unrecoverable non-fatal errors, and unrecoverable fatal errors. For recoverable errors and unrecoverable non-fatal errors, the system can handle them by itself. Since it will not cause the system to restart, the relevant data of the PCIe device error will not be lost; for unrecoverable fatal errors, resetting the PCIe link by restarting the system in the related technology will cause data loss to a certain extent. Among them, in an optional embodiment, before reporting the abnormal information to the PCIe root node of the CPU, according to the PCIe specification requirements, it is detected whether an error occurs in the operating status of the PCIe device; when an error occurs in the PCIe device, the relevant data corresponding to the abnormal information is registered in the configuration space register of the PCIe device; the relevant data corresponding to the abnormal information includes the error type; based on the relevant data corresponding to the abnormal information, the abnormal information carrying the error type is generated.

The configuration space registers of a PCIe device are a set of registers used to store device configuration and identification information, located in a fixed address range for each PCIe device. These registers contain important information about the device, such as device ID, vendor ID, interrupt information, resource allocation, etc. Registers can contain detailed information about errors, exceptions, or warnings encountered by the device.

The PCIe device can automatically detect errors, including transmission rate, link status, etc., through hardware and firmware according to specification requirements; when an error occurs in the PCIe device, the relevant data corresponding to the exception information is registered in the configuration space register of the PCIe device; and the error type corresponding to the error is determined according to the setting, so that the relevant data corresponding to the exception information includes the error type; based on the relevant data corresponding to the exception information, the exception information carrying the error type is generated.

By adopting the embodiments of the present disclosure, the PCIe device can automatically detect errors without manual intervention, thereby improving the reliability and stability of the system; the error information is recorded in the configuration space register of the device, which is convenient for subsequent problem analysis and troubleshooting; and the exception information carrying the error type is generated, and when the exception information is sent to the PCIe root node, measures corresponding to the error type can be taken, thereby improving the efficiency of error location and identification.

Step S12: when the error type is an unrecoverable fatal error, determining the enabling status of the advanced error reporting function.

The Advanced Error Reporting function is a standard mechanism defined by the PCIe specification for reporting various types of advanced errors to the host system. In related technologies, PCIe error reporting is implemented through the AER function, which provides a unified way to report various errors that may occur in PCIe devices, including but not limited to transmission errors, data check errors, link layer errors, etc.

Among them, in an optional embodiment, when the error type is an unrecoverable fatal error and the advanced error reporting function is turned on, the error cause in the relevant data corresponding to the exception information can be obtained from the uncorrectable error status register; the relevant data corresponding to the exception information is: the PCIe device automatically uploads to the uncorrectable error status register and the error status severity register; the relevant data corresponding to the exception information also includes: all error configuration space register information in the configuration space corresponding to the advanced error reporting function.

The error type is an unrecoverable fatal error and the advanced error reporting function is enabled. In this case, the abnormal information of the PCIe device can be directly reported through the advanced error reporting function.

Based on the advanced error reporting function, the PCIe device will automatically upload the specific error cause to the uncorrectable error status register and the error status severity register. In this case, the cause of the problem can be directly obtained from the uncorrectable error status register in the advanced error reporting function configuration space, and all error configuration space register information in the configuration space corresponding to the advanced error reporting function can be saved. All error configuration space register information is not only the specific cause of the error, but also can include relevant information such as the error type, timestamp, device status, error code, and context of the error.

By adopting the technical solution of the embodiment of the present disclosure, it is necessary not only to obtain the cause of the problem from the uncorrectable error status register, but also to obtain all the error configuration space register information in the configuration space corresponding to the advanced error reporting function, and obtain other relevant information, such as error context, device status, etc.; this helps to gain a deeper understanding of the background and environment in which the problem occurred, so as to perform troubleshooting and analysis more effectively. Recording all error information also helps with auditing and tracing. By saving the content of the error information, device manufacturers and system administrators can analyze the error patterns and trends of the device and obtain valuable feedback information from them.

After the PCIe root node receives the exception information reported by the PCIe device, it determines the error type of the exception information. When the data type is an irrecoverable fatal error, the PCIe root node generates an interrupt event for the fatal error. Based on the system status being interrupted, it collects relevant information of the PCIe device that reports the error message.

Before obtaining error-related information of a PCIe device that reports abnormal information, the present invention first determines whether an advanced error reporting function is enabled. When the advanced error reporting function is enabled, the advanced error reporting function is used to report error-related information of the PCIe device. When the advanced error reporting function is not enabled, the error-related information of the PCIe device is reported according to BIOS settings.

Step S13: When the advanced error reporting function is not enabled, according to the BIOS setting, a query command is sent to the PCIe device to obtain information about the PCIe device; the information includes at least one or more of the following: identification information of the error device, the cause of the error, all error configuration space register information in the configuration space of the PCIe device, and configuration space register information of the upper-layer device to which the PCIe device belongs.

BIOS is the firmware in a computer system, located in non-volatile memory on the motherboard. BIOS provides an interface that allows the operating system and applications to communicate and interact with the computer's hardware. It contains a fixed set of programs and data used to manage the initialization, configuration, and control of computer hardware devices, as well as provide basic input and output functions such as keyboard, display, and storage device access.

When the advanced error reporting function is not enabled, conventional error reporting methods cannot be used. The present disclosure proposes that when the advanced error reporting function is not enabled, error-related information of the PCIe device is reported according to BIOS settings.

According to the BIOS settings, a query command is sent to the PCIe device that reports an error message to obtain information about the PCIe device; the information includes at least one or more of the following: the cause of the error, all erroneous configuration space register information in the configuration space of the PCIe device, and the configuration space register information of the upper-layer device to which the PCIe device belongs.

The identification information of a PCIe device usually appears in the form of a manufacturer ID and a device ID of the device. These identification information are contained in the configuration space of the PCIe device and are read by the device's firmware (such as BIOS) when the device is initialized.

The error cause is the direct cause of the error in the PCIe device, which can quickly locate and solve the problem. By obtaining the error cause, engineers can quickly understand the direct cause of the problem, so as to take corresponding measures to repair or optimize the design and reduce the occurrence of the problem.

The purpose of obtaining all the erroneous configuration space register information in the configuration space of the PCIe device is to have a more comprehensive understanding of the status and configuration information of the erroneous device. The register information contains various configuration and status data of the device. By obtaining this information, engineers can more accurately analyze the cause and scope of the problem. The register information can provide the error record and abnormal status of the device to help locate the erroneous device and the cause of the problem. In addition, the register information can also be used for the reproduction and verification of the problem, as well as subsequent problem tracking and analysis. The error of the PCIe device may cause the PCIe device to crash, so that the PCIe device cannot respond to the query command. The error-related information of the PCIe device can be obtained by obtaining the configuration space register information of the upper-level device to which the PCIe device belongs.

In an optional embodiment, step S13 may include steps S131 to S135.

Step S131: according to the BIOS setting, sending a first query command to an erroneous device through a PCIe link; the erroneous device is: the PCIe device that reports the abnormal information.

A PCIe link is a communication path between two devices connected to the PCIe bus. It consists of a pair of interconnected transmitters and receivers for transmitting data and control information between devices.

Through BIOS settings, determine the error device to be queried and obtain the PCIe address of the device; use the PCIe controller and registers to establish a communication link with the error device.

When the advanced error reporting function is not enabled, the system sends a first query command to the error device through the PCIe link, which can be done by loading the query command data into the sending buffer of the PCIe controller; setting the target device address of the PCIe controller to the PCIe address of the error device; triggering the action of the PCIe controller to send the command, and sending the command data to the error device; the query command will be sent to the configuration space register of the error device through the PCIe link to obtain the error record information and the cause of the problem. The error device is: the PCIe device that reports the abnormal information.

After receiving the query command, the error device processes it according to the command content.

Step S132: when the erroneous device responds to the first query command, query the configuration space register of the erroneous device to obtain the error cause of the erroneous device and obtain all erroneous configuration space register information in the configuration space of the erroneous device.

When the erroneous device is able to respond to the first query command, the erroneous device accesses its own configuration space register according to the received query command; the erroneous device sends the information of the configuration space register back to the system, and the system parses and processes the received configuration space register information, and can extract the error record information and the cause of the problem, and record them; obtain the error cause of the erroneous device, and obtain all the erroneous configuration space register information in the configuration space of the erroneous device.

Step S133: When the erroneous device does not respond to the first query command, determine the upper layer device to which the erroneous device belongs.

If the error device crashes due to an error, the error device cannot respond to the first query command; determine the upper layer device that manages the error device according to the PCIe topology or other related information; use the PCIe address and related commands of the upper layer device to set the target device address of the PCIe controller to the address of the upper layer device, and send a second query command to the upper layer device. The upper layer device is a device that manages the error device, and the upper layer device is one level higher than the error device.

In the case where the error device cannot respond, the relevant information of the error device is obtained by querying the upper-layer device that manages the error device, wherein the relevant information about the error device in the configuration space register of the upper-layer device is more coarse. If the upper-layer device is also unable to respond, a query command is sent to the upper-layer device that manages the upper-layer device, and the relevant information of the error device is obtained from the configuration space register of the device. The higher the layer of the device, the coarser the information about the error device. Therefore, it is necessary to obtain the relevant data about the error device in the configuration space register of the upper-layer device only when the error device does not respond to the query command.

Step S134: Send a second query command to the upper layer device to which the erroneous device belongs.

In the case where the erroneous device cannot respond to the first query command, the second query command will be sent to the upper layer device that manages the erroneous device.

Step S135: When the upper layer device to which the erroneous device belongs responds to the second query command, query the configuration space register of the upper layer device to which the erroneous device belongs to obtain the error cause of the erroneous device and the configuration space register information of the upper layer device to which the erroneous device belongs.

The upper-layer device queries the data related to the erroneous device from the configuration space register according to the command content; reads the error cause and other related information of the erroneous device from the configuration space register; and uploads the identification information of the erroneous device, the error cause of the erroneous device read, and the configuration space register information of the upper-layer device to which the erroneous device belongs through a PCIe link or other communication methods.

By adopting the embodiments of the present disclosure, when the error device can respond, information can be directly obtained from the configuration space register of the error device, and the error device can report the error cause and register information by itself; when the error device cannot respond, relevant information of the error device is obtained from the configuration space register of the upper-layer device that manages the error device, and the upper-layer device reports the register information of the upper-layer device of the error cause of the error device. By obtaining the register information of the error device and the register information of the upper-layer device, more comprehensive error information can be provided, which helps engineers to fully understand the background and context of the problem, so as to better analyze and solve the problem; when the error device cannot respond, resending the second query command to the upper-layer device can avoid the loss or omission of error information due to the failure of the error device to respond, and ensure that the problem is properly recorded and handled; by collecting and processing problem tracking to understand the cause of the problem, it can be avoided in subsequent designs, optimized design, and reduce the occurrence of similar problems. This can improve the stability and reliability of the system and reduce the impact of similar problems on system operation.

Step S14: storing the information of the PCIe device in a baseboard management controller.

When the PCIe root node receives the reported exception information, the corresponding interrupt event is triggered according to the error type carried in the exception information. When the system status is interrupted, the relevant information of the error in the PCIe device is collected and the collected error information is stored in the baseboard management controller to avoid data loss caused by system restart.

Wherein, in an optional embodiment, the storing of the information of the PCIe device to the baseboard management controller includes: collecting the target information transmitted between the CPU and the PCIe device; collecting the target log information related to the operating status of the PCIe device from the log information of the PCIe device; storing the information of the PCIe device, the target information and the target log information to the baseboard management controller. The target information transmitted between the CPU and the PCIe device refers to the information transmission process between the CPU and the PCIe device. Including data interaction, instruction transmission, status information transmission, etc. By collecting this information, the communication between the CPU and the device can be understood, including the speed of data transmission, the execution of instructions, the status of the device, etc.

In the system, the faulty device may have various abnormal conditions, such as errors, failures, performance degradation, etc. In order to understand the operating status of the faulty device and the possible causes of the problem, target log information related to the operating status of the PCIe device can be collected. The log information may include operation records, error information, warning information, performance indicators, etc. of the faulty device.

After querying relevant information from the configuration space register of the erroneous device and querying relevant information of the erroneous device from the configuration space register of the upper-layer device, it is also necessary to collect the target information transmitted between the CPU and the PCIe device, and collect target log information related to the operating status of the PCIe device from the log information of the PCIe device; and store the information of the PCIe device, the target information and the target log information in the baseboard management controller.

Information collection can be achieved through software or hardware. For example, you can set up a logging function in the system to record the communication information between the CPU and the device. You can also use hardware monitoring equipment to capture and record the communication data between the CPU and the device in real time.

By adopting the embodiments of the present disclosure, the target information transmitted between the CPU and the PCIe device is collected, and the target log information related to the operating status of the PCIe device is collected from the log information of the PCIe device, which can help engineers analyze and locate problems and find out the causes of communication failures, performance bottlenecks or other abnormal situations.

By adopting the embodiments of the present disclosure, the detailed configuration and status data of the device can be obtained by capturing the configuration space register information of the PCIe device to quickly locate the problem; the configuration space register information of the erroneous device can be uploaded to the BMC for recording, which can ensure that the problem status and the cause of the problem are saved. In this way, in the subsequent problem analysis, engineers can quickly reproduce and handle the problem based on the recorded information, thereby improving the efficiency of problem handling; by collecting and processing the register information of the erroneous device, the cause of the problem can be understood, and it can be avoided and optimized in the subsequent design. This helps to reduce the occurrence of similar problems and improve the stability and reliability of the system; and when the advanced error reporting function is not enabled, according to the BIOS settings, obtaining the error cause and related register information of the PCIe device can ensure the location and resolution of the fatal problem of the PCIe device.

In an optional embodiment, the PCIe fatal error rapid location method further includes the following contents:

In response to the reporting of the abnormal information, according to the error type, an interrupt event corresponding to the error type is triggered; after the information of the PCIe device is stored in the baseboard management controller, the method also includes: obtaining a preset processing scheme; the preset processing scheme includes: a processing method corresponding to each error type; the processing method includes: shielding errors, resetting the device and restarting the system; determining a target processing method according to the preset processing scheme and the error type carried by the abnormal information; processing the error occurring in the PCIe device according to the target processing method; after processing the error occurring in the PCIe device, releasing the interrupt event.

The advantage of interrupt events is that they provide an asynchronous communication mechanism that allows a device to notify the processor or host system when a specific task is completed or a specific event occurs.

In response to the reporting of the abnormal information, according to the error type, an interrupt event corresponding to the error type is triggered, rather than repairing the abnormality by restarting the system when responding to the abnormal information reporting. For different error types, an interrupt event corresponding to the error type is triggered. For example, when the error type is an unrecoverable fatal error, the error cause and corresponding register information of the PCIe device that generates the fatal error are obtained.

After the interrupt event is triggered, relevant information of the PCIe device is collected and stored in the baseboard management controller to ensure that the error cause and register information of the PCIe device will not be lost due to restart, and recovery measures are taken for the PCIe device.

First, a preset processing solution is obtained; the preset processing solution includes: processing methods corresponding to various error types; the processing methods include: shielding errors, resetting the device and restarting the system.

To shield errors specifically: According to the preset processing plan, the system can be set to shield fatal errors, that is, temporarily ignore the error so that the system can continue to operate normally without being affected by the error.

Resetting the device specifically includes: if the preset processing plan includes a step of resetting the device, the system can reset the device that has a fatal error to try to restore the device to a normal working state.

Specifically, the system restart is: in some cases, a fatal error may cause the entire system to fail to operate normally. At this time, the preset processing solution may include a system restart step to restart the system and try to resolve the error. In an optional embodiment, when the error type is the recoverable error or the unrecoverable non-fatal error, the interrupt event is released.

Since the system can handle recoverable errors and unrecoverable non-fatal errors by itself, and will not cause the system to restart and lose relevant data that occurred during the problem process, it is only necessary to collect information on the error cause and corresponding register information of the PCIe device that generated the unrecoverable fatal error. If the error type of the PCIe device is a recoverable error or an unrecoverable non-fatal error, then the interrupt event is directly released. With this embodiment, for correctable errors or non-fatal uncorrectable errors, the system can directly end the processing without further complex operations. This can save time and resources and improve the efficiency of problem handling; the system can improve the stability and reliability of the system by having the system handle correctable errors or non-fatal uncorrectable errors by itself.

By adopting this embodiment, when responding to abnormal information, the interrupt event can promptly remind the system that an error event has occurred, thereby attracting the attention of the system; after the interrupt event is triggered, the error cause of the error device and the corresponding register information are stored in the baseboard management controller to ensure that relevant information such as the error cause will not be lost, so as to facilitate subsequent problem analysis and processing.

In an optional embodiment, the problem reporting logic can be integrated into the PCIe device chip. When an error occurs, the error is not reported immediately. Instead, the abnormal information is automatically reported to the CPU when the computer is turned on for the second time, and the CPU sends it to the BMC for maintenance.

Figure 2 is a flowchart of an error location shown in an embodiment of the present disclosure. As shown in Figure 2, a device on a PCIe link is abnormal; the abnormality is automatically reported to the device status register of the PCIe root node port according to the protocol specification; the PCIe root node port generates a corresponding interrupt event according to the error type and transmits it to the system; the software obtains log information of the problem process; the relevant information is recorded in the BMC, and then the error of the PCIe device is processed according to the preset processing solution.

Fig. 3 is a problem handling flow chart shown in an embodiment of the present disclosure. As shown in Fig. 3, if a device on a PCIe link is abnormal, the abnormality is automatically reported to the device status register of the PCIe root node port according to the protocol specification; the PCIe root node port generates a corresponding interrupt event according to the error type and transmits it to the system; it is determined whether the error type is an unrecoverable fatal error; if the error type is a recoverable error or the unrecoverable non-fatal error, it is directly terminated; if the error type is an unrecoverable fatal error, it is determined whether the advanced error reporting function is enabled; if the advanced error reporting function is enabled, the cause of the problem is obtained according to the advanced error reporting function; if the advanced error reporting function is not enabled, a first query command is sent to the error device; it is determined whether the error device responds to the first query command; if the error device responds to the first query command, the error device reports the cause of the error by itself; if the error device does not respond to the first query command, a second query command is resent to the upper layer device to which the error device belongs, and the upper layer device reports the cause of the error; the cause of the error of the error device is transmitted to the baseboard management controller for record; the log information related to the error device is collected and transmitted to the baseboard management controller for record; the system processes the fatal error according to the preset processing scheme. Figure 4 is a hardware architecture diagram of a PCIe fatal error rapid location system shown in an embodiment of the present disclosure. The CPU includes a PCIe root node interface; the PCIe root node interface communicates with the PCIe devices in the topology and transmits the PCIe information to the CPU for processing; the BIOS is transmitted to the CPU as the basic bottom-level setting to run, completing the initial and bottom-level design of the server; the baseboard management controller manages the server as an out-of-band management system, and the server CPU will send some log information to the BMC.

It should be noted that, for the method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present disclosure are not limited by the order of the actions described, because according to the embodiments of the present disclosure, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present disclosure.

As shown in FIG4 , the PCIe fatal error rapid positioning system includes: a PCIe device, a CPU, a BIOS, and a baseboard management controller;

The PCIe device is used to report abnormal information to the PCIe root node of the CPU when an error is detected in the PCIe device; the abnormal information carries the error type; the error type includes: recoverable error, unrecoverable non-fatal error and unrecoverable fatal error;

The PCIe fatal error rapid positioning system is used to determine the activation status of the advanced error reporting function when the error type is an unrecoverable fatal error;

The PCIe fatal error rapid positioning system is used to send a query command to the PCIe device according to the BIOS setting when the advanced error reporting function is not enabled, so as to obtain information of the PCIe device; the information includes at least one or more of the following: identification information of the error device, the cause of the error, all error configuration space register information in the configuration space of the PCIe device, and configuration space register information of the upper layer device to which the PCIe device belongs;

The baseboard management controller is used to store the information of the PCIe device.

Optionally, the PCIe fatal error rapid positioning system is further used for:

According to the BIOS setting, a first query command is sent to the error device through the PCIe link; the error device is: the PCIe device that reports the abnormal information;

In the case where the erroneous device responds to the first query command, querying the configuration space register of the erroneous device to obtain the error cause of the erroneous device and all erroneous configuration space register information in the configuration space of the erroneous device;

In the case that the erroneous device does not respond to the first query command, determining an upper layer device to which the erroneous device belongs;

Sending a second query command to an upper layer device to which the erroneous device belongs;

When the upper layer device to which the erroneous device belongs responds to the second query command, the configuration space register of the upper layer device to which the erroneous device belongs is queried to obtain the error cause of the erroneous device and the configuration space register information of the upper layer device to which the erroneous device belongs.

Optionally, the PCIe fatal error rapid positioning system is further used for:

Collecting target information transmitted between the CPU and the PCIe device;

Collecting target log information related to the running status of the PCIe device from the log information of the PCIe device;

The information of the PCIe device, the target information and the target log information are stored in the baseboard management controller.

Optionally, the PCIe device is used to detect whether an error occurs in the running state of the PCIe device according to PCIe specification requirements;

In the case where an error occurs in the PCIe device, registering relevant data corresponding to the abnormal information in a configuration space register of the PCIe device; the relevant data corresponding to the abnormal information includes the error type;

According to the relevant data corresponding to the abnormal information, the abnormal information carrying the error type is generated. Optionally, the PCIe fatal error rapid positioning system is also used to:

When the error type is an unrecoverable fatal error and the advanced error reporting function is turned on, the error cause in the relevant data corresponding to the exception information is obtained from the uncorrectable error status register; the relevant data corresponding to the exception information is: the PCIe device automatically uploads to the uncorrectable error status register and the error status severity register; the relevant data corresponding to the exception information also includes: all error configuration space register information in the configuration space corresponding to the advanced error reporting function.

Optionally, the PCIe root node of the CPU is used to:

According to the error type, trigger an interrupt event corresponding to the error type;

After storing the information of the PCIe device in the baseboard management controller, the PCIe fatal error rapid positioning system is further used for:

Obtaining a preset processing solution; the preset processing solution includes: processing methods corresponding to each error type; the processing methods include: shielding errors, resetting the device, and restarting the system;

Determine a target processing method according to the preset processing scheme and the error type carried by the abnormal information;

Processing the error occurring in the PCIe device according to the target processing method;

After the error occurring in the PCIe device is processed, the interrupt event is released.

Optionally, the PCIe root node of the CPU is further used to:

When the error type is the recoverable error or the unrecoverable non-fatal error, the interrupt event is released.

It should be noted that the system embodiment is similar to the method embodiment, so the description is relatively simple, and the relevant parts can be referred to the method embodiment.

The present disclosure also provides an electronic device, with reference to FIG5 , which is a schematic diagram of the electronic device provided by the present disclosure. As shown in FIG5 , the electronic device 100 includes: a memory 110 and a processor 120, the memory 110 and the processor 120 are connected via a bus communication, the memory 110 stores a computer program, and the computer program can be run on the processor 120, thereby implementing the steps in the method for quickly locating a PCIe fatal error disclosed in the present disclosure.

The embodiment of the present disclosure further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the method for quickly locating a PCIe fatal error disclosed in the embodiment of the present disclosure are implemented.

The embodiment of the present disclosure also provides a computer program product, including a computer program. When the computer program is executed by a processor of a computer device, the computer program can execute the steps in the method for quickly locating PCIe fatal errors disclosed in the embodiment of the present disclosure.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

Those skilled in the art will appreciate that the disclosed embodiments may be provided as methods, devices or computer program products. Therefore, the disclosed embodiments may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the disclosed embodiments may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

The embodiments of the present disclosure are described with reference to the flowcharts and/or block diagrams of the methods, devices, electronic devices, and computer program products according to the embodiments of the present disclosure. It should be understood that each process and/or box in the flowchart and/or block diagram, as well as the combination of the processes and/or boxes in the flowchart and/or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate a device for implementing the functions specified in one process or multiple processes in the flowchart and/or one box or multiple boxes in the block diagram.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and/or one or more boxes in the block diagram.

These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to generate a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one or more processes of the flowchart and/or one or more boxes of the block diagram. Although some embodiments of the present disclosure have been described, once the technical personnel in the field know the basic creative concept, they can make additional changes and modifications to these embodiments. Therefore, the attached claims are intended to be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the embodiments of the present disclosure. The above is a detailed introduction to a PCIe fatal error fast positioning method, system, electronic device and medium provided by the present disclosure. The principles and implementation methods of the present disclosure are explained in this article using specific examples. The description of the above embodiments is only used to help understand the method and its core idea of the present disclosure; at the same time, for those of ordinary skill in the art, according to the idea of the present disclosure, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present disclosure.

Claims (10)

1. A method for quickly locating a PCIe fatal error, characterized in that the method comprises: When an error occurs in a PCIe device, report abnormal information to the PCIe root node of the CPU; the abnormal information carries the error type; the error type includes: recoverable error, unrecoverable non-fatal error and unrecoverable fatal error; In the case where the error type is an unrecoverable fatal error, determining whether an advanced error reporting function is enabled; When the advanced error reporting function is not enabled, according to the BIOS setting, a query command is sent to the PCIe device to obtain information of the PCIe device; the information includes at least one or more of the following: identification information of the error device, the cause of the error, all error configuration space register information in the configuration space of the PCIe device, and configuration space register information of the upper layer device to which the PCIe device belongs; The information of the PCIe device is stored in a baseboard management controller. 2. The method according to claim 1, wherein the step of sending a query command to the PCIe device according to BIOS settings to obtain information of the PCIe device comprises: According to the BIOS setting, a first query command is sent to the error device through the PCIe link; the error device is: the PCIe device that reports the abnormal information; In the case where the erroneous device responds to the first query command, querying the configuration space register of the erroneous device to obtain the error cause of the erroneous device and all erroneous configuration space register information in the configuration space of the erroneous device; In the case that the erroneous device does not respond to the first query command, determining an upper layer device to which the erroneous device belongs; Sending a second query command to an upper layer device to which the erroneous device belongs; When the upper layer device to which the erroneous device belongs responds to the second query command, the configuration space register of the upper layer device to which the erroneous device belongs is queried to obtain the error cause of the erroneous device and the configuration space register information of the upper layer device to which the erroneous device belongs. 3. The method according to claim 1, wherein storing the information of the PCIe device in a baseboard management controller comprises: Collecting target information transmitted between the CPU and the PCIe device; Collecting target log information related to the running status of the PCIe device from the log information of the PCIe device; The information of the PCIe device, the target information and the target log information are stored in the baseboard management controller. 4. The method according to claim 1, characterized in that before reporting the abnormal information to the PCIe root node of the CPU, the method further comprises: According to PCIe specification requirements, detecting whether an error occurs in the operating state of the PCIe device; In the case where an error occurs in the PCIe device, registering relevant data corresponding to the abnormal information in a configuration space register of the PCIe device; the relevant data corresponding to the abnormal information includes the error type; The exception information carrying the error type is generated according to relevant data corresponding to the exception information. 5. The method according to claim 1, characterized in that, when the error type is an unrecoverable fatal error and the advanced error reporting function is enabled, the method further comprises: From the uncorrectable error status register, obtain the error cause in the relevant data corresponding to the exception information; the relevant data corresponding to the exception information is: the PCIe device automatically uploads the uncorrectable error status register and the error status severity register; the relevant data corresponding to the exception information also includes: all error configuration space register information in the configuration space corresponding to the advanced error reporting function. 6. The method according to claim 1, characterized in that the method further comprises: In response to the reporting of the abnormal information, triggering an interrupt event corresponding to the error type according to the error type; After storing the information of the PCIe device in the baseboard management controller, the method further includes: Obtaining a preset processing solution; the preset processing solution includes: processing methods corresponding to each error type; the processing methods include: shielding errors, resetting the device, and restarting the system; Determine a target processing method according to the preset processing scheme and the error type carried by the abnormal information; Processing the error occurring in the PCIe device according to the target processing method; After the error occurring in the PCIe device is processed, the interrupt event is released. 7. The method according to claim 6, characterized in that the method further comprises: When the error type is the recoverable error or the unrecoverable non-fatal error, the interrupt event is released. 8. A PCIe fatal error rapid positioning system, characterized in that the PCIe fatal error rapid positioning system comprises: a PCIe device, a CPU, a BIOS and a baseboard management controller; The PCIe device is used to report abnormal information to the PCIe root node of the CPU when an error is detected in the PCIe device; the abnormal information carries the error type; the error type includes: recoverable error, unrecoverable non-fatal error and unrecoverable fatal error; The PCIe fatal error rapid positioning system is used to determine the activation status of the advanced error reporting function when the error type is an unrecoverable fatal error; The PCIe fatal error rapid positioning system is used to send a query command to the PCIe device according to the BIOS setting when the advanced error reporting function is not enabled, so as to obtain information of the PCIe device; the information includes at least one or more of the following: identification information of the error device, the cause of the error, all error configuration space register information in the configuration space of the PCIe device, and configuration space register information of the upper layer device to which the PCIe device belongs; The baseboard management controller is used to store the information of the PCIe device. 9. An electronic device, characterized in that it comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the method for rapidly locating a PCIe fatal error as described in any one of claims 1 to 7 are implemented. 10. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method for quickly locating a PCIe fatal error as described in any one of claims 1 to 7 are implemented.