CN118508760A - Heat balance method based on three-phase DC-DC converter - Google Patents

Abstract

The present invention provides a thermal balance method based on a three-phase DC-DC converter, and belongs to the field of three-phase DC-DC converters. The thermal balance method includes the steps of defining the state of power transmission, calculating the phase shift value, generating a PWM wave to drive the switch tube to work, and exchanging the PWM wave to drive the switch tube to work. In view of the problem that the switch tube is not turned on for half a cycle in the three-degree-of-freedom asymmetric control mode of the three-phase DC-DC converter, resulting in a difference in temperature rise of the switch tube, which in turn affects the performance and service life of the device, and affects the reliability of the converter, the present invention proposes a thermal balance method based on a three-phase DC-DC converter without changing the topological structure. The method balances the heat loss of the switch device by exchanging the conduction time of the switch tube under the three-degree-of-freedom asymmetric control mode of the DAB converter, thereby improving the working efficiency of the entire prototype.

Description

A thermal balance method based on three-phase DC-DC converter

Technical Field

The invention relates to the field of three-phase DC-DC converters, and in particular to a heat balance method based on a three-phase DC-DC converter.

Background Art

The traditional single-phase DAB converter has a very flexible control method. Common control methods include single phase shift (SPS) control, extended phase shift (EPS) control, double phase shift (DPS) control, triple phase shift (TPS) control and five degrees of freedom (5-DOF) control. By optimizing the control strategy, the zero voltage turn-on of the switching device in the DAB converter can be achieved, and the effective value of the current in the device can be reduced, so that the DAB converter has a higher transmission efficiency. In recent years, with the further development of switching devices, the switching frequency and power density of the DAB converter have been further improved. As a result, the DAB converter is widely used in photovoltaic energy storage power stations and electric vehicles. The original secondary bridge arm of the DAB is added to a new half-bridge, and the transformer is replaced with a three-phase transformer to obtain a three-phase DC-DC (3p-DAB) converter. Compared with the single-phase DC-DC (1p-DAB) converter, the 3p-DAB adds a new bridge arm. Since the new bridge arm shares the current of the other two bridge arms, the converter has the ability to transmit greater power. Similarly, 3p-DAB can also use the leakage inductance of the transformer to achieve ZVS without adding additional resonant components. The symmetrical structure of the primary and secondary sides can make the converter modular and is also conducive to bidirectional operation. Unlike the single-phase DAB, the three-phase staggered parallel structure can be equivalent to three times the switching frequency, which can effectively reduce the input and output ripples, thereby reducing the size of the filter and improving the output voltage and current quality.

Reference 1 “Optimized modulation and dynamic control of a three-phase dualactive bridge converter with variable duty cycles, IEEE Trans. Power Electron., vol. 34, no. 3, pp. 2856-2873, Mar. 2019, doi: 10.1109/TPEL.2018.2842021.” applies different duty cycles to the bridge arms of the primary and secondary sides to form a three-degree-of-freedom control scheme, but does not take into account the thermal imbalance problem of the switch tube caused by different duty cycles.

Reference 2 "Optimal Simultaneous PWM Control for Three-Phase Dual-Active-Bridge Converters to Minimize Current Stress in the Whole Load Range，in IEEE Journal of Emerging and Selected Topics in Power Electronics，vol.9，no.5，pp.5822-5837，Oct.2021" also adopts a three-degree-of-freedom scheme with different duty cycles between the primary and secondary sides, and performs optimization calculations with current stress as the optimization target, which further improves the transmission efficiency of the converter. However, it does not take into account the thermal imbalance problem of the switching tube caused by different duty cycles.

The Chinese invention patent disclosure specification (CN107070241A) discloses a bidirectional DC-DC system with two full bridges on the primary and secondary sides and a method for thermal balance thereof. The invention proposes a modulation strategy for the system, but the proposed optimized modulation strategy is only applicable to the topology of the full bridge. As the transmission power increases further, the requirements for the output voltage and current quality are further improved, and the application occasions of the topology are limited. Three-phase DC-DC converters suitable for higher power levels need to be promoted.

In summary, the prior art still has the following problems:

1. Many literatures only consider the efficiency optimization method of three-phase DC-DC converters, but do not take into account the inconsistent losses of different switching tubes, which leads to thermal imbalance and still limits the transmission efficiency of the converter;

2. For single-phase DC-DC converters, there are some methods for thermal balance optimization, but no scholar has studied the thermal balance of three-phase DC-DC converters.

3. In the prior art, the switch tubes in the three-degree-of-freedom asymmetric control mode of the DAB converter are not turned on for half a cycle each, which will lead to differences in the temperature rise of the switch tubes. The operating temperature of the power switch device affects the performance and service life of the device, and therefore also affects the reliability of the converter.

Summary of the invention

The technical problem to be solved by the present invention is the problem existing in the above-mentioned prior art. Specifically, based on the three-phase DC-DC converter topology, an optimization method is proposed without adding or changing any hardware. Under the three-degree-of-freedom asymmetric control mode of the DAB converter, the optimization method balances the heat loss of the switching device by exchanging the conduction time of the switching tube without changing the output voltage and current, thereby improving the working efficiency of the entire prototype.

The object of the present invention is achieved in this way. The present invention provides a thermal balance method based on a three-phase DC-DC converter, wherein the three-phase DC-DC converter system includes a primary side DC power supply, a secondary side DC power supply and a bidirectional DC-DC module; the bidirectional DC-DC module includes a primary side three-phase half-bridge circuit, a primary side three-phase inductor, a primary side transmitting coil, a secondary side receiving coil and a secondary side three-phase half-bridge circuit; the primary side three-phase half-bridge circuit is connected in parallel between the positive and negative DC bus bars of the primary side DC power supply _E1 , and the secondary side three-phase half-bridge circuit is connected in parallel between the positive and negative DC bus bars of the secondary side DC power supply _E2 ;

The primary side three-phase half-bridge circuit includes 6 switch tubes S _Pi with anti-parallel diodes and output capacitors, i=1, 2, ..., 6; wherein, the emitter of the switch tube S _P1 and the collector of the switch tube S _P2 are connected to form a primary side A phase bridge arm, the emitter of the switch tube S _P3 and the collector of the switch tube S _P4 are connected to form a primary side B phase bridge arm, the emitter of the switch tube S _P5 and the collector of the switch tube S _P6 are connected to form a primary side C phase bridge arm, and the three contacts constitute the output end of the primary side three-phase half-bridge circuit, the output end is connected to the primary side three-phase inductor, and the other end of the primary side three-phase inductor is connected to the primary side transmitting coil; the secondary side three-phase half-bridge circuit includes 6 switch tubes S _si with anti-parallel diodes and output capacitors, wherein, the emitter of the switch tube S _s1 and the collector of the switch tube S _s2 are connected to form a secondary side A phase bridge arm, the emitter of the switch tube S _s3 and the collector of the switch tube S The collectors of the switch tubes _{S s4} are connected to form a secondary side B phase bridge arm, the emitter of the switch tube S _s5 and the collector of the switch tube S _s6 are connected to form a secondary side C phase bridge arm, and the three contacts constitute the output end of the secondary side three-phase half-bridge circuit, the output end of the secondary side three-phase half-bridge circuit is connected to the secondary side receiving coil, the secondary side receiving coil receives the electromagnetic field emitted by the primary side transmitting coil through the mutual inductance M, and converts it into electrical energy;

The steps of the heat balance method are as follows:

Step 1: Define the state of power transfer

Given a DC output current command value I _ref of the secondary DC power supply, the power transmission state is defined as follows: if I _ref > 0, power flows from the primary DC power supply to the secondary DC power supply, and is defined as forward power transmission; if I _ref < 0, power flows from the secondary DC power supply to the primary DC power supply, and is defined as reverse power transmission; if I _ref = 0, no power transmission occurs;

Step 2: Calculate the phase shift value

The DC output current I _out of the DC power supply on the secondary side is sampled, and the DC output current error signal ΔI _out is calculated, ΔI _out =I _ref -I _out , and the DC output current error signal ΔI _out is sent to the PI regulator to obtain the phase shift value (D ₁ , D ₂ , D ₃ ), wherein D ₁ is the duty cycle of the switch tube S _P1 , the switch tube S _P2 , and the switch tube S _P3 at a high level, D ₂ is the duty cycle of the switch tube S _s1 , the switch tube S _s2 , and the switch tube S _s3 at a high level, and D ₃ is the phase difference between the switch tube S _P1 and the switch tube S _s1 ;

Step 3: Define the drive signal and carrier

The driving signal of the switch tube S _Pi is recorded as the driving signal Q _Pi , and the driving signal of the switch tube S _si is recorded as the driving signal Q _si , wherein:

The triangular carrier of the driving signal Q _P1 and the driving signal Q _P2 is carrier VT ₁ , the triangular carrier of the driving signal Q _P3 and the driving signal Q _P4 is carrier VT ₂ , and the triangular carrier of the driving signal Q _P5 and the driving signal Q _P6 is carrier VT ₃ , wherein the phase difference between carrier VT ₁ and carrier VT ₂ is 120°, and the phase difference between carrier VT ₂ and carrier VT ₃ is 120°; the triangular carrier of the driving signal Q _s1 and the driving signal Q _s2 is carrier VT ₁ ^* , the triangular carrier of the driving signal Q _s3 and the driving signal Q _s4 is carrier VT ₂ ^* , and the triangular carrier of the driving signal Q _s5 and the driving signal Q _s6 is carrier VT ₃ ^* , wherein the phase difference between carrier VT ₁ ^* and carrier VT ₂ ^* is 120°, and the phase difference between carrier VT ₂ ^* and carrier VT ₃ ^* is 120°; define the carrier frequency as f, and the period as

Step 4, generate PWM wave to drive the switch tube to work;

When carrier VT ₁ is within (0-D ₁ T) time, drive signal Q _P1 outputs high level, drive signal Q _P2 outputs low level; when carrier VT ₁ is within (D ₁ TT) time, drive signal Q _P1 outputs low level, drive signal Q _P2 outputs high level; when carrier VT ₂ is within (0-D ₁ T) time, drive signal Q _P3 outputs high level, drive signal Q _P4 outputs low level; when carrier VT ₂ is within (D ₁ TT) time, drive signal Q _P3 outputs low level, drive signal Q _P4 outputs high level; when carrier VT ₃ is within (0-D ₁ T) time, drive signal Q _P5 outputs high level, drive signal Q _P6 outputs low level; when carrier VT ₃ is within (D ₁ TT) time, drive signal QP ₅ outputs low level, drive signal Q _P6 outputs high level; when carrier VT ₁ ^* is within (0-D ₂ T) time, drive signal Q _s1 outputs high level, drive signal Q _s2 outputs low level; when carrier VT ₁ ^* In the (D ₂ TT) time, the drive signal Q _s1 outputs a low level, and the drive signal Q _s2 outputs a high level; when the carrier VT ₂ ^* is in the (0-D ₂ T) time, the drive signal Q _s3 outputs a high level, and the drive signal Q _s4 outputs a low level; when the carrier VT ₂ ^* is in the (D ₂ TT) time, the drive signal Q _s3 outputs a low level, and the drive signal Q _s4 outputs a high level; when the carrier VT ₃ ^* is in the (0-D ₂ T) time, the drive signal Q _s5 outputs a high level, and the drive signal Q _s6 outputs a low level; when the carrier VT ₃ ^* is in the (D ₂ TT) time, the drive signal Q _s5 outputs a low level, and the drive signal Q _s6 outputs a high level; wherein, when the drive signal is at a high level, the switch tube is turned on, and when the drive signal is at a low level, the switch tube is turned off;

Step 5: Switch PWM wave to drive the switch tube to work

When the preset switching PWM wave conditions are met, a switching PWM wave instruction is generated to drive the switch tube to work. The specific status is as follows:

Define D1' as the duty cycle of the switch tubes S _P1 , S _P2 , and S _P3 at high level after exchanging the PWM wave, and D2' as the duty cycle of the switch tubes S _s1 , S _s2 , and S _s3 at high level after exchanging the PWM wave, D ₁ '=1-D ₁ , D ₂ '=1-D ₂ ;

When the carrier VT ₁ is within the time (0-D ₁ 'T), the driving signal Q _P1 outputs a high level, and the driving signal Q _P2 outputs a low level; when the carrier VT ₁ is within the time (D ₁ 'TT), the driving signal Q _P1 outputs a low level, and the driving signal Q _P2 outputs a high level; when the carrier VT ₂ is within the time (0-D ₁ 'T), the driving signal Q _P3 outputs a high level, and the driving signal Q _P4 outputs a low level; when the carrier VT ₂ is within the time (D ₁ 'TT), the driving signal Q _P3 outputs a low level, and the driving signal Q _P4 outputs a high level; when the carrier VT ₃ is within the time (0-D ₁ 'T), the driving signal Q _P5 outputs a high level, and the driving signal Q _P6 outputs a low level; when the carrier VT ₃ is within the time (D ₁ 'TT), the driving signal Q _P5 outputs a low level, and the driving signal Q _P6 outputs a high level; when the carrier VT ₁ ^* is within the time (0-D ₂ 'T), the driving signal Q _s1 outputs a high level, and the driving signal Q _s2 outputs a low level; when the carrier VT ₁ ^* is within the (D ₂ 'TT) time, the drive signal Q _s1 outputs a low level, and the drive signal Q _s2 outputs a high level; when the carrier VT ₂ ^* is within the (0-D ₂ 'T) time, the drive signal Q _s3 outputs a high level, and the drive signal Q _s4 outputs a low level; when the carrier VT ₂ ^* is within the (D ₂ 'TT) time, the drive signal Q _s3 outputs a low level, and the drive signal Q _s4 outputs a high level; when the carrier VT ₃ ^* is within the (0-D ₂ 'T) time, the drive signal Q _s5 outputs a high level, and the drive signal Q _s6 outputs a low level; when the carrier VT ₃ ^* is within the (D ₂ 'TT) time, the drive signal Q _s5 outputs a low level, and the drive signal Q _s6 outputs a high level; wherein, when the drive signal is at a high level, the switch tube is turned on, and when the drive signal is at a low level, the switch tube is turned off.

Preferably, the preset exchange PWM wave condition is a preset interval time D; the process of generating the exchange PWM wave instruction is as follows: pre-set an interval time D, and when the interval time D is reached, the wave generation in step 4 is interrupted, and at the same time, an exchange PWM wave instruction is generated to drive the switch tube to work, and after the exchange PWM wave drives the switch tube to work, the next interval cycle is entered.

Preferably, the preset switching PWM wave condition is a temperature difference threshold Δt _ref of the switch tube, and the process of generating the switching PWM wave instruction is as follows:

A temperature difference threshold Δt _ref is preset;

Assume that under the same heat dissipation condition, the temperature of the switch tube S _P1 , the switch tube S _P3 and the switch tube S _P5 are the same, the temperature of the switch tube S _P2 , the switch tube S _P4 and the switch tube S _P6 are the same, the temperature of the switch tube S _s1 , the switch tube S _s3 and the switch tube S _s5 are the same, and the temperature of the switch tube S _s2 , the switch tube S _s4 and the switch tube S _s6 are the same;

The temperature of two switch tubes on any bridge arm of the three-phase half-bridge circuit on the primary side is sampled in real time, and the temperature difference T1 thereof is calculated; the temperature of two switch tubes on any bridge arm of the three-phase half-bridge circuit on the secondary side is sampled in real time, and the temperature difference T2 thereof is calculated;

As long as one of the temperature differences T1 and T2 is greater than the temperature difference threshold Δt _ref , the wave generation in step 4 is interrupted, and an exchange PWM wave instruction is generated to drive the switch tube to work; when the temperature difference T1 and the temperature difference T2 are both less than or equal to the temperature difference threshold Δt _ref , the exchange PWM wave ends.

Preferably, the function expression of the PI regulator is:

Among them, _Kp is the proportional coefficient of the PI regulator, _Ki is the integral coefficient of the PI regulator, and s is the Laplace operator.

Compared with the prior art, the beneficial effects of the present invention include:

1. The present invention does not require the addition of additional hardware circuits and other components. It only requires optimization and modification at the software level to achieve the goal of thermal balance, improve the efficiency of the platform, and make it easier for engineering applications.

2. The present invention fully considers the advantages and disadvantages of the existing solutions, and on the basis of ensuring the realization of other optimization goals of the circuit, fully considers the thermal balance problem existing in the actual operation of the three-phase DC-DC circuit, and solves it by using switching wave.

3. The present invention has a wide range of applications and is also applicable to devices such as Si-MOSFET and IGBT.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a topological diagram of a three-phase DC-DC converter according to an embodiment of the present invention;

FIG2 is a flow chart of the heat balance method of the present invention;

FIG3 is a control diagram used in the phase shift angle closed-loop control in an embodiment of the present invention;

FIG4 is a schematic diagram of the present invention for generating PWM waves and exchanging PWM waves to drive switch tubes;

FIG5 is a diagram comparing the efficiency of the present invention and the non-switching wave generation method.

DETAILED DESCRIPTION

The present invention will be explained in detail below with reference to the accompanying drawings.

FIG1 is a topological diagram of a three-phase DC-DC converter in an embodiment of the present invention. As can be seen from FIG1 , the three-phase DC-DC converter system includes a primary DC power supply, a secondary DC power supply and a bidirectional DC-DC module; the bidirectional DC-DC module includes a primary three-phase half-bridge circuit, a primary three-phase inductor, a primary transmitting coil, a secondary receiving coil and a secondary three-phase half-bridge circuit, the primary three-phase half-bridge circuit is connected in parallel between the positive and negative DC bus bars of the primary DC power supply _E1 , and the secondary three-phase half-bridge circuit is connected in parallel between the positive and negative DC bus bars of the secondary DC power supply _E2 .

The primary side three-phase half-bridge circuit includes 6 switch tubes S _Pi with anti-parallel diodes and output capacitors, i=1, 2, ..., 6; wherein, the emitter of the switch tube S _P1 and the collector of the switch tube S _P2 are connected to form the primary side A phase bridge arm, the emitter of the switch tube S _P3 and the collector of the switch tube S _P4 are connected to form the primary side B phase bridge arm, the emitter of the switch tube S _P5 and the collector of the switch tube S _P6 are connected to form the primary side C phase bridge arm, and the three contacts constitute the output end of the primary side three-phase half-bridge circuit, the output end is connected to the primary side three-phase inductor, and the other end of the primary side three-phase inductor is connected to the primary side transmitting coil; the secondary side three-phase half-bridge circuit includes 6 switch tubes S _si with anti-parallel diodes and output capacitors, wherein, the emitter of the switch tube S _s1 and the collector of the switch tube S _s2 are connected to form the secondary side A phase bridge arm, the emitter of the switch tube S _s3 and the collector of the switch tube S The collectors of switch tube _{S s4} are connected to form a B-phase bridge arm on the secondary side, the emitter of switch tube S _s5 and the collector of switch tube S _s6 are connected to form a C-phase bridge arm on the secondary side, and the three contacts constitute the output end of the three-phase half-bridge circuit on the secondary side. The output end of the three-phase half-bridge circuit on the secondary side is connected to the secondary receiving coil. The secondary receiving coil receives the electromagnetic field emitted by the primary transmitting coil through the mutual inductance M and converts it into electrical energy.

In FIG1 , _L0 is the three-phase inductor of the primary side, _E1 is the DC power supply of the primary side, _E2 is the DC power supply of the secondary side, _L1 is the transmitting coil of the primary side, and _L2 is the receiving coil of the secondary side. A is the connection point between the emitter of the switch tube _SP1 and the collector of the switch tube _SP2 , B is the connection point between the emitter of the switch tube _SP3 and the collector of the switch tube _SP4 , C is the connection point between the emitter of the switch tube _SP5 and the collector of the switch tube _SP6 , a is the connection point between the emitter of the switch tube _Ss1 and the collector of the switch tube _Ss2 , b is the connection point between the emitter of the switch tube _Ss3 and the collector of the switch tube _Ss4 , and c is the connection point between the emitter of the switch tube _Ss5 and the collector of the switch tube _Ss6 . In addition, as can be seen from FIG1 , the bidirectional DC-DC module further includes a primary side filter capacitor _C10 and a secondary side filter capacitor _C20 , the primary side filter capacitor _C10 is connected in parallel with the primary side three-phase half-bridge circuit, and the secondary side filter capacitor _C20 is connected in parallel with the secondary side three-phase half-bridge circuit.

Example 1.

FIG2 is a flow chart of a heat balance method of the present invention. As can be seen from the figure, the heat balance method of a three-phase DC-DC converter comprises the following steps:

Step 1: Define the state of power transfer

Given a DC output current command value I _ref of the secondary DC power supply, the power transmission state is defined as follows: if I _ref > 0, power flows from the primary DC power supply to the secondary DC power supply, and is defined as forward power transmission; if I _ref < 0, power flows from the secondary DC power supply to the primary DC power supply, and is defined as reverse power transmission; if I _ref = 0, no power transmission occurs.

Step 2: Calculate the phase shift value

The DC output current I _out of the secondary-side DC power supply is sampled, and a DC output current error signal ΔI _out is calculated, ΔI _out =I _ref -I _out , and the DC output current error signal ΔI _out is sent to the PI regulator to obtain a phase shift value (D ₁ , D ₂ , D ₃ ), wherein D ₁ is the duty cycle of the switch tube S _P1 , the switch tube S _P2 , and the switch tube S _P3 when they are at a high level, D ₂ is the duty cycle of the switch tube S _s1 , the switch tube S _s2 , and the switch tube S _s3 when they are at a high level, and D ₃ is the phase difference between the switch tube S _P1 and the switch tube S _s1 .

In this embodiment, the function expression of the PI regulator is:

Among them, _Kp is the proportional coefficient of the PI regulator, _Ki is the integral coefficient of the PI regulator, and s is the Laplace operator.

FIG. 3 is a control diagram used in the phase shift angle closed-loop control in an embodiment of the present invention.

Step 3: Define the drive signal and carrier

The driving signal of the switch tube S _Pi is recorded as the driving signal Q _Pi , and the driving signal of the switch tube S _si is recorded as the driving signal Q _si , wherein:

The triangular carrier of the driving signal Q _P1 and the driving signal Q _P2 is carrier VT ₁ , the triangular carrier of the driving signal Q _P3 and the driving signal Q _P4 is carrier VT ₂ , and the triangular carrier of the driving signal Q _P5 and the driving signal Q _P6 is carrier VT ₃ , wherein the phase difference between carrier VT ₁ and carrier VT ₂ is 120°, and the phase difference between carrier VT ₂ and carrier VT ₃ is 120°; the triangular carrier of the driving signal Q _s1 and the driving signal Q _s2 is carrier VT ₁ ^* , the triangular carrier of the driving signal Q _s3 and the driving signal Q _s4 is carrier VT ₂ ^* , and the triangular carrier of the driving signal Q _s5 and the driving signal Q _s6 is carrier VT ₃ ^* , wherein the phase difference between carrier VT ₁ ^* and carrier VT ₂ ^* is 120°, and the phase difference between carrier VT ₂ ^* and carrier VT ₃ ^* is 120°; define the carrier frequency as .f, and the period as .

Step 4, generate PWM wave to drive the switch tube to work;

When carrier VT ₁ is within (0-D ₁ T) time, drive signal Q _P1 outputs high level, drive signal Q _P2 outputs low level; when carrier VT ₁ is within (D ₁ TT) time, drive signal Q _P1 outputs low level, drive signal Q _P2 outputs high level; when carrier VT ₂ is within (0-D ₁ T) time, drive signal Q _P3 outputs high level, drive signal Q _P4 outputs low level; when carrier VT ₂ is within (D ₁ TT) time, drive signal Q _P3 outputs low level, drive signal Q _P4 outputs high level; when carrier VT ₃ is within (0-D ₁ T) time, drive signal Q _P5 outputs high level, drive signal Q _P6 outputs low level; when carrier VT ₃ is within (D ₁ TT) time, drive signal Q _P5 outputs low level, drive signal Q _P6 outputs high level; when carrier VT ₁ ^* is within (0-D ₂ T) time, drive signal Q _s1 outputs high level, drive signal Q _s2 outputs low level; when carrier VT ₁ ^* During (D ₂ TT) time, the drive signal Q _s1 outputs a low level, and the drive signal Q _s2 outputs a high level; when the carrier VT ₂ ^* is within (0-D ₂ T) time, the drive signal Q _s3 outputs a high level, and the drive signal Q _s4 outputs a low level; when the carrier VT ₂ ^* is within (D ₂ TT) time, the drive signal Q _s3 outputs a low level, and the drive signal Q _s4 outputs a high level; when the carrier VT ₃ ^* is within (0-D ₂ T) time, the drive signal Q _s5 outputs a high level, and the drive signal Q _s6 outputs a low level. When the carrier VT ₃ ^* is within (D ₂ TT) time, the drive signal Q _s5 outputs a low level, and the drive signal Q _s6 outputs a high level; wherein, when the drive signal is at a high level, the switch tube is turned on, and when the drive signal is at a low level, the switch tube is turned off.

Step 5: Switch PWM wave to drive the switch tube to work

When the preset switching PWM wave conditions are met, a switching PWM wave instruction is generated to drive the switch tube to work. The specific status is as follows:

Define D1' as the duty cycle of switch tubes S _P1 , S _P2 , and S _P3 at high level after exchanging PWM waves, and D2' as the duty cycle of switch tubes S _s1 , S _s2 , and S _s3 at high level after exchanging PWM waves, D ₁ '=1-D ₁ , D ₂ '=1-D ₂ .

When the carrier VT ₁ is within the time (0-D ₁ 'T), the driving signal Q _P1 outputs a high level, and the driving signal Q _P2 outputs a low level; when the carrier VT ₁ is within the time (D ₁ 'TT), the driving signal Q _P1 outputs a low level, and the driving signal Q _P2 outputs a high level; when the carrier VT ₂ is within the time (0-D ₁ 'T), the driving signal Q _P3 outputs a high level, and the driving signal Q _P4 outputs a low level; when the carrier VT ₂ is within the time (D ₁ 'TT), the driving signal Q _P3 outputs a low level, and the driving signal Q _P4 outputs a high level; when the carrier VT ₃ is within the time (0-D ₁ 'T), the driving signal Q _P5 outputs a high level, and the driving signal Q _P6 outputs a low level; when the carrier VT ₃ is within the time (D ₁ 'TT), the driving signal Q _P5 outputs a low level, and the driving signal Q _P6 outputs a high level; when the carrier VT ₁ ^* is within the time (0-D ₂ 'T), the driving signal Q _s1 outputs a high level, and the driving signal Q _s2 outputs a low level; when the carrier VT ₁ ^* is within the (D ₂ 'TT) time, the drive signal Q _s1 outputs a low level, and the drive signal Q _s2 outputs a high level; when the carrier VT ₂ ^* is within the (0-D ₂ 'T) time, the drive signal Q _s3 outputs a high level, and the drive signal Q _s4 outputs a low level; when the carrier VT ₂ ^* is within the (D ₂ 'TT) time, the drive signal Q _s3 outputs a low level, and the drive signal Q _s4 outputs a high level; when the carrier VT ₃ ^* is within the (0-D ₂ 'T) time, the drive signal Q _s5 outputs a high level, and the drive signal Q _s6 outputs a low level; when the carrier VT ₃ ^* is within the (D ₂ 'TT) time, the drive signal Q _s5 outputs a low level, and the drive signal Q _s6 outputs a high level. Among them, when the drive signal is at a high level, the switch tube is turned on, and when the drive signal is at a low level, the switch tube is turned off.

FIG. 4 is a schematic diagram of the operation of generating PWM waves and exchanging PWM waves to drive switch tubes in this embodiment.

In this embodiment, the preset exchange PWM wave condition is a preset interval time D, and the process of generating an exchange PWM wave instruction is as follows: an interval time D is preset, and when the interval time D is reached, the wave generation in step 4 is interrupted, and an exchange PWM wave instruction is generated at the same time to drive the switch tube to work, and after the exchange PWM wave drives the switch tube to work, the next interval cycle is entered.

In this embodiment, the interval time D is 5 milliseconds.

The control mode in which the preset exchange wave condition is the preset interval time D is called the time-based control mode.

Example 2.

In this embodiment, except for the preset exchange wave transmission time, everything else is the same as that of the first embodiment.

The preset switching PWM wave condition is the temperature difference threshold Δt _ref of the switch tube, and the process of generating the switching PWM wave instruction is as follows:

A temperature difference threshold Δt _ref is preset;

Assume that under the same heat dissipation condition, the temperature of the switch tube S _P1 , the switch tube S _P3 and the switch tube S _P5 are the same, the temperature of the switch tube S _P2 , the switch tube S _P4 and the switch tube S _P6 are the same, the temperature of the switch tube S _s1 , the switch tube S _s3 and the switch tube S _s5 are the same, and the temperature of the switch tube S _s2 , the switch tube S _s4 and the switch tube S _s6 are the same;

The temperature of two switch tubes on any bridge arm of the three-phase half-bridge circuit on the primary side is sampled in real time, and the temperature difference T1 thereof is calculated; the temperature of two switch tubes on any bridge arm of the three-phase half-bridge circuit on the secondary side is sampled in real time, and the temperature difference T2 thereof is calculated;

As long as one of the temperature differences T1 and T2 is greater than the temperature difference threshold Δt _ref , the wave generation in step 4 is interrupted, and an exchange PWM wave instruction is generated to drive the switch tube to work; when the temperature difference T1 and the temperature difference T2 are both less than or equal to the temperature difference threshold Δt _ref , the exchange PWM wave ends.

In this embodiment, the temperature difference threshold Δt _ref =3°C.

The control mode in which the switching wave condition is set to the temperature difference threshold value Δt _ref of the switching tube is recorded as the temperature difference control mode.

In order to verify the beneficial effects proposed by the present invention, simulation was carried out and compared to obtain Figure 5. The relevant parameters are as follows: _V1 is the rated value of the primary DC power supply _E1 , _V2 is the rated value of the secondary DC power supply _E2 , I is the actual value of the DC output current _Iout , _V1 = 300V, _V2 = 200V, and I varies from 0-40A. As can be seen from Figure 5, in the range of smaller power and when the load rate is less than 50%, due to the obvious difference in the conduction time of the switch tube, the exchange wave mode can significantly improve the efficiency of the system. When the output power increases, the conduction time of the switch tube is all close to half a cycle, and the efficiency of the non-exchange wave mode and the exchange wave mode gradually becomes the same, and the temperature difference of different switch tubes can be controlled within 3°C.

Claims (4)

1. A heat balance method based on a three-phase DC-DC converter system comprises a primary side direct current power supply, a secondary side direct current power supply and a bidirectional DC-DC module; the bidirectional DC-DC module comprises a primary side three-phase half-bridge circuit, a primary side three-phase inductor, a primary side transmitting coil, a secondary side receiving coil and a secondary side three-phase half-bridge circuit; the primary side three-phase half-bridge circuit is connected in parallel between the positive and negative direct current buses of the primary side direct current power supply E ₁, and the secondary side three-phase half-bridge circuit is connected in parallel between the positive and negative direct current buses of the secondary side direct current power supply E ₂;

the primary side three-phase half-bridge circuit comprises 6 switching tubes S _Pi with anti-parallel diodes and output capacitors, i=1, 2, … and 6; Wherein the emitter of the switch tube S _P1 is connected with the collector of the switch tube S _P2 to form a primary side A-phase bridge arm, the emitter of the switch tube S _P3 is connected with the collector of the switch tube S _P4 to form a primary side B-phase bridge arm, the emitter of the switch tube S _P5 is connected with the collector of the switch tube S _P6 to form a primary side C-phase bridge arm, and three contacts form the output end of a primary side three-phase half-bridge circuit, the output end is connected with a primary side three-phase inductor, and the other end of the primary side three-phase inductor is connected with a primary side transmitting coil; the secondary side three-phase half-bridge circuit comprises 6 switching tubes S _si with anti-parallel diodes and output capacitors, wherein the emitter of the switching tube S _s1 is connected with the collector of the switching tube S _s2 to form a secondary side A-phase bridge arm, the emitter of the switching tube S _s3 is connected with the collector of the switching tube S _s4 to form a secondary side B-phase bridge arm, The emitter of the switch tube S _s5 is connected with the collector of the switch tube S _s6 to form a secondary side C-phase bridge arm, and three contacts form the output end of a secondary side three-phase half-bridge circuit, the output end of the secondary side three-phase half-bridge circuit is connected with a secondary side receiving coil, and the secondary side receiving coil receives an electromagnetic field emitted by a primary side emitting coil through a mutual inductance M and converts the electromagnetic field into electric energy;

The method is characterized by comprising the following steps of:

Step 1, defining a state of power transmission

Given a dc output current command value I _ref for the secondary side dc power supply, the power transfer state is defined as follows: if I _ref is more than 0, the power flows from the primary side direct current power supply to the secondary side direct current power supply, and is defined as power forward transmission; if I _ref is less than 0, the power flows from the secondary side direct current power supply to the primary side direct current power supply, and is defined as power reverse transmission; if I _ref = 0, no power transfer occurs;

Step 2, calculating the phase shift value

Sampling a DC output current I _out of a secondary side DC power supply, calculating a DC output current error signal delta I _out,ΔI_out＝I_ref-I_out, and sending the DC output current error signal delta I _out to a PI regulator to obtain a phase shift value (D ₁,D₂,D₃), wherein D ₁ is the duty ratio of a switching tube S _P1, a switching tube S _P2 and a switching tube S _P3 at a high level, D ₂ is the duty ratio of the switching tube S _s1, the switching tube S _s2 and the switching tube S _s3 at the high level, and D ₃ is the phase difference of the switching tube S _P1 and the switching tube S _s1;

step 3, defining driving signals and carrier waves

The driving signal of the switching tube S _Pi is denoted as driving signal Q _Pi, and the driving signal of the switching tube S _si is denoted as driving signal Q _si, wherein:

The triangular carrier of the driving signal Q _P1 and the driving signal Q _P2 is a carrier VT ₁, the driving signal Q _P3, The triangular carrier of the driving signal Q _P4 is the carrier VT ₂, the triangular carrier of the driving signal Q _P5 and the driving signal Q _P6 is the carrier VT ₃, The phase difference between the carrier VT ₁ and the carrier VT ₂ is 120 degrees, and the phase difference between the carrier VT ₂ and the carrier VT ₃ is 120 degrees; The triangular carrier of the driving signal Q _s1 and the driving signal Q _s2 is a carrier VT ₁ ^*, the driving signal Q _s3, The triangular carrier of the driving signal Q _s4 is the carrier VT ₂ ^*, the triangular carrier of the driving signal Q _s5 and the driving signal Q _s6 is the carrier VT ₃ ^*, The phase difference between the carrier VT ₁ ^* and the carrier VT ₂ ^* is 120 degrees, and the phase difference between the carrier VT ₂ ^* and the carrier VT ₃ ^* is 120 degrees; defining carrier frequency as f, period

Step 4, generating PWM waves to drive the switching tube to work;

When the carrier VT ₁ is in the (0-D ₁ T) time, the driving signal Q _P1 outputs high level, and the driving signal Q _P2 outputs low level; When the carrier VT ₁ is in (D ₁ T-T), the driving signal Q _P1 outputs a low level and the driving signal Q _P2 outputs a high level; When the carrier VT ₂ is in the (0-D ₁ T) time, the driving signal Q _P3 outputs high level, and the driving signal Q _P4 outputs low level; When the carrier VT ₂ is in (D ₁ T-T), the driving signal Q _P3 outputs a low level and the driving signal Q _P4 outputs a high level; When the carrier VT ₃ is in the (0-D ₁ T) time, the driving signal Q _P5 outputs high level, and the driving signal Q _P6 outputs low level; when the carrier VT ₃ is in (D ₁ T-T), the driving signal Q _P5 outputs a low level and the driving signal Q _P6 outputs a high level; When the carrier VT ₁ ^* is in the (0-D ₂ T) time, the driving signal Q _s1 outputs a high level, The driving signal Q _s2 outputs a low level; When the carrier VT ₁ ^* is in the (D ₂ T-T) time, the driving signal Q _s1 outputs a low level, the driving signal Q _s2 outputs a high level; when the carrier VT ₂ ^* is in the (0-D ₂ T) time, the driving signal Q _s3 outputs a high level, the driving signal Q _s4 outputs a low level; when the carrier VT ₂ ^* is in the (D ₂ T-T) time, the driving signal Q _s3 outputs a low level, The driving signal Q _s4 outputs a high level; when the carrier VT ₃ ^* is in the (0-D ₂ T) time, the driving signal Q _s5 outputs a high level, The driving signal Q _s6 outputs a low level; When the carrier VT ₃ ^* is in the (D ₂ T-T) time, the driving signal Q _s5 outputs a low level, The driving signal Q _s6 outputs a high level; the switching tube is switched on when the driving signal is in a high level, and is switched off when the driving signal is in a low level;

step 5, switching PWM waves to drive the switching tube to work

When the preset switching PWM wave condition is met, generating a switching PWM wave instruction to drive the switching tube to work, wherein the specific state is as follows:

Define D1 'as the duty cycle of the switching PWM post-switching tube S _P1, switching tube S _P2, switching tube S _P3 at high level, D2' as the duty cycle of the switching PWM post-switching tube S _s1, switching tube S _s2, switching tube S _s3 at high level, D ₁'＝1-D₁,D₂'＝1-D₂;

When the carrier VT ₁ is in the (0-D ₁' T) time, the driving signal Q _P1 outputs high level, and the driving signal Q _P2 outputs low level; When the carrier VT ₁ is in (D ₁' T-T), the driving signal Q _P1 outputs a low level and the driving signal Q _P2 outputs a high level; When the carrier VT ₂ is in the (0-D ₁' T) time, the driving signal Q _P3 outputs high level, and the driving signal Q _P4 outputs low level; When the carrier VT ₂ is in (D ₁' T-T), the driving signal Q _P3 outputs a low level and the driving signal Q _P4 outputs a high level; When the carrier VT ₃ is in the (0-D ₁' T) time, the driving signal Q _P5 outputs high level, and the driving signal Q _P6 outputs low level; When the carrier VT ₃ is in (D ₁' T-T), the driving signal Q _P5 outputs a low level and the driving signal Q _P6 outputs a high level; When the carrier VT ₁ ^* is in the (0-D ₂' T) time, the driving signal Q _s1 outputs a high level, The driving signal Q _s2 outputs a low level; when the carrier VT ₁ ^* is in the (D ₂' T-T) time, the driving signal Q _s1 outputs a low level, the driving signal Q _s2 outputs a high level; When the carrier VT ₂ ^* is in the (0-D ₂' T) time, the driving signal Q _s3 outputs a high level, the driving signal Q _s4 outputs a low level; When the carrier VT ₂ ^* is in the (D ₂' T-T) time, the driving signal Q _s3 outputs a low level, The driving signal Q _s4 outputs a high level; When the carrier VT ₃ ^* is in the (0-D ₂' T) time, the driving signal Q _s5 outputs a high level, The driving signal Q _s6 outputs a low level; When the carrier VT ₃ ^* is in the (D ₂' T-T) time, the driving signal Q _s5 outputs a low level, The driving signal Q _s6 outputs a high level; the switching tube is turned on when the driving signal is in a high level, and is turned off when the driving signal is in a low level.

2. A heat balance method based on a three-phase DC-DC converter according to claim 1, the method is characterized in that the preset PWM wave exchanging condition is preset interval time D; the process of generating the switching PWM wave command is as follows: and (3) presetting an interval time D, interrupting the wave generation in the step (4) when the interval time D is up, generating an exchange PWM wave command to drive the switching tube to work, and entering the next interval period after the exchange PWM wave to drive the switching tube to work.

3. The heat balance method based on a three-phase DC-DC converter according to claim 1, wherein the preset switching PWM wave condition is a temperature difference threshold Δt _ref of a switching tube, and the process of generating the switching PWM wave command is as follows:

Presetting a temperature difference threshold delta t _ref;

The temperature of the switching tube S _P1, the temperature of the switching tube S _P3 and the temperature of the switching tube S _P5 are the same, the temperature of the switching tube S _P2, the temperature of the switching tube S _P4 and the temperature of the switching tube S _P6 are the same, the temperature of the switching tube S _s1, the temperature of the switching tube S _s3 and the temperature of the switching tube S _s5 are the same, and the temperature of the switching tube S _s2, the temperature of the switching tube S _s4 and the temperature of the switching tube S _s6 are the same;

the temperature of two switching tubes on any one bridge arm in the primary side three-phase half-bridge circuit is sampled in real time, the temperature difference T1 is calculated, and the temperature of two switching tubes on any one bridge arm in the secondary side three-phase half-bridge circuit is sampled in real time, and the temperature difference T2 is calculated;

In the temperature difference T1 and the temperature difference T2, only one state that the temperature difference is larger than a temperature difference threshold value delta T _ref appears, namely the wave generation in the step 4 is interrupted, and meanwhile, an exchange PWM wave command is generated to drive the switching tube to work; and when the temperature difference T1 and the temperature difference T2 are smaller than or equal to the temperature difference threshold value delta T _ref, the PWM wave exchange is finished.

4. A heat balance method based on a three-phase DC-DC converter according to claim 1, the PI regulator is characterized in that the function expression of the PI regulator is as follows:

Wherein, K _p is the proportional coefficient of the PI regulator, K _i is the integral coefficient of the PI regulator, and s is the Laplacian.