CN118467237B - Solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies - Google Patents
Solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies Download PDFInfo
- Publication number
- CN118467237B CN118467237B CN202410922295.1A CN202410922295A CN118467237B CN 118467237 B CN118467237 B CN 118467237B CN 202410922295 A CN202410922295 A CN 202410922295A CN 118467237 B CN118467237 B CN 118467237B
- Authority
- CN
- China
- Prior art keywords
- code
- data
- encryption
- error correction
- ldpc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012937 correction Methods 0.000 title claims abstract description 105
- 239000007787 solid Substances 0.000 title claims abstract description 54
- 238000000034 method Methods 0.000 title claims abstract description 43
- 238000005516 engineering process Methods 0.000 title claims abstract description 25
- 230000006641 stabilisation Effects 0.000 title claims abstract description 12
- 238000011105 stabilization Methods 0.000 title claims abstract description 12
- 238000004422 calculation algorithm Methods 0.000 claims abstract description 56
- 238000004458 analytical method Methods 0.000 claims abstract description 39
- 239000011159 matrix material Substances 0.000 claims description 109
- 238000004364 calculation method Methods 0.000 claims description 33
- 230000002159 abnormal effect Effects 0.000 claims description 29
- 238000012545 processing Methods 0.000 claims description 21
- 230000000087 stabilizing effect Effects 0.000 claims description 9
- 238000004590 computer program Methods 0.000 claims description 8
- 238000012795 verification Methods 0.000 claims description 8
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 150000001875 compounds Chemical class 0.000 claims description 4
- 238000012544 monitoring process Methods 0.000 claims description 4
- 239000002131 composite material Substances 0.000 description 12
- 230000006870 function Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 2
- 230000006399 behavior Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/602—Providing cryptographic facilities or services
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0608—Saving storage space on storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Human Computer Interaction (AREA)
- Quality & Reliability (AREA)
- General Health & Medical Sciences (AREA)
- Computer Hardware Design (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Health & Medical Sciences (AREA)
- Bioethics (AREA)
- Error Detection And Correction (AREA)
Abstract
The invention discloses a solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies, which relate to the technical field of solid state disk error correction stabilization and comprise the following steps: calculating the input data through an LDPC algorithm to obtain an ECC code; the input data is coded and encrypted through a coding encryption algorithm to obtain an encrypted code; decoding the read code through an LDPC algorithm, and marking the decoded result as output data; analyzing the output code and the encryption code, and judging whether error correction analysis of the LDPC algorithm is stable or not; the method is used for solving the problems that the existing solid state disk error correction stability technology is insufficient in accuracy of error correction stability analysis and is not strict in algorithm of error correction stability analysis, so that error correction stability judgment is inaccurate and solid state disk space is occupied too much.
Description
Technical Field
The invention relates to the technical field of solid state disk error correction stabilization, in particular to a solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies.
Background
The solid state disk error correction stabilization technology is a series of technical means and measures for improving the reliability and stability of data of a Solid State Disk (SSD), and through the error correction stabilization technology, the solid state disk can provide higher data reliability and stability, and reduce the risk of data loss and damage, so that the requirement of a user on data storage is met.
The existing solid state disk error correction technology generally adopts LDPC and ECC technologies to carry out error correction analysis on the storage content of the solid state disk, but the existing technology lacks analysis on the stability of the error correction performance of the LDPC and ECC technologies, so that the error correction result of errors is difficult to find in time, meanwhile, the existing technology for judging the error correction stability of the solid state disk is not described in the 'response to the error correction failure of a storage block', the data used for judging the error correction stability of the solid state disk usually has larger data volume, so that the storage space of the solid state disk is greatly reduced, and therefore, strict algorithm is adopted when the stability analysis is carried out on the error correction behavior, so as to ensure the accuracy of the error correction stability analysis and save the storage space of the hard disk.
Disclosure of Invention
The invention aims to solve at least one of the technical problems in the prior art to a certain extent, the input data in a binary form is converted into the encrypted code with smaller occupied bytes by carrying out coding encryption on the input data, then the input data is calculated and analyzed by an LDPC technology to obtain an ECC code, when the solid state disk reads the data, the read data is combined with a check matrix in the LDPC, the coding encryption is carried out again on the decoded result, and whether the results of the two coding encryption are the same or not is judged to judge whether the error correction of the solid state disk is stable or not, so that the problems that the accuracy of the error correction stability analysis is insufficient and the algorithm of the error correction stability analysis is not strict in the existing solid state disk error correction stability technology, and the judgment on the error correction stability is inaccurate and the occupied solid state disk space is too much are solved.
In order to achieve the above object, in a first aspect, the present application provides a method for stabilizing error correction of a solid state disk based on LDPC and ECC technologies, comprising the steps of:
receiving input data, calculating the input data through an LDPC algorithm to obtain an ECC code, reading a redundancy code in the ECC code, and marking the redundancy code as a data number;
acquiring input data, coding and encrypting the input data through a coding encryption algorithm to obtain a coding code, establishing a coding database, and storing the coding code and a data number;
when the solid state disk reads data, the read ECC code is obtained, the read code is marked as read code, the redundant code in the read code is obtained, the read code is marked as read number, the read code is decoded through the LDPC algorithm, and the result obtained through decoding is marked as output data;
And obtaining output data, substituting the output data into an encoding encryption algorithm to obtain output codes, searching data numbers which are the same as the reading numbers in an encoding database, obtaining corresponding encryption codes, analyzing the output codes and the encryption codes, and judging whether error correction analysis of the LDPC algorithm is stable.
Further, the input data is calculated through an LDPC algorithm to obtain an LDPC code, and the reading of the error correction code in the LDPC code comprises the following sub-steps:
the method comprises the steps of obtaining data which are received by a solid state disk and need to be recorded into the solid state disk, marking the data as recording data, wherein the recording data are binary codes, obtaining information bits of the recording data, and marking the information bits as recording information bits;
Dividing the input data into a plurality of block codes, wherein the block codes are set to be (n, k) 1 to (n, k) x, n is the code length of the block codes, k is the input information bit, and x is the number of the block codes;
the n is represented by the formula Calculating the k range of the method; wherein Kp is k range, u is a constant and is a positive integer, u is calculated from 2, if Kp is smaller than k, u+1 is recalculated; if Kp is greater than or equal to k, stopping calculation to obtain the value of u, and finally obtaining n=u+k;
based on an LDPC algorithm, acquiring a generator matrix of input data, and calculating a block code and the generator matrix to obtain an ECC code;
The generating matrix is in the form of ; Wherein g is an element in the generation matrix;
the block code format is: ( ···) ; Wherein, To the point ofThe original code is the original code of the input information;
the ECC code format is: ( ······) ; Wherein, To the point ofIs a redundancy code;
the calculation formula of the ECC code is ECC= = (error correction code) ···)×；
And reading redundant codes in ECC codes generated by all block codes divided by the current input data, sequentially combining according to the sequence of (n, k) 1 to (n, k) x, and marking the combined data as data numbers.
Further, obtaining the input data, coding and encrypting the input data through a coding encryption algorithm to obtain a coding code, establishing a coding database, and storing the coding code and the data number comprises the following sub-steps:
Acquiring input data and input information bits;
Carrying out prime number judgment on the input information bit through a prime number judgment algorithm, and carrying out coding encryption on input data through a prime number encryption scheme if the input information bit is prime number; if the input information bit is not prime, coding and encrypting the input data through a combined number encryption scheme;
And establishing an encoding database, after encoding and encrypting the input data, acquiring an encoding code and a data number of the input data, and inputting the encoding code into the encoding database for storage, wherein the encoding code comprises a prime number encoding code and a compound number encoding code.
Further, the prime number encryption scheme includes the following sub-steps:
Acquiring the number of 1 in the input data, and marking the number as the input code weight;
Carrying out binary conversion on the input data, converting the input data into decimal data, and marking the decimal data;
Calculating the input code weight and decimal data through a prime number encryption formula, and finally outputting prime number encryption codes of the input data;
The prime number encryption formula is configured to: ; wherein Sp is prime number encryption code, ew is input code weight, dt is decimal data, Is a two-mode addition method, which is characterized by comprising the steps of,Is a modular square method.
Further, the composite encryption scheme includes the following sub-steps:
Sequentially calculating factors of input information bits according to the sequence from small to large, marking the factors as bit factors, stopping calculation when the bit factors are larger than or equal to a first factor threshold value, and continuing calculation if the bit factors are smaller than the first factor threshold value; marking the finally calculated digit factor as a rated factor number;
Grouping the input data and marking the input data as encrypted group codes, wherein the number of the encrypted group codes is a rated factor number;
The encryption group codes are represented as S1 to Sy, y is a rated factor number, the input data are divided into each encryption group code in sequence according to the sequence of S1 to Sy, the number of the divided data in each encryption group code is the input information bit/the rated factor number, and the number is marked as the encryption code number;
decomposing the quality factors of the encrypted code number by short division until the result is prime, marking a plurality of quality factors obtained finally as code quality factors, counting the number of the code quality factors, and marking the number as factor number;
Calculating the factor number through a matrix side length formula to obtain a matrix side length;
the matrix side length formula is configured as follows: ; where Mel is the matrix side length, nf is the number of factors, and% is the modulo operator;
converting the encryption-group codes into matrices, labeled encryption-group matrices P1 through Py,
The encryption group matrix is: ; wherein T is an element in the encryption group matrix, and Q is the number of encryption codes/Mel;
calculating the encryption group matrix P1 to the encryption group matrix Py through a combined number encryption formula to obtain a combined number encryption code of the input data;
the complex encryption formula is configured to: ; where Ce is a complex number encryption code, pi is any one of the encryption group matrix P1 to the encryption group matrix Py, i has a value range of 1 to y, i is a positive integer, and Tt is a transpose operator of the matrix.
Further, decoding the read code by the LDPC algorithm includes the sub-steps of:
When the solid state disk is detected to perform data reading operation, the read ECC code is obtained, the mark is the reading code, the redundant code in the reading code is obtained, the mark is the reading number, the check matrix corresponding to the reading code in the LDPC algorithm is obtained, and the check matrix format is as follows: ; wherein H is an element in the check matrix;
Multiplying the check matrix by the reading code, and multiplying the result by modulo 2 to obtain a calculation result, wherein the calculation result is marked as a check result, and the format of the check result is as follows: ; wherein L is an element of a verification result, and h is the number of lines;
Reading the row number of which the element is not 0 in the verification result, marking the row number as w, and outputting an error correction signal if the row number is not present; acquiring the check matrix To the point ofSequentially marking Q1 to Qk, reading elements with the number 1 in the Q1 to Qk, and marking the elements as elements to be corrected;
Obtaining the row number of 0 element in the check result, marking as r, and sequentially adding the row number into the check matrix To the point ofMarked as A1 to Ak, reading elements with the number of 1 in A1 to Ak, and marking the elements as correct elements;
obtaining all correct elements, removing the data with the subscript identical to that of the correct elements in the elements to be corrected, and finally marking the rest data in the elements to be corrected as error data;
the reading code is obtained, and the reading code format is as follows: ( ······) Will beTo the point ofThe data with the same subscript as the error data is turned over, if the data is 1, the data is turned over to be 0, and if the data is 0, the data is turned over to be 1, and an error correction completion signal is output at the moment;
if the error correction signal or the error correction completion signal is received, the output To the point ofAnd obtaining output data.
Further, judging whether the error correction analysis of the LDPC algorithm is stable includes the following sub-steps:
acquiring the number of bits of output data, marking the number as the number of output bits, and acquiring a reading number;
Carrying out prime number judgment on the output bit number through a prime number judgment algorithm, and if the output bit number is prime number, carrying out coding encryption on the output data through a prime number encryption scheme; if the output data is not prime, the output data is coded and encrypted by a combined number encryption scheme;
Marking the result obtained by coding encryption as an output code, searching the data number which is the same as the reading number in a coding database, obtaining a corresponding encryption code, and marking the corresponding encryption code as a correct code;
Comparing the output code with the correct code, and outputting an error correction normal signal if the output code is the same as the correct code; if the output code is different from the correct code, outputting an error correction abnormal signal;
if the error correction abnormal signal is output, carrying out error correction processing on the read code again;
Counting the number of times of outputting error correction abnormal signals in a first period, marking the frequency as abnormal frequency, monitoring the abnormal frequency in real time, and sending a hard disk overhaul signal to a user side when the abnormal frequency is greater than or equal to a first frequency threshold value.
The application provides a solid state disk error correction stabilizing system based on LDPC and ECC technologies, which comprises a data acquisition module, an LDPC processing module, a coding encryption module and a stability analysis module, wherein the data acquisition module, the LDPC processing module and the coding encryption module are respectively connected with the stability analysis module in a data way;
The data acquisition module is used for acquiring the input data and redundant codes in the ECC codes;
the LDPC processing module is used for calculating the input data to obtain an ECC code and calculating the reading code to obtain output data;
The coding encryption module is used for coding and encrypting input data and output data;
The stability analysis module is used for analyzing the error correction processing of the LDPC module and judging whether the error correction analysis of the LDPC module is stable or not.
In a third aspect, the application provides an electronic device comprising a processor and a memory storing computer readable instructions which, when executed by the processor, perform the steps of the method of any of the preceding claims.
In a fourth aspect, the present application provides a storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method as described in any of the preceding claims.
The invention has the beneficial effects that: the invention generates the generating matrix and the check matrix for the input data through the LDPC technology, then carries out calculation and analysis on the input data and the generating matrix to finally obtain the ECC code containing the error correction code, and can decode the ECC code according to the check matrix at the same time, if the original data has errors, the check matrix can automatically correct the error data when decoding the ECC code;
The invention judges whether the input information bit of the input data is prime number or not, and adopts a prime number encryption scheme or a composite number encryption scheme for the input data according to the judging result, and has the advantages that the encoding encryption processing adopts a matrix form to carry out complex operation, and the prime number is difficult to be converted into a plurality of matrixes, so that other complex operation is adopted for the input data, and different data adopted by operation are extracted from the input data, thereby greatly improving the uniqueness of encryption codes;
The invention converts the input data into unique encryption codes by carrying out coding encryption on the input data, and has the advantages that the byte number of the input data is generally larger, and the converted encryption codes only occupy small byte number, so that the error correction stability of the solid state disk can be accurately judged, the storage space of the hard disk is saved, the accuracy of error correction stability analysis is improved, and the storage space of the hard disk is saved;
The invention obtains the output code by coding and encrypting the output data calculated and output by the check matrix, compares the correct code obtained by the input data to judge whether the error correction is abnormal or not, counts the abnormal times in a certain period and judges whether the error correction of the solid state disk is stable.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. The objectives and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.
Drawings
FIG. 1 is a flow chart of the steps of the method of the present invention;
FIG. 2 is a schematic flow chart of the logging data processing of the present invention;
FIG. 3 is a flow chart of the output data obtained by analysis according to the present invention;
FIG. 4 is a functional block diagram of the system of the present invention;
FIG. 5 is a connection block diagram of an electronic device of the present invention;
in the figure: 50. an electronic device; 501. a processor; 502. a memory.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1, in a first aspect, the present application provides a method for stabilizing error correction of a solid state disk based on LDPC and ECC technologies, including the following steps:
Step S1, receiving input data, calculating the input data through an LDPC algorithm to obtain an ECC code, reading redundancy codes in the ECC code, and marking the redundancy codes as data numbers; in practical application, the LDPC and ECC technology can provide high-level guarantee for the error correction capability of the solid state disk; step S1 comprises the following sub-steps:
step S101, acquiring data which are received by a solid state disk and need to be recorded into the solid state disk, marking the data as recorded data, recording the data as binary codes, acquiring information bits of the recorded data, and marking the data as recorded information bits;
In the specific implementation, the input data is 110, the input information bit is 3, in the practical application, the input data is usually data with more bits, and the analysis processing process is illustrated only by the input data with 3 bits;
Step S102, dividing the input data into a plurality of block codes, wherein the block codes are set to be (n, k) 1 to (n, k) x, n is the code length of the block codes, k is the input information bit, and x is the number of the block codes;
in specific implementation, if the recorded data is overlarge and the recorded information bits exceed 100, the recorded data is divided into x groups on average, x is 4, 5, 6 or 7, the recorded information bits are divided with x in sequence according to the sequence from x to x, if the recorded information bits can be divided with x, x is set as a corresponding number, if the recorded information bits can not be divided with x, x is reduced by 1 and recalculated, and meanwhile, the recorded information bits of k represent the value obtained by the original recorded information bits/x; where k is 3, less than 100, no such calculation is necessary; if the input information bit is 102, setting x to 7, setting x to 6 if 102/7 is not divisible, and dividing the input data into 6 groups of block codes at 102/6=17, wherein x= 6,k =17; if the input information bit is prime number, the block code is directly set as (n, k); the block code divided by the input data in this embodiment is (n, 3), k=3;
Step S103, n is defined by the formula Calculating the k range of the method; wherein Kp is k range, u is a constant and is a positive integer, u is calculated from 2, if Kp is smaller than k, u+1 is recalculated; if Kp is greater than or equal to k, stopping calculation to obtain the value of u, and finally obtaining n=u+k;
in the specific implementation, when u=2, calculating to obtain Kp as 1, and when Kp is smaller than k, letting u=3, calculating to obtain Kp as 3, when Kp is equal to k, stopping calculating, and when u is 3, calculating to obtain n=6, wherein the block code is (6, 3);
Step S104, based on the LDPC algorithm, acquiring a generating matrix of the input data, and calculating the block code and the generating matrix to obtain an ECC code;
The generation matrix is in the form of ; Wherein g is an element in the generation matrix;
The block code format is: ( ···) ; Wherein, To the point ofThe original code is the original code of the input information;
the ECC code format is: ( ······) ; Wherein, To the point ofIs a redundancy code;
the calculation formula of the ECC code is ECC= (error correction code) = (error ···)×；
In specific implementation, the generated matrix is obtained as; The block code (6, 3) is (1 1 0), and the generator matrix is multiplied by the block code, that is, ecc= (1 1 0) ×; Wherein, the addition among the elements adopts modulo two addition, and ECC code is calculated as [ 11001 0];
step S105, reading redundant codes in ECC codes generated by all block codes divided by the current input data, sequentially combining according to the sequence of (n, k) 1 to (n, k) x, and marking the combined data as data numbers;
in a specific implementation, when the redundancy code is read as 010 and only one block code is read, the 010 is marked as the data number without combination.
S2, acquiring input data, carrying out coding encryption on the input data through a coding encryption algorithm to obtain coding codes, establishing a coding database, and storing the coding codes and data numbers; in practical application, the encoding encryption of the input data can convert huge input data into unique encryption codes with smaller occupied memory, certain original data are needed for data support when the solid state disk is subjected to error correction stability analysis, the original data usually occupy higher memory, and the memory space of the solid state disk is greatly reduced due to mass storage, so that the encoding encryption of the input data can effectively provide reliable data support for the error correction stability analysis of the solid state disk, and the occupied memory space is small; step S2 comprises the following sub-steps:
step S201, acquiring input data and input information bits;
Step S202, prime number judgment is carried out on the input information bit through a prime number judgment algorithm, and if the input information bit is prime number, the input data is encoded and encrypted through a prime number encryption scheme; if the input information bit is not prime, coding and encrypting the input data through a combined number encryption scheme;
In specific implementation, the prime number judgment algorithm is as follows:
public static boolean isPrime(int n) {
if (n<= 3) {
return n>1;
}
it is only 6x-1 and 6x+1 possible for the number/to be prime
if (n % 6 != 1&&n % 6 != 5) {
return false;
}
It is determined whether these numbers are divisible by an odd integer less than sqrt (n)
int sqrt = (int) Math.sqrt(n);
for (int i = 5; i<= sqrt; i += 6) {
if (n % i == 0 || n % (i + 2) == 0) {
return false;
}
}
Acquiring input data as 110, wherein the input information bit is 3, substituting the input information bit into the above code to calculate to obtain the input information bit as prime number, and adopting a prime number encryption scheme to encrypt the input data; n in the code has no relation with n in the embodiment, and is only used for code operation;
The prime number encryption scheme comprises the following sub-steps:
Acquiring the number of 1 in the input data, and marking the number as the input code weight;
Carrying out binary conversion on the input data, converting the input data into decimal data, and marking the decimal data;
Calculating the input code weight and decimal data through a prime number encryption formula, and finally outputting prime number encryption codes of the input data;
The prime number encryption formula is configured as: ; wherein Sp is prime number encryption code, ew is input code weight, dt is decimal data, Is a two-mode addition method, which is characterized by comprising the steps of,Is a modular square method;
In the specific implementation, the input code weight is 2, 110 is converted into decimal, decimal data is 6, and prime number encryption code is 12; the data is too simple, so that the calculation and analysis modes of each step are described, the data is easy to understand, the data in actual application is complex data, and the calculated encrypted code number is larger and more accurate;
The composite encryption scheme comprises the following sub-steps:
Sequentially calculating factors of input information bits according to the sequence from small to large, marking the factors as bit factors, stopping calculation when the bit factors are larger than or equal to a first factor threshold value, and continuing calculation if the bit factors are smaller than the first factor threshold value; marking the finally calculated digit factor as a rated factor number;
Grouping the input data and marking the input data as encrypted group codes, wherein the number of the encrypted group codes is a rated factor number;
The encryption group codes are represented as S1 to Sy, y is a rated factor number, the input data are divided into each encryption group code in sequence according to the sequence of S1 to Sy, the number of the divided data in each encryption group code is the input information bit/the rated factor number, and the number is marked as the encryption code number;
decomposing the quality factors of the encrypted code number by short division until the result is prime, marking a plurality of quality factors obtained finally as code quality factors, counting the number of the code quality factors, and marking the number as factor number;
Calculating the factor number through a matrix side length formula to obtain a matrix side length;
The matrix side length formula is configured as follows: ; where Mel is the matrix side length, nf is the number of factors, and% is the modulo operator;
converting the encryption-group codes into matrices, labeled encryption-group matrices P1 through Py,
The encryption group matrix is: ; wherein T is an element in the encryption matrix, Q is Mel-1 when Nf% 2=1, and is Mel when Nf% 2=1;
calculating the encryption group matrix P1 to the encryption group matrix Py through a combined number encryption formula to obtain a combined number encryption code of the input data;
the complex encryption formula is configured to: ; wherein Ce is a complex number encryption code, pi is any one of an encryption group matrix P1 to an encryption group matrix Py, i has a value range of 1 to y, i is a positive integer, and Tt is a transpose operator of the matrix;
In specific implementation, the embodiment does not adopt a composite encryption scheme, and the description is not given, and the specific description of the composite encryption scheme refers to embodiment 2;
Step S203, an encoding database is established, after the input data is encoded and encrypted, the encoding code and the data number are obtained, the encoding database is input for storage, and the encoding code comprises prime number encoding and compound number encoding;
In specific implementation, an encoding database is established, the encryption code of the input data is acquired to be 12, the data number is 010, and the encryption code and the data number are input into the encoding database to be stored.
S3, when the solid state disk reads data, the read ECC code is obtained, the read code is marked as read code, redundant code in the read code is obtained, the read code is marked as read number, the read code is decoded through an LDPC algorithm, and a result obtained through decoding is marked as output data; step S3 comprises the following sub-steps:
step S301, when the solid state disk is detected to perform data reading operation, a read ECC code is obtained, a read code is marked, a redundant code in the read code is obtained, a read number is marked, a check matrix corresponding to the read code in the LDPC algorithm is obtained, and the check matrix format is as follows: ; wherein H is an element in the check matrix;
Step S302, multiplying the check matrix by the reading code, multiplying the result by modulo 2 to obtain a calculation result, marking the calculation result as a check result, wherein the format of the check result is as follows: ; wherein L is an element of a verification result, and h is the number of lines;
in the specific implementation, the reading code is obtained (1 1001 0), the reading number is 010, and the check matrix is obtained ; Multiplying the check matrix by the read code, and multiplying the result by modulo 2 to obtain a check result of；
Step S303, reading the row number of which the element is not 0 in the verification result, marking the row number as w, and outputting an error correction signal if w does not exist; acquiring the check matrixTo the point ofSequentially marking Q1 to Qk, reading elements with the number 1 in the Q1 to Qk, and marking the elements as elements to be corrected;
In specific implementation, reading that the 1 st row is not 0 in the obtained check result, and obtaining the check matrix if w is 1 To the point ofSequentially marking as Q1 to Qk, wherein Q1 to Qk are sequentially 1, 1 and 0, and marking to obtain elements to be corrected as Q1 and Q2;
step S304, obtaining the row number of 0 element in the check result, marking as r, and sequentially adding the row number to the check matrix To the point ofMarked as A1 to Ak, reading elements with the number of 1 in A1 to Ak, and marking the elements as correct elements;
Step S305, obtaining all correct elements, removing the data with the subscript identical to that of the correct elements in the elements to be corrected, and finally marking the rest data in the elements to be corrected as error data;
In particular, r is 2 and 3 is obtained, when r=2 is obtained To the point ofMarking as A1 to Ak, namely, A1 to Ak are 0, 1 and 1 in sequence, and obtaining correct elements as A2 and A3; analyzing the values of all r to obtain correct elements A2 and A3, wherein the elements to be corrected are Q1 and Q2, and if the subscript of Q2 is the same as that of A2, Q2 is removed to obtain error data Q1;
Step S306, a reading code is obtained, and the reading code format is: ( ······) Will beTo the point ofThe data with the same subscript as the error data is turned over, if the data is 1, the data is turned over to be 0, and if the data is 0, the data is turned over to be 1, and an error correction completion signal is output at the moment;
step S307, if the error correction signal or the error correction completion signal is received, outputting To the point ofObtaining output data;
In an embodiment, the read code is (0 100 1 0), Identical to the Q1 subscript, thenThe device is turned over and the device is turned over,Is 0, i.eThe inversion is 1, the read code is 110 01 0, the error correction completion signal is outputted, and the output data is 110 01 0.
S4, obtaining output data, substituting the output data into an encoding encryption algorithm to obtain output codes, searching data numbers which are the same as the reading numbers in an encoding database, obtaining corresponding encryption codes, analyzing the output codes and the encryption codes, and judging whether error correction analysis of the LDPC algorithm is stable; in practical application, in the face of huge stored data, errors can not be avoided when the solid state disk is read, and error correction program cannot ensure that the read data is subjected to error correction in percentage, so that the stability analysis accuracy can be effectively ensured by examining the abnormal frequency of the error correction of the solid state disk in a certain period, the accidental is avoided, and meanwhile, the use experience of a user can not be influenced by the occurrence of few errors in a certain period; step S4 comprises the following sub-steps:
Step S401, obtaining the number of bits of output data, marking the number as the number of output bits, and obtaining a reading number;
Step S402, prime number judgment is carried out on the output bit number through a prime number judgment algorithm, and if the output bit number is prime number, encoding encryption is carried out on the output data through a prime number encryption scheme; if the output data is not prime, the output data is coded and encrypted by a combined number encryption scheme;
Step S403, marking the result obtained by coding encryption as output codes, searching the data numbers which are the same as the reading numbers in the coding database, obtaining the corresponding encryption codes, and marking the corresponding encryption codes as correct codes;
In the specific implementation, the number of the output bits is obtained to be 6, the reading number is 010, prime number judgment is carried out on the number of the output bits through a prime number judgment algorithm to obtain the number of the output bits to be prime number, then the output data is encoded and encrypted through a prime number encryption scheme to obtain an output code of 12, the data number 010 which is the same as the reading number in an encoding database is searched to obtain a correct code of 12;
Step S404, comparing the output code with the correct code, and if the output code is the same as the correct code, outputting an error correction normal signal; if the output code is different from the correct code, outputting an error correction abnormal signal;
Step S405, if the error correction abnormal signal is output, the error correction processing is carried out on the read code again;
Step S406, counting the number of times of outputting error correction abnormal signals in the first period, marking the frequency as abnormal frequency, monitoring the abnormal frequency in real time, and sending a hard disk overhaul signal to a user side when the abnormal frequency is greater than or equal to a first frequency threshold value;
In the implementation, the first period is set to 7 days, the first frequency threshold is set to 5, and the output code is the same as the correct code through comparison, so that an error correction normal signal is output; and counting to obtain that the abnormal frequency is 3, and comparing to obtain that the abnormal frequency is smaller than the first frequency threshold value, so that no maintenance signal is required to be sent.
Example 2
The difference between this embodiment and embodiment 1 is that, to further explain the calculation and analysis process of the composite encryption scheme, and to facilitate understanding of the data in other steps in embodiment 1, the specific division embodiment 2 is explained with respect to the composite encryption scheme, the input data in this embodiment is (1 0011 010 101 101 001 1), and the input information bit is 18;
The composite encryption scheme comprises the following sub-steps:
Sequentially calculating factors of input information bits according to the sequence from small to large, marking the factors as bit factors, stopping calculation when the bit factors are larger than or equal to a first factor threshold value, and continuing calculation if the bit factors are smaller than the first factor threshold value; marking the finally calculated digit factor as a rated factor number;
Grouping the input data and marking the input data as encrypted group codes, wherein the number of the encrypted group codes is a rated factor number;
In specific implementation, the first factor threshold is set to be 3, wherein the setting of the first factor threshold is used for facilitating understanding of subsequent calculation, the value in practical application is greater than 5, the digit factors of the input information bits obtained through calculation are sequentially 1,2 and 3 from small to large, and when the digit factor is 3, the calculation is stopped, and the rated factor number is 3;
The encryption group codes are represented as S1 to Sy, y is a rated factor number, the input data are divided into each encryption group code in sequence according to the sequence of S1 to Sy, the number of the divided data in each encryption group code is the input information bit/the rated factor number, and the number is marked as the encryption code number;
In specific implementation, the encryption group codes are denoted as S1 to S3, the encryption code number is calculated to be equal to 6, that is, the input data is divided into S1 to S3, S1 is (1 0011 0), S2 is (1 01 01 1), and S3 is (0 1001 1);
decomposing the quality factors of the encrypted code number by short division until the result is prime, marking a plurality of quality factors obtained finally as code quality factors, counting the number of the code quality factors, and marking the number as factor number;
Calculating the factor number through a matrix side length formula to obtain a matrix side length;
The matrix side length formula is configured as follows: ; where Mel is the matrix side length, nf is the number of factors, and% is the modulo operator;
converting the encryption-group codes into matrices, labeled encryption-group matrices P1 through Py,
The encryption group matrix is: ; wherein T is an element in the encryption group matrix, and Q is the number of encryption codes/Mel;
in a specific implementation, the code number is decomposed by short division to obtain code number quality factors of 3, 2 and 1, respectively, and the statistics to obtain factor number Nf of 3, and since 3%2=1, then selecting Calculating to obtain a matrix with a side length Mel of 2; q is the number of encryption codes/mel=3, the encryption-group codes S1 to S3 are converted into encryption-group matrices P1 to P3, P1 isP2 isP3 is；
Calculating the encryption group matrix P1 to the encryption group matrix Py through a combined number encryption formula to obtain a combined number encryption code of the input data;
the complex encryption formula is configured to: ; wherein Ce is a complex number encryption code, pi is any one of an encryption group matrix P1 to an encryption group matrix Py, i has a value range of 1 to y, i is a positive integer, and Tt is a transpose operator of the matrix;
in the implementation, mel < Q, the composite encryption code Ce is calculated by the composite encryption formula 。
Example 3
Referring to fig. 4, in a second aspect, the application provides a solid state disk error correction stabilizing system based on LDPC and ECC technologies, which includes a data acquisition module, an LDPC processing module, a coding encryption module, and a stability analysis module, where the data acquisition module, the LDPC processing module, and the coding encryption module are respectively connected with the stability analysis module through data;
The data acquisition module is used for acquiring the input data and redundant codes in the ECC codes;
the LDPC processing module is used for calculating the input data to obtain an ECC code, and calculating the reading code to obtain output data; the LDPC processing module comprises an LDPC encoding unit and an LDPC decoding unit;
the LDPC encoding unit is configured with an LDPC encoding strategy comprising:
The method comprises the steps of obtaining data which are received by a solid state disk and need to be recorded into the solid state disk, marking the data as recorded data, obtaining information bits of the recorded data as binary codes, and marking the recorded data as recorded information bits;
Dividing the input data into a plurality of block codes, wherein the block codes are set to be (n, k) 1 to (n, k) x, n is the code length of the block codes, k is the input information bit, and x is the number of the block codes;
n is defined by the formula Calculating the k range of the method; wherein Kp is k range, u is a constant and is a positive integer, u is calculated from 2, if Kp is smaller than k, u+1 is recalculated; if Kp is greater than or equal to k, stopping calculation to obtain the value of u, and finally obtaining n=u+k;
based on an LDPC algorithm, acquiring a generator matrix of input data, and calculating a block code and the generator matrix to obtain an ECC code;
The generation matrix is in the form of ; Wherein g is an element in the generation matrix;
The block code format is: ( ···) ; Wherein, To the point ofThe original code is the original code of the input information;
the ECC code format is: ( ······) ; Wherein, To the point ofIs a redundancy code;
the calculation formula of the ECC code is ECC= (error correction code) = (error ···)×；
Reading redundant codes in ECC codes generated by all block codes divided by the current input data, combining the redundant codes in sequence according to the sequence from (n, k) 1 to (n, k) x, and marking the combined data as data numbers;
The LDPC decoding unit is configured with an LDPC decoding strategy including:
When the solid state disk is detected to perform data reading operation, the read ECC code is obtained, the mark is the reading code, the redundant code in the reading code is obtained, the mark is the reading number, the check matrix corresponding to the reading code in the LDPC algorithm is obtained, and the check matrix format is as follows: ; wherein H is an element in the check matrix;
Multiplying the check matrix by the reading code, and multiplying the result by modulo 2 to obtain a calculation result, wherein the calculation result is marked as a check result, and the format of the check result is as follows: ; wherein L is an element of a verification result, and h is the number of lines;
Reading the row number of which the element is not 0 in the verification result, marking the row number as w, and outputting an error correction signal if the row number is not present; acquiring the check matrix To the point ofSequentially marking Q1 to Qk, reading elements with the number 1 in the Q1 to Qk, and marking the elements as elements to be corrected;
Obtaining the row number of 0 element in the check result, marking as r, and sequentially adding the row number into the check matrix To the point ofMarked as A1 to Ak, reading elements with the number of 1 in A1 to Ak, and marking the elements as correct elements;
obtaining all correct elements, removing the data with the subscript identical to that of the correct elements in the elements to be corrected, and finally marking the rest data in the elements to be corrected as error data;
the reading code is obtained, and the reading code format is as follows: ( ······) Will beTo the point ofThe data with the same subscript as the error data is turned over, if the data is 1, the data is turned over to be 0, and if the data is 0, the data is turned over to be 1, and an error correction completion signal is output at the moment;
if the error correction signal or the error correction completion signal is received, the output To the point ofObtaining output data;
The coding encryption module is used for coding and encrypting the input data and the output data; the coding encryption module comprises a prime number encryption unit and a total number encryption unit;
Acquiring input data and input information bits;
Carrying out prime number judgment on the input information bit through a prime number judgment algorithm, and carrying out coding encryption on input data through a prime number encryption scheme if the input information bit is prime number; if the input information bit is not prime, coding and encrypting the input data through a combined number encryption scheme;
Establishing an encoding database, after encoding and encrypting the input data, acquiring an encoding code and a data number of the input data, and inputting the encoding code into the encoding database for storage, wherein the encoding code comprises a prime number encoding code and a compound number encoding code;
The prime number encryption unit is configured with a prime number encryption policy including:
Acquiring the number of 1 in the input data, and marking the number as the input code weight;
Carrying out binary conversion on the input data, converting the input data into decimal data, and marking the decimal data;
Calculating the input code weight and decimal data through a prime number encryption formula, and finally outputting prime number encryption codes of the input data;
The prime number encryption formula is configured as: ; wherein Sp is prime number encryption code, ew is input code weight, dt is decimal data, Is a two-mode addition method, which is characterized by comprising the steps of,Is a modular square method;
The composite encryption unit is configured with a composite encryption policy including:
Sequentially calculating factors of input information bits according to the sequence from small to large, marking the factors as bit factors, stopping calculation when the bit factors are larger than or equal to a first factor threshold value, and continuing calculation if the bit factors are smaller than the first factor threshold value; marking the finally calculated digit factor as a rated factor number;
Grouping the input data and marking the input data as encrypted group codes, wherein the number of the encrypted group codes is a rated factor number;
The encryption group codes are represented as S1 to Sy, y is a rated factor number, the input data are divided into each encryption group code in sequence according to the sequence of S1 to Sy, the number of the divided data in each encryption group code is the input information bit/the rated factor number, and the number is marked as the encryption code number;
decomposing the quality factors of the encrypted code number by short division until the result is prime, marking a plurality of quality factors obtained finally as code quality factors, counting the number of the code quality factors, and marking the number as factor number;
Calculating the factor number through a matrix side length formula to obtain a matrix side length;
The matrix side length formula is configured as follows: ; where Mel is the matrix side length, nf is the number of factors, and% is the modulo operator;
converting the encryption-group codes into matrices, labeled encryption-group matrices P1 through Py,
The encryption group matrix is: ; wherein T is an element in the encryption group matrix, and Q is the number of encryption codes/Mel;
calculating the encryption group matrix P1 to the encryption group matrix Py through a combined number encryption formula to obtain a combined number encryption code of the input data;
the complex encryption formula is configured to: ; wherein Ce is a complex number encryption code, pi is any one of an encryption group matrix P1 to an encryption group matrix Py, i has a value range of 1 to y, i is a positive integer, and Tt is a transpose operator of the matrix;
the stability analysis module is used for analyzing the error correction processing of the LDPC module and judging whether the error correction analysis of the LDPC module is stable or not; the stability analysis module is configured with a stability analysis strategy comprising:
acquiring the number of bits of output data, marking the number as the number of output bits, and acquiring a reading number;
Carrying out prime number judgment on the output bit number through a prime number judgment algorithm, and if the output bit number is prime number, carrying out coding encryption on the output data through a prime number encryption scheme; if the output data is not prime, the output data is coded and encrypted by a combined number encryption scheme;
Marking the result obtained by coding encryption as an output code, searching the data number which is the same as the reading number in a coding database, obtaining a corresponding encryption code, and marking the corresponding encryption code as a correct code;
Comparing the output code with the correct code, and outputting an error correction normal signal if the output code is the same as the correct code; if the output code is different from the correct code, outputting an error correction abnormal signal;
if the error correction abnormal signal is output, carrying out error correction processing on the read code again;
Counting the number of times of outputting error correction abnormal signals in a first period, marking the frequency as abnormal frequency, monitoring the abnormal frequency in real time, and sending a hard disk overhaul signal to a user side when the abnormal frequency is greater than or equal to a first frequency threshold value.
Example 4
Referring to fig. 5, in a third aspect, the present application provides an electronic device 50, including a processor 501 and a memory 502, where the memory 502 stores computer readable instructions that, when executed by the processor 501, perform the steps of any of the methods described above. Through the above technical solutions, the processor 501 and the memory 502 are interconnected and communicate with each other through a communication bus and/or other form of connection mechanism (not shown), and the memory 502 stores a computer program executable by the processor 501, which when the electronic device 50 is running, is executed by the processor 501 to perform the method in any of the alternative implementations of the above embodiments, so as to implement the following functions: calculating the input data through an LDPC algorithm to obtain an ECC code; the input data is coded and encrypted through a coding encryption algorithm to obtain an encrypted code; decoding the read code through an LDPC algorithm, and marking the decoded result as output data; and analyzing the output code and the encryption code, and judging whether error correction analysis of the LDPC algorithm is stable or not.
Example 5
In a fourth aspect, the present application provides a storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of any of the methods described above. By the above technical solution, the computer program, when executed by the processor, performs the method in any of the alternative implementations of the above embodiments to implement the following functions: calculating the input data through an LDPC algorithm to obtain an ECC code; the input data is coded and encrypted through a coding encryption algorithm to obtain an encrypted code; decoding the read code through an LDPC algorithm, and marking the decoded result as output data; and analyzing the output code and the encryption code, and judging whether error correction analysis of the LDPC algorithm is stable or not.
In the foregoing embodiments of the present application, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.
It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media having computer-usable program code embodied therein. The storage medium may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as static random access Memory (Static Random Access Memory, SRAM), electrically erasable Programmable Read-Only Memory (ELECTRICALLY ERASABLE PROGRAMMABLE READ-Only Memory, EEPROM), erasable Programmable Read-Only Memory (ErasableProgrammable Read Only Memory, EPROM), programmable Read-Only Memory (PROM), read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Claims (9)
1. The solid state disk error correction stabilization method based on the LDPC and ECC technology is characterized by comprising the following steps:
receiving input data, calculating the input data through an LDPC algorithm to obtain an ECC code, reading a redundancy code in the ECC code, and marking the redundancy code as a data number;
acquiring input data, coding and encrypting the input data through a coding encryption algorithm to obtain a coding code, establishing a coding database, and storing the coding code and a data number;
when the solid state disk reads data, the read ECC code is obtained, the read code is marked as read code, the redundant code in the read code is obtained, the read code is marked as read number, the read code is decoded through the LDPC algorithm, and the result obtained through decoding is marked as output data;
Obtaining output data, substituting the output data into a coding encryption algorithm to obtain output codes, searching data numbers which are the same as reading numbers in a coding database, obtaining corresponding encryption codes, analyzing the output codes and the encryption codes, and judging whether error correction analysis of the LDPC algorithm is stable or not;
calculating the input data through an LDPC algorithm to obtain an LDPC code, and reading the error correction code in the LDPC code comprises the following sub-steps:
the method comprises the steps of obtaining data which are received by a solid state disk and need to be recorded into the solid state disk, marking the data as recording data, wherein the recording data are binary codes, obtaining information bits of the recording data, and marking the information bits as recording information bits;
Dividing the input data into a plurality of block codes, wherein the block codes are set to be (n, k) 1 to (n, k) x, n is the code length of the block codes, k is the input information bit, and x is the number of the block codes;
the n is represented by the formula Calculating a value of Kp; wherein u is a constant and a positive integer, u is calculated from 2, and if Kp is smaller than k, u+1 is recalculated; if Kp is greater than or equal to k, stopping calculation to obtain the value of u, and finally obtaining n=u+k;
based on an LDPC algorithm, acquiring a generator matrix of input data, and calculating a block code and the generator matrix to obtain an ECC code;
The generating matrix is in the form of ; Wherein g is an element in the generation matrix;
the block code format is: ( ··· ) ; Wherein, To the point ofThe original code is the original code of the input information;
the ECC code format is: ( ··· ··· ) ; Wherein, To the point ofIs a redundancy code;
the calculation formula of the ECC code is ECC= = (error correction code) ··· )×；
And reading redundant codes in ECC codes generated by all block codes divided by the current input data, sequentially combining according to the sequence of (n, k) 1 to (n, k) x, and marking the combined data as data numbers.
2. The method for stabilizing error correction of solid state disk based on LDPC and ECC technology according to claim 1, wherein obtaining the input data, coding and encrypting the input data by a coding encryption algorithm to obtain an encrypted code, establishing a coding database, and storing the encrypted code and the data number comprises the following sub-steps:
Acquiring input data and input information bits;
Carrying out prime number judgment on the input information bit through a prime number judgment algorithm, and carrying out coding encryption on input data through a prime number encryption scheme if the input information bit is prime number; if the input information bit is not prime, coding and encrypting the input data through a combined number encryption scheme;
And establishing an encoding database, after encoding and encrypting the input data, acquiring an encoding code and a data number of the input data, and inputting the encoding code into the encoding database for storage, wherein the encoding code comprises a prime number encoding code and a compound number encoding code.
3. The method for stabilizing error correction of solid state disk based on LDPC and ECC technology according to claim 2 wherein the prime number encryption scheme comprises the following sub-steps:
Acquiring the number of 1 in the input data, and marking the number as the input code weight;
Carrying out binary conversion on the input data, converting the input data into decimal data, and marking the decimal data;
Calculating the input code weight and decimal data through a prime number encryption formula, and finally outputting prime number encryption codes of the input data;
The prime number encryption formula is configured to: ; wherein Sp is prime number encryption code, ew is input code weight, dt is decimal data, Is a two-mode addition method, which is characterized by comprising the steps of,Is a modular square method.
4. The method for stabilizing error correction of solid state disk based on LDPC and ECC technology according to claim 3, wherein the combined number encryption scheme comprises the following sub-steps:
Sequentially calculating factors of input information bits according to the sequence from small to large, marking the factors as bit factors, stopping calculation when the bit factors are larger than or equal to a first factor threshold value, and continuing calculation if the bit factors are smaller than the first factor threshold value; marking the finally calculated digit factor as a rated factor number;
Grouping the input data and marking the input data as encrypted group codes, wherein the number of the encrypted group codes is a rated factor number;
The encryption group codes are represented as S1 to Sy, y is a rated factor number, the input data are divided into each encryption group code in sequence according to the sequence of S1 to Sy, the number of the divided data in each encryption group code is the input information bit/the rated factor number, and the number is marked as the encryption code number;
decomposing the quality factors of the encrypted code number by short division until the result is prime, marking a plurality of quality factors obtained finally as code quality factors, counting the number of the code quality factors, and marking the number as factor number;
Calculating the factor number through a matrix side length formula to obtain a matrix side length;
the matrix side length formula is configured as follows: ; where Mel is the matrix side length, nf is the number of factors, and% is the modulo operator;
converting the encryption-group codes into matrices, labeled encryption-group matrices P1 through Py,
The encryption group matrix is: ; wherein T is an element in the encryption group matrix, and Q is the number of encryption codes/Mel;
calculating the encryption group matrix P1 to the encryption group matrix Py through a combined number encryption formula to obtain a combined number encryption code of the input data;
the complex encryption formula is configured to: ; where Ce is a complex number encryption code, pi is any one of the encryption group matrix P1 to the encryption group matrix Py, i has a value range of 1 to y, i is a positive integer, and Tt is a transpose operator of the matrix.
5. The method for stabilizing error correction of solid state disk based on LDPC and ECC techniques according to claim 4, wherein decoding the read code by the LDPC algorithm comprises the sub-steps of:
When the solid state disk is detected to perform data reading operation, the read ECC code is obtained, the mark is the reading code, the redundant code in the reading code is obtained, the mark is the reading number, the check matrix corresponding to the reading code in the LDPC algorithm is obtained, and the check matrix format is as follows: ; wherein H is an element in the check matrix;
Multiplying the check matrix by the reading code, and multiplying the result by modulo 2 to obtain a calculation result, wherein the calculation result is marked as a check result, and the format of the check result is as follows: ; wherein L is an element of a verification result, and h is the number of lines;
Reading the row number of which the element is not 0 in the verification result, marking the row number as w, and outputting an error correction signal if the row number is not present; acquiring the check matrix To the point ofSequentially marking Q1 to Qk, reading elements with the number 1 in the Q1 to Qk, and marking the elements as elements to be corrected;
Obtaining the row number of 0 element in the check result, marking as r, and sequentially adding the row number into the check matrix To the point ofMarked as A1 to Ak, reading elements with the number of 1 in A1 to Ak, and marking the elements as correct elements;
obtaining all correct elements, removing the data with the subscript identical to that of the correct elements in the elements to be corrected, and finally marking the rest data in the elements to be corrected as error data;
the reading code is obtained, and the reading code format is as follows: ( ··· ··· ) Will beTo the point ofThe data with the same subscript as the error data is turned over, if the data is 1, the data is turned over to be 0, and if the data is 0, the data is turned over to be 1, and an error correction completion signal is output at the moment;
if the error correction signal or the error correction completion signal is received, the output To the point ofAnd obtaining output data.
6. The method for stabilizing error correction of a solid state disk based on LDPC and ECC techniques according to claim 5, wherein determining whether the error correction analysis of the LDPC algorithm is stable comprises the sub-steps of:
acquiring the number of bits of output data, marking the number as the number of output bits, and acquiring a reading number;
Carrying out prime number judgment on the output bit number through a prime number judgment algorithm, and if the output bit number is prime number, carrying out coding encryption on the output data through a prime number encryption scheme; if the output data is not prime, the output data is coded and encrypted by a combined number encryption scheme;
Marking the result obtained by coding encryption as an output code, searching the data number which is the same as the reading number in a coding database, obtaining a corresponding encryption code, and marking the corresponding encryption code as a correct code;
Comparing the output code with the correct code, and outputting an error correction normal signal if the output code is the same as the correct code; if the output code is different from the correct code, outputting an error correction abnormal signal;
if the error correction abnormal signal is output, carrying out error correction processing on the read code again;
Counting the number of times of outputting error correction abnormal signals in a first period, marking the frequency as abnormal frequency, monitoring the abnormal frequency in real time, and sending a hard disk overhaul signal to a user side when the abnormal frequency is greater than or equal to a first frequency threshold value.
7. The system suitable for the solid state disk error correction stabilization method based on the LDPC and ECC technology as recited in any one of claims 1 to 6, wherein the system comprises a data acquisition module, an LDPC processing module, a coding encryption module and a stabilization analysis module, wherein the data acquisition module, the LDPC processing module and the coding encryption module are respectively connected with the stabilization analysis module in a data manner;
The data acquisition module is used for acquiring the input data and redundant codes in the ECC codes;
the LDPC processing module is used for calculating the input data to obtain an ECC code and calculating the reading code to obtain output data;
The coding encryption module is used for coding and encrypting input data and output data;
The stability analysis module is used for analyzing the error correction processing of the LDPC module and judging whether the error correction analysis of the LDPC module is stable or not.
8. An electronic device comprising a processor and a memory storing computer readable instructions that, when executed by the processor, perform the steps in the method of any of claims 1-6.
9. A storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method according to any of claims 1-6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410922295.1A CN118467237B (en) | 2024-07-10 | 2024-07-10 | Solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410922295.1A CN118467237B (en) | 2024-07-10 | 2024-07-10 | Solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN118467237A CN118467237A (en) | 2024-08-09 |
| CN118467237B true CN118467237B (en) | 2024-10-11 |
Family
ID=92154310
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410922295.1A Active CN118467237B (en) | 2024-07-10 | 2024-07-10 | Solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN118467237B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117558331A (en) * | 2024-01-12 | 2024-02-13 | 杭州广立微电子股份有限公司 | Method and device for detecting address stability of high-density test chip |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9195536B2 (en) * | 2013-07-05 | 2015-11-24 | Kabushiki Kaisha Toshiba | Error correction decoder and error correction decoding method |
| US10404280B2 (en) * | 2015-11-19 | 2019-09-03 | Westhold Corporation | Error correction using cyclic code-based LDPC codes |
| US11385962B2 (en) * | 2020-11-05 | 2022-07-12 | Sage Microelectronics Corporation | Method and apparatus for error correction encoding compressed data |
| CN117608487A (en) * | 2023-11-29 | 2024-02-27 | 山东云海国创云计算装备产业创新中心有限公司 | Method, equipment and medium for constructing and correcting redundant array of independent disk |
-
2024
- 2024-07-10 CN CN202410922295.1A patent/CN118467237B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117558331A (en) * | 2024-01-12 | 2024-02-13 | 杭州广立微电子股份有限公司 | Method and device for detecting address stability of high-density test chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CN118467237A (en) | 2024-08-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3852275A1 (en) | Method, device and apparatus for storing data, computer readable storage medium | |
| CN103703446B (en) | Data reconstruction that network storage Zhong Kang Byzantium lost efficacy, failure-data recovery method and device | |
| CN101572125A (en) | Error correction circuit and method thereof | |
| JP2011514743A (en) | Method and system for detecting and correcting phased burst errors, erasures, symbol errors, and bit errors in received symbol sequences | |
| JP5151987B2 (en) | Distributed information generation apparatus and restoration apparatus | |
| JP2998659B2 (en) | Error control device | |
| CN112000512A (en) | Data restoration method and related device | |
| CN115454712B (en) | A check code recovery method, system, electronic equipment and storage medium | |
| CN115037415A (en) | Error correction coding method, device and terminal based on CRC | |
| US7392461B2 (en) | Decoding for algebraic geometric code associated with a fiber product | |
| CN118467237B (en) | Solid state disk error correction stabilization method, equipment and medium based on LDPC and ECC technologies | |
| CN111464267A (en) | Communication data checking method and device, computer equipment and storage medium | |
| CN210110352U (en) | ECC device for correcting multi-bit errors in NAND Flash | |
| CN111752747A (en) | A memory security check method with enhanced error detection capability | |
| EP4369201A1 (en) | Data processing method and apparatus | |
| CN112000509B (en) | A method, system and device for erasure code encoding based on vector instructions | |
| CN102968356A (en) | Data processing method of cloud storage system | |
| CN115827304A (en) | System and method for checking on-chip high-speed bus data | |
| CN119030669B (en) | Data erasure method and system based on FPGA hardware logic | |
| CN116722954B (en) | Encoding and decoding verification system, method, equipment and storage medium | |
| AU610987B2 (en) | Method and apparatus for decoding error correction code | |
| CN115617275B (en) | File storage method and system applied to software system | |
| CN103810054A (en) | Error checking and correcting methods and related error checking and correcting circuit | |
| CN117950916B (en) | High-reliability data backup method and system | |
| CN117494161A (en) | Mobile hard disk encryption/decryption method, system and medium capable of recovering error data |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |