CN118465604B - Negative power supply open circuit detection circuit and driver chip - Google Patents
Negative power supply open circuit detection circuit and driver chip Download PDFInfo
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- CN118465604B CN118465604B CN202410548147.8A CN202410548147A CN118465604B CN 118465604 B CN118465604 B CN 118465604B CN 202410548147 A CN202410548147 A CN 202410548147A CN 118465604 B CN118465604 B CN 118465604B
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- 238000001514 detection method Methods 0.000 title claims abstract description 47
- 238000005070 sampling Methods 0.000 claims abstract description 23
- 239000003990 capacitor Substances 0.000 claims description 8
- 230000003071 parasitic effect Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 description 5
- 238000003745 diagnosis Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/40—Testing power supplies
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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- Physics & Mathematics (AREA)
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
本发明公开了一种负电源开路检测电路和驱动芯片，所述负电源开路检测电路包括偏置电路模块、比较电路模块、采样电路模块以及滤波电路模块；所述偏置电路模块的输入端与正电源链接，所述偏置电路的输出端连接到所述比较电路模块；所述比较电路模块分别与所述偏置电路模块、所述正电源、所述负电源以及所述参考地连接；所述采样电路模块连接在所述参考地和所述负电源之间；其中，所述比较电路模块用于检测所述负电源是否开路。本发明通过偏置电路模块、比较电路模块以及采样电路模块能够实现对负电源开路进行检测，从而不依赖额外的基准电路、采样电路、偏置电路，可移植性强，结构简单，解决了现有技术中缺乏负电源检测电路的问题。
The present invention discloses a negative power supply open circuit detection circuit and a driver chip, wherein the negative power supply open circuit detection circuit comprises a bias circuit module, a comparison circuit module, a sampling circuit module and a filter circuit module; the input end of the bias circuit module is linked to the positive power supply, and the output end of the bias circuit is connected to the comparison circuit module; the comparison circuit module is respectively connected to the bias circuit module, the positive power supply, the negative power supply and the reference ground; the sampling circuit module is connected between the reference ground and the negative power supply; wherein the comparison circuit module is used to detect whether the negative power supply is open circuit. The present invention can detect the negative power supply open circuit through the bias circuit module, the comparison circuit module and the sampling circuit module, thereby not relying on additional reference circuits, sampling circuits and bias circuits, having strong portability and simple structure, and solving the problem of lack of negative power supply detection circuit in the prior art.
Description
Technical Field
The invention relates to the technical field of detection circuits, in particular to a negative power supply open-circuit detection circuit and a driving chip.
Background
With the continuous development of electronic technology, electronic systems are developed towards high power and small volume. In high power systems, power devices such as IGBTs (insulated gate bipolar transistors), siC MOSFETs (metal oxide semiconductor field effect transistors based on silicon carbide materials) are an essential component. These power devices typically require the system to provide positive and negative power and a pre-driver circuit to achieve reliable on/off. If the positive and negative power supplies of the system fail, the power device can not be conducted or misconducted, and the device is damaged. Therefore, a fault detection circuit for positive and negative power supplies becomes particularly important.
Taking an electric drive system as an example, various fault detection circuits are generally implemented by a highly integrated drive chip. In the driving chip, the detection circuit for the positive power supply is very popular, and a plurality of mature schemes exist, but the detection circuit for the negative power supply is not paid attention to, and the detection circuit for the negative power supply is absent in the prior art.
Based on this, a new solution is needed.
Disclosure of Invention
In view of the above, the embodiments of the present invention provide a negative power supply open circuit detection circuit and a driving chip, so as to at least solve the problem of lack of a negative power supply detection circuit in the prior art.
The embodiment of the invention provides the following technical scheme:
The embodiment of the invention provides a negative power supply open circuit detection circuit which comprises a bias circuit module, a comparison circuit module, a sampling circuit module and a filter circuit module;
The input end of the bias circuit module is connected with a positive power supply, the output end of the bias circuit is connected to the comparison circuit module, the comparison circuit module is respectively connected with the bias circuit module, the positive power supply, the negative power supply and a reference ground, the sampling circuit module is connected between the reference ground and the negative power supply, and the comparison circuit module is used for detecting whether the negative power supply is open or not.
Further, the bias circuit module includes:
a first resistor, wherein a first end of the first resistor is connected with the positive power supply;
The drain electrode of the first NMOS tube is respectively connected with the second end of the first resistor and the grid electrode of the first NMOS tube;
The drain electrode of the second NMOS tube is respectively connected with the source electrode of the first NMOS tube and the grid electrode of the second NMOS tube, and the source electrode of the second NMOS tube is connected with the negative power supply.
Further, the comparison circuit module includes:
A second resistor, the first end of which is connected with a negative power supply;
the source electrode of the third NMOS tube is connected with the second end of the second resistor, and the grid electrode of the third NMOS tube is connected with the bias circuit module;
The drain electrode of the first PMOS tube is respectively connected with the drain electrode of the third NMOS tube and the grid electrode of the first PMOS tube, and the source electrode of the first PMOS tube is connected with the positive power supply;
The grid electrode of the second PMOS tube is connected with the grid electrode of the first PMOS tube, and the source electrode of the second PMOS tube is connected with the positive power supply;
The drain electrode of the fourth NMOS tube is connected with the drain electrode of the second PMOS tube, and the grid electrode of the fourth NMOS tube is respectively connected with the bias circuit module and the grid electrode of the third NMOS tube;
And the first end of the third resistor is connected with the source electrode of the fourth NMOS tube, and the second end of the third resistor is connected with the reference ground.
Further, the sampling circuit module includes:
and the cathode of the diode is connected with the reference ground, and the anode of the diode is connected with the negative power supply.
Further, the diode is a parasitic diode or an ESD diode.
Further, the negative power supply open circuit detection circuit further includes:
The filter circuit module is connected between the positive power supply and the negative power supply, is connected with the comparison circuit module and is used for improving the robustness of the negative power supply open circuit detection circuit.
Further, the filter circuit module includes:
the source electrode of the third PMOS tube is connected with the positive power supply, and the grid electrode of the third PMOS tube is connected with the comparison circuit module;
The first end of the fourth resistor is connected with the drain electrode of the third PMOS tube;
the drain electrode of the fifth NMOS tube is connected with the second end of the fourth resistor, the grid electrode of the fifth NMOS tube is respectively connected with the comparison circuit module and the drain electrode of the third PMOS tube, and the source electrode of the fifth NMOS tube is connected with a negative power supply;
the two ends of the capacitor are respectively connected with the second end of the fourth resistor and the negative power supply;
the input end of the Schmitt trigger is connected with the second end of the fourth resistor, and the output end of the Schmitt trigger is connected with an open circuit indication signal.
The embodiment of the invention also provides a driving chip which comprises any one of the negative power supply open circuit detection circuits.
Compared with the prior art, the beneficial effects achieved by the at least one technical scheme adopted by the embodiment of the invention at least comprise:
according to the negative power supply open circuit detection circuit, the negative power supply open circuit can be detected through the bias circuit module, the comparison circuit module and the sampling circuit module, so that the negative power supply open circuit detection circuit does not depend on an additional reference circuit, a sampling circuit and a bias circuit, is high in portability and simple in structure, and solves the problem that the negative power supply detection circuit is lacked in the prior art.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a negative power supply open circuit detection circuit according to an embodiment of the invention.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings.
Other advantages and effects of the present application will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present application with reference to specific examples. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. The application may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, apparatus may be implemented and/or methods practiced using any number and aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should also be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present application by way of illustration, and only the components related to the present application are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided in order to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details.
Taking an electric driving system as an example, if the negative power supply VEE of the system is lost or the negative power supply VEE is opened, the driving chip cannot turn off the power device under negative pressure. In the switching process of the power device, a large voltage change slope (dV/dt) may be coupled to the gate of the device through the miller capacitance of the device, thereby causing the power device to be turned on by mistake and further causing the bridge arm to be damaged by direct connection.
Aiming at the defects of the prior art, the application can realize the detection of the open circuit of the negative power supply VEE through the bias circuit module, the comparison circuit module and the sampling circuit module, and the robustness of the open circuit detection circuit of the negative power supply is improved through the filter circuit module, so that false alarm is prevented from happening under severe working conditions.
The following describes the technical scheme provided by each embodiment of the present application with reference to the accompanying drawings.
Example 1
As shown in fig. 1, an embodiment of the present application provides a negative power supply open circuit detection circuit, which includes a bias circuit module 1, a comparison circuit module 2, and a sampling circuit module 3. The input end of the bias circuit module 1 is connected with the positive power supply VCC, the output end of the bias circuit module 1 is connected with the negative power supply VEE, the comparison circuit module 2 is respectively connected with the bias circuit module 1, the positive power supply VCC, the negative power supply VEE and the reference ground GND and used for detecting whether the negative power supply VEE is open-circuited, and the sampling circuit module 3 is connected between the negative power supply VEE and the reference ground GND.
Further, the bias circuit module 1 includes a first resistor R 3, a first NMOS transistor M 5, and a second NMOS transistor M 6. The first end of the first resistor R 3 is connected to the positive power supply VCC, the drain electrode of the first NMOS tube M 5 is connected to the second end of the first resistor R 3 and the gate electrode of the first NMOS tube M 5, the drain electrode of the second NMOS tube M 6 is connected to the source electrode of the first NMOS tube M 5 and the gate electrode of the second NMOS tube M 6, and the source electrode of the second NMOS tube M 6 is connected to the negative power supply VEE.
Further, the comparison circuit module 2 comprises a second resistor R 1, a third NMOS tube M 1, a first PMOS tube M 3, a second PMOS tube M 4, Fourth NMOS transistor M 2 and third resistor R 2. Wherein the first end of the second resistor R 1 is connected with the negative power supply VEE, the source of the third NMOS tube M 1 is connected with the second end of the second resistor R 1, the grid of the third NMOS tube M 1 is connected with the bias circuit module 1, the drain of the first PMOS tube M 3 is respectively connected with the drain of the third NMOS tube M 1, the grid electrode of the first PMOS tube M 3 is connected, the source electrode of the first PMOS tube M 3 is connected with a positive power supply VCC, the grid electrode of the second PMOS tube M 4 is connected with the grid electrode of the first PMOS tube M 3, the source electrode of the second PMOS tube M 4 is connected with the positive power supply VCC, the drain electrode of the fourth NMOS tube M 2 is connected with the drain electrode of the second PMOS tube M 4, and the grid electrode of the fourth NMOS tube M 2 is respectively connected with the bias circuit module 1, The gate of the third NMOS tube M 1 is connected, the first end of the third resistor R 2 is connected with the source of the fourth NMOS tube M 2, and the second end of the third resistor R 2 is connected with the ground GND.
Specifically, the gate of the third NMOS transistor M 1 is connected to the gate of the first NMOS transistor M 5, and the gate of the fourth NMOS transistor M 2 is connected to the gate of the first NMOS transistor M 5.
Further, the sampling circuit module 3 includes a diode D 1, a cathode of the diode D 1 is connected to the ground GND, and an anode is connected to the negative power supply VEE.
Specifically, the cathode of diode D 1 is connected to the second terminal of third resistor R 2.
Further, the diode D 1 in the sampling circuit module 3 does not require additional integration, and may be the diode D 1 in a general circuit, such as the parasitic diode D 1 or the ESD diode D 1.
In some of these embodiments, the negative power supply open circuit detection circuit further includes a filter circuit module 4, where the filter circuit module 4 is connected between the positive power supply VCC and the negative power supply VEE, and is connected to the comparison circuit module 2, so as to improve the robustness of the negative power supply open circuit detection circuit.
Further, the filter circuit module 4 includes a third PMOS transistor M 7, a fourth resistor R 4, a fifth NMOS transistor M 8, a capacitor C 1, and a schmitt trigger X 1. The source of the third PMOS tube M 7 is connected with the positive power supply VCC, the grid of the third PMOS tube M 7 is connected with the comparison circuit module 2, the first end of the fourth resistor R 4 is connected with the drain of the third PMOS tube M 7, the drain of the fifth NMOS tube M 8 is connected with the second end of the fourth resistor R 4, the grid of the fifth NMOS tube M 8 is connected with the comparison circuit module 2, the source of the fifth NMOS tube M 8 is connected with the negative power supply VEE, the two ends of the capacitor C 1 are respectively connected with the second end of the fourth resistor R 4, The input end of the Schmitt trigger X 1 is connected with the second end of the fourth resistor R 4, and the output end of the Schmitt trigger X 1 is connected with the open circuit indication signal OUT.
Specifically, the gate of the third PMOS transistor M 7 is connected to the drain of the second PMOS transistor M 4, and the gate of the fifth NMOS transistor M 8 is connected to the drain of the second PMOS transistor M 4.
The PMOS transistor and the NMOS transistor in this embodiment are field effect transistors.
The implementation method of the embodiment of the invention is as follows:
One end of the first resistor R 3 is connected to the positive power supply VCC, and the other end is connected to the drain of the first NMOS transistor M 5. The drain of the first NMOS transistor M 5 is connected to the gate of the first NMOS transistor M 5, and to the gates of the third NMOS transistor M 1 and the fourth NMOS transistor M 2. The source of the first NMOS transistor M 5 is connected to the drain of the second NMOS transistor M 6 and the gate of the second NMOS transistor M 6. The source of the second NMOS transistor M 6 is connected to a negative power source VEE. The diode D 1 has its anode connected to the negative power supply VEE and its cathode connected to the ground GND. One end of the second resistor R 1 is connected to the negative power supply VEE, and the other end is connected to the source of the third NMOS transistor M 1. One end of the third resistor R 2 is connected to the ground GND, and the other end is connected to the source of the fourth NMOS transistor M 2. The drain electrode of the third NMOS tube M 1 is connected to the drain electrode of the first PMOS tube M 3, the gate electrode of the first PMOS tube M 3 and the gate electrode of the second PMOS tube M 4. The source of the first PMOS transistor M 3 is connected to the positive power VCC. The source of the second PMOS transistor M 4 is also connected to the positive power VCC. The drain electrode of the second PMOS transistor M 4 is connected to the drain electrode of the fourth NMOS transistor M 2, and to the gates of the third PMOS transistor M 7 and the fifth NMOS transistor M 8. The source of the fourth PMOS transistor M 7 is connected to the positive power VCC, and the drain of the fourth PMOS transistor M 7 is connected to one end of the fourth resistor R 4. The other end of the fourth resistor R 4 is connected to the drain of the fifth MOS transistor M 8, one end of the capacitor C 1, and the input end of the Schmitt trigger X 1. The source of M8 is connected to a negative power supply VEE. The other end of the capacitor C 1 is connected to the negative power supply VEE. The output of schmitt trigger X 1 is connected to the open-circuit indication signal OUT.
The detection principle of the embodiment of the invention is as follows:
First, assuming that the second resistor R 1 =the third resistor R 2, when the positive and negative power supplies VEE are operating normally, the voltage of the negative power supply VEE is usually lower than the ground GND, for example, -5V;
At this time, the current flowing through the second resistor R 1 is greater than the current flowing through the third resistor R 2, so that the gate of the fifth NMOS transistor M 8 is charged to a high level, the filter capacitor C 1 discharges, and the output OUT is a low level, which represents that the negative power supply VEE works normally;
When the negative power supply VEE has an open circuit fault, under the action of the left bias circuit module 1, a current continuously flows into the negative power supply VEE, flows through the diode D 1, and finally flows into the ground GND. Under this current, the voltage of the negative power supply VEE becomes one diode D 1 drop higher than the voltage of the ground GND, typically about 0.7V. At this time, the current flowing through the second resistor R 1 is smaller than the current flowing through the third resistor R 2, so that the gate of the third PMOS transistor M 7 is put to a low level, the filter capacitor C 1 is charged, and the output OUT finally becomes a high level, which represents that the negative power VEE fails.
Wherein the diode D 1 for sampling generally does not need to be deliberately placed. Because in circuits powered by the positive and negative power supplies VEE, both the ground GND and the negative power supply VEE are external pins. The chip can be internally provided with an ESD electrostatic protection circuit for the pin. A typical ESD circuit includes a diode D 1.
The second resistor R1 and the third resistor R2 can adjust the flip threshold of the comparison circuit. At this time, the voltage of the ground GND may be set to 0V, and then the negative power VEE flip threshold expression is as follows:
Wherein V GS6 is the gate-source voltage of MOS transistor M 6.
Considering that the negative power VEE voltage is generally equal to a diode D 1 voltage drop, about 0.7V, when the negative power VEE is floating, the comparator must be able to detect the fault. When the negative power VEE is negative, even 0V, the comparator cannot missignal the fault. The VTH of the comparator is set to be in the optimal state by combining the two points. If V GS6 is 0.9V, an optimum resistance ratio R 1/R2 =2/3 can be obtained.
The filter circuit module 4 in the invention has the function of improving the robustness of the detection circuit and preventing false alarm under severe working conditions. Taking the driving circuit as an example, when the driving circuit applies PWM signal excitation, the output gate signal is continuously turned over, and a large transient current may flow into the negative power VEE pin of the chip, so that the transient VEE voltage exceeds the GND voltage. If the detection circuit is not provided with the filter circuit, the detection circuit can be turned over by mistake under severe working conditions, so that the system frequently gives out errors. After the filter circuit is added, the detection circuit can work stably under various severe working conditions.
In summary, the negative power supply open circuit detection circuit provided by the invention can effectively improve the fault diagnosis capability of the system. The detection circuit has the advantages of simple structure, convenient implementation, extremely low cost and strong robustness, and can be applied to various systems with positive and negative power supplies VEE for supplying power.
In the existing power supply detection circuit, a sampling circuit is generally used for sampling the negative power supply VEE, and then the negative power supply VEE is compared with a voltage reference provided by a reference circuit, namely the existing power supply detection circuit generally needs to be provided with a sampling circuit, and a reference circuit, a bias circuit, a comparison circuit, a filter circuit and the like are built in a chip to work together with the sampling circuit.
Therefore, when the invention is applied to a chip powered by a positive power supply VEE, the invention can detect the fault of the open circuit of the negative power supply VEE, and the negative power supply open circuit detection circuit has the advantages of simple structure, convenient realization, low cost, no dependence on an additional bias circuit, a reference circuit and a sampling circuit, and strong portability.
Example 2
The embodiment of the application also provides a driving chip, which comprises the negative power supply open circuit detection circuit in the embodiment 1.
The negative power supply open circuit detection circuit of the invention is simple and reliable, can realize the detection of the negative power supply open circuit fault, and is integrated into the driving chip, because the negative power supply open circuit detection circuit of the invention has simple structure, the area is very small, the extra area is hardly spent, the fault diagnosis coverage rate of the whole system can be improved without extra circuit cooperation, and the safety performance of the system is improved.
In this specification, identical and similar parts of the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the product embodiments described later, since they correspond to the methods, the description is relatively simple, and reference is made to the description of parts of the system embodiments.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present application should be included in the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.
Claims (5)
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| CN107478992B (en) * | 2016-06-08 | 2020-04-24 | 比亚迪股份有限公司 | Voltage detection and judgment circuit and power battery system with same |
| CN213585745U (en) * | 2020-12-18 | 2021-06-29 | 福建江夏学院 | High-efficiency and low-power circuits for power monitoring |
| CN116736822A (en) * | 2022-03-03 | 2023-09-12 | 株洲中车时代电气股份有限公司 | Signal sampling fault diagnosis circuit and method for motor controller |
| CN116169867A (en) * | 2022-12-09 | 2023-05-26 | 杭州优迈科技有限公司 | Slow start circuit and slow start method |
| CN116742570A (en) * | 2023-06-08 | 2023-09-12 | 中国电子科技集团公司第二十四研究所 | Power supply compensation end protection circuit and method |
| CN116953365A (en) * | 2023-06-20 | 2023-10-27 | 西安矽源半导体有限公司 | Switch capacitor sampling detection circuit and battery protection chip using same |
| CN117368687A (en) * | 2023-09-15 | 2024-01-09 | 昆明理工大学 | Basic operation circuit construction fault detection device and method thereof |
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| CN101686044A (en) * | 2009-03-25 | 2010-03-31 | 深圳市科陆变频器有限公司 | IGBT drive protection circuit |
| CN115469242A (en) * | 2022-09-13 | 2022-12-13 | 江苏万邦微电子有限公司 | Negative power supply monitoring system and method |
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