CN118315997A - ESD protection circuit of GaN-based enhanced HEMT - Google Patents
ESD protection circuit of GaN-based enhanced HEMT Download PDFInfo
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- CN118315997A CN118315997A CN202211741971.2A CN202211741971A CN118315997A CN 118315997 A CN118315997 A CN 118315997A CN 202211741971 A CN202211741971 A CN 202211741971A CN 118315997 A CN118315997 A CN 118315997A
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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Abstract
The invention discloses an ESD protection circuit of a GaN-based enhanced HEMT, which is connected between a grid electrode and a source electrode of a power HMET, wherein the power HMET adopts the GaN-based enhanced HEMT; the ESD protection circuit comprises a forward boost current-guiding diode and a reverse boost current-guiding diode which are connected in parallel; when a forward ESD event occurs, the forward boost current-guiding diode is conducted, and the reverse boost current-guiding diode is cut off; and when a reverse ESD event occurs, the reverse boost current-guiding diode is conducted, and the forward boost current-guiding diode is cut off. Compared with the prior art, the ESD protection circuit provided by the invention has higher negative trigger voltage, and can reduce negative false start of the ESD protection circuit in the power HEMT switching process, thereby better meeting the dynamic reliability test requirement of the power HEMT and effectively reducing the power loss of the grid driving circuit.
Description
Technical Field
The invention relates to an electrostatic discharge (Electro-STATIC DISCHARGE, ESD) protection circuit, in particular to an ESD protection circuit of a GaN-based enhanced High Electron Mobility Transistor (HEMT), belonging to the technical field of semiconductors.
Background
The group III nitride semiconductor represented by GaN has the advantages of large forbidden bandwidth, good chemical stability, high breakdown voltage, and the like. Especially, the GaN-based HEMT formed by the heterojunction such as AlGaN/GaN has the characteristics of high electron concentration and mobility, is excellent in high frequency, low on-resistance, high power density and the like, can be used as a core device of various power conversion systems and radio frequency power amplification systems, and has wide prospect in the application fields such as consumer electronics, industrial electronics, automobile electronics and the like.
Currently, as a more competitive enhancement mode device, various GaN-based enhancement mode power HEMTs have begun to be commercially applied gradually. For example, fig. 1 shows a p-type gate GaN-based enhanced power HEMT (p-GaN E-HEMT). However, since the p-GaN gate capacitance is small and the maximum forward withstand voltage is low (the maximum withstand voltage is typically 12V or less and the operating voltage is 6V or less), the device is extremely vulnerable to damage during an electrostatic discharge event, thereby causing a failure of the power conversion circuit. Specifically, when an electrostatically charged body, machine, device, or the like approaches or contacts the packaged p-GaN E-HEMT, electrostatic charge will bleed through the pin (gate or drain) of the device to Ground (GND). Typically, the drain withstand voltage is higher and the gate withstand voltage is lower. Therefore, it is necessary to add a charge release channel, i.e., an ESD protection circuit, between the gate and the ground.
Fig. 2 shows an ESD protection circuit of a conventional p-GaN E-HEMT (hereinafter referred to as a power HEMT), which mainly includes a clamp diode D 1～Dn, a resistor R, and a charge release transistor E-HEMT. When a forward electrostatic event occurs, the voltage on the resistor R exceeds the threshold voltage of the E-HEMT, the E-HEMT is conducted, and electrostatic charge is released; meanwhile, in the event, due to the existence of the clamping diode D 1～Dn, the ESD protection circuit can be triggered only when the forward voltage exceeds the total starting voltage (usually more than or equal to 6V and increases along with the increase of n) of the diode series connection, so that the ESD protection circuit is well ensured to be in a low-power consumption state in the forward working voltage range. When a reverse electrostatic event occurs, the E-HEMT acts as a forward conducting diode, and electrostatic charge can also be discharged. In a forward ESD event, the trigger voltage of the ESD protection circuit is determined by the total turn-on voltage of the series connection of the diodes D 1～Dn, and the number of diodes can be appropriately increased or decreased according to the design requirement. However, in a reverse ESD event, the trigger voltage of the ESD protection circuit is determined by the reverse operating voltage of the transistor itself, which is typically only-1 to-2V. The lower reverse trigger voltage poses a significant challenge for proper operation of the power HEMT for the following reasons:
Firstly, due to parasitic effects (inductance, capacitance and the like) existing in the circuit, in the fast switching process of the high-voltage and high-current switch, the input and output signals inevitably have certain oscillation phenomena, so that voltage and current overshoot is caused. When the gate drive voltage is switched from high (e.g., 5V) to low (0V), there is a negative voltage overshoot, which is typically above-1V. If the negative turn-on trigger voltage of the ESD protection circuit is too low, frequent misleading situations may exist during normal switching of the power HEMT. The turn-on of the ESD protection circuit during normal operation will cause excessive power consumption of the gate driving, resulting in a decrease in power conversion efficiency. At the same time, the lost energy is dissipated in the form of heat, so that the local temperature of the device rises too quickly, and the basic performance and the reliability of the device are adversely affected.
Secondly, in the process of testing the reliability of the power HEMT, a certain negative voltage is usually required to be applied to the grid electrode to evaluate the influence of the energy band structure, the defect state and the like under the grid electrode reverse bias on the dynamic reliability of the device. If the reverse trigger voltage of the ESD protection circuit connected in parallel to the gate-source of the power HEMT is too low, a sufficient negative voltage cannot be provided to the gate of the power HEMT, and the evaluation of the dynamic reliability of the gate reverse bias and the like of the power HEMT may be adversely affected, or even the evaluation may not be completed.
Disclosure of Invention
The invention mainly aims to provide an ESD protection circuit of a GaN-based enhanced HEMT to overcome the defects in the prior art.
In order to achieve the purpose of the invention, the technical scheme adopted by the invention comprises the following steps:
Some embodiments of the present invention provide an ESD protection circuit for a GaN-based enhanced HEMT connected between a gate and a source of a power HMET employing the GaN-based enhanced HEMT; the ESD protection circuit comprises a forward boost current-guiding diode and a reverse boost current-guiding diode which are connected in parallel; when a forward ESD event occurs, the forward boost current-guiding diode is conducted, and the reverse boost current-guiding diode is cut off; and when a reverse ESD event occurs, the reverse boost current-guiding diode is conducted, and the forward boost current-guiding diode is cut off.
Compared with the prior art, the ESD protection circuit of the GaN-based enhanced HEMT has higher negative trigger voltage (usually more than-4V), and can reduce the negative false start of the ESD protection circuit in the power HEMT switching process, thereby reducing the power loss of a gate driving circuit, and simultaneously meeting the requirement of testing the dynamic reliability of a device under the negative voltage of the gate of the power HEMT better, and ensuring the reliability of the power HEMT to be completely evaluated.
Drawings
FIG. 1 is a schematic diagram of a GaN-based enhanced HEMT;
Fig. 2 is a schematic structural diagram of an ESD protection circuit of a GaN HEMT according to the prior art;
fig. 3 is a schematic diagram of an ESD protection circuit of a GaN-based enhanced HEMT according to embodiment 1 of the present invention;
FIGS. 4 a-4 b are schematic diagrams illustrating operation of the ESD protection circuit shown in FIG. 3 during a forward ESD event and a reverse ESD event, respectively;
FIG. 5 is a layout of an ESD protection circuit in embodiment 1 of the present invention;
FIG. 6 is a graph of current-voltage testing of a GaN-based enhanced HEMT without the ESD protection circuit, with the ESD protection circuit of FIG. 2, or with the ESD protection circuit of FIG. 3;
fig. 7 is a schematic diagram of an ESD protection circuit of a GaN-based enhanced HEMT according to embodiment 2 of the present invention;
Reference numerals illustrate: 001 is a power HEMT,101 is a diode string, 102 is a triac, 103 is a resistor, 104 is a forward boost steering diode, and 105 is a reverse boost steering diode; 20 is a forward ESD event protection circuit, 201 is a first diode string, 202 is a first triac, 203 is a first resistor, 204 is a forward boost photodiode; 30 is a reverse ESD event protection circuit, 301 is a second diode string, 302 is a second triac, 303 is a second resistor, and 305 is a reverse boost current steering diode.
Detailed Description
In the application circuit of the GaN-based power HEMT, due to parasitic inductance, capacitance and the like, the voltage of a grid and the like is inevitably in overshoot due to oscillation in the process of turning on or off. When the gate is turned off, negative overshoots may be generated in the gate voltage, which may cause the ESD protection circuit to turn on. There is no good solution to this problem in the prior art.
In view of the drawbacks of the prior art, the present inventors have long studied and have put forward a technical solution of the present invention, and the technical solution, the implementation process and principle thereof, etc. will be further explained as follows. It is to be understood that within the scope of the present invention, the above-described features of the present invention and those specifically described in the following (embodiments) may be combined with each other to constitute new or preferred embodiments. Is limited to a space and will not be described in detail herein.
Some embodiments of the present invention provide an ESD protection circuit for a GaN-based enhanced HEMT connected between a gate and a source of a power HMET employing the GaN-based enhanced HEMT; the ESD protection circuit comprises a forward boost current-guiding diode and a reverse boost current-guiding diode which are connected in parallel; when a forward ESD event occurs, the forward boost current-guiding diode is conducted, and the reverse boost current-guiding diode is cut off; and when a reverse ESD event occurs, the reverse boost current-guiding diode is conducted, and the forward boost current-guiding diode is cut off.
In one embodiment, the ESD protection circuit further comprises a diode string, a triac, and a resistor, wherein the gate of the power HMET is electrically connected to the gate of the triac through the diode string, the resistor is connected in parallel between the gate and the source of the triac, the forward boost current-guiding diode and the reverse boost current-guiding diode are connected in parallel between the source and the Ground (GND) of the triac, the drain of the triac is connected to the gate of the power HMET, and the source of the power HMET is connected to the ground.
In one embodiment, the diode used to form the diode string includes, but is not limited to, a hybrid anode diode, MS-type diode, or PN diode formed by shorting the gate and source of a GaN-based HEMT (e.g., p-GaN E-HEMT).
In one embodiment, the diode string includes a plurality of diodes arranged in series, the number of diodes being determined by the forward trigger voltage (typically ≡8v) of the designed ESD protection circuit and the turn-on voltage of a single diode, which may be typically 3 to 15.
In one embodiment, the triac is an enhancement mode HEMT with a high current output capability in the pulsed state, which may include, but is not limited to, a p-GaN gate enhancement mode HEMT or other process compatible enhancement mode HEMTs, with current output capability typically no less than 1A.
In one embodiment, the resistor may be a thin film resistor such as a metal, a resistor composed of two-dimensional electron gas (2 DEG), or the like, and is not limited thereto.
In one embodiment, the ESD protection circuit comprises a forward ESD event protection circuit and a reverse ESD event protection circuit:
The forward ESD event protection circuit comprises a first diode string, a first trigger triode and a first resistor, wherein the grid electrode of the power HMET is electrically connected with the grid electrode of the first trigger triode through the first diode string, the first resistor is connected between the grid electrode and the source electrode of the first trigger triode in parallel, the forward boost current-guiding diode is connected between the drain electrode of the trigger triode and the grid electrode of the power HMET, the drain electrode of the trigger triode is connected with the grid electrode of the power HMET, and the source electrode of the trigger triode is connected with the source electrode of the power HMET;
The reverse ESD event protection circuit comprises a second diode string, a second trigger triode and a second resistor, wherein a source electrode of the power HMET is electrically connected with a grid electrode of the second trigger triode through the second diode string, the second resistor is connected between the grid electrode and the source electrode of the second trigger triode in parallel, the source electrode of the trigger triode is connected with the grid electrode of the power HMET, and the reverse supercharging flow guide diode is connected between a drain electrode of the trigger triode and the source electrode of the power HMET.
In one embodiment, the diodes used to form the first or second diode string include, but are not limited to, a hybrid anode diode, MS-type diode, or PN diode that shorts the gate and source of the GaN-based HEMT.
In one embodiment, the first diode string or the second diode string includes 3 to 15 diodes arranged in series.
In one embodiment, the first or second triac is an enhancement HEMT with a current output capability above 1A.
In one embodiment, the first resistor or the second resistor includes a thin film resistor such as a metal or a resistor composed of two-dimensional electron gas.
In one embodiment, the source of the first triac and the source of the power HEMT are both connected to ground.
In one embodiment, the forward boost flow director diode has the same flow conductivity as the reverse boost flow director diode.
In one embodiment, the forward boost steering diode and the reverse boost steering diode include a hybrid anode diode, an MS-type diode, or a PiN diode formed by shorting the gate and source of a GaN-based HEMT (e.g., p-GaN E-HEMT), but are not limited thereto.
In one embodiment, the current output capability of the forward boost and reverse boost photodiodes is above 1A.
In one embodiment, the forward boost current-steering diode, the reverse boost current-steering diode, and the triac have comparable current-steering capabilities.
In one embodiment, the ESD protection circuit is integrated in-chip between the gate and source of the power HEMT.
In the present invention, the power HMET may be an enhancement HEMT based on a p-GaN gate or HEMT based on different gate technology routes of MIS (metal-insulator-semiconductor), MOS (metal-oxide-semiconductor), or the like, and is not limited thereto.
The ESD protection circuit of the GaN-based enhanced HEMT provided by the invention adopts two or two groups of positive and negative boost current-guiding diodes which are connected in parallel with each other between the source electrode of the trigger triode and the ground end GND, when a reverse ESD event occurs, the reverse boost current-guiding diode is conducted, the positive boost current-guiding diode is cut off, the reverse trigger voltage is effectively improved (usually to-4V or more negative), and further the negative false start of the ESD protection circuit in the switching process of the power tube can be reduced, so that the requirement of the dynamic reliability of a test device under the negative voltage of the grid electrode of the power HEMT can be better met, the reliability of the power HEMT is completely evaluated, and meanwhile, the power loss of the grid electrode driving circuit can be obviously reduced.
The technical scheme of the invention is further described in detail below through examples and with reference to the accompanying drawings. However, the examples are chosen to illustrate the invention only and are not intended to limit the scope of the invention.
Example 1
Referring to fig. 3, the ESD protection circuit of the GaN-based enhanced HEMT provided in the present embodiment is connected between the gate and the source of the power HMET, where the power HMET adopts a p-GaN E-HEMT, or may be another type of GaN-based enhanced HEMT. The ESD protection circuit is mainly formed by connecting a diode string 101, a triac 102, a resistor 103, a forward boost current-guiding diode 104, a reverse boost current-guiding diode 105, and the like.
The diodes in the diode string 101 may be mixed anode diodes, MS diodes, PN diodes, etc. formed by p-GaN E-HEMT gate-source short circuit, and the number of the diodes is determined by the forward trigger voltage (usually not less than 8V) of the designed ESD protection circuit and the turn-on voltage of a single diode, preferably 3 to 15 diodes.
The triac 102 is typically an enhancement HEMT with a high current output capability in a pulse state, and may be a p-GaN gate enhancement HEMT or other process compatible enhancement HEMT, and its current output capability is typically not lower than 1A.
The resistor 103 may be a thin film resistor such as a metal resistor or a resistor formed by two-dimensional electron gas (2 DEG), and is used for generating a forward ESD event, and when an electrostatic voltage is applied to a channel formed by the diode string 101, the resistor 103, and the forward boost current-guiding diode 104, the voltage dropped on the resistor 103 may force the triac 102 to turn on.
The forward boost current-guiding diode 104 and the reverse boost current-guiding diode 105 have the same current-guiding capability, and the anode and cathode are connected in parallel and then connected in series between the source electrode (S) and the ground end (GND) of the triac 102, and may be a hybrid anode diode formed by shorting the gate-source of the p-GaNE-HEMT, an MS diode formed by metal/AlGaN/2 DEG, or a PiN diode formed by p-GaN/AlGaN/2DEG, etc., where the current output capability is generally not lower than 1A.
Referring to fig. 4 a-4 b, the ESD protection circuit is connected in parallel between the gate (G) and the source (S) of the power HEMT. When a positive ESD event occurs on the gate, a transient positive high voltage exists on the gate of the power HEMT relative to the source (also the ground GND), and at the same time, a voltage is also applied to the ESD protection circuit, and when the voltage dropped on the resistor 103 exceeds the threshold voltage of the triac 102, the triac 102 is turned on, and due to its high current conduction capability, the electrostatic charge can be rapidly released, the positive electrostatic high voltage disappears, and the gate of the power HEMT is protected. In a forward ESD event, the reverse boost current-steering diode 105 is turned off, and the turn-on voltage of the ESD protection circuit is determined by the diode string 101 and the forward boost current-steering diode 104. When a negative ESD event occurs on the gate, the diode string 101 and the positive boost current-guiding diode 104 are in an off state, and the triac 102 and the resistor 103 are equivalent to diodes that are turned on in the positive direction, so that the turn-on voltage of the ESD protection circuit is determined by the triac 102 and the negative boost current-guiding diode 105; when the electrostatic voltage is higher (usually much higher) than the sum of the two turn-on voltages, the triode 102 and the negative boost current-steering diode 105 turn on, the electrostatic charge is rapidly discharged to GND, the electrostatic high voltage disappears, and the gate of the power HEMT can be protected as well.
In this embodiment, the ESD protection circuit is monolithically integrated with the power HEMT, and in particular, the ESD protection circuit is integrated in-chip between the gate-source of the power HEMT, and is fully compatible with the GaN power HEMT fabrication process.
For example, in the present embodiment, the ESD protection circuit may be manufactured in parallel between the gate G and the source S thereof while the p-GaN gate-enhanced HEMT 001 is being manufactured on a GaN-based wafer. A diode string 101, a triac 102, a resistor 103 connected in parallel with the triac 102, and a forward boost steering diode 104 and a reverse boost steering diode 105 in parallel relationship are connected in series from the gate to the source of the power HEMT 001. The diode string 101 is composed of a hybrid anode diode (single on voltage of about 1.2V) formed by 6 p-GaN gate-enhanced HEMTs with a gate-to-source short and a gate width of about 100 μm. The triac 102 is a p-GaN gate-enhanced HEMT having a gate width of about 10mm, a threshold voltage of about 1.2V, and a saturated output current of about 2A. Resistor 103 is formed of metal-2 DEG-metal, has a width of about 10 μm, a metal Pad spacing of about 100 μm, and a resistance of about 5000 Ω. The forward boost steering diode 104 and the reverse boost steering diode 105 are formed by shorting the p-GaN gate enhanced HEMT gate source with a gate width of about 10mm and a saturated output current of about 2A, and the forward turn-on voltage is about 1.2V. The layout of the ESD protection circuit can be referred to fig. 5.
In order to facilitate verifying the performance of the ESD protection circuit of the present embodiment, the present embodiment further prepares the ESD protection circuit (as shown in fig. 2) without the power HEMT, the parallel forward boost current-steering diode, and the reverse boost current-steering diode connected in parallel with the ESD protection circuit on the same wafer. And the I-V curves between the gate (G) -source (S) of the three were tested, and the results are shown in FIG. 6. It can be seen that without the ESD protection circuit, the current between G-S of the power HEMT hardly varies with the voltage, which also means that when an ESD event occurs, the total electrostatic voltage will drop directly above the G-S, which is very likely to cause damage to the power HEMT. When the existing ESD protection circuit is adopted, the current between G and S of the power HEMT is increased sharply when the gate voltage exceeds the range of-2 to 6V, which means that the power HEMT can normally work in the range of the gate voltage, and when the gate voltage exceeds the range, the power loss of the gate of the power HEMT occurs through the ESD protection circuit. When the ESD protection circuit of the embodiment is adopted, the normal working voltage range of the grid electrode between G and S of the power HEMT is-4V to 8V.
The above test results show that the ESD protection circuit of the present embodiment can effectively increase the operating voltage range of the gate of the power HEMT, and in particular, increase the negative trigger voltage of the ESD protection circuit.
Example 2
The ESD protection circuit of the GaN-based enhanced HEMT according to the present embodiment is shown in fig. 7, and includes a forward ESD event protection circuit 20 and a reverse ESD event protection circuit 30 connected between the gate G and the source S of the power HEMT001 (e.g., p-GaN gate enhanced HEMT). The source of the power HEMT001 is connected to ground.
The forward ESD event protection circuit 20 is connected in series with a first diode string 201, a first triac 202, a resistor 203 connected in parallel between the G-S of the first triac 202, and a forward boost current-steering diode 204 connected between the gate of the power HEMT 001 and the drain of the first triac 202, in sequence from G to S of the power HEMT 001.
From S to G of the power HEMT 001, the reverse ESD event protection circuit 30 is serially connected with a second diode string 301, a second triac 302, a resistor 303 connected in parallel between the second triac 302G-S, and a reverse boost current-steering diode 305 connected between the source of the power HEMT 001 and the drain of the second triac 302.
Among them, the first diode string 201 is composed of 3 p-GaN/AlGaN/2DEG formed PIN diodes (single on voltage of about 2.5V) having a gate width of about 100 μm. The second diode string 301 consists of 3 p-GaN/AlGaN/2DEG formed PIN diodes (single turn-on voltage about 2.5V) with a gate width of about 100 μm. The first and second transistors 202, 302 are p-GaN gate-enhanced HEMTs having a gate width of about 8mm, a threshold voltage of about 1.5V, and a saturated output current of about 1.6A. The first resistor 203 and the second resistor 303 are both made of metal-2 DEG-metal, have a width of about 5 μm, a metal Pad pitch of about 100 μm, and a resistance of about 5000 Ω. The forward boost steering diode 204 and the reverse boost steering diode 305 are formed by shorting the p-GaN gate-enhanced HEMT gate source with a gate width of about 8mm and a saturated output current of about 1.6A, and the forward turn-on voltage is about 1.5V.
In this embodiment, the forward ESD event protection circuit 20 and the reverse ESD event protection circuit 30 can be fabricated in parallel between the gate G and the source S of the power HEMT001 while being fabricated on a GaN-based wafer.
I-V test is carried out on the ESD protection circuit of the embodiment, and the forward trigger voltage of the ESD protection circuit is more than or equal to 10V, and the reverse trigger voltage is less than or equal to-7.5V. Compared with the prior ESD protection circuit, the reverse trigger voltage is greatly improved.
It should be understood that the above embodiments are merely for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the present invention and implement the same according to the present invention without limiting the scope of the present invention. All equivalent changes or modifications made in accordance with the spirit of the present invention should be construed to be included in the scope of the present invention.
Claims (10)
1. An ESD protection circuit of a GaN-based enhanced HEMT is connected between a grid electrode and a source electrode of a power HMET, wherein the power HMET adopts the GaN-based enhanced HEMT; the method is characterized in that: the ESD protection circuit comprises a forward boost current-guiding diode and a reverse boost current-guiding diode which are connected in parallel; when a forward ESD event occurs, the forward boost current-guiding diode is conducted, and the reverse boost current-guiding diode is cut off; and when a reverse ESD event occurs, the reverse boost current-guiding diode is conducted, and the forward boost current-guiding diode is cut off.
2. The ESD protection circuit of the GaN-based enhanced HEMT of claim 1, wherein: the ESD protection circuit further comprises a diode string, a trigger transistor and a resistor, wherein the grid electrode of the power HMET is electrically connected with the grid electrode of the trigger transistor through the diode string, the resistor is connected between the grid electrode and the source electrode of the trigger transistor in parallel, the forward supercharging flow guide diode and the reverse supercharging flow guide diode are connected between the source electrode and the ground end of the trigger transistor after being connected in parallel, the drain electrode of the trigger transistor is connected with the grid electrode of the power HMET, and the source electrode of the power HMET is connected with the ground end.
3. The ESD protection circuit of the GaN-based enhanced HEMT of claim 2, wherein: the diode used for forming the diode string comprises a mixed anode diode, an MS diode or a PN diode which is formed by shorting the grid electrode and the source electrode of the GaN-based HEMT; and/or the diode string comprises 3-15 diodes arranged in series.
4. The ESD protection circuit of the GaN-based enhanced HEMT of claim 2, wherein: the trigger triode adopts an enhanced HEMT with current output capacity more than 1A; and/or the resistor comprises a thin film resistor or a resistor composed of two-dimensional electron gas.
5. The ESD protection circuit of the GaN-based enhanced HEMT of claim 1, wherein: the ESD protection circuit comprises a forward ESD event protection circuit and a reverse ESD event protection circuit;
The forward ESD event protection circuit comprises a first diode string, a first trigger triode and a first resistor, wherein the grid electrode of the power HMET is electrically connected with the grid electrode of the first trigger triode through the first diode string, the first resistor is connected between the grid electrode and the source electrode of the first trigger triode in parallel, the forward boost current-guiding diode is connected between the drain electrode of the trigger triode and the grid electrode of the power HMET, the drain electrode of the trigger triode is connected with the grid electrode of the power HMET, and the source electrode of the trigger triode is connected with the source electrode of the power HMET;
The reverse ESD event protection circuit comprises a second diode string, a second trigger triode and a second resistor, wherein a source electrode of the power HMET is electrically connected with a grid electrode of the second trigger triode through the second diode string, the second resistor is connected between the grid electrode of the second trigger triode and the source electrode in parallel, the source electrode of the trigger triode is connected with the grid electrode of the power HMET, and the reverse supercharging flow guide diode is connected between a drain electrode of the trigger triode and the source electrode of the power HMET.
6. The ESD protection circuit of the GaN-based enhanced HEMT of claim 5, wherein: the diode used for forming the first diode string or the second diode string comprises a mixed anode diode, an MS diode or a PN diode which is formed by shorting the grid electrode and the source electrode of the GaN-based HEMT; and/or the first diode string or the second diode string comprises 3-15 diodes which are arranged in series.
7. The ESD protection circuit of the GaN-based enhanced HEMT of claim 5, wherein: the first trigger triode or the second trigger triode adopts an enhanced HEMT with the current output capacity more than 1A; and/or the first resistor or the second resistor comprises a thin film resistor or a resistor formed by two-dimensional electron gas.
8. The ESD protection circuit of the GaN-based enhanced HEMT of claim 5, wherein: and the source electrode of the first trigger triode and the source electrode of the power HEMT are both connected with a ground terminal.
9. The ESD protection circuit of the GaN-based enhanced HEMT of any one of claims 1-8, wherein: the flow guiding capacity of the forward supercharging flow guiding diode is the same as that of the reverse supercharging flow guiding diode;
And/or the forward boost flow guide diode and the reverse boost flow guide diode comprise a mixed anode diode, an MS diode or a Pin diode which are formed by shorting the grid electrode and the source electrode of the GaN-based HEMT;
and/or the current output capacity of the forward boost current-guiding diode and the reverse boost current-guiding diode is above 1A.
10. The ESD protection circuit of the GaN-based enhanced HEMT of any one of claims 1-8, wherein: the ESD protection die is integrated in-between the gate and source of the power HEMT.
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