CN118311503A - A single-bit broadband radar system with arbitrarily variable threshold - Google Patents

Abstract

The present invention discloses a single-bit broadband radar system with an arbitrary variable threshold, and the steps are as follows: S1, by transmitting a signal to a detection target, the transmitting signal propagates to the detected target, and receives the echo signal reflected by it, and performs demodulation processing to obtain a mixed signal; S2, the mixed signal obtained in step S1 is amplified, filtered and voltage biased to obtain a processed mixed signal, and its signal parameters are measured; S3, a microcontroller generates and adjusts an arbitrary comparison threshold through the signal parameters of the mixed signal, and outputs it to a comparison circuit for comparison with the processed mixed signal to obtain a single-bit signal; S4, the microcontroller regularly collects the single-bit signal in step S3, and then rearranges the single-bit data inside the controller and outputs the rearranged data to a host computer. The present invention can effectively improve sampling, storage and transmission efficiency, and the system complexity is lower, which is conducive to reducing manufacturing costs.

Description

A single-bit broadband radar system with arbitrarily variable threshold

Technical Field

The present invention relates to the field of radar monitoring technology, and in particular to a single-bit broadband radar system with an arbitrarily variable threshold.

Background technique

In the existing technology, with the rapid development and rapid application of radar technology, as well as the increasing demand for refined target information, radar bandwidth and data volume are also increasing, which to a certain extent limits the further increase of radar equipment and puts forward higher requirements on the hardware performance of the system; on the other hand, the signal sampling rate also needs to be improved accordingly to avoid signal spectrum aliasing, which increases the amount of data and reduces the efficiency of data processing. Therefore, how to effectively solve the contradiction between radar system performance and platform limited resources, and minimize the demand for hardware resources while ensuring the radar's target detection performance and efficiency, is the hot spot and difficulty of radar system lightweight research, and is also the key to promoting its promotion and application in small, mobile, and unmanned platforms.

Petros T. Boufounos and Richard G. Baraniuk first proposed the single-bit compressed sensing theory at the 2008 42nd Annual Conference on Information Sciences and Systems, pointing out that for sparse signals, they can be stably reconstructed only by the sign of the measurement value, that is, single-bit zero threshold quantization. However, in the quantization process, the absolute amplitude information of the signal is lost, so the reconstructed signal only contains the relative amplitude information of the signal, which brings severe challenges to radar target detection and imaging.

Zhao Bo et al. proposed a SAR imaging scheme of single-frequency threshold single-bit sampling in IEEE Transactions on Geoscience and Remote Sensing. Zhao Bo et al. analyzed the formation mechanism of high-order harmonics and cross-modulation components, introduced a single-frequency time-varying threshold, compared the radar echo signal with the single-frequency time-varying threshold, and quantized it into 1-bit data. While retaining the advantages of 1-bit quantization in system simplification and efficiency improvement, it also maintains the absolute amplitude information lost in 1-bit sampling quantization, so as to better obtain target information. However, the experiment conducted by his team was based on the condition that the data obtained by high-precision radar sampling was single-bit on the software side. Although it can simplify the algorithm complexity of the host computer, it does not solve the problems of high-precision sampling cost of the hardware radar system, low cost-effectiveness of massive data processing, limited platform load resources, and insufficient system processing efficiency.

Therefore, in order to effectively resolve the contradiction between radar system performance and platform limited resources, it is urgent to design a single-bit broadband radar system with arbitrary variable thresholds that is suitable for most control chips.

Summary of the invention

The purpose of the present invention is to provide a single-bit broadband radar system with an arbitrarily variable threshold, which can effectively improve the sampling, storage and transmission efficiency, can be applicable to different radar monitoring scenarios and microcontrollers, and has lower system complexity, which is conducive to reducing manufacturing costs.

To achieve the above object, the present invention provides a single-bit broadband radar system with an arbitrary variable threshold, the steps of which are as follows:

S1, by transmitting a signal to the detection target, the transmitted signal propagates to the detected target, and receives the echo signal reflected by it, and performs demodulation processing to obtain a mixed signal;

S2, amplifying, filtering and voltage biasing the mixed signal obtained in step S1 to obtain a processed mixed signal, and measuring its signal parameters;

S3, the microcontroller generates and adjusts any comparison threshold value through the signal parameters of the mixing signal, and outputs it to the comparison circuit for comparison with the processed mixing signal to obtain a single-bit signal;

S4, the microcontroller collects the single-bit signal in step S3 at a fixed time, and then rearranges the single-bit data inside the controller and outputs the rearranged data to the host computer.

Preferably, in step S2, the processing of amplification, filtering and voltage biasing includes processing of a front-end amplifier circuit, a high-pass filter circuit, an AGC automatic gain circuit, a low-pass filter circuit and a voltage bias circuit.

Preferably, the method further comprises a comparison circuit connected to the output end of the voltage bias circuit, and the comparison between the mixing signal and the threshold is realized by the comparison circuit.

Preferably, it also includes a voltage inverter circuit, which is respectively connected to the front-end amplifier circuit, the high-pass filter circuit, the AGC automatic gain circuit, the low-pass filter circuit, the voltage bias circuit and the comparison circuit.

Preferably, in step S2, after the microcontroller identifies the signal parameters after the voltage bias circuit is processed by the analog-to-digital conversion module, it outputs the signal amplitude adjustment signal to the AGC automatic gain circuit and the comparison threshold to the comparison circuit through the digital-to-analog conversion module; the comparison threshold is an array of thresholds of different amplitudes generated in advance by the computing platform or the microcontroller, and stored in ROM or RAM. For the threshold that needs to be adjusted in real time, it is necessary to generate and adjust the comparison threshold in real time according to the various parameters of the detected mixing signal.

Preferably, the digital-to-analog conversion module is at least one of a built-in DAC in the microcontroller, an external DAC chip or an RC filter circuit.

Preferably, in step S3, the specific operation is: the microcontroller collects a single-bit signal after comparison with any threshold through the GPIO port, and uses the timer of the microcontroller to periodically read the high and low levels of the GPIO port to obtain the single-bit signal and store it in the RAM inside the microcontroller.

Preferably, in step S1, a linear frequency modulated pulse signal is transmitted to the detection target through the radar sensor antenna, and the microcontroller sends a modulated waveform to the radar sensor through the digital-to-analog conversion module.

Preferably, in step S4, the microcontroller transmits signals to the host computer via a USB to TTL circuit.

Preferably, it also includes a linear voltage stabilizing circuit, which is connected to the microcontroller and the USB to TTL circuit respectively.

Therefore, the beneficial effects of the present invention using the above-mentioned single-bit broadband radar system with an arbitrary variable threshold are as follows:

(1) The efficiency of sampling, storage, and transmission is greatly improved, saving system storage, transmission, and computing resources on the hardware side.

(2) The system can set arbitrary variable thresholds to adapt to different radar monitoring scenarios.

(3) The system is suitable for most microcontrollers and its microcontroller chips are replaceable.

(4) The system is less complex and less expensive than high-precision sampling radar.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a structural diagram of the overall design of a single-bit broadband radar system with an arbitrary variable threshold according to the present invention;

FIG2 is a circuit diagram of a voltage inverter circuit;

FIG3 is a circuit diagram of a front-end amplifier circuit;

FIG4 is a diagram showing the simulation results of a front-end amplifier circuit using a Bode tester;

FIG5 is a circuit diagram of a high-pass filter circuit;

FIG6 is a diagram showing the simulation results of a high-pass filter circuit using a Bode tester;

Fig. 7 is a circuit diagram of an AGC automatic gain circuit;

FIG8 is a diagram showing the simulation results of a Bode tester for an AGC automatic gain circuit;

FIG9 is a circuit diagram of a low-pass filter circuit;

FIG10 is a diagram of a simulation result of a low-pass filter circuit using a Bode tester;

FIG11 is a circuit diagram of a voltage bias circuit;

FIG12 is a voltage bias circuit Bode tester simulation result;

FIG13 is a diagram of an oscilloscope simulation result of a voltage bias circuit;

FIG14 is a circuit diagram of a comparison circuit;

FIG15 is a diagram showing the oscilloscope simulation results of the comparison circuit;

FIG16 is a circuit diagram of a linear voltage regulator circuit;

FIG17 is a circuit diagram of a microcontroller circuit;

FIG18 is a circuit diagram of a USB to TTL circuit;

FIG19 is a circuit diagram of a second-order RC filter circuit;

FIG20 is a diagram showing a Bode tester simulation result of a second-order RC filter circuit;

FIG21 is a PCB layout of a single-bit filter terminal;

FIG22 is a schematic diagram of the PCB connection of each circuit of the single-bit filter end;

FIG23 is a PCB layout of a single-bit digital receiving and processing terminal;

FIG. 24 is a schematic diagram of the PCB connection of each circuit of the single-bit digital receiving and processing end.

Detailed ways

The technical solution of the present invention is further described below through the accompanying drawings and embodiments.

Unless otherwise defined, technical or scientific terms used in the present invention shall have the common meanings understood by one having ordinary skills in the field to which the present invention belongs.

Embodiment 1

As shown in FIG1 , the present invention provides a single-bit broadband radar system with an arbitrary variable threshold, including a radar sensor, a single-bit filtering end and a single-bit digital receiving and processing end; the single-bit filtering end includes a voltage inverter circuit, a front-end amplifier circuit, a high-pass filtering circuit, an AGC automatic gain circuit, a low-pass filtering circuit, a voltage bias circuit and a comparison circuit; the single-bit digital receiving and processing end includes a linear voltage stabilization circuit, a microcontroller and a USB to TTL circuit.

The operation method of the system includes the following steps:

S1, by transmitting a signal to the detection target, the transmitted signal propagates to the detected target, and receives the echo signal reflected by it, and performs demodulation processing to obtain a mixed signal;

S2, amplifying, filtering and voltage biasing the mixed signal obtained in step S1 to obtain a processed mixed signal, and measuring its signal parameters;

S3, the microcontroller generates and adjusts any comparison threshold value through the signal parameters of the mixing signal, and outputs it to the comparison circuit for comparison with the processed mixing signal to obtain a single-bit signal;

S4, the microcontroller collects the single-bit signal in step S3 at a fixed time, and then rearranges the single-bit data inside the controller and outputs the rearranged data to the host computer.

In this embodiment, the radar sensor transmits a linear frequency modulated pulse signal to the detection target through the antenna. The pulse signal propagates to the detection target, and the detected target reflects an echo signal, which is received by the array radar sensor. The echo signal is then demodulated to obtain a mixed signal, so that the array radar system can use a lower sampling frequency and avoid using a high-precision, high-speed ADC (the ADC here refers to the GHz level, not the kHz level ADC that comes with the receiving end).

Among them, the linear frequency modulated pulse signal emitted by the radar sensor is obtained by the microcontroller, which is generally modulated into a sawtooth wave, but can also be modulated into a triangle wave or other waveforms. The single-bit digital receiving end outputs the modulated wave voltage through the digital-to-analog converter (DAC) through the modulation wave array pre-stored in the ROM or RAM inside the microcontroller (DMA+DAC method can be used).

Slope of the modulation waveform The slope of the modulation waveform determines the detectable distance:

;

in, is the FM bandwidth, is the radar pulse time. The system frequency modulation bandwidth is set to 180MHz. The modulation signal frequency for detecting close-range targets (5~20m) is 500~1000Hz, and the frequency modulation slope is 90~180MHz/ms, medium-distance target (20~50m) 200~500Hz, frequency modulation slope 36~90MHz/ms, long-distance target (50~100m) 100~200Hz, frequency modulation slope The single-bit digital receiving and processing end can switch between short, medium and long distance modes during operation to adapt to different monitoring scenarios.

In this embodiment, since the integrated operational amplifier and other devices used in the subsequent amplification and filtering circuit need to be powered by positive and negative 5V power supplies, it is necessary to design a 5V voltage inverter circuit, and the voltage inverter circuit is shown in Figure 2. The voltage inverter circuit is respectively connected to the voltage input terminals of the front-end amplifier circuit, the high-pass filter circuit, the AGC automatic gain circuit, the low-pass filter circuit and the voltage bias circuit.

In this embodiment, the reverse input end of the front-end amplifier circuit is connected to the IQ dual-channel signal output port of the radar sensor. Since the amplitude of the demodulated signal is small, if the subsequent filtering process is directly performed, the signal will be attenuated to a smaller value, and the anti-interference ability is low. Therefore, the signal is first amplified by a fixed multiple through the front-end amplifier circuit. The front-end amplifier circuit is shown in FIG3 , and the simulation result of the Bode tester is shown in FIG4 . It can be seen that the circuit can ensure a fixed amplification factor of 0 to 700 kHz (the frequency range after demodulation is 0 to 150 kHz).

The positive input end of the high-pass filter circuit is connected to the output end of the front-end amplifier circuit. In order to eliminate the influence of modulation wave leakage caused by the nonlinearity of the modulation voltage and frequency of the radar sensor, one of the following two solutions can be adopted. One is to filter out the low-frequency noise component through a high-pass filter, and the other is to adjust the DAC curve of the single-bit digital receiving and processing end, that is, the corresponding relationship between the digital quantity and the voltage, and adjust the corresponding relationship between the VCO and the frequency of the radar antenna to linear.

In this embodiment, a high-pass filtering process is performed on the signal after the front-end amplification. The high-pass filtering circuit adopts a fourth-order unit gain Bessel high-pass filtering design, which can filter out the low-frequency noise leaked by the modulated wave without affecting the detection of close-range targets. In this way, the data obtained in the subsequent signal processing and single-bit quantization process is more accurate. The high-pass filtering circuit is shown in Figure 5, and the simulation result of the Bode tester is shown in Figure 6. It can be seen that its cut-off frequency is approximately 1.4kHz.

In this embodiment, the input end of the AGC automatic gain circuit is connected to the output end of the high-pass filter circuit. When the detection target is far away, the demodulated signal amplitude will become smaller and smaller, which will affect the ADC sampling accuracy and the accuracy of single-bit quantization. Therefore, an AGC automatic gain circuit is added to automatically adjust the circuit gain so that the signal amplitude after passing through the circuit remains unchanged within a certain range. The microcontroller is connected to the negative input end of the AGC automatic gain circuit through a digital-to-analog converter (DAC) to control the signal adjustment amplitude of the AGC automatic gain.

AGC automatic gain: The near, medium and long distance modes correspond to 20, 30 and 40dB amplification respectively (this amplification factor can be determined by the radar's receiving gain). The gain is subsequently adjusted by the amplitude. The subsequent gain variation range is -5~5dB, that is, the initial voltage fluctuates by 0.125V, and the variation range is adjustable.

The GENG terminal (negative gain control input terminal) of the microcontroller inputs a 1V voltage, and the GPOS terminal (gain control input terminal) is connected to the analog voltage output port of the digital-to-analog conversion module connected to the microcontroller. The output voltage ranges from 0.5V to 1.5V, corresponding to an amplification factor of 10dB to 50dB (the output voltage fluctuates within the range of 0.5V above and below the GENG terminal voltage. For example, the GENG terminal voltage is 2V, and the range is 1.5-2.5V.), the AGC automatic gain circuit is shown in Figure 7, and the simulation result of the baud tester is shown in Figure 8. It can be seen that when the GPOS terminal is connected to 1V, its amplification factor is 30dB.

In this embodiment, the reverse input end of the low-pass filter circuit is connected to the output end of the AGC automatic gain circuit. The frequency detection range of the demodulated signal is generally below 50kHz, and the signal will also be accompanied by some high-frequency noise after passing through the above-mentioned filter circuit. Therefore, it is necessary to perform low-pass filtering on the signal amplified by the AGC to remove the high-frequency noise existing after demodulation and the high-frequency noise attached to the filter circuit. The low-pass filter circuit is shown in Figure 9, and the simulation result of the Bode tester is shown in Figure 10. It can be seen that its cut-off frequency is approximately 34kHz.

In this embodiment, the reverse input end of the voltage bias circuit is connected to the output end of the low-pass filter circuit. Since the subsequent comparison threshold is controlled by the comparison voltage output by the DAC (digital-to-analog converter) of the microcontroller, and the output voltage range of the microcontroller is 0~3.3V, it cannot output a negative voltage, so it is necessary to perform voltage bias on the signal after low-pass filtering. In addition, in order to meet the sampling range of the ADC, the bias voltage is set to 1.65V, that is, half of the 3.3V voltage (the bias voltage is set according to the voltage of the microcontroller or the ADC voltage. For example, if the voltage of the microcontroller and the ADC voltage are both 5V, the bias voltage can be set to 2.5V, or it can be set to other values as long as it is within the voltage range of the microcontroller). The voltage bias circuit is shown in Figure 11.

The simulation result of the Bode tester is shown in Figure 12. It can be seen that its cutoff frequency is about 200Hz, so it can effectively filter out the residual DC component. As shown in Figure 13, it is a schematic diagram of the oscilloscope simulation result. The input signal is a sine signal with a frequency of 10kHz, an amplitude of 0.6V, and a DC component of 0.2V. Oscilloscope channel A is the input signal, and oscilloscope channel B is the output signal. It can be seen that the circuit not only filters out the DC component of 0.2V, but also biases the AC component to 1.65V.

In this embodiment, the positive input terminal of the comparison circuit is connected to the output terminal of the voltage bias circuit, and the negative input terminal of the comparison circuit is connected to the digital-to-analog conversion module connected to the microcontroller, that is, a single-bit comparison threshold. The single-bit comparison threshold can select the corresponding threshold value according to different radar monitoring scenarios.

Any threshold value, such as zero threshold value, single-frequency threshold value and Gaussian threshold value, can be generated by the digital-to-analog conversion module DAC. The threshold value is generated by generating a threshold array corresponding to various amplitudes in advance through the computing platform or the microcontroller and stored in ROM or RAM. For threshold values that need to be adjusted in real time, such as single-frequency threshold values, it is necessary to generate and adjust the comparison threshold value in real time according to the various parameters of the detection mixing signal. The size of the array is determined by the performance of the microcontroller. The larger the array, the finer the threshold waveform controlled, and the more accurate the single-bit signal obtained. The threshold array is transferred to the DAC output register through DMA within the pulse time of the radar, and the output threshold voltage is compared with the biased signal at the negative input end of the comparison circuit. If the biased signal is greater than the comparison threshold, it is set to 3.3V, and if it is less than the comparison threshold, it is set to 0V.

Zero threshold: that is, set the zero threshold to compare with the signal after voltage bias to obtain a zero threshold single-bit signal. Since the voltage bias circuit moves the signal to 1.65V, the zero threshold array can be set in the ROM or RAM of the single-bit digital receiving end. Since the DAC voltage of this microcontroller is 3.3V and the bit number is 12, the array value set is full 2048.

Single-frequency threshold: The signal amplitude of the single-frequency threshold needs to be set to the amplitude of the original signal after filtering, and the frequency needs to be greater than 1/5 of the maximum mixing signal frequency generated by the radar sensor (150kHz in this system). In this way, the spectrum of the high-order harmonic component of the time-varying threshold can be moved, so that the aliasing position and aliasing form of the spectrum can be changed. The frequency of the single-frequency threshold is determined by the timing time of the microcontroller timer. For the amplitude of the single-frequency threshold, the average amplitude of the signal after voltage bias can be collected by ADC to adjust the amplitude of the current single-frequency threshold and generate the single-frequency threshold in real time. The specific method for detecting the average amplitude of ADC is: take the modulus of the data sampled by ADC (IQ) and add it and divide it by the corresponding number of sampling points to obtain the average value after taking the modulus, and divide this average value by 0.636 to get the average amplitude;

The single-bit comparison circuit is shown in Figure 14. Figure 15 is a schematic diagram of the oscilloscope simulation results. The input signal is a sinusoidal signal with a frequency of 10kHz, an amplitude of 0.6V, and a bias voltage of 1.65V, that is, the channel B signal in the figure. The comparison threshold at the reverse end is a sinusoidal signal with a bias voltage of 1.65V, a frequency of 40kHz, and an amplitude of 0.6V, that is, the channel C signal in the figure. Channel A is the single-bit signal after comparison.

In this embodiment, the linear voltage regulator circuit can regulate the USB 5V voltage to 3.3V to provide power for the microcontroller and the USB to TTL circuit. The linear voltage regulator circuit is shown in Figure 16, and the linear voltage regulator circuit is respectively connected to the voltage input terminals of the microcontroller and the USB to TTL circuit.

In this embodiment, the microcontroller is connected to the signal output end of the voltage bias circuit and the comparison circuit. The microcontroller collects the mixed signal after filtering, amplification and voltage bias and detects its signal amplitude, thereby adjusting the AGC amplification gain and the threshold amplitude of the comparison circuit (if a single-frequency threshold is used). The microcontroller collects a single-bit signal after any threshold comparison through the GPIO port. The logic 0 level of the GPIO port is -0.3V-1.2V, and the logic 1 level is 1.8V-3.6V. The high level of the single-bit signal after comparison is 3.3V, and the low level is 0V. Through the timer provided by the microcontroller, the high and low levels of the GPIO port are read regularly to obtain the single-bit signal and store it in the RAM inside the microcontroller. The single-bit signal is rearranged in the microcontroller (such as rearranging 8 single-bit data into 1byte data, that is, one binary bit can represent a single-bit signal sampled once), and the single-bit signal of the port can be transferred through the DMA channel to relieve the CPU pressure.

The microcontroller is responsible for transmitting the collected and rearranged single-bit signal to the USB to TTL circuit through the UART.

The microcontroller circuit is shown in FIG17 . This system is not limited to the current microcontroller model STM32F407VET6, but can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), off-the-shelf programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The microcontroller also sends the modulated waveform to the negative input terminal of the radar sensor through the digital-to-analog conversion module.

Among them, the three output ends of the digital-to-analog conversion module (DAC) of the microcontroller can all be connected by the timer + DMA + DAC method. If it is an external DAC chip, the timer + DMA + IIC or timer + DMA + SPI can be used according to the communication method of the external DAC. If it is a PWM RC filter, the DMA + timer CCR register method can be used to transfer the digital quantity to the CCR register to obtain PWM with different duty cycles, and the desired voltage value can be obtained through RC filtering. Note that the RC filter needs to comprehensively consider the rise time and voltage ripple. The system microcontroller has only two DAC peripherals, the DAC peripherals used for modulating waveforms and adjusting comparison thresholds, and the RC filter used for adjusting signal amplitude. Since the AGC automatic gain is more sensitive to voltage ripple, the second-order RC filter method is used. If other chips are used, it depends on the peripheral conditions of the chip.

The single bit of the GPIO port of the microcontroller can be obtained by the timer + DMA + GPIO method, through the IDR register of the DMA + GPIO port, a single-bit signal (binary) with a fixed number of pins is obtained, and this single-bit signal is taken to the single-bit array and AND and shift operations are performed to rearrange the eight-bit single-bit signal into 1 byte of data. The timer determines the single-bit sampling rate, and the sampling range is within the cycle of a single DAC modulation waveform (sawtooth wave or triangle wave, etc.). In order to ensure that the single-bit sampling is within the cycle of the DAC modulation waveform (sawtooth wave or triangle wave, etc.), the timer cascade interrupt method can be used to use the timer of the DAC modulation waveform as a slave timer and the timer of the single-bit sampling as the master timer (the premise of this method is that the number of DMA transfer points of the DAC modulation waveform is greater than the number of single-bit sampling points. If it is less, the master and slave can be switched).

The analog-to-digital conversion module (ADC) of the microcontroller can collect signals by using the timer + DMA + ADC method. Through the DR register of DMA + ADC, the register value (the sampled ADC signal) is transferred to the internal array for relevant data analysis. This step serves the generation of a single-frequency threshold, and the ADC signal can also be directly obtained for easy comparison with a single-bit signal. In order to ensure that the ADC sampling is within the period of the DAC modulation waveform (sawtooth wave or triangle wave, etc.), the timer cascade interrupt method can be used to use the timer of the DAC modulation waveform as a slave timer and the timer of the ADC collection as a master timer (the premise of this method is that the DMA transfer points of the DAC modulation waveform are greater than the ADC sampling points. If less, the master and slave can be switched).

The serial port can send and receive data using the DMA+USART method. Through the DR register of DMA+USART, the data to be sent is moved to the DR register through DMA, and the received data (located in the DR register) is moved to the internal array of the microcontroller through DMA for subsequent data processing.

In this embodiment, due to the difference in electrical characteristics and protocols between the serial port TTL signal of the single-chip microcomputer and the USB signal of the host computer, the signal sent by the single-chip microcomputer cannot be directly recognized by the host computer, so it is necessary to convert the TTL signal into a USB signal to facilitate the correct transmission of data. The USB to TTL circuit sends the rearranged data to the host computer for further processing. While receiving the signal, the host computer can also send a signal to switch the working state of the system, such as starting and stopping the system, switching the modulation waveform, switching the near, medium and long distance modes (i.e., changing the modulation frequency k), switching and adjusting the comparison threshold, adjusting the AGC automatic gain range and the single-bit sampling rate. The USB to TTL circuit is shown in Figure 18.

In this embodiment, the digital-to-analog conversion module of the microcontroller is a built-in DAC, and a single-bit signal is obtained by outputting a certain comparison threshold through the DAC. If the microcontroller DAC is not enough or does not exist, the following solutions can be used:

(1) A PWM wave with a certain frequency can be output and an analog voltage can be obtained through RC filtering. Figure 19 is a second-order RC filter circuit, and Figure 20 is the simulation result of the Bode tester.

(2) External DAC chip, such as MCP4725, DAC5571, etc.

The PCB layout of the single-bit filter end is shown in Figure 21. The circuit board adopts a four-layer design. The order of the board layers is the top signal layer, the ground layer, the power layer and the bottom signal layer. The connection relationship of each circuit is shown in Figure 22. The lines are mainly arranged on the top signal layer, and some lines are routed on the bottom layer. The middle ground layer and power layer improve the anti-interference ability of the PCB.

The PCB layout of the single-bit digital receiving and processing end is shown in Figure 23. The circuit uses a double-layer board design and is connected to the single-bit filter end through two 2×20Pin headers. It is easy to replace the microcontroller. The circuit connection relationship is shown in Figure 24. The circuit is mainly arranged on the top signal layer, and some circuits are routed on the bottom layer. The rearranged data is transmitted to the host computer through the transceiver port of the USB to TTL circuit.

Therefore, the present invention adopts the above-mentioned single-bit broadband radar system with an arbitrary variable threshold, which can effectively improve the sampling, storage and transmission efficiency, can be applied to different radar monitoring scenarios and microcontrollers, and has lower system complexity, which is conducive to reducing manufacturing costs.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that they can still modify or replace the technical solution of the present invention with equivalents, and these modifications or equivalent replacements cannot cause the modified technical solution to deviate from the spirit and scope of the technical solution of the present invention.

Claims (10)

1. A single-bit broadband radar system with an arbitrary variable threshold, characterized in that the steps are as follows: S1, by transmitting a signal to the detection target, the transmitted signal propagates to the detected target, and receives the echo signal reflected by it, and performs demodulation processing to obtain a mixed signal; S2, amplifying, filtering and voltage biasing the mixed signal obtained in step S1 to obtain a processed mixed signal, and measuring its signal parameters; S3, the microcontroller generates and adjusts any comparison threshold value through the signal parameters of the mixing signal, and outputs it to the comparison circuit for comparison with the processed mixing signal to obtain a single-bit signal; S4, the microcontroller collects the single-bit signal in step S3 at a fixed time, and then rearranges the single-bit data inside the controller and outputs the rearranged data to the host computer. 2. The system according to claim 1 is characterized in that in step S2, the processing of amplification, filtering and voltage biasing includes processing of a front-end amplifier circuit, a high-pass filter circuit, an AGC automatic gain circuit, a low-pass filter circuit, and a voltage bias circuit. 3. The system according to claim 2 is characterized in that it also includes a comparison circuit connected to the output end of the voltage bias circuit, and the comparison between the mixing signal and the threshold is realized by the comparison circuit. 4. The system according to claim 3 is characterized in that it also includes a voltage inverter circuit, which is respectively connected to the front-end amplifier circuit, the high-pass filter circuit, the AGC automatic gain circuit, the low-pass filter circuit, the voltage bias circuit and the comparison circuit. 5. The system according to claim 2 is characterized in that in step S2, after the microcontroller identifies the signal amplitude after the voltage bias circuit is processed by the analog-to-digital conversion module, it outputs the signal amplitude adjustment signal to the AGC automatic gain circuit and the comparison threshold to the comparison circuit through the digital-to-analog conversion module; the comparison threshold is an array of thresholds of different amplitudes generated in advance by the computing platform or the microcontroller, and stored in ROM or RAM. For the threshold that needs to be adjusted in real time, it is necessary to generate and adjust the comparison threshold in real time according to the various parameters of the detection mixing signal. 6. The system according to claim 5, characterized in that the digital-to-analog conversion module is at least one of a built-in DAC of a microcontroller, an external DAC chip or an RC filter circuit. 7. The system according to claim 1 is characterized in that in step S3, the specific operation is: the microcontroller collects a single-bit signal after comparison with an arbitrary threshold through the GPIO port, and uses a timer provided by the microcontroller to periodically read the high and low levels of the GPIO port to obtain the single-bit signal and store it in the RAM inside the microcontroller. 8. The system according to claim 1, characterized in that in step S1, a linear frequency modulation pulse signal is transmitted to the detection target through the radar sensor antenna, and the microcontroller sends a modulated waveform to the radar sensor through a digital-to-analog conversion module. 9. The system according to claim 1, characterized in that in step S4, the microcontroller transmits signals to the host computer via a USB to TTL circuit. 10. The system according to claim 9, further comprising a linear voltage stabilizing circuit, wherein the linear voltage stabilizing circuit is respectively connected to the microcontroller and the USB to TTL circuit.