CN118280728A

CN118280728A - Multilayer capacitor and method for manufacturing the same

Info

Publication number: CN118280728A
Application number: CN202311776125.9A
Authority: CN
Inventors: 韩知惠; 崔弘济; 姜炳宇; 朴慧眞; 尹秀允; 李相旭; 金政民
Original assignee: Samsung Electro Mechanics Co Ltd
Current assignee: Samsung Electro Mechanics Co Ltd
Priority date: 2023-01-02
Filing date: 2023-12-21
Publication date: 2024-07-02

Abstract

The present disclosure provides a multilayer capacitor and a method of manufacturing the multilayer capacitor. The multilayer capacitor includes: a capacitor body including a dielectric layer and an internal electrode; and an external electrode disposed on an outer surface of the capacitor body, wherein the external electrode includes: a first layer disposed on the capacitor body and connected to the internal electrode; a second layer covering a portion of the first layer and exposing the remaining portion of the first layer, and including a first resin; a third layer covering the second layer and including a second resin and a second conductive metal; and a fourth layer covering the first layer and the third layer, and an area ratio of the resin included in the second layer is larger than an area ratio of the resin included in the third layer.

Description

Multilayer capacitor and method for manufacturing the same

Technical Field

The present disclosure relates to a multilayer capacitor and a method of manufacturing the same.

Background

With the technological development of the automotive electrical device industry and the IT (information technology) industry, there is an increasing demand for multilayer capacitors (MLCCs) with improved performance and strong reliability. In particular, since the automotive electrical device industry requires strong reliability in a mechanically stressed environment, the demand for multilayer capacitors having a predetermined level of flexural strength characteristics is increasing.

The multilayer capacitor uses a sintered external electrode formed by sintering after mixing metal powder and a binder. The sintered outer electrode has the advantage of excellent electrical connectivity with the inner electrode, but is susceptible to mechanical stress due to low ductility.

Therefore, in order to improve mechanical reliability of the multilayer capacitor, resin-based external electrodes manufactured by mixing polymer resins and metal powders are applied to the outside of the sintered external electrodes. The resin-based external electrode has higher ductility than the sintered external electrode, and thus the mechanical characteristics of the multilayer capacitor are improved, but the resin-based external electrode has a problem of deterioration in electrical connectivity as compared with the sintered external electrode.

The electrical characteristics of the resin-based external electrode can be improved by adjusting the metal content in the resin. However, when the metal content in the resin-based external electrode increases, the ductility effect of the resin-based external electrode deteriorates, resulting in deterioration of bending strength. Accordingly, the metal content of the resin-based external electrode is limited not to deteriorate the bending strength. However, since the multilayer capacitor is more widely used in the automotive electrical device industry, a stronger reliability is required, and thus, improvement of the characteristics of the resin-based external electrode is required.

Disclosure of Invention

An aspect of the present disclosure provides a multilayer capacitor in which bending strength is improved due to an increase in ductility of an external electrode, so that stress is easily removed when a board is warped, adhesion between a sintered metal layer and a conductive resin layer of the external electrode is increased to improve bonding strength of the external electrode, a plating layer of the external electrode is densely formed to improve moisture-proof reliability, and the sintered metal layer and the plating layer are directly connected to improve electrical characteristics.

A multilayer capacitor according to some embodiments of the present disclosure includes: a capacitor body including a dielectric layer and an internal electrode; and an external electrode disposed on an outer surface of the capacitor body, wherein the external electrode includes: a first layer disposed on an outer surface of the capacitor body and connected to the internal electrode; a second layer including a resin and covering a portion of the first layer and exposing a remaining portion of the first layer; a third layer covering the second layer and including a resin and a conductive metal; and a fourth layer covering the first layer and the third layer.

The capacitor body has first and second surfaces opposite to each other in a stacking direction of the dielectric layer and the internal electrode, third and fourth surfaces opposite to each other in a length direction, and fifth and sixth surfaces opposite to each other in a width direction, the length direction and the stacking direction being perpendicular to the width direction.

In some embodiments, in a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction, an area ratio of the resin included in the second layer may be greater than an area ratio of the resin included in the third layer.

In some embodiments, the second layer may not be disposed on the second surface. The third layer may not be disposed on the second surface. In some embodiments, the first layer may be disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces. In some embodiments, the second layer may be disposed on the first surface and the third surface and/or on the first surface and the fourth surface. In some embodiments, the third layer may be disposed on the first surface and the third surface and/or on the first surface and the fourth surface. In some embodiments, the fourth layer may be disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces. In some embodiments, the first layer, the second layer, the third layer, and the fourth layer may also be disposed on the fifth surface and the sixth surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center of the width direction, a length of the second layer in the stacking direction may be less than or equal to a length of the first layer in the stacking direction on the third surface and/or the fourth surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center of the width direction, a length of the third layer in the stacking direction may be less than or equal to a length of the first layer in the stacking direction on the third surface and/or the fourth surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center of the width direction, the length of the second layer in the stacking direction may be about 95% or less, 90% or less, 85% or less, 80% or less, 75% or less, 70% or less, 65% or less, 60% or less, 55% or less, or 50% or less with respect to the length of the first layer in the stacking direction on the third surface and/or the fourth surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center of the width direction, a length of the third layer in the stacking direction may be about 95% or less, 90% or less, 85% or less, 80% or less, 75% or less, 70% or less, 65% or less, 60% or less, 55% or less, or 50% or less with respect to a length of the first layer in the stacking direction on the third surface and/or the fourth surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center of the width direction, a length of the third layer in the stacking direction may be greater than or equal to a length of the second layer in the stacking direction on the third surface and/or the fourth surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center in the width direction, the second layer may be provided to entirely cover the first layer on the first surface.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at the center in the width direction, the third layer may be provided to entirely cover the first layer on the first surface.

In some embodiments, the third layer may be disposed to completely cover the second layer on the first surface, or the third layer may be disposed to partially expose the second layer without completely covering the second layer on the first surface.

In some embodiments, the second layer may be disposed over the first surface to completely cover the first layer.

In some embodiments, the third layer may be disposed on the first surface to partially expose the second layer without completely covering the second layer.

In some embodiments, on the first surface, the fourth layer may be disposed to partially expose the second layer without completely covering the second layer.

In some embodiments, the second layer may also include a non-conductive filler. The non-conductive filler may comprise silica, glass-based oxides, or combinations thereof.

In some embodiments, in a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction, an area ratio of the resin included in the second layer may be about 60% to about 100% with respect to a total area of the second layer. In some embodiments, the area ratio of the resin included in the second layer may be about 95% or less, about 90% or less, about 80% or less, about 85% or less, about 70% or less, or about 65% or less. In some embodiments, the area ratio of the resin included in the second layer may be about 65% or more, about 70% or more, about 75% or more, about 80% or more, about 85% or more, about 90% or more, or about 95% or more.

In a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction, an area ratio of the resin included in the third layer may be about 8% to about 60% with respect to a total area of the third layer. In some embodiments, the area ratio of the resin included in the third layer may be about 55% or less, about 50% or less, about 45% or less, about 40% or less, about 35% or less, about 30% or less, about 25% or less, about 20% or less, about 15% or less, or about 10% or less. In some embodiments, the area ratio of the resin included in the third layer may be about 10% or more, about 15% or more, about 20% or more, about 25% or more, about 30% or more, about 35% or more, about 40% or more, about 45% or more, about 50% or more, or about 55% or more.

In some embodiments, the second layer may or may not also include a conductive metal.

In some embodiments, in a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction, an area ratio of the conductive metal included in the second layer may be smaller than an area ratio of the resin included in the second layer.

In some embodiments, in a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction, an area ratio of the conductive metal included in the third layer may be greater than an area ratio of the resin included in the third layer.

In some embodiments, in a cross section of the multilayer capacitor cut along the length direction and the stacking direction at a center of the width direction, a maximum length of the second layer in the length direction may be greater than or equal to about 3 μm on the third surface and/or the fourth surface.

Methods of fabricating a multilayer capacitor according to some embodiments include: manufacturing a capacitor body including a dielectric layer and an internal electrode; and forming an external electrode on an outer surface of the capacitor body, wherein the step of forming the external electrode includes: forming a first layer on an outer surface of the capacitor body; coating paste for forming a second layer including a resin to cover a portion of the first layer and expose the remaining portion of the first layer, thereby forming the second layer; coating paste for forming a third layer including a resin and a conductive metal to cover the second layer, thereby forming the third layer; and forming a fourth layer covering the first layer and the third layer.

In some embodiments, the content of the resin included in the paste for forming the second layer may be greater than the content of the resin included in the paste for forming the third layer.

In some embodiments, the paste used to form the second layer may also include a conductive metal.

In some embodiments, in the paste used to form the second layer, the volume percent of the resin relative to the total volume of the resin and the conductive metal may be greater than or equal to about 60vol% and less than about 100vol%.

In some embodiments, in the paste used to form the third layer, the volume percent of the resin may be about 8vol% to about 60vol% relative to the total volume of the resin and the conductive metal.

In some embodiments, in the paste used to form the second layer, the volume percent of the conductive metal relative to the total volume of the resin and the conductive metal may be less than the volume percent of the resin.

In some embodiments, in the paste used to form the third layer, the volume percent of the conductive metal relative to the total volume of the resin and the conductive metal may be greater than the volume percent of the resin.

A multilayer capacitor according to some embodiments of the present disclosure includes: a capacitor body including a dielectric layer and an internal electrode, and having first and second surfaces opposing each other in a stacking direction of the dielectric layer and the internal electrode, third and fourth surfaces opposing each other in a length direction, and fifth and sixth surfaces opposing each other in a width direction, the length direction and the stacking direction being perpendicular to the width direction; and an external electrode disposed on an outer surface of the capacitor body.

In some embodiments, the outer electrode comprises: a first layer disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces and connected to the internal electrode; a second layer covering a portion of the first layer and exposing a remaining portion of the first layer, and disposed on the first surface and the third surface and/or on the first surface and the fourth surface; a third layer covering the second layer, and the third layer being disposed on the first surface and the third surface and/or on the first surface and the fourth surface; and a fourth layer covering the third layer, and the fourth layer is disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces.

Drawings

Fig. 1 is a top plan view of a multilayer capacitor according to an aspect.

Fig. 2 is a bottom plan view of a multilayer capacitor according to an aspect.

Fig. 3 is a front view of a multilayer capacitor according to an aspect.

Fig. 4 is a side view of a multilayer capacitor according to an aspect.

Fig. 5 is a cross-sectional view of a multilayer capacitor according to an aspect relative to fig. 4.

Fig. 6 is a cross-sectional view of a multilayer capacitor according to an aspect relative to fig. 3.

Fig. 7 is a cross-sectional view of a multilayer capacitor according to a modified example of an aspect.

Fig. 8 is a cross-sectional view of a multilayer capacitor according to a modified example of an aspect.

Detailed Description

Hereinafter, the present disclosure will be described more fully with reference to the accompanying drawings, in which embodiments of the disclosure are shown. The drawings and descriptions are to be regarded as illustrative in nature and not as restrictive. Like reference numerals refer to like elements throughout the specification. Furthermore, the drawings are provided only for easy understanding of the embodiments disclosed in the present specification, and should not be construed as limiting the spirit disclosed in the present specification, and it should be understood that the present disclosure includes all modifications, equivalents, and alternatives without departing from the scope and spirit of the disclosure.

Terms including ordinal numbers such as first, second, etc., will be used only to describe various components and should not be construed as limiting the components. These terms are only used to distinguish one element from another.

It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or be connected or coupled to the other element with the other element interposed therebetween. In contrast, it will be understood that when an element is referred to as being "directly coupled" or "directly connected" to another element, there are no other elements present between the one element and the other element.

Throughout this specification it will be understood that the terms "comprises," "comprising," "includes," "including," or "having" are intended to specify the presence of stated features, integers, steps, operations, elements, components, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof. Unless explicitly described to the contrary, the word "comprise" and variations such as "comprises" or "comprising" will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

As used herein, the term "about" means about. Generally, the term "about" is used herein to modify a numerical value to a variance of 10% above and below the stated value. In one aspect, the term "about" is intended to include values within a range of 20% above or below the value of the number with which it is used.

Fig. 1 is a plan view of a multilayer capacitor according to some embodiments, fig. 2 is another plan view of a multilayer capacitor according to some embodiments, fig. 3 is a side view of a multilayer capacitor according to some embodiments, fig. 4 is another side view of a multilayer capacitor according to some embodiments, fig. 5 is a cross-sectional view of a multilayer capacitor according to some embodiments, and fig. 6 is another cross-sectional view of a multilayer capacitor according to some embodiments.

When directions are defined to clearly describe the present embodiment, the L-axis direction, the W-axis direction, and the T-axis direction shown in the drawings represent the length direction, the width direction, and the thickness direction of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be a direction perpendicular to the broad surface (main surface) of the sheet member, and may be used, for example, in the same concept as the stacking direction of the stacked dielectric layers 111. The length direction (L-axis direction) may be a direction extending parallel to the broad surface (main surface) of the sheet-like member and substantially perpendicular to the thickness direction (T-axis direction), and may be, for example, a direction in which the first external electrode 131 and the second external electrode 132 are disposed. The width direction (W axis direction) may be a direction extending parallel to the broad surface (main surface) of the sheet member and substantially perpendicular to the thickness direction (T axis direction), and the length of the sheet member in the length direction (L axis direction) may be longer than the width in the width direction (W axis direction).

Referring to fig. 1 to 6, the multilayer capacitor 100 according to the present embodiment may include a capacitor body 110 and first and second external electrodes 131 and 132, the first and second external electrodes 131 and 132 being disposed at both ends of the capacitor body 110 opposite to each other in a length direction (L-axis direction).

For example, the capacitor body 110 may have a substantially hexahedral shape.

In this embodiment, for convenience of explanation, in the capacitor main body 110, surfaces that are opposite to each other in the thickness direction (T-axis direction) are defined as a first surface 110a and a second surface 110b, surfaces that are connected to the first surface 110a and the second surface 110b and are opposite to each other in the length direction (L-axis direction) are defined as a third surface 110e and a fourth surface 110f, surfaces that are connected to the first surface 110a and the second surface 110b, connected to the third surface 110e and the fourth surface 110f, and are opposite to each other in the width direction (W-axis direction) are defined as a fifth surface 110c and a sixth surface 110d.

For example, the first surface 110a as the lower surface may be a surface facing the mounting direction. In addition, the first, second, third, fourth, fifth, and sixth surfaces 110a, 110b, 110e, 110f, 110c, and 110d may be flat, but are not limited thereto, e.g., the first, second, third, fourth, fifth, and sixth surfaces 110a, 110e, 110f, 110c, and 110d may be curved surfaces having convex central portions, and corners of each surface as boundaries may be rounded.

The shape and size of the capacitor body 110 and the number of stacked dielectric layers 111 are not limited to those shown in the drawings of the present embodiment.

The capacitor body 110 is formed by stacking a plurality of dielectric layers 111 in a thickness direction (T-axis direction) and then firing the same, and the capacitor body 110 includes the plurality of dielectric layers 111 and the plurality of first and second internal electrodes 121 and 122, the first and second internal electrodes 121 and 122 being alternately disposed in the thickness direction (T-axis direction) with the dielectric layers 111 interposed between the first and second internal electrodes 121 and 122. For example, the first and second internal electrodes 121 and 122 may have different polarities.

Here, the respective dielectric layers 111 of the capacitor body 110 adjacent to each other may be integrated to the extent that it is difficult to distinguish the boundary therebetween without using a Scanning Electron Microscope (SEM).

Further, the capacitor body 110 may include an effective area and a coverage area.

The active area contributes to the capacitance that results in the multilayer capacitor 100. For example, the effective region may be a region where the first and second internal electrodes 121 and 122 are stacked and overlapped with each other in the thickness direction (T-axis direction).

The covering region may include an upper covering region and a lower covering region, which may be provided on an upper surface and a lower surface of the effective region in a thickness direction (T-axis direction) as edge portions, respectively. The coverage area may be formed by stacking a single dielectric layer or two or more dielectric layers on the upper and lower surfaces of the active area, respectively.

Additionally, the coverage area may also include a side coverage area. The side coverage areas are edge portions, and may be provided on both side surfaces of the effective area in the width direction (W axis direction), respectively. Such side coverage areas may be formed by: the conductive paste layer for forming the internal electrode is coated on only a part of the surface of the dielectric green sheet or the dielectric green sheet on which the conductive paste layer is not coated is stacked on both side surfaces of the laminate and fired.

The covered region serves to prevent damage to the first and second internal electrodes 121 and 122 due to physical or chemical stress.

For example, the dielectric layer 111 may include a ceramic material having a high dielectric constant. For example, the ceramic material may include a dielectric ceramic including a component such as BaTiO ₃、CaTiO₃、SrTiO₃ or CaZrO ₃. In addition, subcomponents such as Mn compound, fe compound, cr compound, co compound and Ni compound may be included in addition to the dielectric ceramics containing the above components. For example, the dielectric layer 111 may include a BaTiO ₃ -based dielectric ceramic, and examples of the BaTiO ₃ -based dielectric ceramic may include (Ba_1-xCa_x)TiO₃(0<x<1)、Ba(Ti_1-yCa_y)O₃(0<y<1)、(Ba_1-xCa_x)(Ti_1-yZr_y)O₃(0<x<1,0<y<1) or Ba (Ti _1-yZr_y)O₃ (0 < y < 1) in which Ca, zr, etc. are partially solid-dissolved in BaTiO ₃.

In addition, ceramic powder, ceramic additives, organic solvents, plasticizers, binders, dispersants, and the like may also be added to the dielectric layer 111. For example, the ceramic additive may include a transition metal oxide or carbide, a rare earth element, magnesium (Mg), aluminum (Al), or the like.

For example, the average thickness of the dielectric layer 111 may be about 0.5 μm to about 10 μm.

The first and second internal electrodes 121 and 122 are electrodes having different polarities and are alternately disposed to face each other in a thickness direction (T-axis direction), with the dielectric layer 111 interposed between the first and second internal electrodes 121 and 122, and one end of the first and second internal electrodes 121 and 122 may be exposed through the third and fourth surfaces 110e and 110f of the capacitor body 110, respectively.

The first and second internal electrodes 121 and 122 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

The ends of the first and second internal electrodes 121 and 122 alternately exposed through the third and fourth surfaces 110e and 110f of the capacitor body 110 are connected to the first and second external electrodes 131 and 132, respectively, to be electrically connected.

The first and second internal electrodes 121 and 122 may include conductive metals, for example, metals such as Ni, cu, ag, pd or Au or alloys thereof (e.g., ag—pd alloys).

In addition, the first and second internal electrodes 121 and 122 may include dielectric particles having the same composition as the ceramic material included in the dielectric layer 111.

The first and second internal electrodes 121 and 122 may be formed using a conductive paste including a conductive metal. As a method of printing the conductive paste, a screen printing method, a gravure printing method, or the like can be used.

For example, the average thickness of the first and second internal electrodes 121 and 122 may be about 0.1 μm to about 2 μm.

The first and second external electrodes 131 and 132 are supplied with voltages of different polarities and are electrically connected to the exposed portions of the first and second internal electrodes 121 and 122, respectively.

According to the above-described structure, when a predetermined voltage is applied to the first and second external electrodes 131 and 132, electric charges are accumulated between the first and second internal electrodes 121 and 122. At this time, the capacitance of the multilayer capacitor 100 is proportional to the overlapping area where the first and second internal electrodes 121 and 122 overlap each other in the T-axis direction in the effective area.

The first external electrode 131 may have a first electrode part 131a, a second electrode part 131b, a third electrode part 131c, and a fourth electrode part 131e, and the second external electrode 132 may have a first electrode part 132a, a second electrode part 132b, a third electrode part 132c, and a fourth electrode part 132e. The first electrode portions 131a and 132a are disposed on the first surface 110 a. The second electrode portions 131b and 132b are disposed on the second surface 110 b. Each of the third electrode portions 131c and 132c is provided on both the fifth surface 110c and the sixth surface 110 d. The fourth electrode portion 131e is disposed on the third surface 110e, and the fourth electrode portion 132e is disposed on the fourth surface 110 f. In other words, the first external electrode 131 is disposed on five of the first and second surfaces 110a and 110b, the fifth and sixth surfaces 110c and 110d, and the third surface 110e, and the second external electrode 132 is disposed on five of the first and second surfaces 110a and 110b, the fifth and sixth surfaces 110c and 110d, and the fourth surface 110 f. The first, second, third and fourth electrode parts 131a, 131b, 131c and 131e adjacent to each other are connected at the edge of the capacitor body 110 and electrically connected to each other, and the first, second, third and fourth electrode parts 132a, 132b, 132c and 132e adjacent to each other are connected at the edge of the capacitor body 110 and electrically connected to each other.

The fourth electrode part 131e covers an end of the first inner electrode 121 exposed to the third surface 110e, and the fourth electrode part 132e covers an end of the second inner electrode 122 exposed to the fourth surface 110 f. The first and second internal electrodes 121 and 122 are directly connected to the fourth electrode parts 131e and 132e, respectively, and the first and second internal electrodes 121 and 122 are electrically connected to the first and second external electrodes 131 and 132, respectively.

The first external electrode 131 has a first layer 1311, a second layer 1312, a third layer 1313, and a fourth layer 1314, and the second external electrode 132 has a first layer 1321, a second layer 1322, a third layer 1323, and a fourth layer 1324. The fourth layers 1314 and 1324 constitute outermost layers of the first and second external electrodes 131 and 132, respectively.

The first electrode portion 131a has a first layer 1311, a second layer 1312, a third layer 1313, and a fourth layer 1314, and the first electrode portion 132a has a first layer 1321, a second layer 1322, a third layer 1323, and a fourth layer 1324. In other words, each of the first electrode parts 131a and 132a has a 4-layer structure. In the first electrode portions 131a and 132a, the first layers 1311 and 1321 may be entirely covered with the second layers 1312 and 1322.

The second electrode portion 131b has the first layer 1311 and the fourth layer 1314 but neither the second layer 1312 nor the third layer 1313, and the second electrode portion 132b has the first layer 1321 and the fourth layer 1324 but neither the second layer 1322 nor the third layer 1323. In other words, each of the second electrode parts 131b and 132b has a 2-layer structure.

The third electrode portion 131c has a first region 131c1 and a second region 131c2, and the third electrode portion 132c has a first region 132c1 and a second region 132c2. The second regions 131c2 and 132c2 are closer to the first surface 110a than the first regions 131c1 and 132c 1. The first region 131c1 has the first layer 1311 and the fourth layer 1314 but neither the second layer 1312 nor the third layer 1313, and the first region 132c1 has the first layer 1321 and the fourth layer 1324 but neither the second layer 1322 nor the third layer 1323. In other words, each of the first regions 131c1 and 132c1 has a 2-layer structure. The second region 131c2 has a first layer 1311, a second layer 1312, a third layer 1313, and a fourth layer 1314, and the second region 132c2 has a first layer 1321, a second layer 1322, a third layer 1323, and a fourth layer 1324. In other words, each of the second regions 131c2 and 132c2 has a 4-layer structure.

The fourth electrode portion 131e has a first region 131e1 and a second region 131e2, and the fourth electrode portion 132e has a first region 132e1 and a second region 132e2. The second regions 131e2 and 132e2 are closer to the first surface 110a than the first regions 131e1 and 132e 1. The first region 131e1 has the first layer 1311 and the fourth layer 1314 but neither the second layer 1312 nor the third layer 1313, and the first region 132e1 has the first layer 1321 and the fourth layer 1324 but neither the second layer 1322 nor the third layer 1323. In other words, each of the first regions 131e1 and 132e1 has a 2-layer structure. The second region 131e2 has a first layer 1311, a second layer 1312, a third layer 1313, and a fourth layer 1314, and the second region 132e2 has a first layer 1321, a second layer 1322, a third layer 1323, and a fourth layer 1324. In other words, each of the second regions 131e2 and 132e2 has a 4-layer structure.

The first layers 1311 and 1321 are in direct contact with the capacitor body 110 and are disposed on the third surface 110e and the fourth surface 110f of the capacitor body 110, respectively, to be connected to the first and second internal electrodes 121 and 122, respectively. The first layer 1311 may be located in the first and second regions 131e1 and 131e2 of the first, second and fourth electrode portions 131a, 131b and 131e, in addition, the first layer 1311 may be located in the first and second regions 131c1 and 131c2 of the third electrode portion 131c, the first layer 1321 may be located in the first and second regions 132e1 and 132e2 of the first, second and fourth electrode portions 132a, 132b and 132e, and in addition, the first layer 1321 may be located in the first and second regions 132c1 and 132c2 of the third electrode portion 132 c. In other words, the first layer 1311 may be disposed on the first surface 110a, the second surface 110b, and the third surface 110e, in addition, the first layer 1311 may be disposed on the fifth surface 110c and the sixth surface 110d, and the first layer 1321 may be disposed on the first surface 110a, the second surface 110b, and the fourth surface 110f, in addition, the first layer 1321 may be disposed on the fifth surface 110c and the sixth surface 110 d. For example, the first layers 1311 and 1321 may be sintered metal layers.

The second layer 1312 is disposed to cover a portion of the first layer 1311 but expose other portions, and the second layer 1322 is disposed to cover a portion of the first layer 1321 but expose other portions. The second layer 1312 may be located in the second regions 131e2 of the first and fourth electrode parts 131a and 131e, in addition, the second layer 1312 may be located in the second region 131c2 of the third electrode part 131c, the second layer 1322 may be located in the second regions 132e2 of the first and fourth electrode parts 132a and 132e, and in addition, the second layer 1322 may be located in the second region 132c2 of the third electrode part 132 c. In other words, the second layer 1312 may not be disposed on the second surface 110b, but may be disposed on the first and third surfaces 110a and 110e and may be further disposed on the fifth and sixth surfaces 110c and 110d, and the second layer 1322 may not be disposed on the second surface 110b, but may be disposed on the first and fourth surfaces 110a and 110f and may be further disposed on the fifth and sixth surfaces 110c and 110 d. For example, the second layers 1312 and 1322 may be conductive resin layers.

The third layer 1313 may be disposed to cover all or a portion of the second layer 1312 and the third layer 1323 may be disposed to cover all or a portion of the second layer 1322. The third layer 1313 may be located in the second regions 131e2 of the first and fourth electrode portions 131a and 131e, in addition, the third layer 1313 may be located in the second region 131c2 of the third electrode portion 131c, the third layer 1323 may be located in the second regions 132e2 of the first and fourth electrode portions 132a and 132e, and in addition, the third layer 1323 may be located in the second region 132c2 of the third electrode portion 132 c. In other words, the third layer 1313 may not be disposed on the second surface 110b, but may be disposed on the first and third surfaces 110a and 110e and may further be disposed on the fifth and sixth surfaces 110c and 110d, and the third layer 1323 may not be disposed on the second surface 110b, but may be disposed on the first and fourth surfaces 110a and 110f and may further be disposed on the fifth and sixth surfaces 110c and 110 d. For example, the third layers 1313 and 1323 may be conductive resin layers.

The fourth layer 1314 may be disposed to cover the entire exposed area of the third layer 1313 and the first layer 1311, and the fourth layer 1324 may be disposed to cover the entire exposed area of the third layer 1323 and the first layer 1321. The fourth layer 1314 may be located in the first region 131e1 and the second region 131e2 of the first electrode part 131a, the second electrode part 131b, and the fourth electrode part 131e, in addition, the fourth layer 1314 may be located in the first region 131c1 and the second region 131c2 of the third electrode part 131c, the fourth layer 1324 may be located in the first electrode part 132a, the second electrode part 132b, and the first region 132e1 and the second region 132e2 of the fourth electrode part 132e, and in addition, the fourth layer 1324 may be located in the first region 132c1 and the second region 132c2 of the third electrode part 132 c. In other words, the fourth layer 1314 may be disposed on the first surface 110a, the second surface 110b, and the third surface 110e, in addition, the fourth layer 1314 may be disposed on the fifth surface 110c and the sixth surface 110d, and the fourth layer 1324 may be disposed on the first surface 110a, the second surface 110b, and the fourth surface 110f, in addition, the fourth layer 1324 may be disposed on the fifth surface 110c and the sixth surface 110 d. For example, the fourth layers 1314 and 1324 may be plating.

The first layer 1311 located in the first electrode portion 131a, the second electrode portion 131b, the third electrode portion 131c, and the fourth electrode portion 131e may be integrally connected, and the first layer 1321 located in the first electrode portion 132a, the second electrode portion 132b, the third electrode portion 132c, and the fourth electrode portion 132e may be integrally connected. The second layer 1312 located in the first, third, and fourth electrode portions 131a, 131c, and 131e may be integrally connected, and the second layer 1322 located in the first, third, and fourth electrode portions 132a, 132c, and 132e may be integrally connected. The third layer 1313 located in the first, third, and fourth electrode portions 131a, 131c, and 131e may be integrally connected, and the third layer 1323 located in the first, third, and fourth electrode portions 132a, 132c, and 132e may be integrally connected. The fourth layer 1314 located in the first electrode part 131a, the second electrode part 131b, the third electrode part 131c, and the fourth electrode part 131e may be integrally connected, and the fourth layer 1324 located in the first electrode part 132a, the second electrode part 132b, the third electrode part 132c, and the fourth electrode part 132e may be integrally connected.

Next, the length of each of the first layers 1311 and 1321, the second layers 1312 and 1322, the third layers 1313 and 1323, and the fourth layers 1314 and 1324 may be measured by: the cross sections (L-axis direction and T-axis direction cross sections) cut in the length direction and the stacking direction perpendicular to the width direction (W-axis direction) at the center (1/2 point) in the width direction (W-axis direction) of the multilayer capacitor 100 were analyzed with a Scanning Electron Microscope (SEM) or a Scanning Transmission Electron Microscope (STEM) or the like at a magnification of 5000. In cross section, when the first layers 1311 and 1321, the second layers 1312 and 1322, the third layers 1313 and 1323, and the fourth layers 1314 and 1324 have a plurality of lengths, respectively, the length of each of the first layers 1311 and 1321, the second layers 1312 and 1322, the third layers 1313 and 1323, and the fourth layers 1314 and 1324 may be the largest length of the plurality of lengths.

In addition, the area ratio of the resin and the conductive metal of the second layers 1312 and 1322 and the third layers 1313 and 1323 and whether or not the non-conductive filler is included in the second layers 1312 and 1322 and the third layers 1313 and 1323 may be measured by analyzing a cross-sectional image photographed with SEM or STEM or the like using an electron beam microscopic analyzer (EPMA). When EPMA is used for component analysis, an Energy Dispersive Spectrometer (EDS) or a Wavelength Dispersive Spectrometer (WDS) as an X-ray spectrometer may be used. For example, when the cross sections of the first and second external electrodes 131 and 132 are analyzed using a reflected electron image of SEM or a High Angle Annular Dark Field (HAADF) image of STEM, etc., a conductive metal having a metal bond may be recognized as a bright portion of contrast, and a non-metal component such as a resin or a non-conductive filler (including other voids and oxides) may be recognized as a dark portion of contrast. Thus, by binarizing the sectional photograph, the area ratio of the resin and the conductive metal of the second layers 1312 and 1322 and the third layers 1313 and 1323 can be obtained by measuring the areas of the dark and bright portions of the field of view and the total area of the field of view.

On the third surface 110e, a stacking direction (T-axis direction) length of the second layer 1312 may be less than or equal to a stacking direction (T-axis direction) length of the first layer 1311. On the fourth surface 110f, the stacking direction (T-axis direction) length of the second layer 1322 may be less than or equal to the stacking direction (T-axis direction) length of the first layer 1321. For example, on the third surface 110e, the stacking direction (T-axis direction) length of the second layer 1312 may be less than or equal to about 95% of the stacking direction (T-axis direction) length of the first layer 1311. For example, on the third surface 110e, the stacking direction (T-axis direction) length of the second layer 1312 may be about 10% to about 50% of the stacking direction (T-axis direction) length of the first layer 1311. For example, on the fourth surface 110f, the stacking direction (T-axis direction) length of the second layer 1322 may be less than or equal to about 95% of the stacking direction (T-axis direction) length of the first layer 1321. For example, on the fourth surface 110f, the stacking direction (T-axis direction) length of the second layer 1322 may be about 10% to about 50% of the stacking direction (T-axis direction) length of the first layer 1321. On the third surface 110e, when the stacking direction (T-axis direction) length of the second layer 1312 is greater than about 95% of the stacking direction (T-axis direction) length of the first layer 1311, electrical connectivity may be degraded. On the fourth surface 110f, when the stacking direction (T-axis direction) length of the second layer 1322 is greater than about 95% of the stacking direction (T-axis direction) length of the first layer 1321, electrical connectivity may be degraded.

In addition, on the third surface 110e, the stacking direction (T-axis direction) length of the third layer 1313 may be less than or equal to the stacking direction (T-axis direction) length of the first layer 1311. On the fourth surface 110f, the stacking direction (T-axis direction) length of the third layer 1323 may be less than or equal to the stacking direction (T-axis direction) length of the first layer 1321. For example, on the third surface 110e, the stacking direction (T-axis direction) length of the third layer 1313 may be less than or equal to about 95% of the stacking direction (T-axis direction) length of the first layer 1311. For example, on the third surface 110e, the stacking direction (T-axis direction) length of the third layer 1313 may be about 10% to about 50% of the stacking direction (T-axis direction) length of the first layer 1311. On the fourth surface 110f, the stacking direction (T-axis direction) length of the third layer 1323 may be less than or equal to about 95% of the stacking direction (T-axis direction) length of the first layer 1321. For example, on the fourth surface 110f, the stacking direction (T-axis direction) length of the third layer 1323 may be about 10% to about 50% of the stacking direction (T-axis direction) length of the first layer 1321. On the third surface 110e, when the stacking direction (T-axis direction) length of the third layer 1313 is greater than about 95% of the stacking direction (T-axis direction) length of the first layer 1311, electrical connectivity may be degraded. On the fourth surface 110f, when the stacking direction (T-axis direction) length of the third layer 1323 is greater than about 95% of the stacking direction (T-axis direction) length of the first layer 1321, electrical connectivity may be degraded.

Fig. 7 is a sectional view of a multilayer capacitor 100 according to a modified example of an aspect.

Fig. 6 shows the following case: on the third surface 110e, the stacking direction (T-axis direction) length of the second layer 1312 is smaller than the stacking direction (T-axis direction) length of the first layer 1311, and on the fourth surface 110f, the stacking direction (T-axis direction) length of the second layer 1322 is smaller than the stacking direction (T-axis direction) length of the first layer 1321. Fig. 7 shows the following case: on the third surface 110e, the stacking direction (T-axis direction) length of the second layer 1312 is equal to the stacking direction (T-axis direction) length of the first layer 1311, and on the fourth surface 110f, the stacking direction (T-axis direction) length of the second layer 1322 is equal to the stacking direction (T-axis direction) length of the first layer 1321.

In addition, fig. 6 shows the following case: on the third surface 110e, the stacking direction (T-axis direction) length of the third layer 1313 is smaller than the stacking direction (T-axis direction) length of the first layer 1311, and on the fourth surface 110f, the stacking direction (T-axis direction) length of the third layer 1323 is smaller than the stacking direction (T-axis direction) length of the first layer 1321. Fig. 7 shows the following case: on the third surface 110e, the stacking direction (T-axis direction) length of the third layer 1313 is equal to the stacking direction (T-axis direction) length of the first layer 1311, and on the fourth surface 110f, the stacking direction (T-axis direction) length of the third layer 1323 is equal to the stacking direction (T-axis direction) length of the first layer 1321.

Since bending strength characteristics are improved by the second layers 1312 and 1322, the second layers 1312 and 1322 may be thicker than the third layers 1313 and 1323. For example, on the third surface 110e and the fourth surface 110f, the length of the second layers 1312 and 1322 in the length direction (L-axis direction) may be greater than or equal to about 3 μm, and may also be less than or equal to about 150 μm. In some embodiments, the second layers 1312 and 1322 may have a length in the length direction (L-axis direction) of about 5 μm or more, about 10 μm or more, about 20 μm or more, about 30 μm or more, about 40 μm or more, about 50 μm or more, about 60 μm or more, about 70 μm or more, about 80 μm or more, about 90 μm or more, or about 100 μm or more on the third surface 110e and the fourth surface 110 f. In some embodiments, the second layers 1312 and 1322 may have a length in the length direction (L-axis direction) of about 140 μm or less, about 130 μm or less, about 120 μm or less, about 110 μm or less, or about 100 μm or less on the third surface 110e and the fourth surface 110 f. When the length of the second layers 1312 and 1322 in the length direction (L-axis direction) is less than about 3 μm on the third surface 110e and the fourth surface 110f, the bending strength may not be significantly improved. Since the third layers 1313 and 1323 are used to ensure plating properties, the thickness of the third layers 1313 and 1323 need not be particularly limited, and if the third layers 1313 and 1323 are uniformly coated, the third layers 1313 and 1323 may be sufficiently thick.

On the first surface 110a, the length-wise lengths of the second layers 1312 and 1322 may be greater than or equal to the length-wise lengths of the first layers 1311 and 1321, respectively. Thus, on the first surface 110a, the second layers 1312 and 1322 may be disposed on the first surface 110a to completely cover the first layers 1311 and 1321.

On the first surface 110a, the third layers 1313 and 1323 may have a length in the length direction that is greater than or equal to the length direction of the first layers 1311 and 1321, respectively. Thus, in fig. 7, on the first surface 110a, the third layers 1313 and 1323 may be disposed to completely cover the first layers 1311 and 1321, respectively.

On the other hand, on the first surface 110a, the length of the third layers 1313 and 1323 may be greater than or equal to the length of the second layers 1312 and 1322, respectively, in the lengthwise direction. Thus, on the first surface 110a, third layers 1313 and 1323 may be disposed to completely cover the second layers 1312 and 1322, respectively.

Alternatively, the length of the second layers 1312 and 1322 may be greater than or equal to the length of the third layers 1313 and 1323, respectively, on the first surface 110 a. Thus, in fig. 8, on the first surface 110a, the third layer 1313 may be disposed not to entirely cover the second layer 1312 but to expose a portion of the second layer 1312, and the third layer 1323 may be disposed not to entirely cover the second layer 1322 but to expose a portion of the second layer 1322.

Fig. 8 is a sectional view of a multilayer capacitor 100 according to a modified example of an aspect.

In fig. 6 and 7, the length of third layers 1313 and 1323 is greater than the length of second layers 1312 and 1322, respectively, on first surface 110 a. Thus, on the first surface 110a, the third layers 1313 and 1323 may be disposed to completely cover the second layers 1312 and 1322.

On the other hand, fig. 8 shows that on the first surface 110a, the length-wise lengths of the second layers 1312 and 1322 may be greater than the length-wise lengths of the third layers 1313 and 1323, respectively. Here, on the first surface 110a, the second layers 1312 and 1322 are not entirely covered with the third layers 1313 and 1323, respectively, and ends of the second layers 1312 and 1322 are exposed. When the second layers 1312 and 1322 include conductive metal, the fourth layers 1314 and 1324 may be disposed on the second layers 1312 and 1322 on the first surface 110a, but when the second layers 1312 and 1322 do not include conductive metal or include a small amount of conductive metal, the fourth layers 1314 and 1324 are not disposed on the second layers 1312 and 1322 on the first surface 110a, thereby finally exposing the second layers 1312 and 1322. In other words, on the first surface 110a, the length-wise lengths of the second layers 1312 and 1322 may be greater than or equal to the length-wise lengths of the first layers 1311 and 1321, the length-wise lengths of the third layers 1313 and 1323 may be less than the length-wise lengths of the second layers 1312 and 1322, and the length-wise lengths of the fourth layers 1314 and 1324 may be less than or equal to the length-wise lengths of the second layers 1312 and 1322. Here, since the first layers 1311 and 1321 are located at positions where stress is concentrated, bending strength can be additionally improved when the plate is bent.

The first layers 1311 and 1321 may be sintered metal layers. The sintered metal layer may include a conductive metal and glass.

For example, the sintered metal layer may include a conductive metal such as copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), an alloy thereof, or a combination thereof, and for example, copper (Cu) may include a copper (Cu) alloy. When the conductive metal includes copper, the metal other than copper may be included in an amount of about 5 parts by mole or less based on 100 parts by mole of copper.

For example, the sintered metal layer may include a composition in which an oxide is mixed with glass, and for example, may include at least one selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may include at least one selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), nickel (Ni), and a mixture thereof. The alkali metal may include at least one selected from the group consisting of lithium (Li), sodium (Na), potassium (K), and a mixture thereof. The alkaline earth metal may include at least one selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), and mixtures thereof.

The content of the conductive metal and glass in the sintered metal layer is not particularly limited, but for example, in a cross section (a cross section in the L-axis direction and the T-axis direction) cut in a length direction perpendicular to the width direction (W-axis direction) and the stacking direction at the center (1/2 point) in the width direction (W-axis direction) of the multilayer capacitor 100, the area ratio of the conductive metal may be about 30% to about 90% or about 70% to about 90% with respect to the total area of the sintered metal layer.

The second layers 1312 and 1322 and/or the third layers 1313 and 1323 may be conductive resin layers.

The conductive resin layer includes a resin and a conductive metal.

The resin included in the conductive resin layer is not particularly limited as long as it has adhesiveness and impact absorbability and can be mixed with the powder of the conductive metal to form a paste. For example, the resin included in the conductive resin layer may include a phenol resin, an acrylic resin, a silicone resin, an epoxy resin, or a polyimide resin.

The conductive metal included in the conductive resin layer is used to electrically connect to the first and second internal electrodes 121 and 122 and/or the sintered metal layer.

The conductive metal included in the conductive resin layer may have a spherical shape, a flake shape, or a combination thereof. That is, the conductive metal may be formed only in a flake shape, may be formed only in a spherical shape, or may have a mixed shape of a flake shape and a spherical shape.

Herein, the spherical shape may also include a shape other than a perfect sphere, for example, may include a shape in which a length ratio between a major axis and a minor axis (major axis/minor axis) may be less than or equal to about 1.45. The sheet shape refers to a flat and elongated shape, and is not particularly limited, but for example, the sheet shape may have a length ratio between a major axis and a minor axis (major axis/minor axis) of about 1.95 or more.

The conductive resin layer may include copper (Cu), silver (Ag), nickel (Ni), or a mixture thereof as a conductive metal. When the conductive resin layer includes silver (Ag), since silver (Ag) dendrites may be formed on the surface of the multilayer capacitor 100 by ion migration, the amount of noble metal used in the first and second external electrodes 131 and 132 may be minimized by using copper (Cu), thereby preventing or delaying the occurrence of ion migration.

On the other hand, in a cross section (cross section in the L-axis direction and the T-axis direction) cut in the length direction and the stacking direction perpendicular to the width direction (W-axis direction) at the center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), the area ratio (%) of the resin included in the second layers 1312 and 1322 may be different from the area ratio (%) of the resin included in the third layers 1313 and 1323, respectively.

For example, in a cross section (a cross section in the L-axis direction and the T-axis direction) cut in the length direction and the stacking direction perpendicular to the width direction (W-axis direction) at the center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), the content of the resin included in the second layers 1312 and 1322 may be larger than the content of the resin included in the third layers 1313 and 1323.

Here, the area ratio of the resin included in the second layers 1312 and 1322 may be a percentage (%) of the area of the resin included in the second layers 1312 and 1322 per unit area to the unit area of the second layers 1312 and 1322, and the area ratio of the resin included in the third layers 1313 and 1323 may be a percentage (%) of the area of the resin included in the third layers 1313 and 1323 per unit area to the unit area of the third layers 1313 and 1323.

In addition, the area ratio of the resin included in the second layers 1312 and 1322 may be measured in terms of a unit area of the second layers 1312 and 1322, wherein, for example, in a cross-sectional photograph taken with SEM, STEM, or the like, the unit area may have a size of 10 μm×60 μm or 30 μm×60 μm. The unit area may be disposed at any location in the second layers 1312 and 1322, but must be entirely within the second layers 1312 and 1322. For example, on the third surface 110e, when the area ratio of the resin included in the second layer 1312 is measured, the long side of the unit area may be disposed parallel to the thickness direction (T-axis direction), the short side of the unit area may be disposed parallel to the length direction (L-axis direction), on the fourth surface 110f, when the area ratio of the resin included in the second layer 1322 is measured, the long side of the unit area may be disposed parallel to the thickness direction (T-axis direction), the short side of the unit area may be disposed parallel to the length direction (L-axis direction), and on the first surface 110a, when the area ratio of the resin included in the second layers 1312 and 1322 is measured, the long side of the unit area may be disposed parallel to the length direction (L-axis direction), and the short side of the unit area may be disposed parallel to the thickness direction (T-axis direction). Here, the total area of the second layers 1312 and 1322 may be based on a unit area, and the area of the resin included in the second layers 1312 and 1322 may be based on the area of the resin existing in the unit area.

Similarly, the area ratio of the resin included in the third layers 1313 and 1323 may be measured in terms of a unit area within the third layers 1313 and 1323, wherein, for example, in a cross-sectional photograph taken with SEM or STEM or the like, the unit area may have a size of 10 μm×60 μm or 30 μm×60 μm. The unit area may be located anywhere within the third layers 1313 and 1323, but must be located entirely within the third layers 1313 and 1323. For example, on the third surface 110e, when the area ratio of the resin included in the third layer 1313 is measured, the long side of the unit area may be disposed parallel to the thickness direction (T-axis direction) and the short side of the unit area may be disposed parallel to the length direction (L-axis direction), on the fourth surface 110f, when the area ratio of the resin included in the third layer 1323 is measured, the long side of the unit area may be disposed parallel to the thickness direction (T-axis direction), the short side of the unit area may be disposed parallel to the length direction (L-axis direction), and on the first surface 110a, when the area ratio of the resin included in the third layers 1313 and 1323 is measured, the long side of the unit area may be disposed parallel to the length direction (L-axis direction) and the short side of the unit area may be disposed parallel to the thickness direction (T-axis direction). Here, the total area of the third layers 1313 and 1323 may be based on a unit area, and the area of the resin included in the third layers 1313 and 1323 may be based on the area of the resin existing in the unit area.

In addition, the above-described measurement method regarding the area ratio of the resin can be similarly applied to the measurement method regarding the area ratio of the conductive metal.

The method of improving the bending strength of the multilayer capacitor 100 may include a method of relieving stress by improving the materials of the first and second external electrodes 131 and 132 or a method of increasing the thickness of the conductive resin layer having a stress relieving function. A method of improving the materials of the first and second external electrodes 131 and 132 may be achieved by increasing the resin content in the conductive resin layer, but the resin content may be limited due to side effects occurring when the resin content in the conductive resin layer is increased. For example, when the resin content increases, the content of the conductive metal decreases, degrading the electrical connectivity of the multilayer capacitor 100, and further, plating defects may occur due to the increase of the resin content, thereby degrading the moisture resistance reliability.

Therefore, the multilayer capacitor 100 according to the present disclosure includes conductive resin layers on only 4 surfaces of the multilayer capacitor 100 as follows: the first surface 110a, the third surface 110e, or the fourth surface 110f, the fifth surface 110c, and the sixth surface 110d, wherein the conductive resin layers are two conductive resin layers having different resin contents. Here, since the above 4 surfaces are areas subjected to stress, when the resin electrode (i.e., the conductive resin layer) is formed on the above 4 surfaces, the thickness of the conductive resin layer (where the position where bending stress is concentrated is located at the conductive resin layer when the board on which the multilayer capacitor 100 is mounted is bent) can be increased compared to when the resin electrode is formed on the 5 surfaces (i.e., the first surface 110a, the second surface 110b, the third surface 110e, or the fourth surface 110f, the fifth surface 110c, and the sixth surface 110 d), thereby improving the bending strength characteristics.

In addition, the second layers 1312 and 1322 disposed outside the first layers 1311 and 1321 may improve bonding strength and bending strength characteristics of the first and second external electrodes 131 and 132 by increasing the resin content, and the third layers 1313 and 1323 contacting the fourth layers 1314 and 1324 may solve the problem of plating defects by reducing the resin content, thereby improving reliability of the multilayer capacitor 100.

Accordingly, the multilayer capacitor 100 according to the present disclosure may exhibit improved bending strength due to an increase in ductility of the first and second external electrodes 131 and 132, so that stress can be easily removed when the board is bent, and in addition, may exhibit improved bonding strength of the first and second external electrodes 131 and 132 due to an increase in adhesion force of the sintered metal layers of the first and second external electrodes 131 and 132 to the conductive resin layer, improved moisture resistance reliability due to a dense formation of the plating layers of the first and second external electrodes 131 and 132, and improved electrical characteristics due to a direct connection of the sintered metal layers and the plating layers.

For example, in a cross section (a cross section in the L-axis direction and the T-axis direction) cut in the length direction and the stacking direction perpendicular to the width direction (W-axis direction) at the center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), the area ratio of the resin included in the second layers 1312 and 1322 may be about 60% to about 100%, for example, about 70% to about 90%, with respect to the total area of the second layers 1312 and 1322. When the area ratio of the resin included in the second layers 1312 and 1322 is less than about 60%, the improvement of the bending strength may be deteriorated. When the area ratio of the resin included in the second layers 1312 and 1322 is about 100%, the second layers 1312 and 1322 do not include conductive metal.

In a cross section (a cross section of the L-axis direction and the T-axis direction) cut in a length direction perpendicular to the width direction (W-axis direction) and the stacking direction at the center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), an area ratio of the conductive metal included in the second layers 1312 and 1322 may be about 0% to about 40%, for example, about 10% to about 30%, with respect to a total area of the second layers 1312 and 1322. When the area ratio of the conductive metal included in the second layers 1312 and 1322 is greater than about 40%, the improvement of the bending strength may be deteriorated.

In addition, since the area ratio of the resin included in the second layers 1312 and 1322 is greater than or equal to about 60%, the area ratio of the conductive metal included in the second layers 1312 and 1322 may be smaller than the area ratio of the resin included in the second layers 1312 and 1322.

Optionally, the second layers 1312 and 1322 may also include non-conductive fillers.

The non-conductive filler may comprise silica, glass-based oxides, or combinations thereof. For example, the glass-based oxide may include at least one selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal may include at least one selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), nickel (Ni), and a mixture thereof. The alkali metal may include at least one selected from the group consisting of lithium (Li), sodium (Na), potassium (K), and a mixture thereof. The alkaline earth metal may include at least one selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), and mixtures thereof.

The content of the non-conductive filler in the second layers 1312 and 1322 is not particularly limited, but for example, in a cross section (a cross section in the L-axis direction and the T-axis direction) cut in a length direction and a stacking direction perpendicular to the width direction (W-axis direction) at the center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), the area ratio of the non-conductive filler may be about 0% to about 40% or about 10% to about 30% with respect to the total area of the second layers 1312 and 1322. When the area ratio of the non-conductive filler is more than about 40%, the improvement in bending strength may be deteriorated.

In addition, in a cross section (L-axis direction and T-axis direction cross section) cut in a length direction and a stacking direction perpendicular to the width direction (W-axis direction) at the center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), an area ratio of the resin included in the third layers 1313 and 1323 may be about 8% to about 60%, for example, about 40% to about 60%, with respect to the total area of the third layers 1313 and 1323. When the area ratio of the resin included in the third layers 1313 and 1323 is less than about 8%, it is difficult to prepare paste because the resin and the conductive metal cannot be uniformly mixed. When the area ratio of the resin included in the third layers 1313 and 1323 is greater than about 60%, the fourth layers 1314 and 1324 plated on the third layers 1313 and 1323 may be peeled off and create an unplated area.

In a cross section (L-axis direction and T-axis direction cross section) cut in a length direction and a stacking direction perpendicular to the width direction (W-axis direction) at a center (1/2 point) of the multilayer capacitor 100 in the width direction (W-axis direction), an area ratio of the conductive metal included in the third layers 1313 and 1323 may be about 40% to about 92%, for example, about 40% to about 60%, with respect to a total area of the third layers 1313 and 1323. Accordingly, the area ratio of the conductive metal included in the third layers 1313 and 1323 may be greater than the area ratio of the resin included in the third layers 1313 and 1323, respectively.

The fourth layers 1314 and 1324 may be plating. The plating layer may include at least one selected from the group consisting of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof. For example, the plating layer may include a nickel (Ni) plating layer or a tin (Sn) plating layer, or may have a form in which a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially stacked, or may have a form in which a tin (Sn) plating layer, a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially stacked. In addition, the plating layer may include a plurality of nickel (Ni) plating layers and/or a plurality of tin (Sn) plating layers.

The plating layer may improve mountability of the multilayer capacitor 100 with a board, structural reliability, external durability, heat resistance, and Equivalent Series Resistance (ESR).

Methods of fabricating a multilayer capacitor according to some embodiments include: manufacturing a capacitor body including a dielectric layer and an internal electrode; and forming an external electrode on an outer surface of the capacitor body.

First, a manufacturing process of the capacitor body is described. In the manufacturing process of the capacitor body, the dielectric paste becomes a dielectric layer after firing, and the conductive paste becomes an internal electrode after firing.

For example, the dielectric paste is prepared by the following method. The ceramic material is uniformly mixed by such a manner as wet mixing, dried, and heat-treated under predetermined conditions to obtain a calcined powder. To the obtained calcined powder, an organic vehicle or an aqueous vehicle is added and kneaded to prepare a dielectric paste.

The obtained dielectric paste is formed into a sheet by a doctor blade method or the like to obtain a dielectric green sheet. In addition, the dielectric paste may include additives selected from various dispersants, plasticizers, dielectrics, subcomponent mixtures or glass, as needed.

The conductive paste for the internal electrode is prepared by kneading conductive powder made of conductive metal or an alloy thereof with a binder or a solvent. The conductive paste for the internal electrode may include ceramic powder (e.g., barium titanate powder) as a co-material, if necessary. The co-material may be used to inhibit sintering of the conductive powder during the firing process.

On the surface of the dielectric green sheet, a conductive paste for the internal electrode is coated in a predetermined pattern by various printing methods such as a screen printing method or a transfer printing method. After stacking the multi-layered dielectric green sheets on which the internal electrode patterns are formed, a dielectric green sheet stack is obtained by pressing the stacked dielectric green sheets in the stacking direction. At this time, dielectric green sheets on which the internal electrode patterns are not formed may be stacked on the upper and lower surfaces of the dielectric green sheet stack.

Alternatively, the obtained dielectric green sheet stack may be cut to a predetermined size by dicing or the like.

Further, the dielectric green sheet stack may be cured and dried to remove plasticizers and the like, and barrel polishing is performed by using a centrifugal barrel machine or the like after curing-drying. In barrel polishing, a dielectric green sheet stack together with a medium and a polishing liquid is put into a barrel container, and then, a rotational motion or vibration is applied to the barrel container to polish unnecessary parts (such as burrs and the like) generated during cutting. Further, after barrel polishing, the dielectric green sheet stack is washed with a cleaning solution (such as water, etc.) and dried.

The dielectric green sheet stack is treated to remove the binder and fired, thereby obtaining a capacitor body.

The binder removal may be performed under conditions appropriately adjusted according to the main component composition of the dielectric layer or the main component composition of the internal electrode. For example, the binder removal may be performed by raising the temperature at about 5 ℃ per hour to about 300 ℃ per hour and maintaining the temperature at about 180 ℃ to about 400 ℃ for about 0.5 hours to about 24 hours. The binder removal may be performed under an air atmosphere or a reducing atmosphere.

The firing treatment may be performed under conditions appropriately adjusted according to the main component composition of the dielectric layer or the main component composition of the internal electrode. For example, firing may be performed at about 1200 ℃ to about 1350 ℃ or about 1220 ℃ to about 1300 ℃ for about 0.5 hours to about 8 hours or about 1 hour to about 3 hours. The firing may be performed under a reducing atmosphere, for example, under an atmosphere in which a mixed gas of nitrogen (N ₂) and hydrogen (H ₂) is humidified. When the internal electrode includes nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure under the firing atmosphere may be about 1.0×10 ^-14 MPa to about 1.0×10 ^-10 MPa.

After the firing treatment, annealing may be performed, if necessary. Annealing is performed to reoxidize the dielectric layer, and when firing is performed under a reducing atmosphere, annealing may be performed. The annealing may be performed under conditions appropriately adjusted according to the composition of the main component of the dielectric layer, etc. For example, annealing may be performed at about 950 ℃ to about 1150 ℃ for about 0 hours to about 20 hours by raising the temperature at about 50 ℃/hour to about 500 ℃/hour. The annealing may be performed under a humid nitrogen (N ₂) atmosphere, where the partial pressure of oxygen may be about 1.0 x 10 ^-9 MPa to about 1.0 x 10 ^-5 MPa.

In the binder removal treatment, firing treatment, or annealing treatment, in order to wet nitrogen, mixed gas, or the like, for example, a wetting agent or the like may be used, wherein the water temperature may be about 5 ℃ to about 75 ℃. The binder removal treatment, firing treatment, and annealing treatment may be performed continuously or independently.

Alternatively, the third surface and the fourth surface of the obtained capacitor body may be subjected to surface treatment by sand blasting, laser irradiation, barrel polishing, or the like. The surface treatment may expose the end portions of the first and second internal electrodes on the outer surfaces (e.g., the third and fourth surfaces) of the capacitor body, thereby improving the electrical connection of the first and second external electrodes with the first and second internal electrodes, and easily forming alloy portions.

Alternatively, the first layer may be formed by coating paste for forming the first layer on the outer surface of the obtained capacitor body and then sintering the paste.

The paste used to form the first layer may include a conductive metal and glass. The conductive metal and glass are the same as those described in the present disclosure, and the description will not be repeated. In addition, the paste for forming the first layer may optionally include a subcomponent such as a binder, a solvent, a dispersant, a plasticizer, or an oxide powder. For example, the binder may include ethylcellulose, acrylic acid, butyral, etc., and the solvent may use an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, or toluene) or an aqueous solvent.

The method of coating the paste for forming the first layer on the outer surface of the capacitor body may include various printing methods such as a dipping method or a screen printing method, a coating method by using a dispenser, a spraying method by using spraying, and the like. The paste for forming the first layer may be coated on at least the third and fourth surfaces of the capacitor body, and alternatively, the paste for forming the first layer may be coated on portions of the first, second, fifth, and sixth surfaces where the strips of the first and second external electrodes are formed.

Thereafter, the capacitor body having the paste for forming the first layer coated thereon is dried and sintered at a temperature of about 700 ℃ to about 1000 ℃ for about 0.1 hour to about 3 hours to form the first layer.

The second layer may be formed by coating a paste for forming the second layer on the outer surface of the resulting capacitor body and/or the first layer and then curing the paste.

The paste used to form the second layer may include a resin, and optionally at least one of a conductive metal and a non-conductive filler. The conductive metal and resin are the same as those described in the present disclosure, and the description will not be repeated. The resin and the conductive metal included in the second layer may be the same as or different from the resin and the conductive metal included in the first layer. In addition, the paste for forming the second layer may optionally include a subcomponent such as a binder, a solvent, a dispersant, a plasticizer, or an oxide powder. For example, the binder may include ethylcellulose, acrylic acid, butyral, etc., and the solvent may include an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, or toluene) or an aqueous solvent.

For example, a method of forming a second layer may include: the capacitor body 110 is immersed in a paste for the second layer including a resin and a conductive metal and is cured, screen-printed or gravure-printed with the paste for the second layer on the surface of the capacitor body 110, or coated with the paste for the second layer and then cured.

At this time, however, paste for forming the second layer may be applied to cover a portion of the first layer and expose another portion. For example, paste for forming the second layer is applied so that the second layer is not provided on the second surface but is provided on a portion of the first surface, a portion of the third surface, a portion of the fourth surface, a portion of the fifth surface, and a portion of the sixth surface.

Next, the third layer may be formed by coating paste for forming the third layer on the second layer and then curing the paste.

The paste used to form the third layer may include a conductive metal and a resin. The conductive metal and resin are the same as those described in the present disclosure, and the description will not be repeated. The resin and the conductive metal included in the third layer may be the same as or different from the resin and the conductive metal included in the first layer or the second layer. In addition, the paste for forming the third layer may optionally include a subcomponent such as a binder, a solvent, a dispersant, a plasticizer, or an oxide powder. For example, the binder may include ethylcellulose, acrylic acid, butyral, etc., and the solvent may include an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, or toluene) or an aqueous solvent.

For example, a method of forming a third layer may include: the capacitor body 110 is immersed in a paste for the third layer including a resin and a conductive metal and is cured, screen-printed or gravure-printed with the paste for the third layer on the surface of the capacitor body 110, or coated with the paste for the third layer and then cured.

At this time, however, paste for forming the third layer may be applied to cover the second layer. For example, paste for forming the third layer is applied so that the third layer is not provided on the second surface but is provided on a portion of the first surface, a portion of the third surface, a portion of the fourth surface, a portion of the fifth surface, and a portion of the sixth surface.

In this case, the content of the resin included in the paste for forming the second layer may be larger than the content of the resin included in the paste for forming the third layer. Here, the content of the resin included in the paste for forming the second layer may be a percentage (%) of the volume of the resin in the paste for forming the second layer with respect to the total volume of the resin and the conductive metal, and the content of the resin included in the paste for forming the third layer may be a percentage (%) of the volume of the resin in the paste for forming the third layer with respect to the total volume of the resin and the conductive metal.

For example, in the paste for forming the second layer, the content of the resin may be about 60vol% to about 100vol%, for example, about 70vol% to about 90vol%, with respect to the total volume of the resin and the conductive metal. When the content of the resin in the paste for forming the second layer is less than about 60vol%, the improvement of the bending strength may be deteriorated.

In the paste for forming the second layer, the content of the conductive metal may be smaller than the content of the resin with respect to the total volume of the resin and the conductive metal. For example, in the paste for forming the second layer, the content of the conductive metal may be 0vol% to about 40vol%, for example, about 10vol% to about 30vol%. When the content of the conductive metal in the paste for forming the second layer exceeds about 40vol%, the improvement in bending strength may be deteriorated.

For example, in the paste for forming the third layer, the content of the resin may be about 8vol% to about 60vol%, for example, about 40vol% to about 60vol%, with respect to the total volume of the resin and the conductive metal. When the content of the resin in the paste for forming the third layer is more than about 60vol%, electrical connectivity may be deteriorated, and when the content of the resin in the paste for forming the third layer is less than about 8vol%, moisture resistance reliability may be deteriorated.

In the paste for forming the third layer, the content of the conductive metal may be greater than the content of the resin with respect to the total volume of the resin and the conductive metal. For example, in the paste for forming the third layer, the content of the conductive metal may be about 40vol% to about 92vol%, for example, about 40vol% to about 60vol%. When the content of the conductive metal in the paste for forming the third layer is less than about 40vol%, electrical connectivity may be deteriorated, and when the content of the conductive metal in the paste for forming the third layer exceeds 92vol%, moisture resistance reliability may be deteriorated.

Next, a fourth layer is formed outside the third layer.

For example, the fourth layer may be formed by a plating method, or may be formed by sputtering or electroplating (electrodeposition).

While the disclosure has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the disclosure is not limited to the disclosed embodiments. On the contrary, the disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

< Description of symbols >

100: Multilayer capacitor

110: Capacitor body

111: Dielectric layer

121: First inner electrode

122: Second inner electrode

131: First external electrode

132: Second external electrode

1311. 1321: First layer

1312. 1322: Second layer

1313. 1323: Third layer

1314. 1324: Fourth layer

110A, 110b: a first surface and a second surface

110E, 110f: third and fourth surfaces

110C, 110d: fifth surface and sixth surface

131A, 132a: a first electrode part

131B, 132b: a second electrode part

131C, 132c: third electrode part

131E, 132e: fourth electrode part

131C1, 132c1: first region

131C2, 132c2: second region

131E1, 132e1: first region

131E2, 132e2: a second region.

Claims

1. A multilayer capacitor comprising:

A capacitor body including a dielectric layer and an internal electrode; and

An external electrode disposed on an outer surface of the capacitor body,

Wherein the external electrode comprises:

a first layer disposed on the capacitor body and connected to the internal electrode;

a second layer covering a portion of the first layer and exposing the remaining portion of the first layer, and including a first resin;

A third layer covering the second layer and including a second resin and a second conductive metal; and

A fourth layer covering the first layer and the third layer,

The capacitor body has first and second surfaces opposite to each other in a stacking direction of the dielectric layer and the internal electrode, third and fourth surfaces opposite to each other in a length direction, and fifth and sixth surfaces opposite to each other in a width direction, the length direction and the stacking direction being perpendicular to the width direction,

In a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction, an area ratio of the first resin included in the second layer is larger than an area ratio of the second resin included in the third layer.

2. The multilayer capacitor of claim 1 wherein,

The second layer is not disposed on the second surface, and

The third layer is not disposed on the second surface.

3. The multilayer capacitor of claim 1 wherein,

The first layer is disposed on the first surface, the second surface and the third surface and/or on the first surface, the second surface and the fourth surface,

The second layer is disposed on the first surface and the third surface and/or on the first surface and the fourth surface,

The third layer is arranged on the first surface and the third surface and/or on the first surface and the fourth surface, and

The fourth layer is disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces.

4. The multilayer capacitor as claimed in claim 3, wherein,

The first layer, the second layer, the third layer, and the fourth layer are further disposed on the fifth surface and the sixth surface.

5. The multilayer capacitor as claimed in claim 3, wherein,

In a cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction,

On the third surface and/or the fourth surface, the length of the second layer in the stacking direction is smaller than or equal to the length of the first layer in the stacking direction, and

On the third surface and/or the fourth surface, a length of the third layer in the stacking direction is less than or equal to a length of the first layer in the stacking direction.

6. The multilayer capacitor as claimed in claim 3, wherein,

On the third surface and/or the fourth surface, a length of the second layer in the stacking direction is 95% or less of a length of the first layer in the stacking direction, and

On the third surface and/or the fourth surface, a length of the third layer in the stacking direction is 95% or less of a length of the first layer in the stacking direction.

7. The multilayer capacitor of claim 1 wherein,

On the third surface and/or the fourth surface, a length of the third layer in the stacking direction is greater than or equal to a length of the second layer in the stacking direction.

8. The multilayer capacitor of claim 1 wherein,

On the first surface, the second layer is disposed to entirely cover the first layer, and

On the first surface, the third layer is disposed to entirely cover the first layer.

9. The multilayer capacitor of claim 1 wherein,

On the first surface, the third layer is disposed to entirely cover the second layer.

10. The multilayer capacitor of claim 1, wherein, on the first surface, the third layer is disposed to partially expose the second layer without completely covering the second layer.

11. The multilayer capacitor of claim 1 wherein,

On the first surface, the second layer is arranged to entirely cover the first layer,

On the first surface, the third layer is disposed to partially expose the second layer without completely covering the second layer, and

On the first surface, the fourth layer is disposed to partially expose the second layer without completely covering the second layer.

12. The multilayer capacitor of claim 1 wherein,

The second layer further includes a non-conductive filler.

13. The multilayer capacitor of claim 12 wherein,

The non-conductive filler comprises silica, a glass-based oxide, or a combination thereof.

14. The multilayer capacitor of claim 1 wherein,

The area ratio of the first resin included in the second layer is 60% to 100% with respect to the total area of the second layer, and

The area ratio of the second resin included in the third layer is 8% to 60% with respect to the total area of the third layer.

15. The multilayer capacitor of claim 1 wherein,

The second layer further comprises or does not comprise a first conductive metal.

16. The multilayer capacitor of claim 15 wherein,

The area ratio of the first conductive metal included in the second layer is smaller than that of the first resin included in the second layer, and

An area ratio of the second conductive metal included in the third layer is greater than an area ratio of the second resin included in the third layer.

17. The multilayer capacitor of claim 1 wherein,

On the third surface and/or the fourth surface, a maximum length of the second layer in the length direction is 3 μm or more.

18. A method of manufacturing a multilayer capacitor, comprising:

Manufacturing a capacitor body including a dielectric layer and an internal electrode; and

An external electrode is formed on an outer surface of the capacitor body,

Wherein the step of forming the external electrode includes:

forming a first layer on the outer surface of the capacitor body;

Coating paste for forming a second layer including a first resin to cover a portion of the first layer and expose the remaining portion of the first layer, thereby forming the second layer;

Coating a paste for forming a third layer including a second resin and a second conductive metal to cover the second layer, thereby forming the third layer; and

Forming a fourth layer overlying the first layer and the third layer,

Wherein the content of the first resin included in the paste for forming the second layer is greater than the content of the second resin included in the paste for forming the third layer.

19. The method of claim 18, wherein,

The paste used to form the second layer also includes a first conductive metal,

In the paste for forming the second layer, a volume percentage of the first resin with respect to a total volume of the first resin and the first conductive metal is 60vol% or more and less than 100vol%, and

In the paste for forming the third layer, the volume percentage of the second resin is 8vol% to 60vol% with respect to the total volume of the second resin and the second conductive metal.

20. The method of claim 18, wherein,

The paste used to form the second layer also includes a first conductive metal,

In the paste for forming the second layer, the first conductive metal is smaller in volume percentage than the first resin with respect to the total volume of the first resin and the first conductive metal, and

In the paste for forming the third layer, a volume percentage of the second conductive metal is larger than a volume percentage of the second resin with respect to a total volume of the second resin and the second conductive metal.

21. A multilayer capacitor comprising:

A capacitor body including a dielectric layer and an internal electrode, and having first and second surfaces opposing each other in a stacking direction of the dielectric layer and the internal electrode, third and fourth surfaces opposing each other in a length direction, and fifth and sixth surfaces opposing each other in a width direction, the length direction and the stacking direction being perpendicular to the width direction; and

An external electrode disposed on an outer surface of the capacitor body,

Wherein the external electrode comprises:

a first layer disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces and connected to the internal electrode;

A second layer covering a portion of the first layer and exposing a remaining portion of the first layer, and disposed on the first surface and the third surface and/or on the first surface and the fourth surface;

a third layer covering the second layer, and the third layer being disposed on the first surface and the third surface and/or on the first surface and the fourth surface; and

A fourth layer covering the third layer, and the fourth layer is disposed on the first, second, and third surfaces and/or on the first, second, and fourth surfaces.

22. The multilayer capacitor of claim 21 wherein,

On the first surface, the third layer is disposed on the second layer to completely cover the second layer.

23. The multilayer capacitor of claim 21, wherein, on the first surface, the third layer is disposed on the second layer to partially expose the second layer without completely covering the second layer.

24. The multilayer capacitor of claim 21 wherein,

The second layer comprises a first resin and,

The third layer includes a second resin, and

25. The multilayer capacitor of claim 24 wherein,

The second layer further comprises a conductive metal, and

In the cross section of the multilayer capacitor cut in the length direction and the stacking direction at the center in the width direction,

The area ratio of the conductive metal included in the second layer is smaller than that of the first resin included in the second layer.

26. The multilayer capacitor of claim 24 wherein,

The third layer further comprises a conductive metal, and

An area ratio of the conductive metal included in the third layer is greater than an area ratio of the second resin included in the third layer.