CN118214265A

CN118214265A - Method for generating drive signal, power supply module, control device, and storage medium

Info

Publication number: CN118214265A
Application number: CN202410632584.8A
Authority: CN
Inventors: 陈俊杰; 潘新伟; 罗福贵; 庄仙海; 高少勇; 董亚周
Original assignee: Zhongkeguo Micro Technology Shenzhen Co ltd
Current assignee: Zhongkeguo Micro Technology Shenzhen Co ltd
Priority date: 2024-05-21
Filing date: 2024-05-21
Publication date: 2024-06-18

Abstract

The application relates to a signal generation technology, and discloses a generation method of a driving signal, which is applied to a power supply module and comprises the following steps: generating a square wave signal with a preset frequency based on a square wave generating unit; converting the square wave signal into a group of phase-staggered 180-degree frequency-division pulse signals based on a first trigger; based on a second trigger, converting a group of phase-staggered 180-degree frequency-division pulse signals into two groups of phase-staggered 90-degree frequency-division pulse signals; dead time is added to each group of divided pulse signals phase-staggered by 90 degrees on the basis of each driving unit to generate each group of driving signals respectively, and the driving signals are output to corresponding DC/DC converters. The application also discloses a power module, a control device and a computer readable storage medium. The application aims to improve the power density of a power supply module in a low-loss manner.

Description

Method for generating drive signal, power supply module, control device, and storage medium

Technical Field

The present application relates to the field of signal generation technologies, and in particular, to a method for generating a driving signal, a power module, a control device, and a computer readable storage medium.

Background

For some power supply systems (such as avionics systems) with complicated and changeable power supply networks and large stable voltage difference between the front-stage high-voltage input and the rear-stage low-voltage requirement, in order to realize large voltage variation between the front-stage and the rear-stage, a stage of isolated non-stabilized DC/DC converter is generally added in the middle to serve as a power module (or called a power module).

At present, by increasing the working frequency of an LLC resonant converter in the DC/DC converter, the volume of a magnetic element can be obviously reduced, which is beneficial to the increase of the power density of the DC/DC converter, but the increase of the switching frequency also means the increase of the loss of a relevant switching tube (such as a MOS tube) in the LLC resonant converter. Therefore, a low-loss method is needed to increase the power density of the power module.

The foregoing is provided merely for the purpose of facilitating understanding of the technical solutions of the present application and is not intended to represent an admission that the foregoing is prior art.

Disclosure of Invention

The main object of the present application is to provide a method for generating a driving signal, a power module, a control device and a computer readable storage medium, which aim to increase the power density of the power module in a low-loss manner.

In order to achieve the above object, the present application provides a method for generating a driving signal, which is applied to a power module, wherein the power module includes a converter circuit and a driving circuit; a plurality of DC/DC converters which are connected in parallel in a staggered way are arranged in the converter circuit; the driving circuit comprises a first power supply end, a square wave generating unit, a first trigger, a second trigger and two driving units, wherein the first power supply end is respectively and electrically connected with the power supply ends of the square wave generating unit, the first trigger and the second trigger, and the signal output end of the square wave generating unit is electrically connected with the clock end of the first trigger; the signal output end of the first trigger is electrically connected with the clock end of the second trigger; the two signal output ends of the second trigger are respectively and electrically connected with the input ends of the two driving units; the signal output ends of the two driving units are respectively and electrically connected with the control ends of corresponding switching tubes in different DC/DC converters;

The method for generating the driving signal comprises the following steps:

Generating a square wave signal with a preset frequency based on a square wave generating unit;

Converting the square wave signal into a group of phase-staggered 180-degree frequency-division pulse signals based on a first trigger;

Based on a second trigger, converting a group of phase-staggered 180-degree frequency-division pulse signals into two groups of phase-staggered 90-degree frequency-division pulse signals;

Dead time is added to each group of divided pulse signals phase-staggered by 90 degrees on the basis of each driving unit to generate each group of driving signals respectively, and the driving signals are output to corresponding DC/DC converters.

In order to achieve the above object, the present application also provides a power module including a converter circuit and a driving circuit; a plurality of DC/DC converters which are connected in parallel in a staggered way are arranged in the converter circuit; the driving circuit comprises a first power supply end, a square wave generating unit, a first trigger, a second trigger and two driving units, wherein the first power supply end is respectively and electrically connected with the power supply ends of the square wave generating unit, the first trigger and the second trigger, and the signal output end of the square wave generating unit is electrically connected with the clock end of the first trigger; the signal output end of the first trigger is electrically connected with the clock end of the second trigger; the two signal output ends of the second trigger are respectively and electrically connected with the input ends of the two driving units; the signal output ends of the two driving units are respectively and electrically connected with the control ends of corresponding switching tubes in different DC/DC converters;

the square wave generating unit is used for generating square wave signals with preset frequency;

The first trigger is used for converting the square wave signal into a group of frequency division pulse signals with 180-degree phase staggering;

the second trigger is used for converting a group of phase-staggered 180-degree frequency-division pulse signals into two groups of phase-staggered 90-degree frequency-division pulse signals;

the driving unit is used for adding dead time into a group of frequency division pulse signals with 90 degrees of phase interleaving to generate driving signals and outputting the driving signals to the corresponding DC/DC converter.

In order to achieve the above object, the present application also provides a control device including: the driving signal generating device comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the computer program realizes the steps of the driving signal generating method when being executed by the processor.

To achieve the above object, the present application also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method for generating a drive signal as described above.

The method for generating the driving signal, the power module, the control device and the computer readable storage medium provided by the application realize phase interleaving control driving among a plurality of DC/DC converters which are in interleaving parallel connection in the power module, ensure that the DC/DC converters work at the same switching frequency and the conduction time of the DC/DC converters is staggered for a certain time, effectively reduce the total ripple current and the total ripple voltage while improving the power density of the power module, reduce the control loss of corresponding switching tubes in the DC/DC converters, further reduce the total control loss of the power module and realize the improvement of the power density of the power module in a low-power consumption mode.

Drawings

FIG. 1is a schematic diagram of a power module according to an embodiment of the application;

FIG. 2 is a schematic diagram illustrating steps of a method for generating a driving signal according to an embodiment of the present application;

FIG. 3 is a waveform diagram of related signals according to an embodiment of the present application;

FIG. 4 is a waveform diagram of a related signal according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a driving circuit according to an embodiment of the application;

FIG. 6 is a schematic diagram of a driving unit according to an embodiment of the application;

Fig. 7 is a schematic diagram of an internal architecture of a control device according to an embodiment of the application.

The achievement of the objects, functional features and advantages of the present application will be further described with reference to the accompanying drawings, in conjunction with the embodiments.

Detailed Description

Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below are exemplary and intended to illustrate the present application and should not be construed as limiting the application, and all other embodiments, based on the embodiments of the present application, which may be obtained by persons of ordinary skill in the art without inventive effort, are within the scope of the present application.

Furthermore, references to "first," "second," etc. in this disclosure are for descriptive purposes only (e.g., to distinguish between the same or similar features), and are not to be construed as indicating or implying a relative importance or implying any particular order of magnitude of the features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present application.

In an embodiment, a method for generating a driving signal is provided and is applied to a power module; referring to fig. 1, the power module includes a converter circuit and a driving circuit; a plurality of DC/DC converters which are connected in parallel in a staggered way are arranged in the converter circuit; the driving circuit comprises a first power supply end, a square wave generating unit, a first trigger, a second trigger and two driving units, wherein the first power supply end is respectively and electrically connected with the power supply ends of the square wave generating unit, the first trigger and the second trigger, and the signal output end of the square wave generating unit is electrically connected with the clock end of the first trigger; the signal output end of the first trigger is electrically connected with the clock end of the second trigger; the two signal output ends of the second trigger are respectively and electrically connected with the input ends of the two driving units; the signal output ends of the two driving units are respectively and electrically connected with the control ends of corresponding switching tubes in different DC/DC converters.

Referring to fig. 2, the method for generating the driving signal includes:

step S10, generating a square wave signal with preset frequency based on a square wave generating unit;

Step S20, converting the square wave signal into a group of frequency division pulse signals with 180-degree phase stagger based on a first trigger;

Step S30, converting a group of phase-staggered 180-degree frequency-division pulse signals into two groups of phase-staggered 90-degree frequency-division pulse signals based on a second trigger;

Step S40, adding dead time into each group of phase-staggered 90-degree frequency division pulse signals based on each driving unit to generate each group of driving signals respectively, and outputting the driving signals to corresponding DC/DC converters.

In this embodiment, the execution terminal of the embodiment may be a power module body, or may be other devices or apparatuses (such as a control apparatus) for controlling the power module.

Optionally, the first power supply terminal is responsible for providing the required electric energy for the normal operation of the driving circuit; i.e. the first supply terminal is responsible for providing the electrical energy, e.g. a 5V dc input, which is sufficient for the normal operation of the square wave generating unit, the first flip-flop and the second flip-flop at the same time.

Alternatively, the square wave generating unit may be configured based on a timer oscillation circuit for generating a square wave signal of a preset frequency to be fed into the first flip-flop.

Alternatively, the preset frequency may be set according to actual situation, for example, set to 1MHz.

Optionally, the first trigger and the second trigger are class D triggers, and the class D triggers may be SN74HC74PWT chips. Each flip-flop may have independent data, set, reset, clock inputs, and phase complementary outputs.

Optionally, referring to fig. 3, the first flip-flop is configured to convert the received square wave signal into a set of frequency division pulse signals with 180 ° phase interleaved, and then send the set of frequency division pulse signals to the second flip-flop. The second trigger is used for converting a group of phase-staggered 180-degree frequency-division pulse signals into two groups of phase-staggered 90-degree frequency-division pulse signals, and then respectively transmitting the two groups of converted signals into two driving units (namely, each driving unit can receive the group of phase-staggered 90-degree frequency-division pulse signals).

The following description will be given by taking the generation of a square wave signal with a preset frequency of 1MHz and a duty cycle of 0.5 as an example:

When the first trigger is triggered by the rising edge of the clock, the 1MHz square wave signal with the duty ratio of 0.5 is converted into a group of frequency division pulse signals (the frequency is 500 kHz) with the duty ratio of 0.5 and the phase staggering of 180 degrees after logic conversion. When the second trigger is triggered by the rising edge of the clock, a group of binary frequency division pulse signals with 0.5 duty ratio and 180 degrees of phase staggering are converted into two groups of binary frequency division pulse signals with 0.5 duty ratio and 90 degrees of phase staggering (180 degrees of phase complementation) (the frequency is 250kHz, and the phase staggering is 90 degrees between the two groups, namely, the pulse signals obtained by the two driving units have a phase difference of 90 degrees).

Optionally, an RC circuit and a driver may be disposed in the driving unit, referring to fig. 4, the dead zone is manufactured by using the threshold voltage V _O of the driver through the charge and discharge time of the RC circuit, so that the generated driving signals can keep the same frequency and have 90 ° phase difference, and a phase staggered working mode is formed. The driving unit performs filtering treatment on a received group of frequency division pulse signals with phase staggered 90 degrees (180 degrees with phase complementation), then adjusts dead time T _DEAD set by time constant of the RC circuit, enables the driver to convert the group of frequency division pulse signals subjected to RC filtering treatment into a group of driving signals with phase complementation 180 degrees with dead time T _DEAD, and finally outputs the finally generated driving signals to the corresponding DC/DC converter.

The dead time T _DEAD may be set according to practical requirements, for example, may be set to 300ns.

Optionally, when implementing the staggered parallel connection of a plurality of DC/DC converters in the converter circuit, the adopted topology structure may be Buck, boost, buck-Boost, which may be selected according to a specific application scenario and power requirements, so long as the converter circuit has a plurality of staggered parallel DC/DC converters, and the DC/DC converters are controlled by corresponding switching tubes (such as MOS tubes), so that the driving signal generating method provided in this embodiment may be applied. That is, the converter circuit may adopt a plurality of existing interleaved DC/DC converter structures (for example, the interleaved DC/DC converter structure disclosed in patent document CN114142728 a), and each signal output end of each driving unit in the driving circuit may be connected to a control end (for example, a gate of a MOS transistor) of a corresponding switching transistor of each DC/DC converter.

Alternatively, among the plurality of DC/DC converters, the grouping may be performed according to the number of driving units. That is, when the number of driving units is two, a plurality of DC/DC converters may be divided into two groups, and the DC/DC converters in the same group are driven by the same driving unit.

If the corresponding switching tube (such as an MOS tube) in the DC/DC converter is arranged at the secondary side, the driving signal provided by the driving unit can be directly output to the control end (such as the grid electrode of the MOS tube) of the switching tube; if the corresponding switching tube (e.g., MOS tube) in the DC/DC converter is arranged at the primary side, the driving signal provided by the driving unit can be isolated and driven by the transformer and then output to the control end (e.g., gate of MOS tube) of the switching tube.

Therefore, the staggered parallel DC/DC converters can be ensured to work at the same switching frequency, the initial conduction time of the staggered parallel DC/DC converters is staggered for a certain time, and under the condition that N DC/DC converters are connected in parallel, the conduction phase difference between each converter is pi/N, so that the total ripple current and voltage can be reduced, and the power density and the heat balance of the power module are greatly improved.

Optionally, on the basis of the scheme, the driving signals of the switching tubes can be combined at will to keep the same frequency and have the phase difference pi, pi/2 … pi/n, an open-loop phase staggered working mode is formed, the output ripple voltage and current can be obviously reduced, the ripple frequency is improved by n times of that of a single converter, and the power density is greatly improved.

This open loop phase interleaving mode of operation may provide more flexibility and advantages for system design of the power supply module, particularly in power conversion schemes requiring high efficiency and high density. The system performance can be further optimized through careful phase control and a mode of combining driving signals, and the requirements of different application scenes are met.

In an embodiment, phase interleaving control driving among a plurality of DC/DC converters in interleaving parallel in a power module is realized, and it is ensured that the DC/DC converters operate at the same switching frequency and are staggered in conduction time for a certain time, so that the total ripple current and voltage can be effectively reduced while the power density of the power module is improved, the control loss of corresponding switching tubes in the DC/DC converters is reduced, the total control loss of the power module is further reduced, and the power density of the power module is improved in a low-power consumption mode.

In an embodiment, on the basis of the above embodiment, referring to fig. 5, the square wave generating unit includes a first resistor R1, a second resistor R2, a first capacitor C1, and a timer; the power supply end VCC of the timer is electrically connected with a first power supply end, a first resistor R1 is externally connected between the power supply end VCC of the timer and a discharge end DIS, the discharge end DIS (namely a Disch port) is also respectively connected with a threshold pin TH (namely a THRES port) and a Trigger end TR (namely a Trigger port) of the timer through an externally connected second resistor R2, and the Trigger end TR is also grounded through a first capacitor C1; the signal output end OUT of the timer is the signal output end OUT of the square wave generating unit;

the step of generating the square wave signal with the preset frequency based on the square wave generating unit comprises the following steps:

The first capacitor is controlled to be repeatedly charged and discharged in a preset voltage interval, so that the timer generates and outputs square wave signals;

wherein the first capacitor is charged based on the first resistor and the second resistor; the first capacitor discharges based on the second resistor.

In this embodiment, the frequency and duty cycle of the square wave can be adjusted by controlling the values of the resistor and the capacitor by using the basic operating principle of the timer. In the square wave generating unit, the operating frequency of the timer is determined by the first resistor R1 and the first capacitor C1, and the duty ratio is controlled by the second resistor R2. Thus, by reasonably selecting the values of the resistor and the capacitor, a desired square wave output can be achieved.

Optionally, the first resistor R1 is connected between the power supply terminal VCC and the discharge terminal DIS of the timer, one end of the second resistor R2 is connected to the first resistor R1 and the discharge terminal DIS, and the other end is connected to the threshold pin TH and the trigger terminal TR of the timer (corresponding to the short circuit of the threshold pin TH and the trigger terminal TR). The first capacitor C1 is connected between the trigger TR of the timer and ground GND.

Alternatively, the timer may be caused to generate and output a square wave signal of a preset frequency by controlling the first capacitor C1 to be repeatedly charged and discharged within a preset voltage interval. If the dc voltage provided by the first power supply terminal is U, the range of the preset voltage interval may be [1/3U,2/3U ].

When the square wave generating unit works, the first capacitor C1 is charged to 2/3U through the first resistor R1 and the second resistor R2, then the output voltage is turned over, the first capacitor C1 is discharged to 1/3U through the second resistor R2, then the first capacitor C1 is charged to 2/3U again, and then the output voltage is turned over again, so that the timer can have the condition of generating square wave signals with preset frequency.

Optionally, the specific values of the first resistor R1, the second resistor R2 and the first capacitor C1 may be set according to the frequency of the square wave signal to be generated; for example, to enable the timer to generate a square wave signal of 1MHz, the first resistor R1 may be set to a value of 1kΩ, the second resistor R2 may be set to a value of 500 Ω, and the first capacitor C1 may be set to a value of 1 μf.

In an embodiment, on the basis of the above embodiment, referring to fig. 5, the square wave generating unit further includes a third resistor R3, a second capacitor C2, and a third capacitor C3; the third resistor R3 is externally connected between a power supply end VCC and a reset end RE of the timer, and the reset end RE is also connected with a reset signal input end RST; the common pin CON of the timer is also grounded through a second capacitor C2; the power supply end VCC of the timer is grounded through a third capacitor C3;

the method for generating the driving signal further comprises the following steps:

And resetting the timer when receiving a reset signal input by the reset signal input end.

In this embodiment, the third resistor R3 and the reset signal input terminal RST are used to implement the reset function of the timer. When the reset signal input terminal RST receives an externally input reset signal, the third resistor R3 maintains the reset terminal RE of the control timer in a reset state. In the reset state, the timer will be reset, thereby ensuring that the square wave generating unit restarts timing after receiving the reset signal, so as to ensure that the system can accurately reset the state of the square wave signal when needed.

The presence of the reset function improves the stability and reliability of the system, particularly in cases where it is necessary to respond to external events in time and to reinitialize the square wave generating unit.

Optionally, a second capacitor C2 is connected between the common pin CON of the timer and ground GND for filtering and stabilizing the timer.

Optionally, a third capacitor C3 is connected between the power supply terminal VCC and the ground GND of the timer, for stabilizing the input power supply and filtering.

In addition, referring to fig. 1 and 5, a power module is further provided in an embodiment of the present application, where the power module includes a converter circuit and a driving circuit; a plurality of DC/DC converters which are connected in parallel in a staggered way are arranged in the converter circuit; the driving circuit comprises a first power supply end, a square wave generating unit, a first trigger, a second trigger and two driving units, wherein the first power supply end is electrically connected with a power supply end VCC of the square wave generating unit, the first trigger and the second trigger respectively, and a signal output end OUT of the square wave generating unit is electrically connected with a clock end CK of the first trigger; the signal output end OUT of the first trigger is electrically connected with the clock end CK of the second trigger; two signal output ends OUT of the second trigger are respectively and electrically connected with the input ends of the two driving units; the signal output ends OUT of the two driving units are respectively used for being electrically connected with the control ends of corresponding switching tubes in different DC/DC converters;

Because the power module adopts all the technical schemes of all the embodiments, the power module at least has all the technical effects brought by the technical schemes of the embodiments, and the description is omitted herein.

Alternatively, referring to fig. 5, the clock terminal CK of the first flip-flop is electrically connected to the signal output terminal OUT of the square wave generating unit, for receiving a square wave signal; the signal output end OUT of the first trigger is electrically connected with the clock end CK of the second trigger and is used for outputting a group of frequency division pulse signals with 180-degree phase stagger to the second trigger. The power supply ends VCC of the first trigger and the second trigger are connected with the ground wire GND through the fourth capacitor C4, so that the resistance of the trigger to power supply interference is improved, and the stability and reliability of the trigger are enhanced.

Taking a trigger as an example, the SN74HC74PWT chip comprises two clock terminals, two data terminals, a clearing terminal (Clear port), a Preset terminal (Preset port) and two signal output terminals (not shown in the figure), wherein each signal output terminal also comprises a forward output terminal and a reverse output terminal; therefore, in the first trigger, the first clock end is connected with the signal output end of the square wave generating unit, the second clock end, the clearing end, the preset end and the second data end are connected with the first power supply end, the first data end is in short circuit with the reverse output end of the first signal output end, and the forward output end and the reverse output end of the first signal output end are respectively connected with the first clock end and the second clock end of the second trigger; in the second trigger, the clearing end and the preset end are connected with a first power supply end, and the first data end and the second data end are respectively in short circuit with a reverse output end of the first signal output end and a reverse output end of the second signal output end.

Optionally, in some optional embodiments, a controller may be further disposed in the power module, where a monitoring end and a control output end of the controller are respectively electrically connected to the driving circuit and the converter circuit, and are used to monitor an operation state of each device in the driving circuit and the converter circuit, and control operation of the corresponding device.

In an embodiment, on the basis of the above embodiment, referring to fig. 6, the driving unit includes a fourth resistor R4, a fifth resistor R5, a first diode D1, a second diode D2, a fifth capacitor C5, a sixth capacitor C6, and a driver; each signal output terminal OUT of the second trigger comprises a forward output terminal OUT+ and a reverse output terminal OUT-;

The fourth resistor R4 and the first diode D1 are arranged IN parallel between the forward output terminal out+ of the second trigger and the forward input terminal in+ of the driver, and the conducting direction of the first diode D1 is from the forward input terminal in+ of the driver to the forward output terminal out+ of the second trigger (i.e., the anode of the first diode D1 is connected with the forward input terminal in+ of the driver and the cathode is connected with the forward output terminal out+) of the second trigger); the fifth resistor R5 and the second diode D2 are arranged IN parallel between the reverse output end OUT-of the second trigger and the reverse input end IN-of the driver, and the conducting direction of the second diode D2 is from the reverse input end IN-of the driver to the reverse output end OUT-of the second trigger (namely, the anode of the second diode D2 is connected with the reverse input end IN-of the driver, and the cathode is connected with the reverse output end OUT-);

The positive input in+ of the driver is also connected to ground via a fifth capacitor C5 and the negative input IN-of the driver is also connected to ground via a sixth capacitor C6.

In this embodiment, two signal output terminals OUT of the second flip-flop are respectively connected to corresponding driving units, and each output a group of frequency division pulse signals with 90 ° phase-staggered. And each signal output end OUT of the second trigger comprises a forward output end OUT+ and a reverse output end OUT-, the forward output end OUT+ and the reverse output end OUT-are connected with the same driving unit, and two signals in a group of phase-staggered 90-degree two-frequency-division pulse signals are output into one driving unit through the forward output end OUT+ and the reverse output end OUT-respectively.

Optionally, the fourth resistor R4, the first diode D1 and the fifth capacitor C5 form an RC circuit used at the positive input terminal in+ of the driver; the fifth resistor R5, the second diode D2 and the sixth capacitor C6 form an RC circuit for the inverting input IN-of the driver.

Alternatively, the driver has two signal output terminals OUT for outputting two signals of a finally generated set of drive signals having 180 ° phase complements with dead time, respectively.

Alternatively, the device type of the driver may be UCC27524ADGN.

Optionally, the power supply end VCC of the driver is further grounded through a seventh capacitor C7, and the power supply end VCC of the driver is electrically connected to the second power supply end;

The direct current voltage input by the second power supply end is larger than the direct current voltage input by the first power supply end; the second power supply terminal is connected to the power supply terminal VCC of the driver for providing the driver with a sufficient operating voltage. And the direct current voltage (optionally 12V) input by the second power supply end is larger than the direct current voltage input by the first power supply end.

Optionally, the power supply terminal VCC of the driver is further connected to the ground GND through a seventh capacitor C7, so as to further improve stability and anti-interference capability of the circuit.

In addition, in the embodiment of the present application, a control device is further provided, where the internal architecture of the control device may include a processor, a memory, a communication interface, and an input interface that are connected through a system bus as shown in fig. 7. Wherein the processor is configured to provide computing and control capabilities. The memory includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database is used for storing data called by the computer program. The communication interface is used for carrying out data communication with an external terminal. The input interface is used for receiving signals input by external equipment. The computer program is executed by a processor to implement a method of generating a drive signal as described in the above embodiments.

It will be appreciated by those skilled in the art that the structure shown in fig. 7 is merely a block diagram of a portion of the structure associated with the present application and does not constitute a limitation of the control device to which the present application is applied. For example, in some alternative embodiments, the control device may further include an output interface (not shown), and the output interface is also coupled to the system bus and is configured to output corresponding signals to the peripheral device.

Furthermore, the present application proposes a computer-readable storage medium comprising a computer program which, when executed by a processor, implements the steps of the method of generating a drive signal as described in the above embodiments. It is understood that the computer readable storage medium in this embodiment may be a volatile readable storage medium or a nonvolatile readable storage medium.

In summary, in the method, the power module, the control device and the computer readable storage medium for generating the driving signal provided in the embodiments of the present application, phase-interleaved control driving between a plurality of DC/DC converters interleaved in the power module is implemented, and it is ensured that the DC/DC converters operate at the same switching frequency and have conducting times staggered for a certain time, so that the power density of the power module is improved, and meanwhile, the total ripple current and the total ripple voltage can be effectively reduced, so as to reduce the control loss of the corresponding switching tube in the DC/DC converter, further reduce the total control loss of the power module, and improve the power density of the power module in a low-power consumption manner.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium provided by the present application and used in embodiments may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual speed data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (SYNCHLINK) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, apparatus, article, or method that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, apparatus, article, or method. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, apparatus, article, or method that comprises the element.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes using the descriptions and drawings of the present application or direct or indirect application in other related technical fields are included in the scope of the present application.

Claims

1. The method for generating the driving signal is applied to a power supply module and is characterized in that the power supply module comprises a converter circuit and a driving circuit; a plurality of DC/DC converters which are connected in parallel in a staggered way are arranged in the converter circuit; the driving circuit comprises a first power supply end, a square wave generating unit, a first trigger, a second trigger and two driving units, wherein the first power supply end is respectively and electrically connected with the power supply ends of the square wave generating unit, the first trigger and the second trigger, and the signal output end of the square wave generating unit is electrically connected with the clock end of the first trigger; the signal output end of the first trigger is electrically connected with the clock end of the second trigger; the two signal output ends of the second trigger are respectively and electrically connected with the input ends of the two driving units; the signal output ends of the two driving units are respectively and electrically connected with the control ends of corresponding switching tubes in different DC/DC converters;

The method for generating the driving signal comprises the following steps:

2. The method of generating a driving signal according to claim 1, wherein the square wave generating unit includes a first resistor, a second resistor, a first capacitor, and a timer; the power end of the timer is electrically connected with the first power supply end, the first resistor is externally connected between the power end and the discharge end of the timer, the discharge end is also respectively connected with the threshold pin and the trigger end of the timer through the externally connected second resistor, and the trigger end is also grounded through the first capacitor; the signal output end of the timer is the signal output end of the square wave generating unit;

3. The method of generating a driving signal according to claim 2, wherein the square wave generating unit further comprises a third resistor, a second capacitor, and a third capacitor; the third resistor is externally connected between the power end and the reset end of the timer, and the reset end is also connected with the reset signal input end; the common pin of the timer is also grounded through a second capacitor; the power end of the timer is grounded through a third capacitor;

4. The method of generating a driving signal according to claim 1, wherein the driving unit includes an RC circuit and a driver; the step of adding dead time to each group of the phase-staggered 90 DEG divided pulse signals based on each driving unit to generate each group of driving signals respectively comprises the following steps:

based on an RC circuit in each driving unit, respectively carrying out RC filtering treatment on each group of phase-staggered 90-degree frequency division pulse signals;

The time constant of the RC circuit is adjusted to set dead time so that the driver converts the filtered 90-degree phase interleaved two-frequency pulse signal into a group of 180-degree phase complementary driving signals with dead time.

5. A power supply module, characterized in that the power supply module comprises a converter circuit and a drive circuit; a plurality of DC/DC converters which are connected in parallel in a staggered way are arranged in the converter circuit; the driving circuit comprises a first power supply end, a square wave generating unit, a first trigger, a second trigger and two driving units, wherein the first power supply end is respectively and electrically connected with the power supply ends of the square wave generating unit, the first trigger and the second trigger, and the signal output end of the square wave generating unit is electrically connected with the clock end of the first trigger; the signal output end of the first trigger is electrically connected with the clock end of the second trigger; the two signal output ends of the second trigger are respectively and electrically connected with the input ends of the two driving units; the signal output ends of the two driving units are respectively and electrically connected with the control ends of corresponding switching tubes in different DC/DC converters;

6. The power module of claim 5, wherein the power terminals of the first and second flip-flops are further coupled to ground via a fourth capacitor.

7. The power module of claim 5, wherein the driving unit includes a fourth resistor, a fifth resistor, a first diode, a second diode, a fifth capacitor, a sixth capacitor, and a driver; each signal output end of the second trigger comprises a forward output end and a reverse output end;

The fourth resistor and the first diode are arranged in parallel between the positive output end of the second trigger and the positive input end of the driver, and the conducting direction of the first diode is from the positive input end of the driver to the positive output end of the second trigger; the fifth resistor and the second diode are arranged in parallel between the reverse output end of the second trigger and the reverse input end of the driver, and the conducting direction of the second diode is from the reverse input end of the driver to the reverse output end of the second trigger;

the positive input end of the driver is grounded through a fifth capacitor, and the negative input end of the driver is grounded through a sixth capacitor.

8. The power module of claim 7, wherein the power terminal of the driver is further coupled to ground via a seventh capacitor, the power terminal of the driver being electrically coupled to the second power terminal;

The direct current voltage input by the second power supply end is larger than the direct current voltage input by the first power supply end.

9. A control device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, which computer program, when executed by the processor, realizes the steps of the method of generating a drive signal according to any one of claims 1 to 4.

10. A computer-readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the steps of the method of generating a drive signal according to any one of claims 1 to 4.