CN118176716A - Signal converter and arrangement with a signal converter - Google Patents

Abstract

A signal converter (11) includes a converter input (12), a transformer (16) having a primary side (17) coupled to the converter input (12), a demodulator (20) including a filter (90), a comparator (86), and a demodulator output (21), and a converter output (25) coupled to the demodulator output (21). The filter (90) is coupled to the secondary side (18) of the transformer (16). The input side of the comparator (86) is coupled to the filter (90). A comparator output (100) of the comparator (86) is coupled to the demodulator output (21).

Description

Signal converter and arrangement with a signal converter

The present disclosure relates to a signal converter and an arrangement with a signal converter.

The signal converter is configured to convert an input signal received at the converter input using a first protocol to an output signal at the converter output using a second protocol. Smart meters, such as Linky smart meters, which are often used in france, provide data signals having a first protocol. Because the information obtained by the smart meter is useful to at least another application in the building, the data signal provided by the smart meter must be converted into an output signal or signals that can be received by another application in the building. The input signal of the signal converter may be disturbed by electromagnetic interference or noise received by a connection line connecting the smart meter to the signal converter.

It is an object of the present invention to provide a signal converter and an arrangement with a signal converter which reduces the influence of disturbances when converting signals.

These objects are achieved by the subject matter of the independent claims. Further developments and embodiments are described in the dependent claims.

A signal converter is provided that includes a converter input, a transformer having a primary side coupled to the converter input, a demodulator having a demodulator output, and a converter output coupled to the demodulator output. The demodulator includes a filter and a comparator. The filter is coupled to the secondary side of the transformer. The input side of the comparator is coupled to the filter. The comparator output of the comparator is coupled to the demodulator output.

Advantageously, the transformer at the input side of the signal converter and the filter of the demodulator reduce the influence of electromagnetic interference or noise received at the input of the converter. Advantageously, there is no direct current coupling (simply DC coupling) between the converter input and the demodulator, since a transformer is arranged between the converter input and the demodulator. Thus, the reference potential at the reference potential terminal of the signal converter may be different from the reference potential of the device or apparatus coupled to the input of the converter. Furthermore, a signal converter with a transformer at the converter input achieves a higher sensitivity than an optocoupler which requires a minimum voltage of, for example, at least 1V to 1.2V to function. With a transformer, it is possible to achieve the use of a supply voltage of, for example, less than 0.8V, as required by the specifications in the field.

In one embodiment, a signal converter is configured to receive an input signal at a converter input and to convert the input signal to a converter output signal provided at a converter output. The input signal is, for example, an amplitude modulated signal, an amplitude shift keyed signal or an on-off keyed signal. The input signal is generated by digital amplitude modulation, for example, by a signal source not comprised by the signal converter. The signal source is, for example, a smart meter, such as Linky smart meters.

In one embodiment of the signal converter, the transformer is implemented as a current transformer.

In one embodiment of the signal converter, the turns ratio R of the transformer is calculated according to the following equation:

Wherein NPRI is the number of winding turns on the primary side of the transformer, NESC is the number of winding turns on the secondary side of the transformer; uprim is the voltage on the primary side; usec is the voltage on the secondary side; iprim is the short-circuit current on the primary side; and Isec is the short-circuit current on the secondary side. In one example, the turns ratio R is less than 1.2. Alternatively, the turns ratio R is less than 1.1. Alternatively, the turns ratio R is less than or equal to 1.0. In case of R >1, the transformer is implemented as a step-up current transformer. In case of R <1, the transformer is implemented as a step-down current transformer. In the case of r=1, the transformer is implemented as an isolation transformer. The transformer is designed such that, for example, its size is reduced to a minimum size and has an appropriate creepage distance, minimum magnetizing current, and core characteristics. In one example, the number of turns NPRI on the primary side is zero; in this case, the primary side is realized, for example, by a straight wire, and the secondary side is realized by a winding around the wire.

In one embodiment, the signal converter comprises an anti-parallel circuit of diodes arranged between a first terminal of the secondary side of the transformer and a second terminal of the secondary side of the transformer.

In one embodiment of the signal converter, the anti-parallel circuit of diodes comprises a first diode and a second diode. The first diode and the second diode are implemented as schottky diodes. Advantageously, the schottky diode has a very low voltage drop to have a minimum current transformer.

In one embodiment of the signal converter, the filter is implemented as a bandpass filter or a high-pass filter.

In one embodiment of the signal converter, the demodulator comprises an edge detector comprising an input side coupled to the comparator output and an output side coupled to the demodulator output. The input signal comprises a signal carrier. The edge detector is implemented to detect the presence of a signal carrier.

In one example, more specifically, the input signal includes a plurality of periods. In some of the plurality of cycles, the input signal is implemented by a signal carrier; in these periods there is a signal carrier; these periods represent the first logical value of the input signal. In other of the plurality of periods, the input signal has no signal carrier; no signal carrier; the input signal is approximately zero; these periods represent the second logical value of the input signal. The edge detector is configured to detect an edge having a period of a current signal carrier. The period may also be referred to as a cycle. If the peak amplitude is higher than a predetermined value, such as 0.8V, the signal carrier is considered to be present in the input signal. The edge detector detects the presence of a signal carrier.

In one embodiment of the signal converter, the demodulator is configured to perform envelope demodulation, such as non-coherent envelope demodulation. The demodulator is implemented as an envelope detector, for example.

In one embodiment of the signal converter, the edge detector is configured to generate the demodulator output signal as a function of a comparator output signal of the comparator. The pulse duration of the demodulator output signal is longer than the pulse duration of the comparator output signal. The edge detector detects an edge of a pulse of the comparator output signal. The edge detector is configured to combine several pulses of the comparator output signal into one pulse of the demodulator output signal. Thus, the edge detector may also be referred to as a pulse former, a pulse forming circuit, a pulse combining circuit or an envelope demodulator.

In one embodiment of the signal converter, the edge detector comprises at least one of a monostable multivibrator or a pulse generator. The edge detector is for example re-triggerable.

In one embodiment, the signal converter includes a microcontroller having an input coupled to the demodulator output and an output coupled to the converter output.

In one embodiment, the signal converter includes a transceiver having an input coupled to an output of the microcontroller and an output coupled to an output of the converter. The transceiver is implemented as, for example, an RS485 transceiver.

In one embodiment, the signal converter includes a converter housing configured to be attached to a switchboard, such as a rail attached to the switchboard.

An arrangement is provided that includes a signal converter and a smart meter coupled to an input of the converter.

In one embodiment of the arrangement, the smart meter comprises a housing. The signal converter is inserted into the housing of the smart meter.

In one example, the signal converter implements a demodulation circuit for an amplitude modulated signal (e.g., an on-off keying signal, simply OOK) that includes an enhanced isolation RS485 modbus protocol with high sensitivity at 9600 Bds. This application involves demodulation of amplitude modulated "on-off keying" (AM, 50khz,50%,9600 Bds) signals with very high sensitivity (0.8V peak, simply 0.8P). The signal converter provides enhanced isolation. The signal converter uses a microcontroller to convert the previous signal to the RS485 modbus protocol or uses a microcontroller to convert to modbus through RS 485. The signal converter reaches a high sensitivity level to demodulate the OOK signal with transformer electrical isolation and to demodulate a signal with 4.8kHz (9600 Bds).

In one example, the signal converter includes an electronic schematic designed to connect to a TIC protocol signal sink Linky counter. TIC is an acronym for telecom interface client. Linky smart meters or counters are sold by Enedis in france. The TIC signal is of the amplitude modulation type "on-off key" (AM, 50khz,50%,9600 Bds). By using a specific current transformer satisfying the insulation distance and the creepage distance in a very small volume, enhanced insulation and high sensitivity are achieved. For demodulation, a comparator is used, followed by a re-triggerable monostable multivibrator (e.g., device 74HC123 or device SN 74LVC1G 123) or a monostable pulse generator (e.g., device TimerBlox: LTC 6993) with a schmitt trigger input. The microcontroller converts the previous signal to another protocol, such as Modbus RS485. The RS485 hardware interface is made using a dedicated transceiver (e.g., device LTC 2854).

In one example, the signal converter is configured to directly interface Xstorage house products to the Linky counter and use data from Linky smart meter customer telematics. The interface avoids adding current sensors beyond Xstorage that involve wiring problems that lead to customer problems.

In one example, the signal converter is configured as a gateway card.

The following description of the drawings of the embodiments may further illustrate and explain various aspects of the signal converter and the arrangement with the signal converter. Parts and devices having the same structure and the same effect are denoted by the same reference numerals, respectively. To the extent that the functional aspects of the components or devices correspond to one another in different figures, a description thereof is not repeated for each of the following figures.

Fig. 1 shows an example of an arrangement with a signal converter;

fig. 2A to 2C show examples of details of the signal converter;

fig. 3 shows an example of signals of a signal converter; and

Fig. 4A and 4B show examples of arrangements with signal converters.

Fig. 1 shows an example of an arrangement 10 with a signal converter 11. In fig. 1, a global schematic is shown. The signal converter 11 has a converter input 12. The converter input 12 comprises a first input terminal 13 and a second input terminal 14. The signal converter 11 comprises a transformer 16. The primary side 17 of the transformer 16 is coupled to the converter input 12. Further, the signal converter 11 includes a demodulator 20. The input side of demodulator 20 is coupled to the secondary side 18 of transformer 16. The signal converter 11 comprises a converter output 25. Demodulator output 21 of demodulator 20 is coupled to converter output 25.

In addition, the signal converter 11 comprises a microcontroller 22 having an input 23 coupled to the demodulator output 21. An output 24 of the microcontroller 22 is coupled to a converter output 25. The signal converter 11 comprises a transceiver 26 having an input coupled to an output 24 of the microcontroller 22. An output of transceiver 26 is coupled to a transducer output 25. Thus, an output 24 of the microcontroller 22 is coupled to a converter output 25 via a transceiver 26. The transceiver 26 is implemented for example as an RS485 transceiver or a Profibus transceiver. Demodulator output 21 is coupled to a converter output 25 via a microcontroller 22 and a transceiver 26.

In addition, the signal converter 11 comprises a power supply 41 coupled via a supply output 98 to the different circuits of the signal converter 11, such as, for example, the demodulator 20, the microcontroller 22, the transceiver 26 and the circuit components coupled to the secondary side 18 of the transformer 16. In addition, the signal converter 11 includes a display 42 coupled to the microcontroller 22. The display 42 is implemented as, for example, a light emitting diode. In addition, the signal converter 11 includes a power indicator 43 coupled to the power source 41. The power indicator 43 is implemented as, for example, a light emitting diode.

The arrangement 10 further comprises a smart meter 50. The smart meter 50 is coupled at its output side to the converter input 12. Thus, the first output terminal 51 of the smart meter 50 is coupled to the first input terminal 13. A second output terminal 52 of the smart meter 50 is coupled to the second input terminal 14. The smart meter 50 comprises, for example, a further output. The further output enables data communication, for example via a power line (not shown).

In addition, the arrangement 10 comprises means 55. The means 55 are coupled at their input side to the converter output 25. The device 55 is, for example, an energy storage device or an uninterruptible power supply (UPS for short). The energy storage device is implemented, for example, by the X storage product provided by irish Eaton Corporation plc.

The smart meter 50 provides an input signal S1 which is applied via the converter input 12 to the primary side 17 of the transformer 16. The smart meter 50 is connected to the converter input 12 by an input signal S1. More specifically, the input signal S1 is applied to the first input terminal 13. The smart meter 50 provides a further input signal S2 which is applied to the primary side 17 of the transformer 16 via the converter input 12. More specifically, the further input signal S2 is applied to the second input terminal 14. For example, s1= -S2.

The input signal S1 is implemented as a telecommunication interface client signal (abbreviated as TIC signal). Thus, in one example, the TIC signal from Linky smart meter is applied to the converter input 12. The TIC signal is generated using an "on-off keying" protocol (amplitude modulation, abbreviated AM, frequency of the TIC signal 50kHz, duty cycle 50%,9600bds,0.8V peak-to-peak, abbreviated 0.8V PP). The input signal S1 comprises information about, for example, the active power, reactive power, voltage and/or current measured by the smart meter 50.

Demodulator 20 generates a demodulator output signal SD as a function of input signal S1. The demodulator output signal SD is provided at a demodulator output 21. The demodulator output signal SD is formed by the transformer 16 and the demodulator 20 as a function of the input signal S1.

The converter output signal SO is provided at a converter output 25. The converter output signal SO is a function of the demodulator output signal SD. The converter output signal SO is generated by the microcontroller 22 and the transceiver 26 from the demodulator output signal SD. The converter output signal SO is, for example, an RS485 signal. The converter output signal SO is a half duplex signal. The converter output signal SO uses, for example, a Modbus protocol, such as a Modbus remote terminal unit protocol, simply referred to as a Modbus RTU protocol. The transceiver 26 performs half duplex communication. The microcontroller 22 and transceiver 26 perform data processing from the demodulator output signal SD to the converter output signal SO.

The power supply 41 receives a voltage VS. In one example, the voltage VS is in the range between 5V and 25V. The power supply 41 generates a supply voltage VDD using the voltage VS. The supply voltage VDD is supplied to different circuit components of the signal converter 11. The supply voltage VDD has a value of, for example, 3.3V. The power supply power indicator 43 indicates that the power supply 41 is operating properly. The power supply 41 generates a supply voltage VDD at a supply output 98.

The display 42 indicates that the input signal S1 from the smart meter 50 is correct, for example, upon request Enedis.

In an alternative embodiment, not shown, another device is connected to the converter input 12.

In an alternative embodiment, not shown, the microcontroller 22 is coupled to the converter output 25 via a transmitter. Thus, the transceiver 26 is replaced by a transmitter. The transmitter is implemented as, for example, an RS 422 transmitter.

Fig. 2A shows an example of a detail of the signal converter 11, which is a further development of the example shown in fig. 1. In fig. 2A, electronic components providing electrically isolated and high sensitivity demodulation circuits are described. Electrical isolation is achieved by transformer 16. The signal converter 11 comprises a first socket 60 comprising a first input terminal 13 and a second input terminal 14. Further, the first socket 60 includes a third input terminal 61. In addition, the signal converter 11 includes a second socket 62. The first input terminal 63 of the second socket 62 is connected to the third input terminal 61 of the first socket 60. The second input terminal 64 of the second socket 62 is connected to the second input terminal 14 of the first socket 60. The third input terminal 65 of the second socket 62 is connected to the first input terminal 13 of the first socket 60.

The first input terminal 13 is coupled to a first terminal 71 of the primary side 17 of the transformer 16. The second input terminal 14 is coupled to a second terminal 72 of the primary side 17 of the transformer 16. The signal converter 11 comprises a transformer capacitor 73 coupling the first input terminal 13 to the first terminal 71 of the primary side 17 of the transformer 16. The first transformer resistor 74 couples the second input terminal 14 to the second terminal 72 of the primary side 17 of the transformer 16. In one example, the second transformer resistor 75 is optionally connected in parallel to the first transformer resistor 74.

The signal converter 11 does not have any conductive connection of a terminal or node on the primary side 17 of the transformer 16 to a terminal or node on the secondary side 18 of the transformer 16. By construction, the transformer 16 provides electrical isolation (SELV), high sensitivity, and impedance matching, for example, as required according to the Enedis specification. Within the signal converter 11, the signal and the supply voltage VDD are implemented as a safe very low voltage (SELV for short). Impedance matching is performed by the transformer capacitor 73, the first transformer resistor 74, the optional second transformer resistor 75 and the primary side 17 of the transformer 16.

The signal converter 11 comprises an anti-parallel circuit of diodes 80. The anti-parallel circuit of diode 80 includes a first diode 81 and a second diode 82. The anode of the first diode 81 is connected to the cathode of the second diode 82. The cathode of the first diode 81 is coupled or connected to the anode of the second diode 82. The anode of the first diode 81 is coupled to a first terminal 83 of the secondary side 18 of the transformer 16. The cathode of the first diode 81 is coupled to the second terminal 84 of the secondary side 18 of the transformer 16. The voltage between the first terminal 83 and the second terminal 84 of the secondary side 18 is kept low by the anti-parallel circuit of the diode 80. Low means that the voltage between the first terminal 83 and the second terminal 84 of the secondary side 18 is configured to be seen as a low impedance (similar to a short circuit) from the current transformer 16 and has a small sinusoidal signal when there is a signal carrier from the smart meter 50. The first diode 81 and the second diode 82 are implemented as, for example, schottky diodes. Advantageously, the schottky diode is adapted to reduce the secondary voltage on the secondary side 18 of the transformer 16, for example to reduce the magnetizing current and make the transformer 16 smaller.

Further, demodulator 20 includes a comparator 86 having a first input 87 and a second input 88. In one example, the first input 87 is implemented as an inverting input and the second input 88 is implemented as a non-inverting input. The first input 87 and the second input 88 of the comparator 86 are coupled to the first terminal 83 and the second terminal 84 of the secondary side 18 of the transformer 16 via a filter 90.

The filter 90 comprises a high pass filter. The filter 90 comprises a first filter capacitor 91 coupling the second terminal 84 of the secondary side 18 of the transformer 16 to the first input 87 of the comparator 86. The first terminal 83 of the secondary side 18 is coupled via a first filter resistor 92 to the second terminal 84 of the secondary side 18 via a first filter capacitor 91 to select the cut-off frequency of the high-pass filter. The first filter resistor 92 couples the first terminal 83 of the secondary side 18 to a node between the first filter capacitor 91 and the first input 87 of the comparator 86. The second filter capacitor 93 couples the first terminal 83 of the secondary side 18 to the reference potential terminal 94. The first terminal 83 of the secondary side 18 is coupled to the second input 88 of the comparator 86 via a second filter resistor 95. A third filter resistor 96 couples the second input 88 of the comparator 86 to the reference potential terminal 94. The fourth filter resistor 97 couples the first terminal 83 of the secondary side 18 to the supply output 98 of the power supply 41. The fourth filter resistor 97 generates a stable potential reference from the supply voltage VDD at the supply output 98 for the signal from the secondary side 18 of the current transformer 16. The fourth filter resistor 97 and the second filter capacitor 93 form a filter. The second filter resistor 95, the third filter resistor 96 and the fourth filter resistor 97 generate a voltage reference from the supply voltage VDD tapped at the supply output 98. The voltage reference is applied to a second input 88 of the comparator 86.

The comparator 86 compares the output of the high-pass filter constituted by the first filter capacitor 91 and the first filter resistor 92 with the reference constituted by the supply voltage VDD and the second filter resistor 95, the third filter resistor 96 and the fourth filter resistor 97 to detect the presence of the signal carrier in the input signal S1. The signal at the comparator output 100 is high if the signal is above the reference and low otherwise. Thus, the comparator 86 generates a pulse train when a signal carrier is present in the input signal S1. The second filter resistor 95 introduces hysteresis. Comparator 86 is implemented, for example, as device LMV331 from Texas Instruments of texas, usa. The comparator 86 detects the rising or falling edge of the signal provided by the smart meter 50. Determining whether the rising or falling edge of the signal provided by the smart meter 50 depends on, for example, which terminal of the smart meter 50 is connected to the first converter input 13 and which other terminal of the smart meter 50 is connected to the second input 14.

The filter 90 implements a high pass. The filter 90 is configured such that the voltage at the second input 88 of the comparator 86 is almost constant. The DC part of the voltage is determined by the value of the supply voltage VDD and the values of the third filter resistor 95, the fourth filter resistor 96 and the fifth filter resistor 97. The AC part of the voltage is low due to the second filter capacitor 93. Thus, the second input 88 of the comparator 86 receives the reference voltage. A first input 87 of the comparator 86 receives the signal generated by the secondary side 18 of the transformer 16 and filtered by the high pass filter of the filter 90.

Comparator 86 has a power supply input connected to power supply output 98 of power supply 41. Thus, the stabilizing capacitor 99 couples the supply output 98 to the reference potential terminal 94. Further, the comparator 86 is connected to the reference potential terminal 94. A comparator resistor 101 optionally couples a comparator output 100 of comparator 86 to power supply output 98. The comparator resistor 101 is useful in cases where the comparator output 100 is implemented, for example, according to an open drain or open connector type. Comparator 86 generates a comparator output signal SC at comparator output 100.

Further, the signal converter 11 includes an edge detector 110. The edge detector 110 is implemented as, for example, an envelope detector. The edge detector 110 includes a multivibrator 111. Multivibrator 111 is implemented as a monostable multivibrator. Multivibrator 111 is fabricated as a monostable multivibrator that can be re-triggered. In one example, multivibrator 111 is implemented by device 74HC123 from Texas Instruments of Tex, U.S.A. The apparatus includes a second multivibrator that is not in use. Multivibrator 111 has an input 112 coupled to comparator output 100. A coupling resistor 113 is optionally arranged between the comparator output 100 and the first input 112 of the multivibrator 111. Multivibrator 111 comprises an output 114 connected to demodulator output 21. An output resistor 120 is optionally arranged between the output 114 of the multivibrator 111 and the demodulator output 21.

The power supply terminal of multivibrator 111 is connected to power supply terminal 98. The stabilizing capacitor 121 is connected to the power supply terminal of the multivibrator 111. The reference terminal of the multivibrator 111 is connected to the reference potential terminal 94. The control capacitor 115 couples the first control terminal 116 of the multivibrator 111 to the second control terminal 117 of the multivibrator 111. The control resistor 118 couples the second control terminal 117 to the power supply output 98. Additional control resistors 119 are optionally connected in parallel to the first control resistor 118 to improve accuracy. Multivibrator 111 has two further input terminals connected to reference potential terminal 94 or supply output 98.

The edge detector 110 generates a demodulator output signal SD. The pulse width TD of the demodulator output signal SD has a predetermined value. Since the multivibrator 111 is re-triggerable, the pulse width TD of the demodulator output signal SD has a predetermined minimum value. The predetermined minimum value of the pulse width TD is calculated, for example, according to the following equation:

TD＝k·RX·CX，

Where Cx is the capacitance of the control capacitor 115, rx is two control resistors 118,

119, And k is a constant (e.g., k=0.45). Alternatively, the additional control resistor 119 is omitted; in this case, rx is the resistance value of the control resistor 118. The pulse width TD is calculated to have a duration just above the delay between two pulses from the comparator output signal SC. The pulse width TD is set to have a duration longer than the distance between two pulses of the comparator output signal SC.

Advantageously, the first socket 60 and the second socket 62 are used to connect the smart meter 50 to the signal converter 11 and additionally to another signal converter or any other device having the ability to obtain information from the smart meter 50.

Because the electrical isolation is achieved by the transformer 16, the signal converter 11 has no optical isolator (also referred to as an optocoupler). Opto-isolators typically require high voltages to operate. Such high voltages are avoided by using a transformer 16.

In an alternative embodiment, not shown, at least one further diode is connected in series to the first diode 81 and at least one additional diode is connected in series to the second diode 82. With an increased number of series diodes, the current transformer 16 may be larger due to a higher output voltage on the secondary side 18 of the transformer 16.

In an alternative embodiment, not shown, the coupling resistor 113 is omitted and replaced by a connection line.

In an alternative embodiment, not shown, the output resistor 120 is omitted and replaced by a connection line.

In an alternative embodiment, not shown, the further control resistor 119 is omitted.

Fig. 2B shows an example of a detail of the signal converter 11, which is a further development of the example shown in fig. 1 and 2A. The edge detector 110 is implemented as a pulse generator 130. The pulse generator 130 is also implemented as a monostable multivibrator. The pulse generator 130 is implemented as a one-shot pulse generator. Thus, the pulse generator 130 may also be referred to as a "monostable pulse generator". The pulse generator 130 is re-triggerable. The pulse generator 130 has a programmable pulse width. In one example, the pulse generator 130 is implemented as a device LTC6993 of Analog Devices, inc. of America.

The pulse generator 130 comprises an input 131 coupled or directly connected to the comparator output 100. The output 132 of the pulse generator 130 is coupled or directly connected to the demodulator output 21. The pulse generator 130 includes a set terminal 134 implemented as a pulse width setting input. The set terminal 134 is connected to the reference potential terminal 94 via a set resistor 135. The voltage at the set terminal 134 is adjusted to, for example, 1V, above the ground potential GND tapped at the reference potential terminal 94. The amount of current flowing through set terminal 134 programs the master oscillator frequency of pulse generator 130. The resistor 135 is set to determine the current and thus the main oscillation frequency.

In addition, the pulse generator 130 includes a voltage divider 136 and a voltage divider input 137. A voltage divider 136 is coupled between the supply output 98 and the reference potential terminal 94. The taps of the voltage divider 136 are connected to a voltage divider input 137. The voltage tapped at the voltage divider input 137 is converted into a digital value by an analog-to-digital converter (not shown) of the pulse generator 130, which has, for example, a 4-bit resolution. The voltage divider 136 includes a first voltage divider resistor 138 and a second voltage divider resistor 139. A first voltage divider resistor 138 couples the supply output 98 to a tap of the voltage divider 136. A second divider resistor 139 couples the reference potential terminal 94 to a tap of the divider 136.

The signal at the output of the analog-to-digital converter programs a programmable divider coupled between the output of the master oscillator and the output 132 of the pulse generator 130. Thus, the pulse width TD of the demodulator output signal SD is a function of the resistance of the resistor of the voltage divider 136 and the set resistor 135. The pulse width TD is calculated to have a duration just above the delay between two pulses from the comparator output signal SC. The pulse width TD is set to have a duration longer than the distance between two pulses of the comparator output signal SC.

Fig. 2C shows another example of a detail of the signal converter 11, which is a further development of the example shown in fig. 1, 2A and 2B. The comparator output 100 is directly connected to the demodulator output 21. As shown in fig. 1, the microcontroller 22 is configured to determine whether the demodulator output signal SD is a series of pulses or whether the demodulator output signal SD has no series of pulses. Thus, the microcontroller 22 includes software or firmware that combines pulses into longer pulses with a smaller duration between two pulses in the output signal of the comparator. In fig. 2C, the demodulator output signal SD is, for example, equal to or about equal to the comparator output signal SC. In one example, coupling resistor 113 is optionally disposed between comparator output 100 and demodulator output 21.

Fig. 3 shows an example of signals of the signal converter 11 as shown in fig. 1, 2A, 2B and 2C. The comparator output signal SC, the input signal S1 and the demodulator output signal SD are shown as a function of time t. As shown in fig. 3, in the first period a, the input signal S1 includes a series of five sine waves having different amplitudes, which are converted by the transformer 16, the filter 90, and the comparator 86 to form four rectangular pulses included in the comparator output signal SC. As shown in fig. 2A and 2B, the edge detector 110 converts a rectangular pulse of the comparator output signal SC into one pulse of the demodulator output signal SD. The pulses in the demodulator output signal SD represent a first logical value, for example a value 1. The pulse duration TD of the demodulator output signal SD is longer than the pulse duration TC of the comparator output signal SC. The period may be referred to as a cycle.

In the next period B, the input signal S1 has a value of about 0V. The input signal S1 is, for example, a voltage signal. Thus, the comparator output signal SC and the demodulator output signal SD are constant and have a value of, for example, 0V. This state of the demodulator output signal SD represents a second logical value, for example 0.

In the third period C, the input signal S1 includes about six sine waves having different amplitudes. Thus, the comparator output signal SC provides five pulses. The edge detector 110 forms a single pulse of the five pulses of the comparator output signal SC.

When a signal carrier is present in the input signal S1 (e.g., having a value or amplitude of > 0.8V), the smart meter 50 sends a first logic value, such as a bit logic 1. When there is no signal carrier (e.g., having a value of < 0.8V) in the input signal S1, the smart meter 50 sends a second logic value, e.g., bit logic 0. The smart meter 50 sends information by sending a set of bits. The bit stream is encoded using on-off keying modulation, simply OOK modulation. Thus, the demodulator output signal SD for three periods A, B, C has bit logic 101. The length of the pulses of the demodulator output signal SD in the third period C may be different from the length TD of the pulses in the first period a. The different pulse lengths do not contain e.g. information.

Fig. 4A shows an example of an arrangement 10 with a signal converter 11, which is a further development of the above-described example. The signal converter 11 includes a converter housing 140. The circuit components as shown in fig. 1 and 2A to 2C are inserted into the converter housing 140. The converter housing 140 includes an opening 141. The opening 141 is formed so that the signal converter 11 can be attached to the rail 142 of the switch plate 143. The rail 142 is, for example, a DIN rail. The signal converter 11 receives its power from, for example, the switch board 143. The smart meter 50 provides power EP to the device 55. The data provided by the smart meter 50 is applied to the signal converter 11. The signal converter 11 provides the converted data to the device 55 using the Modbus protocol.

Fig. 4B shows another example of an arrangement 10, which is a further development of the above example. The smart meter 50 includes a housing 145. The signal converter 11 is formed such that it fits within the housing 145 of the smart meter 50. The smart meter 50 obtains a free space into which the transducer housing 140 of the signal transducer can be inserted. Thus, the signal converter 11 is integrated into the housing 145 of the smart meter 50. The housing 145 of the smart meter 50 has an opening for coupling the signal converter 11 to a connection line or a plurality of connection lines, for example, of the device 55.

The described embodiments shown in fig. 1 to 4B represent examples of improved signal converters 11 and arrangements 10; thus, they do not constitute a complete list of all embodiments according to the improved signal converter and arrangement. For example, the actual signal converter and arrangement may differ from the illustrated embodiments in terms of components, structure, and shape.

Reference numerals

10. Arrangement structure

11. Signal converter

12. Converter input terminal

13. First input terminal

14. Second input terminal

16. Transformer

17. Primary side

18. Secondary side

20. Demodulator with a plurality of filters

21. Demodulator output terminal

22. Micro controller

23. Input terminal

24. An output terminal

25. Converter output

26. Transceiver with a plurality of transceivers

41. Power supply

42. Display device

43. Power indicator

50. Intelligent instrument

51. 52 Output terminal

55. Device and method for controlling the same

57. Computer with a memory for storing data

58. Display device

60. First socket

61. Third input terminal

62. Second socket

63-65 Input terminals

71. 72 Terminal

73. Transformer capacitor

74. 75 Transformer resistor

80. Anti-parallel circuit of diode

81. 82 Diode

83. 84 Terminal

86. Comparator with a comparator circuit

87. 88 Input terminal

90. Filter device

91. First filter capacitor

92. First filter resistor

93. Second filter capacitor

94. Reference potential terminal

95-97 Resistor

98. Power supply output terminal

99. Stable capacitor

100. Comparator output

101. Comparator resistor

110. Edge detector

111. Multivibrator

112. Input terminal

113. Coupling resistor

114. An output terminal

115. Control capacitor

116. 117 Control terminal

118. 119 Control resistor

120. Output resistor

121. Stable capacitor

130. Pulse generator

131. Input terminal

132. An output terminal

134. Set terminal

135. Setting resistor

136. Voltage divider

137. Voltage divider input

138. 139 Voltage divider resistor

140. Converter housing

141. An opening

142. Rail track

143. Switch board

145. Shell body

EP electric power

S1 input signal

S2 further input signals

SC comparator output signal

SD demodulator output signal

SO converter output signal

Time t

TC, TD pulse duration

VDD supply voltage

VS voltage

Claims (14)

1. A signal converter (11), the signal converter comprising:

-a converter input (12),

A transformer (16) having a primary side (17) coupled to the converter input (12),

-An anti-parallel circuit of diodes (80) comprising a first diode (81) and a second diode (82),

-A demodulator (20) comprising a filter (90), a comparator (86), and a demodulator output (21), and

A converter output (25) coupled to the demodulator output (21),

Wherein the filter (90) is coupled to the secondary side (18) of the transformer (16), and

Wherein an input side of the comparator (86) is coupled to the filter (90) and a comparator output (100) of the comparator (86) is coupled to the demodulator output (21),

Wherein the anode of the first diode (81) is connected to the cathode of the second diode (82) and the cathode of the first diode (81) is connected to the anode of the second diode (82),

Wherein the anode of the first diode (81) is coupled to a first terminal (83) of the secondary side (18) of the transformer (16), and

Wherein the cathode of the first diode (81) is coupled to a second terminal (84) of the secondary side (18) of the transformer (16).

2. The signal converter (11) according to claim 1,

Wherein the signal converter (11) is configured to receive an input signal (S1) at the converter input (12) and to convert the input signal (S1) into a converter output Signal (SO) provided at the converter output (25), and

Wherein the input signal (S1) is an amplitude modulated signal, an amplitude shift keying signal or an on-off keying signal.

3. The signal converter (11) according to claim 1 or 2,

Wherein the transformer (16) is realized as a current transformer.

4. A signal converter (11) according to one of claims 1 to 3,

Wherein the turns ratio R of the transformer (16) is calculated according to the following equation:

Wherein NPRI is the number of winding turns on the primary side (17) of the transformer (16), and NESC is the number of winding turns on the secondary side (18) of the transformer (16), and

Wherein 1.2> R.

5. Signal converter (11) according to one of claims 1 to 4,

Wherein the first and second diodes (81, 82) are implemented as schottky diodes.

6. Signal converter (11) according to one of claims 1 to 5,

Wherein the demodulator (20) comprises an edge detector (110) comprising an input side coupled to the comparator output (100) and an output side coupled to the demodulator output (21).

7. The signal converter (11) according to claim 6,

Wherein the edge detector (110) is configured to generate a demodulator output Signal (SD) as a function of a comparator output Signal (SC) of the comparator (86), and

Wherein the pulse duration (TD) of the demodulator output Signal (SD) is longer than the pulse duration (TC) of the comparator output Signal (SC).

8. The signal converter (11) according to claim 6 or 7,

Wherein the edge detector (110) comprises at least one of a monostable multivibrator (111) or a pulse generator (130).

9. Signal converter (11) according to one of claims 1 to 8,

Wherein the signal converter (11) comprises a microcontroller (22) having an input (23) coupled to the demodulator output (21) and an output (24) coupled to the converter output (25).

10. The signal converter (11) according to claim 9,

Wherein the signal converter (11) comprises a transceiver (26) having an input coupled to the output (24) of the microcontroller (22) and an output coupled to the converter output (25).

11. Signal converter (11) according to one of claims 1 to 10,

Wherein the signal converter (11) comprises a converter housing (140) configured to be attached to a switch board (143).

12. The signal converter (11) according to claim 11,

Wherein the converter housing (140) is configured to be attached to a track (142) of the switch plate (143).

13. An arrangement (10), the arrangement comprising:

-a signal converter (11) according to one of claims 1 to 12, and

-A smart meter (50) coupled to the converter input (12).

14. An arrangement (10) according to claim 13,

Wherein the smart meter (50) comprises a housing (145), and wherein the signal converter (11) is inserted into the housing (145) of the smart meter (50).