CN118174674B - Filter chip and electronic device - Google Patents
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- CN118174674B CN118174674B CN202410590980.9A CN202410590980A CN118174674B CN 118174674 B CN118174674 B CN 118174674B CN 202410590980 A CN202410590980 A CN 202410590980A CN 118174674 B CN118174674 B CN 118174674B
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- H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
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Abstract
Description
技术领域Technical Field
本申请涉及集成电路领域,尤其涉及一种滤波器芯片及电子设备。The present application relates to the field of integrated circuits, and in particular to a filter chip and an electronic device.
背景技术Background technique
在相关技术中,现代无线通信正向着具有高数据速率、大容量和低时延的毫米波频段发展,但同时高频将面临更大的大气衰减。E波段受雨衰影响有限,在大部分地区均可接受,且频谱资源丰富,可解决当前移动通信网络高带宽业务带宽相对不足的问题,应用场景非常广泛,是最佳5G、6G承载解决方案之一,相关器件的设计也成为研究热点。In related technologies, modern wireless communications are developing towards millimeter wave bands with high data rates, large capacity and low latency, but at the same time, high frequencies will face greater atmospheric attenuation. The E band is limited by rain attenuation and is acceptable in most areas. It also has abundant spectrum resources and can solve the problem of relatively insufficient bandwidth for high-bandwidth services in current mobile communication networks. It has a wide range of application scenarios and is one of the best 5G and 6G bearer solutions. The design of related devices has also become a research hotspot.
随着集成电路制造技术的不断提升,毫米波集成电路系统的尺寸更小,集成度更高。而滤波器作为射频前端的重要器件,其性能优劣关系着系统的总体性能。因此,如何得到更高性能的高集成度滤波器,仍是一个亟待解决的问题。With the continuous improvement of integrated circuit manufacturing technology, the size of millimeter wave integrated circuit systems has become smaller and more integrated. As an important component of the RF front end, the performance of the filter is related to the overall performance of the system. Therefore, how to obtain a higher performance, highly integrated filter is still a problem that needs to be solved.
发明内容Summary of the invention
根据本申请实施例的第一方面,提供一种滤波器芯片,包括:输入端口、输出端口、多模谐振器、输入端馈线与输出端馈线;According to a first aspect of an embodiment of the present application, there is provided a filter chip, comprising: an input port, an output port, a multi-mode resonator, an input feed line and an output feed line;
所述输入端馈线至少包括第一输入端馈线与第二输入端馈线,所述输出端馈线至少包括第一输出端馈线与第二输出端馈线;所述输入端口与所述输入端馈线连接,所述输出端口与所述输出端馈线连接;所述第一输入端馈线与所述第一输出端馈线相对设置,所述第二输入端馈线与所述第二输出端馈线位于所述多模谐振器的两侧;The input feeder at least includes a first input feeder and a second input feeder, and the output feeder at least includes a first output feeder and a second output feeder; the input port is connected to the input feeder, and the output port is connected to the output feeder; the first input feeder and the first output feeder are arranged opposite to each other, and the second input feeder and the second output feeder are located on both sides of the multi-mode resonator;
所述输入端口用于接收输入信号,且用于将所述输入信号传输到相连的所述输入端馈线;所述输入端馈线至少用于通过能量耦合将所述输入信号传输至所述多模谐振器;所述多模谐振器用于通过谐振形成信号通带,以对所述输入端口接收的输入信号进行滤波;所述输出端馈线至少用于通过能量耦合从所述多模谐振器获得经过滤波的所述输入信号,并传输至相连的输出端口输出经过滤波后的输入信号;The input port is used to receive an input signal and to transmit the input signal to the connected input end feeder; the input end feeder is at least used to transmit the input signal to the multimode resonator through energy coupling; the multimode resonator is used to form a signal passband through resonance to filter the input signal received by the input port; the output end feeder is at least used to obtain the filtered input signal from the multimode resonator through energy coupling, and transmit it to the connected output port to output the filtered input signal;
相对设置的所述第一输入端馈线与所述第一输出端馈线还用于直接将所述第一输入端馈线传输的所述输入信号通过能量耦合直接传输至所述第一输出端馈线。The first input feeder and the first output feeder that are arranged opposite to each other are also used to directly transmit the input signal transmitted by the first input feeder to the first output feeder through energy coupling.
在一些实施例中,所述多模谐振器包括第一阶梯阻抗、第二阶梯阻抗与连接线;In some embodiments, the multi-mode resonator includes a first step impedance, a second step impedance and a connecting line;
所述第一阶梯阻抗包括第一阶梯第一子线与第一阶梯第二子线,所述第一阶梯第一子线与所述第一阶梯第二子线沿同一方向延伸;所述第二阶梯阻抗包括相对设置的第二阶梯第一子线与第二阶梯第二子线,所述第二阶梯第一子线与所述第二阶梯第二子线沿同一方向延伸;其中,所述第一阶梯第一子线与所述第二阶梯第一子线相对设置,所述第一阶梯第二子线与所述第二阶梯第二子线相对设置;所述第一阶梯第一子线与所述第一阶梯第二子线相连,所述第二阶梯第一子线与所述第二阶梯第二子线相连;The first ladder impedance includes a first ladder first sub-line and a first ladder second sub-line, and the first ladder first sub-line and the first ladder second sub-line extend in the same direction; the second ladder impedance includes a second ladder first sub-line and a second ladder second sub-line that are arranged oppositely, and the second ladder first sub-line and the second ladder second sub-line extend in the same direction; wherein the first ladder first sub-line and the second ladder first sub-line are arranged oppositely, and the first ladder second sub-line and the second ladder second sub-line are arranged oppositely; the first ladder first sub-line is connected to the first ladder second sub-line, and the second ladder first sub-line is connected to the second ladder second sub-line;
在各自的延伸方向上,所述第一阶梯第一子线或所述第二阶梯第一子线的宽度,大于所述第一阶梯第二子线或所述第二阶梯第二子线的宽度;In the respective extending directions, the width of the first-step first sub-line or the second-step first sub-line is greater than the width of the first-step second sub-line or the second-step second sub-line;
所述连接线连接所述第一阶梯第二子线与所述第二阶梯第二子线。The connecting line connects the first-step second sub-line and the second-step second sub-line.
在一些实施例中,所述多模谐振器还包括第三阶梯阻抗、第四阶梯阻抗与加载结构;In some embodiments, the multi-mode resonator further includes a third step impedance, a fourth step impedance and a loading structure;
所述第三阶梯阻抗包括第三阶梯第一子线与第三阶梯第二子线,所述第三阶梯第一子线与所述第三阶梯第二子线沿不同方向延伸;所述第四阶梯阻抗包括第四阶梯第一子线与第四阶梯第二子线,所述第四阶梯第一子线与所述第四阶梯第二子线沿不同方向延伸;所述第三阶梯第一子线与所述第四阶梯第一子线相对设置,且通过所述连接线相连;所述第三阶梯第二子线与所述第四阶梯第二子线相对设置;所述第三阶梯第一子线与所述第三阶梯第二子线呈角度相连,所述第四阶梯第一子线与所述第四阶梯第二子线呈角度相连;The third ladder impedance includes a third ladder first sub-line and a third ladder second sub-line, and the third ladder first sub-line and the third ladder second sub-line extend in different directions; the fourth ladder impedance includes a fourth ladder first sub-line and a fourth ladder second sub-line, and the fourth ladder first sub-line and the fourth ladder second sub-line extend in different directions; the third ladder first sub-line and the fourth ladder first sub-line are arranged opposite to each other and are connected through the connecting line; the third ladder second sub-line and the fourth ladder second sub-line are arranged opposite to each other; the third ladder first sub-line is connected to the third ladder second sub-line at an angle, and the fourth ladder first sub-line is connected to the fourth ladder second sub-line at an angle;
在各自的延伸方向上,所述第三阶梯第二子线或所述第四阶梯第二子线的宽度,大于所述第三阶梯第一子线或所述第四阶梯第一子线的宽度;In the respective extending directions, the width of the third-step second sub-line or the fourth-step second sub-line is greater than the width of the third-step first sub-line or the fourth-step first sub-line;
所述加载结构包括所述第一加载子线、所述第二加载子线与所述第三加载子线;所述第一加载子线与所述第二加载子线连接至所述第三加载子线的同一端,所述第三加载子线的另一端与所述连接线相连;在各自的延伸方向上,所述第一加载子线、所述第二加载子线与所述第三加载子线的宽度相同;The loading structure comprises the first loading sub-line, the second loading sub-line and the third loading sub-line; the first loading sub-line and the second loading sub-line are connected to the same end of the third loading sub-line, and the other end of the third loading sub-line is connected to the connecting line; in their respective extending directions, the first loading sub-line, the second loading sub-line and the third loading sub-line have the same width;
所述第一加载子线与所述第三阶梯第二子线沿同一方向延伸且相对设置,所述第二加载子线与所述第四阶梯第二子线沿同一方向延伸且相对设置。The first loading sub-line and the third-step second sub-line extend in the same direction and are arranged opposite to each other, and the second loading sub-line and the fourth-step second sub-line extend in the same direction and are arranged opposite to each other.
在一些实施例中,所述第一阶梯第一子线与所述第一阶梯第二子线及所述第三阶梯第一子线沿同一方向延伸,所述第二阶梯第一子线与所述第二阶梯第二子线、所述第四阶梯第一子线沿同一方向延伸;所述连接线与所述第一阶梯及所述第二阶梯的延伸方向相垂直;所述第三阶梯第二子线与所述第三阶梯第一子线相垂直,所述第四阶梯第二子线与所述第四阶梯第一子线相垂直;所述第一加载子线与所述第二加载子线沿同一方向延伸;所述第三加载子线与所述第一加载子线以及所述第二加载子线相垂直,且与所述连接线相垂直。In some embodiments, the first step first sub-line, the first step second sub-line and the third step first sub-line extend in the same direction, and the second step first sub-line, the second step second sub-line and the fourth step first sub-line extend in the same direction; the connecting line is perpendicular to the extension direction of the first step and the second step; the third step second sub-line is perpendicular to the third step first sub-line, and the fourth step second sub-line is perpendicular to the fourth step first sub-line; the first loading sub-line and the second loading sub-line extend in the same direction; the third loading sub-line is perpendicular to the first loading sub-line and the second loading sub-line, and is perpendicular to the connecting line.
在一些实施例中,所述多模谐振器所包括的各部分一体形成。In some embodiments, the multi-mode resonator comprises parts formed integrally.
在一些实施例中,包括衬底层、第一介质层、气体层、第一滤波器结构层、第二滤波器结构层、接地层、导体过孔与第二介质层;In some embodiments, it includes a substrate layer, a first dielectric layer, a gas layer, a first filter structure layer, a second filter structure layer, a ground layer, a conductor via and a second dielectric layer;
所述衬底位于所述接地层上;所述第一介质层位于所述衬底背向所述接地层的一侧;所述第一滤波器结构层位于所述介质层内;所述气体层位于所述第一介质层背向所述衬底的一侧;所述第二介质层位于所述气体层背向所述第一介质层的一侧,所述第二滤波器结构层位于所述第二介质层内;所述第一滤波器结构层和所述第二滤波器结构层均包括相同的滤波器结构;所述第一滤波器结构层和所述第二滤波器结构层经由所述导体过孔互相连接;The substrate is located on the grounding layer; the first dielectric layer is located on the side of the substrate facing away from the grounding layer; the first filter structure layer is located in the dielectric layer; the gas layer is located on the side of the first dielectric layer facing away from the substrate; the second dielectric layer is located on the side of the gas layer facing away from the first dielectric layer, and the second filter structure layer is located in the second dielectric layer; the first filter structure layer and the second filter structure layer both include the same filter structure; the first filter structure layer and the second filter structure layer are connected to each other via the conductor vias;
所述第二滤波器结构层与所述第一滤波器结构层所包括的相同所述滤波器结构对应设置,且所述第二滤波器结构层在所述第一滤波器结构层上的正投影位于所述第一滤波器结构层内。The second filter structure layer is arranged corresponding to the same filter structure included in the first filter structure layer, and the orthographic projection of the second filter structure layer on the first filter structure layer is located within the first filter structure layer.
在一些实施例中,所述衬底的材料包括碳化硅,所述第一介质层与所述第二介质层的材料包括氮化硅。In some embodiments, the material of the substrate includes silicon carbide, and the materials of the first dielectric layer and the second dielectric layer include silicon nitride.
在一些实施例中,采用所述多模谐振器的滤波器结构通过IPD工艺形成在所述衬底上。In some embodiments, a filter structure using the multi-mode resonator is formed on the substrate by an IPD process.
在一些实施例中,所述第一滤波器结构层与所述第二滤波器结构层都包括接地端口;所述导体过孔在所述接地端口上的正投影位于所述接地端口内;In some embodiments, both the first filter structure layer and the second filter structure layer include a ground port; the orthographic projection of the conductor via on the ground port is located within the ground port;
所述导体过孔包括第一段过孔与第二段过孔;所述第一滤波器结构层和所述第二滤波器结构层通过所述第二段过孔连接,接地端口再通过所述第一段过孔连接到所述接地层,以实现接地。The conductor via includes a first section via and a second section via; the first filter structure layer and the second filter structure layer are connected through the second section via, and the ground port is connected to the ground layer through the first section via to achieve grounding.
根据本申请的第二方面,提供一种电子设备,包括上述任一种滤波器芯片。According to a second aspect of the present application, an electronic device is provided, comprising any one of the above-mentioned filter chips.
根据上述实施例可知,第一输出端馈线与第二输出端馈线均可以用于从多模谐振器获取经过多模谐振器滤波的输入信号。从而,可以通过输入端馈线与输出端馈线实现对滤波器芯片的外部品质因数的灵活调节。According to the above embodiments, the first output feeder and the second output feeder can be used to obtain the input signal filtered by the multimode resonator from the multimode resonator. Thus, the external quality factor of the filter chip can be flexibly adjusted through the input feeder and the output feeder.
并且,通过设置相对的第一输入端馈线与第一输出端馈线,可以直接将第一输入端馈线传输的输入信号通过能量耦合直接传输至第一输出端馈线,可以在输入端口与输出端口同时激励多模谐振器的多个谐振模式,形成的多条路径之外,额外产生一条由输入端口经由第一输入端馈线与第一输出端馈线到输出端口的路径,从而,可以通过更多的传输路径之间存在的相位差而引入多个带外传输零点,进而,可以使滤波器芯片具备更好的高频选择性。Furthermore, by setting a relative first input feeder and a first output feeder, the input signal transmitted by the first input feeder can be directly transmitted to the first output feeder through energy coupling, and multiple resonant modes of the multi-mode resonator can be simultaneously excited at the input port and the output port. In addition to the multiple paths formed, an additional path is generated from the input port via the first input feeder and the first output feeder to the output port. Therefore, multiple out-of-band transmission zeros can be introduced through the phase differences between more transmission paths, and thus the filter chip can have better high-frequency selectivity.
因此,这样设置可以在实现对滤波器芯片的外部品质因数的进行灵活调节的同时,使滤波器芯片具备更好的高频选择性。Therefore, such a setting can achieve flexible adjustment of the external quality factor of the filter chip while enabling the filter chip to have better high-frequency selectivity.
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本申请。It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
此处的附图被并入说明书中并构成本说明书的一部分,示出了符合本申请的实施例,并与说明书一起用于解释本申请的原理。The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
图1是根据本申请实施例示出的滤波器芯片的结构示意图。FIG. 1 is a schematic diagram of the structure of a filter chip according to an embodiment of the present application.
图2是根据本申请实施例示出的针对图1所示的滤波器芯片的S参数和群时延仿真的结果示意图。FIG. 2 is a schematic diagram showing the results of S-parameter and group delay simulation for the filter chip shown in FIG. 1 according to an embodiment of the present application.
图3是根据本申请实施例示出的图1所示的滤波器芯片的俯视图。FIG. 3 is a top view of the filter chip shown in FIG. 1 according to an embodiment of the present application.
图4是根据本申请实施例示出的图3中多模谐振器的局部放大图。FIG. 4 is a partial enlarged view of the multi-mode resonator in FIG. 3 according to an embodiment of the present application.
图5是根据本申请实施例示出的图4所示电路结构的传输线等效电路的示意图。FIG. 5 is a schematic diagram of a transmission line equivalent circuit of the circuit structure shown in FIG. 4 according to an embodiment of the present application.
图6是根据本申请实施例示出的图5所示传输线等效电路在偶模激励下的示意图。FIG. 6 is a schematic diagram of the transmission line equivalent circuit shown in FIG. 5 under even-mode excitation according to an embodiment of the present application.
图7是根据本申请实施例示出的图5所示传输线等效电路在奇模激励下的示意图。FIG. 7 is a schematic diagram of the transmission line equivalent circuit shown in FIG. 5 under odd-mode excitation according to an embodiment of the present application.
图8是根据本申请实施例示出的滤波器芯片所采用IPD工艺简化的截面图。FIG. 8 is a simplified cross-sectional view of the IPD process used in the filter chip according to an embodiment of the present application.
具体实施方式Detailed ways
这里将详细地对示例性实施例进行说明,其示例表示在附图中。下面的描述涉及附图时,除非另有表示,不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反,它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.
本申请提供一种滤波器芯片10。图1示出的是该滤波器芯片10的结构示意图。如图1所示,该滤波器芯片10,包括:输入端口11、输出端口12、多模谐振器13、输入端馈线14与输出端馈线15。The present application provides a filter chip 10. Fig. 1 shows a schematic diagram of the structure of the filter chip 10. As shown in Fig. 1, the filter chip 10 includes: an input port 11, an output port 12, a multi-mode resonator 13, an input feed line 14 and an output feed line 15.
输入端馈线14至少包括第一输入端馈线141与第二输入端馈线142,输出端馈线15至少包括第一输出端馈线151与第二输出端馈线152。输入端口11与输入端馈线14连接,输出端口12与输出端馈线15连接。第一输入端馈线141与第一输出端馈线151相对设置,第二输入端馈线142与第二输出端馈线152位于多模谐振器13的两侧。The input feeder 14 at least includes a first input feeder 141 and a second input feeder 142, and the output feeder 15 at least includes a first output feeder 151 and a second output feeder 152. The input port 11 is connected to the input feeder 14, and the output port 12 is connected to the output feeder 15. The first input feeder 141 and the first output feeder 151 are arranged opposite to each other, and the second input feeder 142 and the second output feeder 152 are located on both sides of the multimode resonator 13.
其中,第一输入端馈线141与第一输出端馈线151相对设置,即第一输入端馈线141与第一输出端馈线151对应的部分尺寸相当,互相对齐,且在二者之间不存在其他走线结构的阻挡。The first input feeder 141 and the first output feeder 151 are arranged opposite to each other, that is, the corresponding parts of the first input feeder 141 and the first output feeder 151 are of comparable size and aligned with each other, and there is no other wiring structure blocking the two.
需要说明的是,虽然此处仅对第一输入端馈线141与第一输出端馈线151之间的相对设置进行了说明,但是可以想到的是,本申请中其他部分的相对设置的描述同样可以参照此处的说明。It should be noted that, although only the relative arrangement between the first input feeder 141 and the first output feeder 151 is described here, it is conceivable that the description of the relative arrangement of other parts in the present application can also refer to the description here.
输入端口11用于接收输入信号,且用于将输入信号传输到相连的输入端馈线14。输入端馈线14至少用于通过能量耦合将输入信号传输至多模谐振器13。多模谐振器13用于通过谐振形成信号通带,以对输入端口11接收的输入信号进行滤波。输出端馈线15至少用于通过能量耦合从多模谐振器13获得经过滤波的输入信号,并传输至相连的输出端口12输出经过滤波后的输入信号。The input port 11 is used to receive an input signal and to transmit the input signal to a connected input feeder 14. The input feeder 14 is at least used to transmit the input signal to the multimode resonator 13 through energy coupling. The multimode resonator 13 is used to form a signal passband through resonance to filter the input signal received by the input port 11. The output feeder 15 is at least used to obtain a filtered input signal from the multimode resonator 13 through energy coupling, and transmit it to the connected output port 12 to output the filtered input signal.
其中,通过能量耦合的方式传输输入信号,也即输入端馈线14与多模谐振器13之间,以及输出端馈线15与多模谐振器13之间均不存在直接的物理连接关系,而是通过能量耦合传输的方式,实现在不存在直接物理连接的情况下传输输入信号。The input signal is transmitted by energy coupling, that is, there is no direct physical connection between the input feeder 14 and the multi-mode resonator 13, and between the output feeder 15 and the multi-mode resonator 13. Instead, the input signal is transmitted by energy coupling transmission without direct physical connection.
相对设置的第一输入端馈线141与第一输出端馈线151还用于直接将第一输入端馈线141传输的输入信号通过能量耦合直接传输至第一输出端馈线151。The first input-end feeder 141 and the first output-end feeder 151 that are arranged opposite to each other are also used to directly transmit the input signal transmitted by the first input-end feeder 141 to the first output-end feeder 151 through energy coupling.
具体的,第一输入端馈线141与第二输入端馈线142均可以用于将输入端口11接收的输入信号,通过能量耦合的方式传输至多模谐振器13。且第一输出端馈线151与第二输出端馈线152均可以用于从多模谐振器13获取经过多模谐振器13滤波的输入信号。从而,可以通过输入端馈线14与输出端馈线15实现对滤波器芯片10的外部品质因数的灵活调节。Specifically, the first input feeder 141 and the second input feeder 142 can be used to transmit the input signal received by the input port 11 to the multi-mode resonator 13 by energy coupling. And the first output feeder 151 and the second output feeder 152 can be used to obtain the input signal filtered by the multi-mode resonator 13 from the multi-mode resonator 13. Therefore, the external quality factor of the filter chip 10 can be flexibly adjusted through the input feeder 14 and the output feeder 15.
并且,参考图2示出的针对图1所示的滤波器芯片10的S参数和群时延仿真的结果示意图。其中,图2所示的横轴为频率,单位为GHz,左侧纵轴为S参数,单位为dB,右侧纵轴为群时延,单位为ns。如图2所示,通过设置相对的第一输入端馈线141与第一输出端馈线151,可以直接将第一输入端馈线141传输的输入信号通过能量耦合直接传输至第一输出端馈线151,可以在输入端口11与输出端口12同时激励多模谐振器13的多个谐振模式,形成的多条路径之外,额外产生一条由输入端口11经由第一输入端馈线141与第一输出端馈线151到输出端口的路径,从而,可以通过更多的传输路径之间存在的相位差而引入多个带外传输零点,进而,可以使滤波器芯片具备更好的高频选择性。In addition, refer to FIG2 for the schematic diagram of the results of the S parameter and group delay simulation of the filter chip 10 shown in FIG1. Wherein, the horizontal axis shown in FIG2 is the frequency, the unit is GHz, the left vertical axis is the S parameter, the unit is dB, and the right vertical axis is the group delay, the unit is ns. As shown in FIG2, by setting the first input end feeder 141 and the first output end feeder 151 relative to each other, the input signal transmitted by the first input end feeder 141 can be directly transmitted to the first output end feeder 151 through energy coupling, and multiple resonant modes of the multimode resonator 13 can be simultaneously excited at the input port 11 and the output port 12. In addition to the multiple paths formed, an additional path from the input port 11 to the output port via the first input end feeder 141 and the first output end feeder 151 is generated, so that multiple out-of-band transmission zeros can be introduced through the phase difference between more transmission paths, and then, the filter chip can have better high-frequency selectivity.
因此,这样设置可以在实现对滤波器芯片10的外部品质因数的进行灵活调节的同时,使滤波器芯片10具备更好的高频选择性。Therefore, such a configuration can achieve flexible adjustment of the external quality factor of the filter chip 10 while enabling the filter chip 10 to have better high-frequency selectivity.
在一些实施例中,图3示出的是图1所示的滤波器芯片10的俯视图。如图1与图3所示,多模谐振器13包括第一阶梯阻抗131、第二阶梯阻抗132与连接线135。In some embodiments, FIG3 shows a top view of the filter chip 10 shown in FIG1 . As shown in FIG1 and FIG3 , the multi-mode resonator 13 includes a first step impedance 131 , a second step impedance 132 and a connecting line 135 .
第一阶梯阻抗131包括第一阶梯第一子线1311与第一阶梯第二子线1312,第一阶梯第一子线1311与第一阶梯第二子线1312沿同一方向延伸。第二阶梯阻抗132包括第二阶梯第一子线1321与第二阶梯第二子线1322,第二阶梯第一子线1321与第二阶梯第二子线1322沿同一方向延伸。其中,第一阶梯第一子线1311与第二阶梯第一子线1321相对设置,第一阶梯第二子线1312与第二阶梯第二子线1322相对设置。第一阶梯第一子线1311与第一阶梯第二子线1312相连,第二阶梯第一子线1321与第二阶梯第二子线1322相连。The first step impedance 131 includes a first step first sub-line 1311 and a first step second sub-line 1312, and the first step first sub-line 1311 and the first step second sub-line 1312 extend in the same direction. The second step impedance 132 includes a second step first sub-line 1321 and a second step second sub-line 1322, and the second step first sub-line 1321 and the second step second sub-line 1322 extend in the same direction. The first step first sub-line 1311 and the second step first sub-line 1321 are arranged opposite to each other, and the first step second sub-line 1312 and the second step second sub-line 1322 are arranged opposite to each other. The first step first sub-line 1311 is connected to the first step second sub-line 1312, and the second step first sub-line 1321 is connected to the second step second sub-line 1322.
在各自的延伸方向上,第一阶梯第一子线1311或第二阶梯第一子线1321的宽度,大于第一阶梯第二子线1312或第二阶梯第二子线1322的宽度。In the respective extending directions, the width of the first-step first sub-line 1311 or the second-step first sub-line 1321 is greater than the width of the first-step second sub-line 1312 or the second-step second sub-line 1322 .
参考图4示出的图3中多模谐振器13的局部放大图,在各自的延伸方向上,第一阶梯第一子线1311或第二阶梯第一子线1321的宽度,大于第一阶梯第二子线1312或第二阶梯第二子线1322的宽度,也即图3中示出的第一阶梯第一子线1311或第二阶梯第一子线1321的宽度L1,大于第二阶梯第二子线1312或第二阶梯第二子线1322的宽度L2。而宽度L1大于宽度L2,也即第一阶梯第一子线1311或第二阶梯第一子线1321的阻抗小于第一阶梯第二子线1312或第二阶梯第二子线1322。具体的,阻抗的形式可以参照图5示出的图4所示电路结构的传输线等效电路的示意图。Referring to the partial enlarged view of the multimode resonator 13 in FIG. 3 shown in FIG. 4, in the respective extension directions, the width of the first step first sub-line 1311 or the second step first sub-line 1321 is greater than the width of the first step second sub-line 1312 or the second step second sub-line 1322, that is, the width L1 of the first step first sub-line 1311 or the second step first sub-line 1321 shown in FIG. 3 is greater than the width L2 of the second step second sub-line 1312 or the second step second sub-line 1322. And the width L1 is greater than the width L2, that is, the impedance of the first step first sub-line 1311 or the second step first sub-line 1321 is less than the first step second sub-line 1312 or the second step second sub-line 1322. Specifically, the form of the impedance can refer to the schematic diagram of the transmission line equivalent circuit of the circuit structure shown in FIG. 4 shown in FIG. 5.
连接线135连接第一阶梯第二子线1312与第二阶梯第二子线1322。The connection line 135 connects the first-step second sub-line 1312 and the second-step second sub-line 1322 .
这样设置,通过设置第一阶梯阻抗131与第二阶梯阻抗132,以及连接线135连接第一阶梯第二子线1312与第二阶梯第二子线1322,组成所提出的多模谐振器,从而,可以通过单个多模谐振器13避免多阶级联带来的尺寸和损耗的增加,同时也具有较好的带内平坦度和频率选择性。In this way, by setting the first step impedance 131 and the second step impedance 132, and the connecting line 135 connecting the first step second sub-line 1312 and the second step second sub-line 1322, the proposed multi-mode resonator is formed. Therefore, the increase in size and loss caused by multi-stage cascading can be avoided through a single multi-mode resonator 13, and it also has better in-band flatness and frequency selectivity.
在一些实施例中,如图1、图3与图4所示,并参照图2示出的仿真示意图以及图5示出的传输线等效电路示意图,多模谐振器13还包括第三阶梯阻抗133、第四阶梯阻抗134与加载结构136。In some embodiments, as shown in Figures 1, 3 and 4, and with reference to the simulation schematic diagram shown in Figure 2 and the transmission line equivalent circuit schematic diagram shown in Figure 5, the multi-mode resonator 13 also includes a third step impedance 133, a fourth step impedance 134 and a loading structure 136.
第三阶梯阻抗133包括第三阶梯第一子线1331与第三阶梯第二子线1332,第三阶梯第一子线1331与第三阶梯第二子线1332沿不同方向延伸。第四阶梯阻抗134包括第四阶梯第一子线1341与第四阶梯第二子线1342,第四阶梯第一子线1341与第四阶梯第二子线1342沿不同方向延伸。第三阶梯第一子线1331与第四阶梯第一子线1321相对设置,且通过连接线135相连。第三阶梯第二子线1332与第四阶梯第二子线1342相对设置。第三阶梯第一子线1331与第三阶梯第二子线1332呈角度相连,第四阶梯第一子线1341与第四阶梯第二子线1342呈角度相连。The third step impedance 133 includes a third step first sub-line 1331 and a third step second sub-line 1332, and the third step first sub-line 1331 and the third step second sub-line 1332 extend in different directions. The fourth step impedance 134 includes a fourth step first sub-line 1341 and a fourth step second sub-line 1342, and the fourth step first sub-line 1341 and the fourth step second sub-line 1342 extend in different directions. The third step first sub-line 1331 and the fourth step first sub-line 1321 are arranged opposite to each other and are connected by a connecting line 135. The third step second sub-line 1332 and the fourth step second sub-line 1342 are arranged opposite to each other. The third step first sub-line 1331 and the third step second sub-line 1332 are connected at an angle, and the fourth step first sub-line 1341 and the fourth step second sub-line 1342 are connected at an angle.
在各自的延伸方向上,第三阶梯第二子线1332或第四阶梯第二子线1342的宽度,大于第三阶梯第一子线1331或第四阶梯第一子线1341的宽度。也即第三阶梯第二子线1332或第四阶梯第二子线1342的阻抗小于第三阶梯第一子线1331或第四阶梯第一子线1341。具体的,阻抗的形式可以参照图5示出的图4所示多模谐振器13的传输线等效电路的示意图。In the respective extension directions, the width of the third-step second sub-line 1332 or the fourth-step second sub-line 1342 is greater than the width of the third-step first sub-line 1331 or the fourth-step first sub-line 1341. That is, the impedance of the third-step second sub-line 1332 or the fourth-step second sub-line 1342 is less than the third-step first sub-line 1331 or the fourth-step first sub-line 1341. Specifically, the form of the impedance can refer to the schematic diagram of the transmission line equivalent circuit of the multi-mode resonator 13 shown in FIG. 4 shown in FIG. 5 .
加载结构136包括第一加载子线1361、第二加载子线1362与第三加载子线1363。第一加载子线1361与第二加载子线1362连接至第三加载子线1363的同一端,第三加载子线1363的另一端与连接线135相连。在各自的延伸方向上,第一加载子线1361、第二加载子线1362与第三加载子线1363的宽度相同。The loading structure 136 includes a first loading sub-line 1361, a second loading sub-line 1362, and a third loading sub-line 1363. The first loading sub-line 1361 and the second loading sub-line 1362 are connected to the same end of the third loading sub-line 1363, and the other end of the third loading sub-line 1363 is connected to the connection line 135. In their respective extension directions, the first loading sub-line 1361, the second loading sub-line 1362, and the third loading sub-line 1363 have the same width.
其中,第一加载子线1361与第二加载子线1362一同连接至第三加载子线1363的同一端。因此,可以通过第一加载子线1361、第二加载子线1362与第三加载子线1363构成一个类似“T”形的结构。需要说明的是,此处的“T”形结构并不严格要求结构与“T”形相同,只需结构与“T”形相似即可。The first loading sub-line 1361 and the second loading sub-line 1362 are connected to the same end of the third loading sub-line 1363. Therefore, a structure similar to a "T" shape can be formed by the first loading sub-line 1361, the second loading sub-line 1362 and the third loading sub-line 1363. It should be noted that the "T"-shaped structure here does not strictly require the structure to be the same as the "T" shape, but only needs to be similar to the "T" shape.
第一加载子线1361与第三阶梯第二子线1332沿同一方向延伸且相对设置,第二加载子线1362与第四阶梯第二子线1342沿同一方向延伸且相对设置。The first loading sub-line 1361 and the third-step second sub-line 1332 extend in the same direction and are disposed opposite to each other. The second loading sub-line 1362 and the fourth-step second sub-line 1342 extend in the same direction and are disposed opposite to each other.
这样设置,可以通过加载结构136,与第三阶梯第二子线1332以及第四阶梯第二子线1342发生耦合,从而,可以为滤波器芯片10引入更多的传输零点。并且,参考图2示出的仿真示意图,多模谐振器13的传输零点位置靠近通带两侧,进而,可以有效抑制带外干扰,进一步使滤波器芯片10具备更好的高频选择性。In this way, coupling can be generated with the third-step second sub-line 1332 and the fourth-step second sub-line 1342 through the loading structure 136, thereby introducing more transmission zeros for the filter chip 10. In addition, referring to the simulation schematic diagram shown in FIG2 , the transmission zero position of the multi-mode resonator 13 is close to both sides of the passband, thereby effectively suppressing out-of-band interference, and further enabling the filter chip 10 to have better high-frequency selectivity.
其中,通过对多模谐振器进行奇偶模分析可以推导其谐振特性。图6中示出的是图5所示传输线等效电路在偶模激励下的示意图。如图6所示,多模谐振器13偶模等效电路的输入导纳为Yin-even,通过添加虚拟端口计算该传输线等效电路的ABCD矩阵并进行参数转换,可得到相应表达式,偶模谐振条件即Im(Yin-even)=0,对应其传输极点。当等效电路的输入阻抗为0时可得到其传输零点。相比于均匀阻抗,该多模谐振器13的结构具有更多的阻抗和电长度参数,可通过第一阶梯阻抗131的第一子线1311与第一阶梯阻抗131的第二子线1312、第二阶梯阻抗132的第一子线1321与第二阶梯阻抗132的第二子线1322的电长度之比α1=θ1a/(θ1a+θ1b)和阻抗之比K1=Z1a/Z1b,第三阶梯阻抗133的第二子线1332与第三阶梯阻抗133的第一子线1331、第四阶梯阻抗134的第二子线1344与第四阶梯阻抗134的第一子线1341的电长度之比α2 =θ2a/(θ2a+θ2b)和阻抗之比K2 =Z2a/Z2b,调控谐振频点。从而,可以提高多模谐振器13的设计和调谐自由度。同理,可以计算奇模激励下的等效输入导纳Yin-odd并分析其谐振特性。图7示出的即是图5所示传输线等效电路在奇模激励下的示意图。Among them, the resonance characteristics of the multimode resonator can be derived by performing odd and even mode analysis on the multimode resonator. FIG6 shows a schematic diagram of the transmission line equivalent circuit shown in FIG5 under even mode excitation. As shown in FIG6, the input admittance of the even mode equivalent circuit of the multimode resonator 13 is Yin-even. By adding a virtual port to calculate the ABCD matrix of the transmission line equivalent circuit and performing parameter conversion, the corresponding expression can be obtained. The even mode resonance condition is Im(Yin-even)=0, which corresponds to its transmission pole. When the input impedance of the equivalent circuit is 0, its transmission zero point can be obtained. Compared with uniform impedance, the structure of the multi-mode resonator 13 has more impedance and electrical length parameters, and the resonance frequency can be adjusted by the electrical length ratio α1=θ1a/(θ1a+θ1b) of the first sub-line 1311 of the first step impedance 131 and the second sub-line 1312 of the first step impedance 131, the first sub-line 1321 of the second step impedance 132 and the second sub-line 1322 of the second step impedance 132, the electrical length ratio α2=θ2a/(θ2a+θ2b) of the second sub-line 1332 of the third step impedance 133 and the first sub-line 1331 of the third step impedance 133, and the second sub-line 1344 of the fourth step impedance 134 and the first sub-line 1341 of the fourth step impedance 134. Thus, the design and tuning freedom of the multi-mode resonator 13 can be improved. Similarly, the equivalent input admittance Yin-odd under odd-mode excitation can be calculated and its resonance characteristics can be analyzed. FIG7 shows a schematic diagram of the transmission line equivalent circuit shown in FIG5 under odd-mode excitation.
并且,参考图5至图7的示意图可发现,在偶模激励下的多模谐振器13具有两个模式fe1、fe2,奇模激励下多模谐振器13也具有两个模式fo1、fo2。因此,通过采用前述设置多模谐振器13选择合适馈电结构,可以同时激励出四个模式,以构成所需通带。5 to 7, it can be found that the multimode resonator 13 has two modes fe1 and fe2 under even-mode excitation, and also has two modes fo1 and fo2 under odd-mode excitation. Therefore, by adopting the aforementioned configuration of the multimode resonator 13 and selecting a suitable feeding structure, four modes can be excited simultaneously to form a desired passband.
在一些实施例中,如图1、图3与图4所示,并参照图2示出的仿真示意图以及图5示出的传输线等效电路示意图,第一阶梯第一子线1311与第一阶梯第二子线1312及第三阶梯第一子线1331沿同一方向延伸,第二阶梯第一子线1321与第二阶梯第二子线1322、第四阶梯第一子线1341沿同一方向延伸。连接线135与第一阶梯131及第二阶梯132的延伸方向相垂直。第三阶梯第二子线1332与第三阶梯第一子线1331相垂直,第四阶梯第二子线1342与第四阶梯第一子线1341相垂直。第一加载子线1361与第二加载子线1362沿同一方向延伸。第三加载子线1363与第一加载子线1361以及第二加载子线1362相垂直,且与连接线135相垂直。In some embodiments, as shown in FIG. 1 , FIG. 3 and FIG. 4 , and with reference to the simulation schematic diagram shown in FIG. 2 and the transmission line equivalent circuit schematic diagram shown in FIG. 5 , the first step first sub-line 1311 extends in the same direction as the first step second sub-line 1312 and the third step first sub-line 1331 , and the second step first sub-line 1321 extends in the same direction as the second step second sub-line 1322 and the fourth step first sub-line 1341 . The connecting line 135 is perpendicular to the extending direction of the first step 131 and the second step 132 . The third step second sub-line 1332 is perpendicular to the third step first sub-line 1331 , and the fourth step second sub-line 1342 is perpendicular to the fourth step first sub-line 1341 . The first loading sub-line 1361 extends in the same direction as the second loading sub-line 1362 . The third loading sub-line 1363 is perpendicular to the first loading sub-line 1361 and the second loading sub-line 1362 , and is perpendicular to the connecting line 135 .
通过第三阶梯第二子线1332与第三阶梯第一子线1331相垂直,第四阶梯第二子线1342与第四阶梯第一子线1341相垂直,可以使加载结构136有效利于位于第三阶梯第二子线1332与第四阶梯第二子线1342之间的空间,使第一加载子线1361与第三阶梯第二子线1332沿同一方向延伸,第二加载子线1362与第四阶梯第二子线1342沿同一方向延伸,第三加载子线1363与第三阶梯第一子线1331或第四阶梯第一子线1341沿同一方向延伸。从而,可以有效减少第三阶梯第二子线1332与第四阶梯第二子线1342以及加载结构136占用的空间,同时使加载结构136与第三阶梯第二子线1332以及第四阶梯第二子线1342发生耦合,进而,可以较少的空间占用在实现对滤波器芯片10的谐振模式的调节的同时,进一步使滤波器芯片10具备更好的高频选择性。By making the third-step second sub-line 1332 perpendicular to the third-step first sub-line 1331 and the fourth-step second sub-line 1342 perpendicular to the fourth-step first sub-line 1341, the loading structure 136 can effectively benefit the space between the third-step second sub-line 1332 and the fourth-step second sub-line 1342, so that the first loading sub-line 1361 and the third-step second sub-line 1332 extend in the same direction, the second loading sub-line 1362 and the fourth-step second sub-line 1342 extend in the same direction, and the third loading sub-line 1363 and the third-step first sub-line 1331 or the fourth-step first sub-line 1341 extend in the same direction. Thus, the space occupied by the third-step second sub-line 1332, the fourth-step second sub-line 1342 and the loading structure 136 can be effectively reduced, and the loading structure 136 can be coupled with the third-step second sub-line 1332 and the fourth-step second sub-line 1342. As a result, the filter chip 10 can be further endowed with better high-frequency selectivity while achieving the adjustment of the resonant mode of the filter chip 10 with less space occupied.
在一些实施例中,多模谐振器13所包括的各部分一体形成。多模谐振器13利用单个谐振器产生多个可控谐振模式,这样一个谐振器可以代替多个谐振器使用,减少了滤波器中的谐振器个数,减小了尺寸和插入损耗,有利于集成,降低成本。In some embodiments, the various parts included in the multi-mode resonator 13 are formed in one piece. The multi-mode resonator 13 uses a single resonator to generate multiple controllable resonance modes, so that one resonator can replace multiple resonators, reducing the number of resonators in the filter, reducing the size and insertion loss, facilitating integration, and reducing costs.
在一些实施例中,图8示出的是滤波器芯片10所采用IPD工艺简化的截面图。包括衬底层20、第一介质层21、气体层22、第一滤波器结构层23、第二滤波层24、接地层25、导体过孔17与第二介质层26。In some embodiments, FIG8 shows a simplified cross-sectional view of the IPD process used in the filter chip 10 , including a substrate layer 20 , a first dielectric layer 21 , a gas layer 22 , a first filter structure layer 23 , a second filter layer 24 , a ground layer 25 , a conductor via 17 and a second dielectric layer 26 .
衬底20位于接地层25上。第一介质层21位于衬底20背向接地层25的一侧。第一滤波器结构层23位于介质层21内。气体层22位于第一介质层21背向衬底20的一侧。第二介质层26位于气体层22背向第一介质层21的一侧,第二滤波器结构层24位于第二介质层26内。第一滤波器结构层23和第二滤波器结构层24均包括相同的滤波器结构。第一滤波器结构层23和第二滤波器结构层24经由导体过孔17互相连接。The substrate 20 is located on the grounding layer 25. The first dielectric layer 21 is located on the side of the substrate 20 facing away from the grounding layer 25. The first filter structure layer 23 is located in the dielectric layer 21. The gas layer 22 is located on the side of the first dielectric layer 21 facing away from the substrate 20. The second dielectric layer 26 is located on the side of the gas layer 22 facing away from the first dielectric layer 21, and the second filter structure layer 24 is located in the second dielectric layer 26. The first filter structure layer 23 and the second filter structure layer 24 both include the same filter structure. The first filter structure layer 23 and the second filter structure layer 24 are connected to each other via the conductor via 17.
其中,每一滤波器结构层均包括相同的滤波器结构,也即第一滤波器结构层23和第二滤波器结构层24均包括:输入端口11、输出端口12、多模谐振器13、输入端馈线14与输出端馈线15。每一滤波器结构层内的滤波结构的具体设置方式可以参照图1、图3与图4所示的结构及对应的描述,在此不再赘述。并且,每一滤波器结构层的材料可以包括金属材料。Each filter structure layer includes the same filter structure, that is, the first filter structure layer 23 and the second filter structure layer 24 both include: an input port 11, an output port 12, a multimode resonator 13, an input feeder 14 and an output feeder 15. The specific arrangement of the filter structure in each filter structure layer can refer to the structures and corresponding descriptions shown in Figures 1, 3 and 4, which will not be repeated here. In addition, the material of each filter structure layer may include a metal material.
第二滤波器结构层24与第一滤波器结构层23所包括的相同滤波器结构对应设置,且第二滤波器结构层24在第一滤波器结构层23上的正投影位于第一滤波器结构层23内。The second filter structure layer 24 is arranged corresponding to the same filter structure included in the first filter structure layer 23 , and the orthographic projection of the second filter structure layer 24 on the first filter structure layer 23 is located inside the first filter structure layer 23 .
其中,第二滤波器结构层24与第一滤波器结构层23所包括的相同滤波器结构对应设置,也即第二滤波器结构层24的一个滤波器结构在第一滤波器结构层23上的正投影位于第一滤波器结构层23内相同的滤波器结构内,或者至少大部重合。The second filter structure layer 24 is arranged corresponding to the same filter structure included in the first filter structure layer 23, that is, the orthographic projection of a filter structure of the second filter structure layer 24 on the first filter structure layer 23 is located in the same filter structure in the first filter structure layer 23, or at least mostly overlaps.
这样设置,可以使滤波器芯片10内的滤波器结构符合IPD工艺的要求,从而,可以通过IPD工艺实现滤波器芯片10的高集成度。Such an arrangement can make the filter structure in the filter chip 10 meet the requirements of the IPD process, so that the high integration of the filter chip 10 can be achieved through the IPD process.
在一些实施例中,图8示出的是该滤波器芯片10所采用IPD工艺简化的截面图。如图8所示,衬底20的材料包括碳化硅,第一介质层21与第二介质层26的材料包括氮化硅。In some embodiments, Fig. 8 shows a simplified cross-sectional view of the IPD process used in the filter chip 10. As shown in Fig. 8, the material of the substrate 20 includes silicon carbide, and the materials of the first dielectric layer 21 and the second dielectric layer 26 include silicon nitride.
这样设置,可以通过采用碳化硅材料的衬底20和氮化硅材料的介质21有效降低滤波器芯片的插入损耗。参考图2所示的仿真示意图,在衬底20采用碳化硅材料,介质21采用氮化硅材料后,带通滤波器最小插入损耗为1.15dB,且通带平坦,插损最大值与最小值仅相差0.3dB。且碳化硅材料的衬底20具有优异的耐热性和导热性。This arrangement can effectively reduce the insertion loss of the filter chip by using a substrate 20 made of silicon carbide material and a medium 21 made of silicon nitride material. Referring to the simulation schematic diagram shown in FIG2 , after the substrate 20 is made of silicon carbide material and the medium 21 is made of silicon nitride material, the minimum insertion loss of the bandpass filter is 1.15 dB, and the passband is flat, and the maximum and minimum insertion loss differ by only 0.3 dB. The substrate 20 made of silicon carbide material has excellent heat resistance and thermal conductivity.
在一些实施例中,采用多模谐振器13的滤波器结构通过IPD工艺形成在衬底20上。In some embodiments, a filter structure using the multi-mode resonator 13 is formed on the substrate 20 by an IPD process.
这样设置,可以有效提升滤波器芯片10的小型化和集成度。Such an arrangement can effectively improve the miniaturization and integration of the filter chip 10 .
在一些实施例中,如图1、图3、图4与图8所示,组成滤波器的第一滤波器结构层23和第二滤波器结构层24通过导体过孔172连接。In some embodiments, as shown in FIG. 1 , FIG. 3 , FIG. 4 and FIG. 8 , the first filter structure layer 23 and the second filter structure layer 24 constituting the filter are connected through a conductor via 172 .
这样设置,可以增加等效金属导体厚度,从而有利于减小滤波器的插入损耗。This arrangement can increase the thickness of the equivalent metal conductor, thereby facilitating the reduction of the insertion loss of the filter.
在一些实施例中,如图1、图3、图4与图8所示,第一滤波器结构层23与第二滤波器结构层24都包括接地端口16。导体过孔17在接地端口16上的正投影位于接地端口16内。In some embodiments, as shown in FIG1 , FIG3 , FIG4 and FIG8 , the first filter structure layer 23 and the second filter structure layer 24 both include a ground port 16 . The orthographic projection of the conductor via 17 on the ground port 16 is located inside the ground port 16 .
导体过孔17包括第一段过孔171与第二段过孔172。第一滤波器结构层23和第二滤波器结构层24通过第二段过孔172连接,接地端口16再通过第一段过孔171连接到接地层25,以实现接地。The conductor via 17 includes a first section via 171 and a second section via 172. The first filter structure layer 23 and the second filter structure layer 24 are connected through the second section via 172, and the ground port 16 is connected to the ground layer 25 through the first section via 171 to achieve grounding.
其中,接地层25的材料可以包括金属,实现滤波器芯片10的接地。The material of the grounding layer 25 may include metal to achieve grounding of the filter chip 10 .
这样设置,滤波器结构可以通过贯穿衬底20、第一介质层21与第二介质层26的导体过孔17轻松实现连接接地层25,滤波器芯片10中的接地端口16通过导体过孔17接地。With this arrangement, the filter structure can be easily connected to the ground layer 25 through the conductor via 17 penetrating the substrate 20 , the first dielectric layer 21 and the second dielectric layer 26 , and the ground port 16 in the filter chip 10 is grounded through the conductor via 17 .
在一些实施例中,参考图2所示,采用上述多种设置的滤波器芯片10,在E波段71-86GHz的工作频段内,该带通滤波器回波损耗优于20dB,最小插入损耗为1.15dB,且通带平坦,插损最大值与最小值仅相差0.3dB,同时群时延较为平坦,群时延在38.5ps到46.3ps之间,此外通带上下边带分布有四个传输零点,该采用带通滤波器远离的滤波器芯片10具有较好的频率选择性。In some embodiments, as shown in reference Figure 2, a filter chip 10 with the above-mentioned multiple settings is used. In the E-band operating frequency band of 71-86 GHz, the return loss of the bandpass filter is better than 20 dB, the minimum insertion loss is 1.15 dB, and the passband is flat. The maximum and minimum insertion losses differ by only 0.3 dB. At the same time, the group delay is relatively flat, and the group delay is between 38.5 ps and 46.3 ps. In addition, there are four transmission zeros distributed in the upper and lower sidebands of the passband. The filter chip 10 using the bandpass filter has good frequency selectivity.
本申请还提供一种电子设备,包括上述任一种滤波器芯片10。The present application also provides an electronic device, comprising any one of the filter chips 10 described above.
本申请的上述实施例,在不产生冲突的情况下,可互为补充。The above embodiments of the present application may complement each other if no conflict occurs.
需要指出的是,在附图中,为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解,当元件或层被称为在另一元件或层“上”时,它可以直接在其他元件上,或者可以存在中间的层。另外,可以理解,当元件或层被称为在另一元件或层“下”时,它可以直接在其他元件下,或者可以存在一个以上的中间的层或元件。另外,还可以理解,当层或元件被称为在两层或两个元件“之间”时,它可以为两层或两个元件之间唯一的层,或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It is also understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it is understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it may be the only layer between the two layers or two elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.
术语“多个”指两个或两个以上,除非另有明确的限定。The term "plurality" means two or more than two, unless expressly limited otherwise.
本领域技术人员在考虑说明书及实践这里公开的公开后,将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化,这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的,本申请的真正范围和精神由下面的权利要求指出。Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the disclosure disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.
应当理解的是,本申请并不局限于上面已经描述并在附图中示出的精确结构,并且可以在不脱离其范围进行各种修改和改变。本申请的范围仅由所附的权利要求来限制。It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.
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