CN118155701A

CN118155701A - Testing device for testing electric performance of DDR particles

Info

Publication number: CN118155701A
Application number: CN202211555407.1A
Authority: CN
Inventors: 羊杨
Original assignee: Embedway Technologies Shanghai Corp
Current assignee: Embedway Technologies Shanghai Corp
Priority date: 2022-12-06
Filing date: 2022-12-06
Publication date: 2024-06-07

Abstract

The invention provides a testing device for testing the electrical performance of DDR particles, which is characterized in that an adapter plate is arranged between a DDR particle chip to be tested and a PCB, and a first target signal welding pin to be tested in the DDR particle chip to be tested can be externally led out by combining a test signal wire on the adapter plate, so that the electrical performance of the DDR particles is tested, that is, the design of the testing device can lead out the signal to be tested through the test signal wire, thus the normal use of the DDR particle chip to be tested is not influenced, the testability and the convenience of the test are ensured, and the tested signal of the DDR particle chip to be tested is not influenced by the testing device.

Description

Testing device for testing electric performance of DDR particles

Technical Field

The invention relates to the technical field of electrical performance testing, in particular to a testing device for testing the electrical performance of DDR particles.

Background

DDR particle chip is the most commonly used dynamic random access memory at present, and is widely applied to various industries, such as personal computers, servers, communication equipment, embedded equipment and the like; the chinese language of DDR is known as double data rate, in other words, a dynamic random access memory with double rate and synchronous characteristics.

At present, memory chips are divided into a first generation, a second generation, a third generation, a fourth generation and a fifth generation, along with the increasing of algebra, the interface rate of DDR particles is also continuously increased, the transmission rate of a single data line reaching the DDR5 generation is already up to 6.4Gbps, and the problem of signal integrity such as loss, crosstalk, time sequence and the like is highlighted at the rate, so that test and verification on signals of the DDR particles are required to ensure that designed equipment can stably operate.

Referring to fig. 1, fig. 1 is a schematic diagram of a packaging mode of a DDR particle chip in the prior art, referring to fig. 2, fig. 2 is a schematic diagram of another packaging mode of a DDR particle chip in the prior art, the packaging type of the DDR particle chip shown in fig. 1 is BGA, solder pins are located under the chip, a test probe cannot extend under the DDR particle chip for testing during testing between the chip and a PCB board, hole scraping is required for the PCB board if there are many test points, and test reliability is poor if there are many test points; the scratch hole test is also not possible if the DDR particle chips are soldered back-to-back as shown in fig. 2.

Therefore, it is necessary to design a testing device for testing the electrical performance of the DDR particles, so that the testability and convenience of the test can be ensured, and the DDR tested signal is not affected by the testing device as much as possible.

Disclosure of Invention

In view of the above, in order to solve the above problems, the present invention provides a testing device for testing electrical performance of DDR particles, which has the following technical scheme:

A test device for testing electrical performance of DDR particles, the test device comprising: DDR particle chip, adapter plate and PCB board to be measured;

the DDR particle chip to be tested is provided with a first welding pin, and the first welding pin is welded on the adapter plate;

The adapter plate is provided with a second welding pin at one side which is away from the DDR particle chip to be tested, and the second welding pin is welded on the PCB;

The first welding pins are correspondingly and electrically connected with the second welding pins, a test signal wire is arranged on one side of the adapter plate, provided with the DDR particle chip to be tested, a first end of the test signal wire is electrically connected with a first target signal welding pin in the first welding pins, and a second end of the test signal wire extends to an edge area of the adapter plate.

Optionally, in the above test device, the test device further includes: and the first welding pin and the second welding pin are correspondingly and electrically connected through the through hole penetrating through the through hole of the adapter plate.

Optionally, in the above testing device, the area of the orthographic projection area of the adapter plate on the plane where the PCB is located is larger than the area of the orthographic projection area of the DDR particle chip to be tested on the plane where the PCB is located.

Optionally, in the above test device, a minimum distance between a boundary of the interposer and a boundary of the DDR particle chip to be tested is W/2, where W is a width of the DDR particle chip to be tested.

Optionally, in the above test device, in a first direction, the interposer has a first portion and a second portion that are arranged in a step, and the first portion is located between the second portion and the PCB;

the first direction is perpendicular to the plane where the PCB is located, and the PCB points to the DDR particle chip to be tested.

Optionally, in the above test device, the first portion is located in a middle area of the second portion.

Optionally, in the above test device, the thickness of the first portion is H1, and the height of the DDR particle chip to be tested is H2;

Wherein H1 is more than or equal to 1.5 x H2.

Optionally, in the above test device, the second welding pin includes a second target signal welding pin correspondingly electrically connected to the first target signal welding pin;

The test signal line comprises a first test signal line and a second test signal line, the first test signal line is positioned on the surface of the second part, which is away from the first part, and the second test signal line is positioned in the second part;

The first end of the first test signal wire is electrically connected with the first target signal welding pin, and the second end of the first test signal wire extends to the edge area of the adapter plate;

The first end of the second test signal wire is electrically connected with the second target signal welding pin through a first connecting hole, and the second end of the second test signal wire is electrically connected with the second end of the first test signal wire through a second connecting hole.

Compared with the prior art, the invention has the following beneficial effects:

The invention provides a testing device for testing the electrical performance of DDR particles, which comprises: DDR particle chip, adapter plate and PCB board to be measured; the DDR particle chip to be tested is provided with a first welding pin, and the first welding pin is welded on the adapter plate; the adapter plate is provided with a second welding pin at one side which is away from the DDR particle chip to be tested, and the second welding pin is welded on the PCB; the first welding pins are correspondingly and electrically connected with the second welding pins, a test signal wire is arranged on one side of the adapter plate, provided with the DDR particle chip to be tested, a first end of the test signal wire is electrically connected with a first target signal welding pin in the first welding pins, and a second end of the test signal wire extends to an edge area of the adapter plate. According to the testing device, the adapter plate is arranged between the DDR particle chip to be tested and the PCB, the first target signal welding pin to be tested in the DDR particle chip to be tested can be externally led out by combining the test signal wire on the adapter plate, so that the test of the electrical performance of the DDR particle is realized, that is, the design of the testing device can lead out the signal to be tested through the test signal wire, the normal use of the DDR particle chip to be tested is not influenced, the testability and convenience of the test are guaranteed, and the tested signal of the DDR particle chip to be tested is not influenced by the testing device.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a packaging scheme of a DDR particle chip in the prior art;

FIG. 2 is a schematic diagram of another packaging scheme of a DDR particle chip of the prior art;

FIG. 3 is a schematic cross-sectional structure of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention;

FIG. 4 is a schematic cross-sectional view of another embodiment of a testing device for testing electrical performance of DDR particles;

FIG. 5 is a schematic top view of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention;

FIG. 6 is a schematic cross-sectional view of another embodiment of a testing device for testing electrical properties of DDR particles;

FIG. 7 is a schematic cross-sectional view of another embodiment of a testing device for testing electrical performance of DDR particles;

FIG. 8 is a schematic cross-sectional view of another embodiment of a testing apparatus for testing electrical performance of DDR particles.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.

Referring to fig. 3, fig. 3 is a schematic cross-sectional structure of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention.

The testing device for testing the electrical performance of DDR particles comprises: DDR particle chip, keysets and PCB board await measuring.

The DDR particle chip to be tested is provided with a first welding pin, and the first welding pin is welded on the adapter plate.

And one side of the adapter plate, which is away from the DDR particle chip to be tested, is provided with a second welding pin, and the second welding pin is welded on the PCB.

Specifically, in the embodiment of the invention, an adapter plate is arranged between the DDR particle chip to be tested and the PCB, and the first target signal welding pin to be tested in the DDR particle chip to be tested can be externally led out by combining the test signal wire on the adapter plate, so that the electric performance of the DDR particle is tested, that is, the design of the testing device can lead out the signal to be tested through the test signal wire, thus the normal use of the DDR particle chip to be tested is not influenced, the testability and convenience of the test are ensured, and the tested signal of the DDR particle chip to be tested is not influenced by the testing device.

Optionally, in another embodiment of the present invention, referring to fig. 4, fig. 4 is a schematic cross-sectional structure of another testing apparatus for testing electrical performance of DDR particles according to an embodiment of the present invention.

The test device further includes: and the first welding pin and the second welding pin are correspondingly and electrically connected through the through hole penetrating through the through hole of the adapter plate.

Specifically, in the embodiment of the invention, the electric connection between the first welding pin and the second welding pin can be realized only by punching the adapter plate, and the connection mode is simple without additional wiring design.

Optionally, in another embodiment of the present invention, referring to fig. 5, fig. 5 is a schematic top view of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention.

The area of the orthographic projection area of the adapter plate on the plane of the PCB is larger than the area of the orthographic projection area of the DDR particle chip to be tested on the plane of the PCB.

Optionally, the minimum distance between the boundary of the adapter plate and the boundary of the DDR particle chip to be tested is W/2, where W is the width of the DDR particle chip to be tested.

Specifically, in the embodiment of the invention, the fact that the surface of the adapter plate, which is away from one side of the PCB, needs to be led out of the test signal wire is considered, so that the size of the adapter plate is defined according to the wiring length condition of the test signal wire, which is required to be led out, based on the size of the DDR particle chip to be tested and the position of the DDR particle chip on the adapter plate in the embodiment of the invention.

In the embodiment of the invention, the shape of the adapter plate and the shape of the DDR particle chip to be tested are both illustrated by taking a rectangle as an example, and based on the rectangle, the minimum distance between the boundary of the adapter plate and the boundary of the DDR particle chip to be tested is W/2, namely, the length and the width of the adapter plate are widened by 1/2 of the width W of the DDR particle chip to be tested, so that the external lead requirement of the test signal wire is met.

Optionally, in another embodiment of the present invention, referring to fig. 6, fig. 6 is a schematic cross-sectional structure of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention.

In a first direction, the adapter plate is provided with a first part and a second part which are arranged in a step mode, and the first part is located between the second part and the PCB.

Specifically, in the embodiment of the invention, the length and the width of the adapter plate are widened, that is, the size of the adapter plate is larger than that of the DDR particle chip to be tested, and because other DDR particle chips are also fixed on the PCB, the adjacent DDR particle chips and other components such as capacitors or resistors can be possibly encountered when the adapter plate is welded on the PCB to form structural interference.

Based on this, in the embodiment of the present invention, the shape of the interposer is improved to make the interposer have a first portion and a second portion that are arranged in a step in a first direction, where the first portion is located between the second portion and the PCB, and the length and width dimensions of the first portion may be matched with the length and width dimensions of the DDR particle chip to be tested, and the length and width dimensions of the second portion may be the length and width dimensions of the interposer after the length and width of the interposer are widened in the above embodiment, and the thickness of the first portion is made to be H1, and the height of the DDR particle chip to be tested is H2, so that H1 is greater than or equal to 1.5×h2, so as to ensure that structural interference is not formed between the interposer and other components such as adjacent DDR particle chips and capacitors or resistors when the interposer is welded onto the PCB.

Optionally, in another embodiment of the present invention, the first portion is located in a middle region of the second portion.

Specifically, in the embodiment of the invention, the first part is positioned in the middle area of the second part, so that the stability of the adapter plate can be ensured, and the problems of inclination and the like of the adapter plate are prevented.

Optionally, in another embodiment of the present invention, referring to fig. 7, fig. 7 is a schematic cross-sectional structure of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention; referring to fig. 8, fig. 8 is a schematic cross-sectional structure of a testing device for testing electrical performance of DDR particles according to an embodiment of the present invention.

As shown in fig. 7, the first soldering pins and the second soldering pins are connected in such a manner that electrical connection is achieved through a through hole penetrating through the interposer, and in the embodiment of the present invention, four first soldering pins and four second soldering pins are described as an example, and the number of the first soldering pins and the number of the second soldering pins are merely illustrative in the embodiment of the present invention, and are not limited thereto.

The first target signal welding pins in the first welding pins are led out through the test signal wires, wherein the illustrated ground plane is a wiring reference plane of the test signal wires.

However, in the inventive process of the present invention, the inventor finds that the state of the test signal line shown in fig. 7 is an open state, and the signal propagates to form reflection to cause stub effect, so as to affect the actual signal quality, which may cause the tested DDR particle chip to work unstably or not reach the expected rate.

As shown in fig. 7, assuming that the length of the test signal line is L, that is, the length of the stub is L, the equation of the stub length and the resonant frequency wavelength is as follows, considering that the distance from which the test signal line is led out is normally about 6 mm:

L＝1/4*λ

where λ represents the wavelength.

Then, when l=6.0 mm, the corresponding wavelength is 24mm, i.e. the resonance frequency is 7.5GHz, and the signal bandwidth of a typical DDR particle chip is 0GHz-10GHz, so the resonance frequency falls well within the range of the signal bandwidth, resulting in a blockage of the energy transmission of the signal transmission within this bandwidth.

Based on this, in the embodiment of the present invention, as shown in fig. 8, the second bonding pin includes a second target signal bonding pin correspondingly electrically connected to the first target signal bonding pin.

The test signal lines comprise a first test signal line and a second test signal line, the first test signal line is located on the surface of the second portion, which is away from one side of the first portion, and the second test signal line is located inside the second portion.

The first end of the first test signal wire is electrically connected with the first target signal welding pin, and the second end of the first test signal wire extends to the edge area of the adapter plate.

Specifically, through improving the wiring mode of test signal line, two wiring layers are designed at the second part of keysets for walk first test signal line and second test signal line, the signal is first from second target signal welding pin through second connection Kong Zoudao second wiring layer, then through first connection Kong Zoudao first wiring layer, the wiring mode of test signal line of a closed loop has been realized, the influence of stub has just been perfectly avoided, the problem that leads to by signal quality has been reduced, under the circumstances that does not influence the normal use of DDR granule chip that awaits measuring, improve the test accuracy.

The above describes in detail a testing device for testing electrical performance of DDR particles, and specific examples are applied herein to illustrate principles and embodiments of the present invention, and the above examples are only for helping to understand the method and core idea of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described as different from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.

It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include, or is intended to include, elements inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A test device for testing electrical performance of DDR particles, the test device comprising: DDR particle chip, adapter plate and PCB board to be measured;

2. The test device of claim 1, wherein the test device further comprises: and the first welding pin and the second welding pin are correspondingly and electrically connected through the through hole penetrating through the through hole of the adapter plate.

3. The testing device of claim 1, wherein an area of the adapter plate in a front projection area of the plane of the PCB is larger than an area of the DDR particle chip to be tested in the front projection area of the plane of the PCB.

4. The test device of claim 1, wherein a minimum distance between a boundary of the interposer and a boundary of the DDR particle chip under test is W/2, where W is a width of the DDR particle chip under test.

5. The test device of claim 1, wherein in a first direction, the interposer has a first portion and a second portion in a stepped arrangement, the first portion being located between the second portion and the PCB;

6. The test device of claim 5, wherein the first portion is located in a middle region of the second portion.

7. The test device of claim 5, wherein the first portion has a thickness H1 and the DDR particle chip to be tested has a height H2;

Wherein H1 is more than or equal to 1.5 x H2.

8. The test device of claim 5, wherein the second solder pin comprises a second target signal solder pin in corresponding electrical connection with the first target signal solder pin;