CN118138205A - SSB index indication method and device - Google Patents
SSB index indication method and device Download PDFInfo
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- CN118138205A CN118138205A CN202211541711.0A CN202211541711A CN118138205A CN 118138205 A CN118138205 A CN 118138205A CN 202211541711 A CN202211541711 A CN 202211541711A CN 118138205 A CN118138205 A CN 118138205A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/0091—Signalling for the administration of the divided path, e.g. signalling of configuration information
- H04L5/0094—Indication of how sub-channels of the path are allocated
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- H—ELECTRICITY
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Abstract
The disclosure relates to the technical field of communication, and in particular relates to an SSB index indication method and device. The SSB index indication method comprises the following steps: acquiring a preset system frame number; and adding a bit identifier corresponding to the preset system frame number to preset bits in an SSB index number expression mode so that the SSB index number indicates SSB of the target number. By adopting the method and the device, the number of SSBs can meet the system requirement, and meanwhile, the bit overhead is reduced.
Description
Technical Field
The disclosure relates to the technical field of communication, and in particular relates to a method and a device for indicating indexes of synchronous signal blocks (Synchronization Signal Block, SSB).
Background
In the communication system, in a New air interface (NR) standard system, the number of SSBs with different indexes is 8 at most in a first Frequency range (FR 1) Frequency range, and the number of SSBs with different indexes is 64 at most in a first Frequency range (FR 2) Frequency range. In general, signaling beams in one direction in the NR system correspond to one SSB index, so there are at most 8 signaling beams in the FR1 band, and at most 64 signaling beams in the FR2 band. Therefore, when the number of signaling beams required by a certain system far exceeds the upper limit of the terrestrial system, the number of SSBs in the related art is insufficient to meet the system requirements.
Disclosure of Invention
The disclosure provides a method and a device for indicating SSB indexes, which are used for at least solving the problem that the number of SSB indexes in the related art is insufficient to meet the system requirement. The technical scheme of the present disclosure is as follows:
according to a first aspect of an embodiment of the present disclosure, there is provided an SSB index indication method, applied to a network side device, including:
Acquiring a preset system frame number;
and adding a bit identifier corresponding to the preset system frame number to preset bits in an SSB index number expression mode so that the SSB index number indicates SSB of the target number.
Optionally, the adding the bit identifier corresponding to the preset system frame number to the preset bit in the SSB index number representation mode includes:
And when the preset system frame number is 20ms system frame number, adding a bit identifier corresponding to the 20ms system frame number to the 4 th high bit in the expression mode of the binary SSB index number, so that the binary SSB index number indicates at most 128 SSBs.
Optionally, the method further comprises:
When the binary SSB index number is changed from 7 to 8, the first bit identification corresponding to the 20ms system frame number is adjusted from a first bit value to a second bit value.
Optionally, wherein the initial system frame of ssb#0 starts with a system frame modulo 4 of 0.
Optionally, the binary SSB index number is expressed in the following manner:
[ PBCH DMRS sequence index ], wherein the/> Said/>Said/>Respectively representing the 1 st, 2 nd and 3 rd high order bits in the binary SSB index number expression mode, wherein the/>Represents the 4 th high order in the binary SSB index number representation, and the/>Representing a 20ms system frame number.
Optionally, the adding the bit identifier corresponding to the preset system frame number to the preset bit in the SSB index number representation mode includes:
when the preset system frame number is 20ms system frame number and 40ms system frame number, adding a second bit identifier corresponding to the 40ms system frame number to the 4 th high bit in a binary SSB index number expression mode, and adding a first bit identifier corresponding to the 20ms system frame number to the 5 th high bit in the binary SSB index number expression mode, so that the binary SSB index number indicates at most 256 SSBs.
Optionally, the method further comprises:
when the binary SSB index number is changed from 7 to 8, adjusting a first bit identifier corresponding to the 20ms system frame number from a first bit value to a second bit value;
When the binary SSB index number is changed from 15 to 16, the second bit identification corresponding to the 40ms system frame number is adjusted from the first bit value to the second bit value, and the first bit identification corresponding to the 20ms system frame number is adjusted from the second bit value to the first bit value.
Optionally, wherein the initial system frame of ssb#0 starts with a system frame with modulo 8 of 0.
Optionally, the binary SSB index number is expressed in the following manner:
[ PBCH DMRS sequence index ], wherein the/> The saidSaid/>Respectively representing the 1 st, 2 nd and 3 rd high order bits in the binary SSB index number expression mode, wherein the/>Representing the 4 th high order in the binary SSB index number representation, the/>Represents the 5 th high order in the binary SSB index number representation, and the/>Represents a 20ms system frame number, the/>Representing a 40ms system frame number.
Optionally, the method further comprises:
By adopting the following And said/>Generating a first-stage scrambling sequence of the PBCH;
By adopting the following And generating a second-stage scrambling sequence of the PBCH.
According to a second aspect of embodiments of the present disclosure, there is provided an SSB index indicating apparatus, including:
the frame number acquisition unit is used for acquiring a preset system frame number;
And the identification adding unit is used for adding the bit identification corresponding to the preset system frame number to the preset bit in the SSB index number expression mode so that the SSB index number indicates SSB of the target number.
According to a third aspect of embodiments of the present disclosure, there is provided an SSB index indication system, comprising:
a processor;
a memory for storing the processor-executable instructions;
Wherein the processor is configured to execute the instructions to implement the SSB index indication method of any one of the preceding aspects.
According to a fourth aspect of the present application, there is provided a storage medium, which when executed by a processor of an electronic device, enables the electronic device to perform the SSB index pointing method of any one of the preceding aspects.
According to a fifth aspect of the present application there is provided a computer program product comprising a computer program which, when executed by a processor, implements the method of any of the preceding aspects.
The technical scheme provided by the embodiment of the disclosure at least brings the following beneficial effects:
In some or related embodiments, the preset system frame number is obtained; and adding a bit identifier corresponding to the preset system frame number to preset bits in an SSB index number expression mode so that the SSB index number indicates SSB of the target number. Therefore, the preset system frame number can be multiplexed without changing the NR standard protocol, the bit multiplexing rate can be increased, the bit cost when the SSB index number indicates the SSB of the target number is reduced, and the bit cost can be reduced when the SSB number meets the system requirement.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure and do not constitute an undue limitation on the disclosure.
FIG. 1 is a background diagram illustrating a method of SSB index indication, according to an example embodiment;
FIG. 2 is a flow chart illustrating a method of SSB index indication, according to an example embodiment;
FIG. 3 is a flowchart illustrating a method of SSB index indication, according to an example embodiment;
FIG. 4 is an exemplary diagram illustrating a method of SSB index indication, according to an exemplary embodiment;
FIG. 5 is a flowchart illustrating a method of SSB index indication, according to an example embodiment;
FIG. 6 is an exemplary diagram illustrating a method of SSB index indication, according to one exemplary embodiment;
FIG. 7 is a block diagram of an SSB index indicating apparatus, according to an example embodiment;
FIG. 8 is a block diagram of an SSB index indicating apparatus, according to an example embodiment;
FIG. 9 is a block diagram of an SSB index indicating apparatus, according to an example embodiment;
fig. 10 is a block diagram of a terminal device according to an exemplary embodiment;
FIG. 11 is a block diagram illustrating an SSB index indication system, according to an example embodiment.
Detailed Description
In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings.
It should be noted that the terms "first," "second," and the like in the description and claims of the present disclosure and in the foregoing figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the disclosure described herein may be capable of operation in sequences other than those illustrated or described herein. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present disclosure as detailed in the accompanying claims.
In the communication system, in a New air interface (NR) standard system, the number of SSBs with different indexes is 8 at most in a first Frequency range (FR 1) Frequency range, and the number of SSBs with different indexes is 64 at most in a first Frequency range (FR 2) Frequency range. In general, signaling beams in one direction in the NR system correspond to one SSB index, so there are at most 8 signaling beams in the FR1 band, and at most 64 signaling beams in the FR2 band. For example: in a system, the coverage area of a single star is about 71 ten thousand square kilometers, and when a typical beam generated according to linear phase change is adopted, the coverage area of the single beam is only a few hundred square kilometers, and more than 2000 wave positions are needed to realize seamless coverage. Thus, the number of signaling beams of the system far exceeds the upper limit of the terrestrial system, and the number of SSBs in the related art is insufficient to satisfy the system, compared with the NR standard architecture.
It is easy to understand that SSBs are configured as a maximum of 64 in the FR2 band, and SSB index indications can be indicated by, for example, [ can be usedPBCH DMRS sequence index ], a maximum of 64 SSBs may be indicated. Wherein,The 1st, 2nd, 3 rd high order bits representing the SSB index, SSB low order 3 bits are the physical broadcast channel (Physical Boardcast Signal, PBCH) demodulation reference signal (De-modulation REFERENCE SIGNAL, DMRS) sequence, which may indicate 8 SSBs. According to the design of the system, the coverage area of a single beam is only a few hundred square kilometers, and more than 2000 wave positions are needed to realize seamless coverage. Fig. 1 is a background diagram illustrating an SSB index indication method according to an exemplary embodiment. As shown in fig. 1, the outermost large circle represents the coverage area of a single star, and the inner small circle represents the wave position. Even though the design of 1 downlink channel corresponding to 4 uplink channels in the above system still needs 512 signaling beams, further, the above system can provide 4 downlink channels dedicated for signaling beam transmission, and these 4 channels simultaneously transmit four signaling beam directions, but because SSB index is shared, SSB index can be reduced to 128. Therefore, the related art cannot meet the requirements of SSB index numbers.
Fig. 2 is a flowchart illustrating an SSB index indication method, as shown in fig. 2, which may be used in a communication scenario, according to an exemplary embodiment, including the steps of:
in step S11, a preset system frame number is obtained;
in some embodiments, the execution body of the embodiments of the present disclosure may be, for example, a network side device.
According to some embodiments, the preset system frame number refers to a system frame number that can be multiplexed without changing the NR standard protocol, where, for example, the system frame number may be represented by four bits: And/> Each bit represents a 10ms system frame number, a 20ms system frame number, a 40ms system frame number and a 80ms system frame number, i.e. >Bits represent a system frame number of 10ms,/>Bits represent a 20ms system frame number,/>Bits represent the 40ms system frame number and/>Bits represent the system frame number of 80 ms.
Alternatively, the preset system frame number of the embodiment of the present disclosure may include, for example, only a 20ms system frame number, or the preset system frame number of the embodiment of the present disclosure may include both a 20ms system frame number and a 40ms system frame number.
It is easy to understand that when multiplexing system frame numbers in the embodiment of the present disclosure, instead of multiplexing all system frame numbers, multiplexing is performed only for a preset system frame number, and multiplexing of the preset system frame number does not need to change a standard protocol, and when multiplexing the system frame numbers, SSB index numbers may be caused to indicate SSBs of a target number. The preset system frame number does not refer to a certain fixed system frame number. For example, when the number of frame numbers corresponding to the preset system frame number changes, the preset system frame number may also change accordingly.
Alternatively, when the SSB index indication method is performed, a preset system frame number may be acquired.
In step S12, a bit identifier corresponding to the preset system frame number is added to the preset bits in the SSB index number representation, so that the SSB index number indicates the SSB of the target number.
According to some embodiments, the bits identify bits used to identify a system frame number. Different preset system frame numbers correspond to different bit identifications. For exampleBits represent a 20ms system frame number,/>Bits represent a 40ms system frame number.
In some embodiments, SSB index numbers are used to indicate a preset number of SSBs. The SSB index number is dynamically changed, that is, when the number of SSBs sent by the preset system frame number is changed, the SSB index number may also be changed correspondingly.
Optionally, when the SSB index indication method is executed, a preset system frame number may be obtained, and a bit identifier corresponding to the preset system frame number is added to a preset bit in the SSB index number representation mode, so that the SSB index number indicates the SSB of the target number. That is, adding the bit identifier corresponding to the preset system frame number to the preset bits in the SSB index number representation mode can increase the number of bits in the SSB index number representation mode, and can adjust or increase the number of SSBs indicated by the SSB index number.
In some or related embodiments, the preset system frame number is obtained; and adding a bit identifier corresponding to the preset system frame number to preset bits in the SSB index number representation mode so that the SSB index number indicates the SSB of the target number. Therefore, the preset system frame number can be multiplexed without changing the NR standard protocol, the bit multiplexing rate can be increased, the bit cost when the SSB index number indicates the SSB of the target number is reduced, and the bit cost can be reduced when the SSB number meets the system requirement.
Fig. 3 is a flowchart illustrating an SSB index indicating method, as shown in fig. 3, which may be used in a communication scenario, according to an exemplary embodiment, including the steps of:
in step S21, a 20ms system frame number is acquired;
The specific process is as described above, and will not be described here again.
According to some embodiments, the preset system frame number may be, for example, a 20ms system frame number. The network side device may acquire a 20ms system frame number. Because different preset system frame numbers correspond to different bit identifications, the bit positions of the different bit identifications in the SSB index number representation mode are different.
In step S22, when the preset system frame number is 20ms system frame number, a bit identifier corresponding to the 20ms system frame number is added to the 4 th high bit in the binary SSB index number expression, so that the binary SSB index number indicates at most 128 SSBs.
According to some embodiments, the bit identification corresponding to the 20ms system frame number may be, for exampleWhen the preset system frame number acquired by the network side device is 20ms system frame number, the bit identifier/> corresponding to the 20ms system frame number can be identifiedIs added to the 4 th high order bit in the binary SSB index number representation such that the binary SSB index number indicates up to 128 SSBs.
Wherein the start system frame of ssb#0 starts from a system frame with modulo 4 of 0.
Wherein, the binary SSB index number is expressed as follows:
[ PBCH DMRS sequence index ], wherein the/> Said/>Said/>Respectively represent the 1 st, 2 nd and 3 rd high order in the binary SSB index number expression mode,/>Represents the 4 th high order in the binary SSB index number representation, and/>Representing a 20ms system frame number.
According to some embodiments, when the binary SSB index number changes from the first preset number to the second preset number, the network side device may adjust the bit identifier corresponding to the 20ms system frame number from the first bit value to the second bit value, so that the binary SSB index number indicates at most 128 SSBs.
Wherein the first preset number is adjacent to the second preset number. The first preset number is not specific to a certain preset number. The first preset number is only used for distinguishing from the second preset number, and the first preset number and the second preset number are only used for indicating different numbers.
According to some embodiments, the size relationship between the first preset number and the second preset number is not limited. The magnitude relation of the first preset number and the second preset number may be changed based on a change in the number configuration information. For example, the first preset number may be smaller than the second preset number, and the second preset number may also be smaller than the first preset number.
It is easy to understand that, when the preset system frame number changes, the first preset number and the second preset number may also change correspondingly. For example, when the preset system frame number is 20ms system frame number, the first preset number may be seven, for example, and the second preset number may be eight, for example. When the preset system frame numbers are 20ms system frame numbers and 40ms system frame numbers, the first preset number may be fifteen, for example, and the second preset number may be sixteen, for example.
Specifically, when the binary SSB index number is changed from 7 to 8, the network side device may adjust the first bit identifier corresponding to the 20ms system frame number from the first bit value to the second bit value.
Alternatively, the first bit value and the second bit value are used only to indicate different bit values, and do not refer to a certain fixed bit value, for example, when configuration information for the first bit value and the second bit value changes, the first bit value and the second bit value may also change accordingly.
According to some embodiments, when the preset system frame number is 20ms system frame number, the first bit value may be, for example, 0, and the second bit value may be, for example, 1, that is, when the SSB index number changes from 7 to 8, the bit identifier corresponding to the 20ms system frame number is adjusted from 0 to 1, so that the binary SSB index number indicates that at most 128 SSBs, that is, the bit identifier corresponding to the 20ms system frame number will change from 0 to 1. The bit identifier corresponding to the 20ms system frame number may be, for example, the 4 th high bit in the binary SSB index number.
It is to be readily appreciated that fig. 4 is an exemplary schematic diagram illustrating one SSB index indication method according to an exemplary embodiment. As shown in fig. 4, at most 8 SSBs are configured per 20ms system frame number, 8 SSBs are transmitted within 10ms of the first system frame, and no SSBs are transmitted within 10ms of the second system frame, i.e., a total of 8 SSBs are transmitted within 20ms units. Wherein, each time slot is configured with 2 SSBs at most, and occupies 4 time slots in total. When the SSB index changes from 7 to 8, representing the second 20ms start, the bit representing the 20ms system frame number changes from 0 to 1.
Alternatively, when the bits representing the 20ms system frame number are changed from 0 to 1, the binary SSB index number may be changed from [ 00001 11 ] to [ 0001 000 ], i.e., from 7 to 8, achieving that a maximum of 128 SSB indexes are represented by multiplexing the bits of the 20ms system frame number. Since 20ms system frame numbers are multiplexed, it is necessary to limit the start position of ssb#0 to SFN bitsI.e., ssb#0, needs to start from a system frame with modulo 4 0.
It is readily understood that this binary SSB index number representation is 7 bits total, and can represent 128 SSBs.Representing the 4 th high order in the binary SSB index number representation, the/>The 3 rd least significant bit representing the single frequency network (SYSTEM FRAME numbers, SFN) is restored.
Wherein, adoptGenerating a first-stage scrambling sequence of the PBCH;
By using A second stage scrambling sequence of the PBCH is generated. The generation of the scrambling sequence can encrypt the transmitted data, so that the safety of data transmission is improved.
According to some embodiments, the disclosed embodiments multiplex only 20ms system frame numbers, and therefore only employ when generating scrambling sequencesGenerating a first-stage scrambling sequence of the PBCH; while generating the second-stage scrambling sequence may employA second stage scrambling sequence of the PBCH is generated.
In some or related embodiments, by acquiring a20 ms system frame number; when the preset system frame number is 20ms system frame number, adding the bit identification corresponding to the 20ms system frame number to the 4 th high bit in the binary SSB index number expression mode so that the binary SSB index number indicates at most 128 SSBs. Therefore, under the condition that an NR standard protocol is not changed, a20 ms system frame number can be multiplexed, the bit multiplexing rate can be increased, the bit cost when the SSB index number indicates at most 128 SSBs is reduced, and the bit cost can be reduced when the number of the SSBs meets the system requirement.
Fig. 5 is a flowchart illustrating an SSB index indicating method, which may be used in a communication scenario, as shown in fig. 5, according to an exemplary embodiment, including the steps of:
in step S31, a 20ms system frame number and a 40ms system frame number are acquired;
The specific process is as described above, and will not be described here again.
According to some embodiments, the preset system frame numbers may be, for example, a 20ms system frame number and a 40ms system frame number. The network side device may acquire a 20ms system frame number and a 40ms system frame number. I.e., multiplexing 20ms system frame numbers and 40ms system frame numbers in the presently disclosed embodiments.
In step S32, when the preset system frame numbers are 20ms system frame number and 40ms system frame number, the second bit identification corresponding to the 40ms system frame number is added to the 4 th high bit in the binary SSB index number expression, and the first bit identification corresponding to the 20ms system frame number is added to the 5 th high bit in the binary SSB index number expression, so that the binary SSB index numbers indicate at most 256 SSBs.
According to some embodiments, the network side device may add a bit identifier corresponding to a 40ms system frame number to a 4 th high bit in the binary SSB index number, and add a bit identifier corresponding to a 20ms system frame number to a 5 th high bit in the binary SSB index number. I.e. different bit identities are added to different bits in the binary SSB index number representation.
It is easy to understand that the binary SSB index number representation includes a bit identifier corresponding to a20 ms system frame number and a bit identifier corresponding to a 40ms system frame number.
According to some embodiments, when the binary SSB index number changes from 7 to 8, the first bit identification corresponding to the 20ms system frame number is adjusted from a first bit value to a second bit value; when the binary SSB index number is changed from 15 to 16, the second bit identification corresponding to the 40ms system frame number is adjusted from the first bit value to the second bit value, and the first bit identification corresponding to the 20ms system frame number is adjusted from the second bit value to the first bit value.
According to some embodiments, the first bit value may be, for example, 0 and the second bit value may be, for example, 1. When the binary SSB index number is changed from 7 to 8, the first bit identification corresponding to the 20ms system frame number is adjusted from 0 to 1, and at this time, the second bit identification corresponding to the 40ms system frame number is not adjusted. When the SSB index number is changed from 15 to 16, the bit identification corresponding to the 40ms system frame number is adjusted from 0 to 1, and the bit identification corresponding to the 20ms system frame number is adjusted from 1 to 0, so that the binary SSB index number indicates at most 256 SSBs.
Fig. 6 is an exemplary diagram illustrating an SSB index indication method according to an exemplary embodiment, according to some embodiments. As shown in fig. 6, at most 8 SSBs are configured every 20ms, 8 SSBs are transmitted within 10ms of the first system frame, no SSBs are transmitted within 10ms of the second system frame, a total of 8 SSBs are transmitted within 20ms units, and a total of 16 SSBs are transmitted within 40ms units. Wherein a maximum of 2 SSBs are configured per slot, and 4 slots are occupied, when the SSB index changes from 7 to 8, the second 20ms system frame number starts, so the bit representing the 20ms system frame number changes from 0 to 1. When the SSB index changes from 15 to 16, it represents the second 40ms start, so the bit representing the 40ms system frame numberWill change from 0 to 1 and represent bits of the 20ms system frame numberFrom 1 to 0.
It will be readily appreciated that when bits representing a 40ms system frame numberFrom 0 to 1, representing bits/>, of a 20ms system frame numberWhen changing from 1 to 0, the binary SSB index number can be changed from [ 00001 11 1] to [ 00010 000 ], namely from 15 to 16, so that the bit/>, by multiplexing the 20ms system frame number, is realizedAnd bits of 40ms system frame numberSuch that the binary SSB index number indicates at most 256 SSBs. Since 40ms system frame numbers are multiplexed, it is necessary to limit the starting position of ssb#0 to/>, in SFN bitsI.e., ssb#0, needs to start from a system frame with modulo 8 of 0.
Wherein the start system frame of ssb#0 starts with a system frame with modulo 8 of 0.
According to some embodiments, the binary SSB index number is represented by:
[ PBCH DMRS sequence index ], wherein the/> The saidSaid/>Respectively represent the 1 st, 2 nd and 3 rd high order in the binary SSB index number expression mode,/>Representing the 4 th high order in the binary SSB index number representation, the/>Represents the 5 th high order in the binary SSB index number representation, and/>Representing 20ms System frame number,/>Representing a 40ms system frame number;
Wherein, And/>The 2 nd and 3 rd least significant bits originally used to represent SFN, in the presently disclosed embodiments/>Representing the 4 th high order in the binary SSB index number representation, the/>The 5 th high order in the binary SSB index number representation is represented.
Wherein the method further comprises:
By using And/>Generating a first-stage scrambling sequence of the PBCH;
By using A second stage scrambling sequence of the PBCH is generated.
According to some embodiments, the disclosed embodiments multiplex 20ms system frame numbers and 40ms system frame numbers, so that when generating scrambling sequences, one can employAnd/>Generating a first-stage scrambling sequence of the PBCH; while the second-stage scrambling sequence may be generated by using/>A second stage scrambling sequence of the PBCH is generated.
In some or related embodiments, the binary SSB index number indicates up to 256 SSBs by adding the second bit identification corresponding to the 40ms system frame number to the 4 th high bit in the binary SSB index number representation when the system frame numbers are preset to be 20ms system frame number and 40ms system frame number, and adding the first bit identification corresponding to the 20ms system frame number to the 5 th high bit in the binary SSB index number representation. Therefore, under the condition that an NR standard protocol is not changed, a 20ms system frame number and a 40ms system frame number can be multiplexed, the multiplexing rate of bits can be increased, the bit overhead when SSB index marks indicate at most 256 SSBs is reduced, and the bit overhead can be reduced when the number of the SSBs meets the system requirement.
Fig. 7 is a block diagram of an SSB index pointing device, according to an example embodiment. Referring to fig. 7, the apparatus 700 includes a frame number acquisition unit 701 and an identification adding unit 702.
A frame number acquiring unit 701, configured to acquire a preset system frame number;
The identifier adding unit 702 is configured to add a bit identifier corresponding to a preset system frame number to a preset bit in the SSB index number representation, so that the SSB index number indicates the SSB of the target number.
According to some embodiments, the identifier adding unit 702 is configured to, when adding the bit identifier corresponding to the preset system frame number to the preset bit in the SSB index number representation, specifically:
When the preset system frame number is 20ms system frame number, adding the bit identification corresponding to the 20ms system frame number to the 4 th high bit in the binary SSB index number expression mode so that the binary SSB index number indicates at most 128 SSBs.
Fig. 8 is a block diagram of an SSB index pointing device according to an example embodiment. Referring to fig. 8, the apparatus 700 further comprises a bit value adjustment unit 703 for:
When the binary SSB index number is changed from 7 to 8, the first bit identification corresponding to the 20ms system frame number is adjusted from the first bit value to the second bit value.
According to some embodiments, wherein the starting system frame of ssb#0 starts with a system frame modulo 4 of 0.
According to some embodiments, the binary SSB index number is represented by:
[ PBCH DMRS sequence index ], wherein the/> Said/>Said/>Respectively represent the 1 st, 2 nd and 3 rd high order in the binary SSB index number expression mode,/>Represents the 4 th high order in the binary SSB index number representation, and/>Representing a 20ms system frame number.
According to some embodiments, the identifier adding unit 702 is configured to, when adding a bit identifier corresponding to a preset system frame number to a preset bit in the SSB index number representation, specifically:
when the preset system frame numbers are 20ms system frame numbers and 40ms system frame numbers, adding a second bit identifier corresponding to the 40ms system frame numbers to the 4 th high bit in the binary SSB index number expression mode, and adding a first bit identifier corresponding to the 20ms system frame numbers to the 5 th high bit in the binary SSB index number expression mode, so that the binary SSB index numbers indicate at most 256 SSBs.
According to some embodiments, the bit value adjustment unit 703 is further configured to:
When the binary SSB index number is changed from 7 to 8, the first bit identification corresponding to the 20ms system frame number is adjusted from a first bit value to a second bit value;
when the binary SSB index number is changed from 15 to 16, the second bit identification corresponding to the 40ms system frame number is adjusted from the first bit value to the second bit value, and the first bit identification corresponding to the 20ms system frame number is adjusted from the second bit value to the first bit value.
According to some embodiments, wherein the starting system frame of ssb#0 starts with a system frame of modulo 80.
According to some embodiments, the binary SSB index number is represented by:
[ PBCH DMRS sequence index ], wherein the/> The saidSaid/>Respectively represent the 1 st, 2 nd and 3 rd high order in the binary SSB index number expression mode,/>Representing the 4 th high order in the binary SSB index number representation, the/>Represents the 5 th high order in the binary SSB index number representation, and/>Representing 20ms System frame number,/>Representing a 40ms system frame number.
Fig. 9 is a block diagram of an SSB index pointing device according to an example embodiment. Referring to fig. 9, the apparatus 700 further comprises a sequence generation unit 704 for employingAnd said/>Generating a first-stage scrambling sequence of the PBCH;
By adopting the following A second stage scrambling sequence of the PBCH is generated.
The specific manner in which the various modules perform the operations in the apparatus of the above embodiments have been described in detail in connection with the embodiments of the method, and will not be described in detail herein.
In some or related embodiments, the frame number acquiring unit is configured to acquire a preset system frame number; the identifier adding unit is used for adding a bit identifier corresponding to a preset system frame number to a preset bit in the SSB index number expression mode so that the SSB index number indicates SSB of the target number. Therefore, the preset system frame number can be multiplexed without changing the NR standard protocol, the multiplexing rate of bits can be increased, the bit cost when the SSB index number indicates the SSB of the target number is reduced, and the bit cost can be reduced when the SSB number meets the system requirement.
Fig. 10 is a block diagram of a terminal device UE1000 according to an embodiment of the present disclosure. For example, UE1000 may be a mobile phone, computer, digital broadcast terminal device, messaging device, game console, tablet device, medical device, fitness device, personal digital assistant, and the like.
Referring to fig. 10, the ue1000 may include at least one of the following components: a processing component 1002, a memory 1004, a power component 1006, a multimedia component 1008, an audio component 1010, an input/output (I/O) interface 1012, a sensor component 1014, and a communication component 1016.
The processing component 1002 generally controls overall operation of the UE1000, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 1002 can include at least one processor 1020 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 1002 can include at least one module that facilitates interaction between the processing component 1002 and other components. For example, the processing component 1002 can include a multimedia module to facilitate interaction between the multimedia component 1008 and the processing component 1002.
The memory 1004 is configured to store various types of data to support operations at the UE 1000. Examples of such data include instructions for any application or method operating on the UE1000, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 1004 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.
The power supply component 1006 provides power to the various components of the UE 1000. The power supply component 1006 can include a power management system, at least one power supply, and other components associated with generating, managing, and distributing power for the UE 1000.
The multimedia component 1008 includes a screen between the UE1000 and the user that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes at least one touch sensor to sense touch, swipe, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or slide action, but also a wake-up time and pressure associated with the touch or slide operation. In some embodiments, the multimedia assembly 1008 includes a front-facing camera and/or a rear-facing camera. The front camera and/or the rear camera may receive external multimedia data when the UE1000 is in an operation mode, such as a photographing mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
The audio component 1010 is configured to output and/or input audio signals. For example, the audio component 1010 includes a Microphone (MIC) configured to receive external audio signals when the UE1000 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in memory 1004 or transmitted via communication component 1016. In some embodiments, the audio component 1010 further comprises a speaker for outputting audio signals.
The I/O interface 1012 provides an interface between the processing assembly 1002 and peripheral interface modules, which may be a keyboard, click wheel, buttons, and the like. These buttons may include, but are not limited to: homepage button, volume button, start button, and lock button.
The sensor assembly 1014 includes at least one sensor for providing status assessment of various aspects for the UE 1000. For example, the sensor assembly 1014 may detect an on/off state of the UE1000, a relative positioning of the assemblies, such as a display and keypad of the UE1000, the sensor assembly 1014 may also detect a change in position of the UE1000 or one of the assemblies of the UE1000, the presence or absence of user contact with the UE1000, a change in the orientation or acceleration/deceleration of the UE1000, and a change in temperature of the UE 1000. The sensor assembly 1014 may include a proximity sensor configured to detect the presence of nearby objects in the absence of any physical contact. The sensor assembly 1014 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 1014 can also include an acceleration sensor, a gyroscopic sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.
The communication component 1016 is configured to facilitate communication between the UE1000 and other devices, either wired or wireless. The UE1000 may access a wireless network based on a communication standard, such as WiFi,2G, or 3G, or a combination thereof. In one exemplary embodiment, the communication component 1016 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 1016 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.
In an exemplary embodiment, the UE1000 may be implemented by at least one Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a controller, a microcontroller, a microprocessor, or other electronic components for performing the above-described methods.
Fig. 11 is a block diagram of a network side device 1100 provided by an embodiment of the disclosure. For example, the network-side device 1100 may be provided as a network-side device. Referring to fig. 11, the network-side device 1100 includes a processing component 1122 that further includes at least one processor, and memory resources represented by memory 1132 for storing instructions, such as application programs, executable by the processing component 1122. The application programs stored in memory 1132 may include one or more modules each corresponding to a set of instructions. Further, processing component 1122 is configured to execute instructions to perform any of the methods described above as applied to the network-side device.
The network-side device 1100 may also include a power component 1127 configured to perform power management of the network-side device 1100, a wired or wireless network interface 1150 configured to connect the network-side device 1100 to a network, and an input/output (I/O) interface 1158. Network-side device 1100 may operate based on an operating system stored in memory 1132, such as Windows Server TM, mac OS XTM, unix (TM), linux (TM), free BSDTM, or the like.
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), the internet, and blockchain networks.
The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service ("Virtual PRIVATE SERVER" or simply "VPS") are overcome. The server may also be a server of a distributed system or a server that incorporates a blockchain.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel or sequentially or in a different order, provided that the desired results of the technical solutions of the present disclosure are achieved, and are not limited herein.
The above detailed description should not be taken as limiting the scope of the present disclosure. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present disclosure are intended to be included within the scope of the present disclosure.
Claims (13)
1. The method for indicating the SSB index of the synchronous signal block is characterized by being applied to network side equipment and comprising the following steps of:
Acquiring a preset system frame number;
and adding a bit identifier corresponding to the preset system frame number to preset bits in an SSB index number expression mode so that the SSB index number indicates SSB of the target number.
2. The method of claim 1, wherein adding the bit identification corresponding to the preset system frame number to the preset bit in the SSB index number representation comprises:
And when the preset system frame number is 20ms system frame number, adding a bit identifier corresponding to the 20ms system frame number to the 4 th high bit in the expression mode of the binary SSB index number, so that the binary SSB index number indicates at most 128 SSBs.
3. The method according to claim 2, wherein the method further comprises:
When the binary SSB index number is changed from 7 to 8, the first bit identification corresponding to the 20ms system frame number is adjusted from a first bit value to a second bit value.
4. The method of claim 2, wherein the starting system frame of ssb#0 starts with a system frame of modulo 4 0.
5. The method of claim 2, wherein the binary SSB index number is represented by:
[ PBCH DMRS sequence index ], wherein the/> Said/>The saidRespectively representing the 1 st, 2 nd and 3 rd high order bits in the binary SSB index number expression mode, wherein the/>Represents the 4 th high order in the binary SSB index number representation, and the/>Representing a 20ms system frame number.
6. The method of claim 1, wherein adding the bit identification corresponding to the preset system frame number to the preset bit in the SSB index number representation comprises:
when the preset system frame number is 20ms system frame number and 40ms system frame number, adding a second bit identifier corresponding to the 40ms system frame number to the 4 th high bit in a binary SSB index number expression mode, and adding a first bit identifier corresponding to the 20ms system frame number to the 5 th high bit in the binary SSB index number expression mode, so that the binary SSB index number indicates at most 256 SSBs.
7. The method of claim 6, wherein the method further comprises:
when the binary SSB index number is changed from 7 to 8, adjusting a first bit identifier corresponding to the 20ms system frame number from a first bit value to a second bit value;
When the binary SSB index number is changed from 15 to 16, the second bit identification corresponding to the 40ms system frame number is adjusted from the first bit value to the second bit value, and the first bit identification corresponding to the 20ms system frame number is adjusted from the second bit value to the first bit value.
8. The method of claim 6, wherein the starting system frame of ssb#0 starts with a system frame of modulo 8 0.
9. The method of claim 6, wherein the binary SSB index number is represented by:
[ PBCH DMRS sequence index ], wherein the/> Said/>Said/>Respectively representing the 1 st, 2 nd and 3 rd high order bits in the binary SSB index number expression mode, wherein the/>Representing the 4 th high order in the binary SSB index number representation, the/>Represents the 5 th high order in the binary SSB index number representation, and the/>Represents a 20ms system frame number, the/>Representing a 40ms system frame number.
10. The method according to claim 9, wherein the method further comprises:
By adopting the following And said/>Generating a first-stage scrambling sequence of the PBCH;
By adopting the following And generating a second-stage scrambling sequence of the PBCH.
11. An SSB index indicating apparatus, comprising:
the frame number acquisition unit is used for acquiring a preset system frame number;
And the identification adding unit is used for adding the bit identification corresponding to the preset system frame number to the preset bit in the SSB index number expression mode so that the SSB index number indicates SSB of the target number.
12. An SSB index indicating system, comprising:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the SSB index pointing method of any one of claims 1 to 10.
13. A storage medium, which when executed by a processor of an electronic device, enables the electronic device to perform the SSB index pointing method of any one of claims 1 to 10.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211541711.0A CN118138205A (en) | 2022-12-01 | 2022-12-01 | SSB index indication method and device |
| PCT/CN2023/131793 WO2024114383A1 (en) | 2022-12-01 | 2023-11-15 | Ssb index indication method and device |
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| CN202211541711.0A CN118138205A (en) | 2022-12-01 | 2022-12-01 | SSB index indication method and device |
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| EP4009719B1 (en) * | 2017-05-03 | 2023-01-25 | Sony Group Corporation | Efficient utilization of ssbs in new radio systems |
| CN110945805B (en) * | 2017-07-28 | 2022-07-19 | Lg电子株式会社 | Method for transmitting and receiving synchronization signal block and apparatus therefor |
| CN110336655B (en) * | 2019-08-09 | 2022-01-28 | 北京紫光展锐通信技术有限公司 | SSB candidate position index indication and receiving method and device, storage medium, base station and user equipment |
| US11723047B2 (en) * | 2020-01-22 | 2023-08-08 | Samsung Electronics Co., Ltd. | Method and apparatus for PBCH payload in higher frequency ranges |
| CN113766648B (en) * | 2020-06-05 | 2023-06-23 | 大唐移动通信设备有限公司 | SSB transmission method, device and equipment |
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