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CN118117442A - Manufacturing method of VCSEL device and VCSEL device - Google Patents

Manufacturing method of VCSEL device and VCSEL device Download PDF

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CN118117442A
CN118117442A CN202410154528.8A CN202410154528A CN118117442A CN 118117442 A CN118117442 A CN 118117442A CN 202410154528 A CN202410154528 A CN 202410154528A CN 118117442 A CN118117442 A CN 118117442A
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CN118117442B (en
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祝进田
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Jiechuang Semiconductor Suzhou Co ltd
Jiangxi Jiechuang Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18386Details of the emission surface for influencing the near- or far-field, e.g. a grating on the surface
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/12Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
    • H01S5/125Distributed Bragg reflector [DBR] lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2054Methods of obtaining the confinement
    • H01S5/2077Methods of obtaining the confinement using lateral bandgap control during growth, e.g. selective growth, mask induced
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Electromagnetism (AREA)
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  • Semiconductor Lasers (AREA)

Abstract

本发明公开了一种VCSEL器件的制作方法及VCSEL器件,利用满足布拉格反射条件的氮气(氢气或空气)/InP周期结构作为适用于InP衬底的N型DBR结构,利用满足布拉格反射条件的具有不同折射率的介质膜周期结构作为P型DBR结构,同时利用隧道结(Tunnel Junction)制作VCSEL器件的P型电极和VCSEL器件的限流结构,使得批量生产长波长VCSEL器件成为可能。

The present invention discloses a method for manufacturing a VCSEL device and a VCSEL device. A nitrogen (hydrogen or air)/InP periodic structure satisfying the Bragg reflection condition is used as an N-type DBR structure suitable for an InP substrate, a dielectric film periodic structure satisfying the Bragg reflection condition and having different refractive indices is used as a P-type DBR structure, and a tunnel junction is used to manufacture the P-type electrode of the VCSEL device and the current limiting structure of the VCSEL device, thereby making it possible to mass-produce long-wavelength VCSEL devices.

Description

VCSEL器件的制作方法及VCSEL器件Method for manufacturing VCSEL device and VCSEL device

技术领域Technical Field

本发明属于半导体工艺技术领域,具体涉及一种VCSEL器件的制作方法及VCSEL器件。The present invention belongs to the technical field of semiconductor processes, and in particular relates to a method for manufacturing a VCSEL device and the VCSEL device.

背景技术Background technique

VCSEL(垂直腔面发射激光器)激光器具有阈值电流低、低能耗、圆形光斑、不必解理即可完成芯片制造和检测、易实现高密度二维阵列及光电集成等优点,在现代社会中得到许多应用。VCSEL (Vertical Cavity Surface Emitting Laser) lasers have many advantages in modern society, such as low threshold current, low energy consumption, circular spot, chip manufacturing and testing without cleavage, easy realization of high-density two-dimensional array and optoelectronic integration, etc.

目前在GaAs衬底上制作650nm-980nm波长的VCSEL芯片的技术非常成熟,并都已经产业化,但基于InP衬底的长波长VCSEL芯片却一直没有被产业化。原因在于,在InP衬底上生长的适于InP衬底晶格的材料光学折射率对比非常有限,不同材料的折射率差比较小。因而至今没有合适的InP基外延材料用于制备DBR结构,从而也没有成熟技术来制备InP衬底的长波长VCSEL芯片。At present, the technology for making 650nm-980nm wavelength VCSEL chips on GaAs substrates is very mature and has been industrialized, but long-wavelength VCSEL chips based on InP substrates have not been industrialized. The reason is that the optical refractive index contrast of materials suitable for InP substrate lattices grown on InP substrates is very limited, and the refractive index difference between different materials is relatively small. Therefore, there is no suitable InP-based epitaxial material for preparing DBR structures, and thus there is no mature technology to prepare long-wavelength VCSEL chips on InP substrates.

公开于该背景技术部分的信息仅仅旨在增加对本发明的总体背景的理解,而不应当被视为承认或以任何形式暗示该信息构成已为本领域一般技术人员所公知的现有技术。The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art.

发明内容Summary of the invention

本发明的目的在于提供一种VCSEL器件的制作方法及VCSEL器件,其能够制作基于InP衬底的长波长VCSEL器件,使批量生产长波长VCSEL器件成为可能。The object of the present invention is to provide a method for manufacturing a VCSEL device and a VCSEL device, which can manufacture a long-wavelength VCSEL device based on an InP substrate, making it possible to mass-produce long-wavelength VCSEL devices.

为了实现上述目的,本发明一具体实施例提供的了一种VCSEL器件的制作方法,包括:In order to achieve the above object, a specific embodiment of the present invention provides a method for manufacturing a VCSEL device, comprising:

提供InP衬底,所述InP衬底具有相对的第一表面和第二表面,所述第一表面具有第一外延区和第二外延区;Providing an InP substrate, the InP substrate having a first surface and a second surface opposite to each other, the first surface having a first epitaxial region and a second epitaxial region;

在第一表面上生长外延结构,所述外延结构包括依次生长的缓冲层、N型InGaAs/InP周期结构、谐振腔、P型重掺杂层以及N型重掺杂层;Growing an epitaxial structure on the first surface, the epitaxial structure comprising a buffer layer, an N-type InGaAs/InP periodic structure, a resonant cavity, a P-type heavily doped layer, and an N-type heavily doped layer grown in sequence;

刻蚀第二外延区内的外延结构至缓冲层以暴露部分所述缓冲层或刻蚀第二外延区内的外延结构至衬底以暴露部分所述衬底;Etching the epitaxial structure in the second epitaxial region to the buffer layer to expose a portion of the buffer layer or etching the epitaxial structure in the second epitaxial region to the substrate to expose a portion of the substrate;

腐蚀N型InGaAs/InP周期结构内的InGaAs层,以自第二外延区向第一外延区延伸方向去除部分InGaAs层,形成空腔;Etching the InGaAs layer in the N-type InGaAs/InP periodic structure to remove part of the InGaAs layer in the direction extending from the second epitaxial region to the first epitaxial region to form a cavity;

在第二外延区内生长绝缘外延材料,形成绝缘外延结构,以封堵InGaAs层内的空腔并支撑InP层;Growing an insulating epitaxial material in the second epitaxial region to form an insulating epitaxial structure to block the cavity in the InGaAs layer and support the InP layer;

去除部分N型重掺杂层以暴露出P型重掺杂层;removing a portion of the N-type heavily doped layer to expose the P-type heavily doped layer;

在所述P型重掺杂层被暴露的表面以及所述N型重掺杂层的部分表面形成P型电极;forming a P-type electrode on the exposed surface of the P-type heavily doped layer and a portion of the surface of the N-type heavily doped layer;

在所述P型电极、所述N型重掺杂层以及所述绝缘外延结构上形成P型DBR结构;forming a P-type DBR structure on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure;

刻蚀所述P型DBR结构以暴露出部分所述P型电极;Etching the P-type DBR structure to expose a portion of the P-type electrode;

在所述InP衬底的第二表面形成N型电极。An N-type electrode is formed on the second surface of the InP substrate.

在本发明的一个或多个实施例中,在保护气体环境下,在第二外延区内生长绝缘外延结构,以封堵InGaAs层内的空腔;In one or more embodiments of the present invention, an insulating epitaxial structure is grown in the second epitaxial region under a protective gas environment to block the cavity in the InGaAs layer;

其中,所述空腔内填充有所述保护气体,所述保护气体与InP层交替设置以形成N型DBR结构。The cavity is filled with the protective gas, and the protective gas and the InP layer are alternately arranged to form an N-type DBR structure.

在本发明的一个或多个实施例中,所述空腔的高度大致等于其所在的InGaAs层的厚度;所述空腔的面积不小于VCSEL器件的出光口的面积。In one or more embodiments of the present invention, the height of the cavity is substantially equal to the thickness of the InGaAs layer in which the cavity is located; and the area of the cavity is not less than the area of the light outlet of the VCSEL device.

在本发明的一个或多个实施例中,所述保护气体选自氮气或氢气。In one or more embodiments of the present invention, the protective gas is selected from nitrogen or hydrogen.

在本发明的一个或多个实施例中,所述保护气体选自空气。In one or more embodiments of the present invention, the protective gas is selected from air.

在本发明的一个或多个实施例中,所述绝缘外延结构生长至与所述外延结构齐平。In one or more embodiments of the present invention, the insulating epitaxial structure grows to be flush with the epitaxial structure.

在本发明的一个或多个实施例中,所述绝缘外延结构的材料为含Fe的InP材料。In one or more embodiments of the present invention, the material of the insulating epitaxial structure is an InP material containing Fe.

在本发明的一个或多个实施例中,采用H2SO4:H2O2:H2O溶液化学腐蚀N型InGaAs/InP周期结构内的InGaAs层。In one or more embodiments of the present invention, an H 2 SO 4 :H 2 O 2 :H 2 O solution is used to chemically etch the InGaAs layer in the N-type InGaAs/InP periodic structure.

在本发明的一个或多个实施例中,所述外延结构、所述绝缘外延结构通过金属有机化学气相沉积外延或同质外延生长。In one or more embodiments of the present invention, the epitaxial structure and the insulating epitaxial structure are grown by metal organic chemical vapor deposition epitaxy or homoepitaxial growth.

在本发明的一个或多个实施例中,在所述P型电极、所述N型重掺杂层以及所述绝缘外延结构上形成P型DBR结构,包括:In one or more embodiments of the present invention, forming a P-type DBR structure on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure includes:

在所述P型电极、所述N型重掺杂层以及所述绝缘外延结构上交替镀具有第一折射率的第一介质膜层和具有第二折射率的第二介质膜层,其中,第一折射率不等于第二折射率。A first dielectric film layer having a first refractive index and a second dielectric film layer having a second refractive index are alternately plated on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure, wherein the first refractive index is not equal to the second refractive index.

本发明一具体实施例还提供的了一种VCSEL器件,包括:A specific embodiment of the present invention also provides a VCSEL device, including:

InP衬底,具有相对的第一表面和第二表面,所述第一表面具有第一外延区和第二外延区;An InP substrate having a first surface and a second surface opposite to each other, wherein the first surface has a first epitaxial region and a second epitaxial region;

N型DBR结构,形成于所述第一外延区上,所述N型DBR结构包括依次交替设置的InGaAs层和InP层,所述InGaAs层内形成有空腔,所述空腔内填充有保护气体;An N-type DBR structure is formed on the first epitaxial region, wherein the N-type DBR structure comprises an InGaAs layer and an InP layer which are alternately arranged in sequence, a cavity is formed in the InGaAs layer, and the cavity is filled with a protective gas;

谐振腔,形成于所述N型DBR结构上;A resonant cavity formed on the N-type DBR structure;

隧道结,形成于所述谐振腔上,所述隧道结包括依次形成的P型重掺杂层和N型重掺杂层,所述N型重掺杂层暴露出部分所述P型重掺杂层;A tunnel junction is formed on the resonant cavity, wherein the tunnel junction includes a P-type heavily doped layer and an N-type heavily doped layer formed in sequence, and the N-type heavily doped layer exposes a portion of the P-type heavily doped layer;

P型电极,形成于所述P型重掺杂层表面并延伸至所述N型重掺杂层表面;A P-type electrode formed on the surface of the P-type heavily doped layer and extending to the surface of the N-type heavily doped layer;

绝缘外延结构,形成于所述第一表面的第二外延区上;an insulating epitaxial structure formed on the second epitaxial region of the first surface;

P型DBR结构,形成于所述隧道结、部分所述P型电极以及所述绝缘外延结构上;以及,A P-type DBR structure is formed on the tunnel junction, a portion of the P-type electrode and the insulating epitaxial structure; and,

N型电极,形成于所述InP衬底的第二表面。An N-type electrode is formed on the second surface of the InP substrate.

在本发明的一个或多个实施例中,所述VCSEL器件还包括缓冲层,所述缓冲层形成于所述InP衬底的第一表面上。In one or more embodiments of the present invention, the VCSEL device further includes a buffer layer formed on the first surface of the InP substrate.

在本发明的一个或多个实施例中,所述VCSEL器件还包括缓冲层,所述缓冲层形成于所述InP衬底的第一表面的第一外延区上。In one or more embodiments of the present invention, the VCSEL device further includes a buffer layer formed on the first epitaxial region of the first surface of the InP substrate.

在本发明的一个或多个实施例中,所述绝缘外延结构贴合所述N型DBR结构设置以封堵所述InGaAs层内的空腔。In one or more embodiments of the present invention, the insulating epitaxial structure is arranged in contact with the N-type DBR structure to block the cavity in the InGaAs layer.

在本发明的一个或多个实施例中,所述N型DBR结构、所述谐振腔以及所述隧道结的厚度之和等于所述绝缘外延结构的厚度。In one or more embodiments of the present invention, the sum of the thicknesses of the N-type DBR structure, the resonant cavity, and the tunnel junction is equal to the thickness of the insulating epitaxial structure.

在本发明的一个或多个实施例中,所述绝缘外延结构的材料为含Fe的InP材料。In one or more embodiments of the present invention, the material of the insulating epitaxial structure is an InP material containing Fe.

在本发明的一个或多个实施例中,所述空腔的高度大致等于其所在的InGaAs层的厚度;所述空腔的面积不小于VCSEL器件的出光口的面积。In one or more embodiments of the present invention, the height of the cavity is substantially equal to the thickness of the InGaAs layer in which the cavity is located; and the area of the cavity is not less than the area of the light outlet of the VCSEL device.

在本发明的一个或多个实施例中,所述保护气体选自氮气或氢气。In one or more embodiments of the present invention, the protective gas is selected from nitrogen or hydrogen.

在本发明的一个或多个实施例中,所述保护气体选自空气。In one or more embodiments of the present invention, the protective gas is selected from air.

在本发明的一个或多个实施例中,所述谐振腔包括依次形成的N型InP层,N型分别限制层、有源区、P型分别限制层以及P型InP层。In one or more embodiments of the present invention, the resonant cavity includes an N-type InP layer, an N-type separation confinement layer, an active region, a P-type separation confinement layer, and a P-type InP layer, which are formed in sequence.

在本发明的一个或多个实施例中,所述P型DBR结构包括依次交替设置的具有第一折射率的第一介质膜层和具有第二折射率的第二介质膜层,其中,第一折射率不等于第二折射率。In one or more embodiments of the present invention, the P-type DBR structure includes a first dielectric film layer having a first refractive index and a second dielectric film layer having a second refractive index which are alternately arranged in sequence, wherein the first refractive index is not equal to the second refractive index.

与现有技术相比,本发明的VCSEL器件的制作方法及VCSEL器件,利用满足布拉格反射条件的氮气(氢气或空气)/InP周期结构作为适用于InP衬底的N型DBR结构,为制作长波长的VCSEL器件提供了新的思路。此N型DBR结构对VCSEL器件波长光的反射率大于99.9%,且InP层和氮气(氢气或空气)的折射率差是固定的,容易控制。Compared with the prior art, the VCSEL device manufacturing method and VCSEL device of the present invention use the nitrogen (hydrogen or air)/InP periodic structure that meets the Bragg reflection condition as the N-type DBR structure suitable for the InP substrate, providing a new idea for manufacturing long-wavelength VCSEL devices. The reflectivity of the N-type DBR structure to the wavelength light of the VCSEL device is greater than 99.9%, and the refractive index difference between the InP layer and the nitrogen (hydrogen or air) is fixed and easy to control.

本发明的VCSEL器件的制作方法及VCSEL器件,利用隧道结(Tunnel Junction)制作VCSEL器件的P型电极,工艺上更为简单方便且效率更高。且P型电极的金属材料(GeAu/Ni/Au)与P型重掺杂层之间形成的肖特基结构还能对注入VCSEL器件的电流进行限制注入,可以作为VCSEL器件的限流结构,具有限流的效果。The manufacturing method and VCSEL device of the present invention use a tunnel junction to manufacture the P-type electrode of the VCSEL device, which is simpler, more convenient and more efficient in terms of process. In addition, the Schottky structure formed between the metal material (GeAu/Ni/Au) of the P-type electrode and the P-type heavily doped layer can also limit the injection of the current injected into the VCSEL device, and can be used as a current limiting structure of the VCSEL device, having a current limiting effect.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍。显而易见地,下面描述中的附图仅仅是本发明中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

图1为本发明一实施例中VCSEL器件的结构示意图;FIG1 is a schematic diagram of the structure of a VCSEL device in one embodiment of the present invention;

图2为本发明一实施例中VCSEL器件的制作方法的工艺流程图;FIG2 is a process flow chart of a method for manufacturing a VCSEL device in one embodiment of the present invention;

图3a-图3h为本发明一实施例中VCSEL器件的制作方法的工艺步骤示意图。3a to 3h are schematic diagrams of process steps of a method for manufacturing a VCSEL device in one embodiment of the present invention.

具体实施方式Detailed ways

为了使本技术领域的人员更好地理解本发明中的技术方案,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都应当属于本发明保护的范围。In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

如背景技术所言,VCSEL激光器具有阈值电流低、低能耗、圆形光斑、不必解理即可完成芯片制造和检测、易实现高密度二维阵列及光电集成等优点,在现代社会中得到许多应用。目前在GaAs衬底上制作650nm-980nm波长的VCSEL芯片的技术非常成熟,并都已经产业化,但基于InP衬底的长波长VCSEL芯片却一直没有被产业化。原因在于,在InP衬底上生长的适于InP衬底晶格的材料光学折射率对比非常有限,不同材料的折射率差比较小。因而至今没有合适的InP基外延材料用于制备DBR结构,从而也没有成熟技术来制备InP衬底的长波长VCSEL芯片。As mentioned in the background technology, VCSEL lasers have the advantages of low threshold current, low energy consumption, circular spot, chip manufacturing and detection can be completed without cleavage, and high-density two-dimensional array and optoelectronic integration are easy to achieve, and are widely used in modern society. At present, the technology of making 650nm-980nm wavelength VCSEL chips on GaAs substrates is very mature and has been industrialized, but long-wavelength VCSEL chips based on InP substrates have not been industrialized. The reason is that the optical refractive index comparison of materials suitable for InP substrate lattices grown on InP substrates is very limited, and the refractive index difference of different materials is relatively small. Therefore, there is no suitable InP-based epitaxial material for preparing DBR structure, and thus there is no mature technology to prepare long-wavelength VCSEL chips on InP substrates.

基于此,本申请提出了一种新的制作长波长VCSEL器件的工艺路线以及长波长VCSEL器件,利用满足布拉格反射条件的氮气(氢气或空气)/InP周期结构作为适用于InP衬底的N型DBR结构,利用满足布拉格反射条件的具有不同折射率的介质膜周期结构作为P型DBR结构,同时利用隧道结(Tunnel Junction)制作VCSEL器件的P型电极和VCSEL器件的限流结构,使得批量生产长波长VCSEL器件成为可能。Based on this, the present application proposes a new process route for manufacturing long-wavelength VCSEL devices and long-wavelength VCSEL devices, using a nitrogen (hydrogen or air)/InP periodic structure that meets the Bragg reflection condition as an N-type DBR structure suitable for an InP substrate, and using a dielectric film periodic structure with different refractive indices that meets the Bragg reflection condition as a P-type DBR structure, while using a tunnel junction to manufacture the P-type electrode of the VCSEL device and the current limiting structure of the VCSEL device, thereby making it possible to mass-produce long-wavelength VCSEL devices.

如图1所示,本发明一实施例中的VCSEL器件,包括:InP衬底10,缓冲层11,N型DBR结构20,谐振腔30,隧道结40,P型电极50,绝缘外延结构60,P型DBR结构70以及N型电极80。As shown in FIG. 1 , a VCSEL device in an embodiment of the present invention includes: an InP substrate 10 , a buffer layer 11 , an N-type DBR structure 20 , a resonant cavity 30 , a tunnel junction 40 , a P-type electrode 50 , an insulating epitaxial structure 60 , a P-type DBR structure 70 and an N-type electrode 80 .

InP衬底10为N型掺杂衬底,InP衬底10具有相对的第一表面和第二表面,第一表面具有第一外延区101和第二外延区102。The InP substrate 10 is an N-type doped substrate. The InP substrate 10 has a first surface and a second surface opposite to each other. The first surface has a first epitaxial region 101 and a second epitaxial region 102 .

缓冲层11为N型InP缓冲层,缓冲层11形成于InP衬底10的整个第一表面上;或者,缓冲层11形成于InP衬底10的第一表面的第一外延区101上。The buffer layer 11 is an N-type InP buffer layer, and the buffer layer 11 is formed on the entire first surface of the InP substrate 10 ; or, the buffer layer 11 is formed on the first epitaxial region 101 of the first surface of the InP substrate 10 .

N型DBR结构20形成于第一外延区101和/或第二外延区102内的缓冲层11上。N型DBR结构20包括依次交替设置的InGaAs层20a和InP层20b。InGaAs层20a会部分被化学腐蚀掉,形成空腔21,空腔21内填充有保护气体。InP层20b和保护气体的厚度满足布拉格反射条件,此N型DBR结构20对器件波长光的反射率大于99.9%。The N-type DBR structure 20 is formed on the buffer layer 11 in the first epitaxial region 101 and/or the second epitaxial region 102. The N-type DBR structure 20 includes an InGaAs layer 20a and an InP layer 20b which are alternately arranged in sequence. The InGaAs layer 20a is partially chemically etched away to form a cavity 21, and the cavity 21 is filled with a protective gas. The thickness of the InP layer 20b and the protective gas meets the Bragg reflection condition, and the reflectivity of the N-type DBR structure 20 to the device wavelength light is greater than 99.9%.

在本实施例中,空腔21可以通过如下方式形成:首先,N型DBR结构20,谐振腔30和隧道结40均依次生长在缓冲层11上;随后,第二外延区102上的缓冲层11以上的外延结构(N型DBR结构20,谐振腔30和隧道结40)会利用光刻、ICP或RIE工艺刻蚀掉;最后,利用化学腐蚀方法把第一外延区101上部的InGaAs层20a部分去掉,最终形成空腔21。空腔21位于InGaAs层20a靠近第二外延区102的一侧,空腔21的高度大致等于其所在的InGaAs层20a的厚度,空腔21的面积不小于VCSEL器件的出光口的面积。In this embodiment, the cavity 21 can be formed in the following manner: first, the N-type DBR structure 20, the resonant cavity 30 and the tunnel junction 40 are all grown on the buffer layer 11 in sequence; then, the epitaxial structure (N-type DBR structure 20, the resonant cavity 30 and the tunnel junction 40) above the buffer layer 11 on the second epitaxial region 102 is etched away by photolithography, ICP or RIE process; finally, the InGaAs layer 20a on the upper part of the first epitaxial region 101 is partially removed by chemical etching method, and finally the cavity 21 is formed. The cavity 21 is located on the side of the InGaAs layer 20a close to the second epitaxial region 102, the height of the cavity 21 is approximately equal to the thickness of the InGaAs layer 20a where it is located, and the area of the cavity 21 is not less than the area of the light outlet of the VCSEL device.

在本实施例中,空腔21内的保护气体选自氮气、氢气或者空气。In this embodiment, the protective gas in the cavity 21 is selected from nitrogen, hydrogen or air.

谐振腔30形成于N型DBR结构20上。谐振腔30包括依次形成的N型InP层31,N型分别限制层32、有源区33、P型分别限制层34以及P型InP层35。其中,有源区33采用InGaAsP/InGaAsP应变量子阱结构。The resonant cavity 30 is formed on the N-type DBR structure 20. The resonant cavity 30 includes an N-type InP layer 31, an N-type separation confinement layer 32, an active region 33, a P-type separation confinement layer 34 and a P-type InP layer 35, which are formed in sequence. Among them, the active region 33 adopts an InGaAsP/InGaAsP strained quantum well structure.

隧道结40形成于谐振腔30上,隧道结40包括依次形成的P型重掺杂层41和N型重掺杂层42,利用光刻工艺、ICP或RIE工艺,去除部分N型重掺杂层42,以暴露出部分P型重掺杂层41。The tunnel junction 40 is formed on the resonant cavity 30 , and the tunnel junction 40 includes a P-type heavily doped layer 41 and an N-type heavily doped layer 42 formed in sequence. A portion of the N-type heavily doped layer 42 is removed by photolithography, ICP or RIE to expose a portion of the P-type heavily doped layer 41 .

在本实施例中,P型重掺杂层41的掺杂浓度大于1E19/cm3;N型重掺杂层42的掺杂浓度大于1E19/cm3。N型重掺杂层42的厚度为纳米量级。In this embodiment, the doping concentration of the P-type heavily doped layer 41 is greater than 1E19/cm 3 , and the doping concentration of the N-type heavily doped layer 42 is greater than 1E19/cm 3 . The thickness of the N-type heavily doped layer 42 is in the nanometer order.

P型电极50形成于P型重掺杂层41被暴露的表面并延伸至N型重掺杂层42表面。The P-type electrode 50 is formed on the exposed surface of the P-type heavily doped layer 41 and extends to the surface of the N-type heavily doped layer 42 .

这里制作电极的金属(GeAu/Ni/Au)与N型重掺杂层42接触形成欧姆接触,金属与暴露出的部分P型重掺杂层41接触形成肖特基结构。施加到VCSEL器件上的电流只流过N型重掺杂层42,而不能流过暴露出的部分P型重掺杂层41,这里形成的肖特基结构起到对注入电流的限制作用,从而降低VCSEL器件的阈值电流。The metal (GeAu/Ni/Au) used to make the electrode here contacts the N-type heavily doped layer 42 to form an ohmic contact, and the metal contacts the exposed portion of the P-type heavily doped layer 41 to form a Schottky structure. The current applied to the VCSEL device only flows through the N-type heavily doped layer 42, and cannot flow through the exposed portion of the P-type heavily doped layer 41. The Schottky structure formed here plays a role in limiting the injected current, thereby reducing the threshold current of the VCSEL device.

绝缘外延结构60形成于第一表面的第二外延区102上。绝缘外延结构60贴合N型DBR结构20设置以封堵InGaAs层20a内的空腔,同时支撑体整个VCSEL器件。N型DBR结构20、谐振腔30以及隧道结40的厚度之和等于绝缘外延结构60的厚度。The insulating epitaxial structure 60 is formed on the second epitaxial region 102 of the first surface. The insulating epitaxial structure 60 is arranged in contact with the N-type DBR structure 20 to block the cavity in the InGaAs layer 20a and support the entire VCSEL device. The sum of the thickness of the N-type DBR structure 20, the resonant cavity 30 and the tunnel junction 40 is equal to the thickness of the insulating epitaxial structure 60.

在本实施例中,绝缘外延结构60的材料为含Fe的InP材料。In this embodiment, the material of the insulating epitaxial structure 60 is an InP material containing Fe.

P型DBR结构70形成于隧道结40、部分P型电极50以及绝缘外延结构60上。P型DBR结构70包括依次交替设置的具有第一折射率的第一介质膜层70a和具有第二折射率的第二介质膜层70b,其中,第一折射率不等于第二折射率,且第一折射率和第二折射率之间具有一定的差值。高折射率和低折射率介质膜的厚度满足布拉格反射条件,对器件波长光的反射率达到90%以上。The P-type DBR structure 70 is formed on the tunnel junction 40, a portion of the P-type electrode 50 and the insulating epitaxial structure 60. The P-type DBR structure 70 includes a first dielectric film layer 70a having a first refractive index and a second dielectric film layer 70b having a second refractive index, which are alternately arranged in sequence, wherein the first refractive index is not equal to the second refractive index, and there is a certain difference between the first refractive index and the second refractive index. The thickness of the high refractive index and low refractive index dielectric films meets the Bragg reflection condition, and the reflectivity of the device wavelength light reaches more than 90%.

N型电极80形成于InP衬底10的第二表面上。The N-type electrode 80 is formed on the second surface of the InP substrate 10 .

参考图2、图3a-图3h所示,本发明一实施例还提供了一种VCSEL器件的制作方法,具体包括如下步骤:Referring to FIG. 2 and FIG. 3a to FIG. 3h , an embodiment of the present invention further provides a method for manufacturing a VCSEL device, which specifically includes the following steps:

S1,提供InP衬底,在InP衬底上生长外延结构。S1, providing an InP substrate, and growing an epitaxial structure on the InP substrate.

参考图3a所示,InP衬底10为N型掺杂衬底,InP衬底10具有相对的第一表面和第二表面,第一表面具有第一外延区101和第二外延区102。As shown in FIG. 3 a , the InP substrate 10 is an N-type doped substrate. The InP substrate 10 has a first surface and a second surface opposite to each other. The first surface has a first epitaxial region 101 and a second epitaxial region 102 .

在InP衬底10的整个第一表面上生长外延结构,具体包括:利用金属有机化学气相沉积(MOCVD)外延或同质外延生长技术,首先在InP衬底10上生长N型InP缓冲层11、N型掺杂的InGaAs/InP周期结构、谐振腔30、P型重掺杂层41以及N型重掺杂层42。An epitaxial structure is grown on the entire first surface of the InP substrate 10, specifically including: using metal organic chemical vapor deposition (MOCVD) epitaxial or homoepitaxial growth technology, first growing an N-type InP buffer layer 11, an N-type doped InGaAs/InP periodic structure, a resonant cavity 30, a P-type heavily doped layer 41 and an N-type heavily doped layer 42 on the InP substrate 10.

S2,刻蚀第二外延区内的外延结构至缓冲层以暴露部分缓冲层;或,刻蚀第二外延区内的外延结构至衬底以暴露部分衬底。S2, etching the epitaxial structure in the second epitaxial region to the buffer layer to expose a portion of the buffer layer; or, etching the epitaxial structure in the second epitaxial region to the substrate to expose a portion of the substrate.

在本实施例中,以刻蚀至衬底10为例进行详细说明。In this embodiment, etching to the substrate 10 is taken as an example for detailed description.

参考图3b所示,外延结构的表面通过黄光工艺、ICP刻蚀技术进行刻蚀,暴露出第二外延区102的衬底10。Referring to FIG. 3 b , the surface of the epitaxial structure is etched by a yellow light process and an ICP etching technique to expose the substrate 10 of the second epitaxial region 102 .

可以理解的是,黄光工艺是在半导体行业里,将硅片等晶片进行涂胶、软烘、曝光、显影、硬烤,使其光刻出一定图形的工艺。It can be understood that the yellow light process is a process in the semiconductor industry that involves coating silicon wafers and other chips with glue, soft baking, exposure, development, and hard baking to make them photoetch a certain pattern.

S3,腐蚀N型掺杂的InGaAs/InP周期结构内的InGaAs层,形成空腔。S3, corroding the InGaAs layer in the N-type doped InGaAs/InP periodic structure to form a cavity.

参考图3c所示,采用H2SO4:H2O2:H2O溶液化学腐蚀N型掺杂的InGaAs/InP周期结构内的InGaAs层20a,以自第二外延区102向第一外延区101延伸方向去除部分InGaAs层20a,形成空腔21。空腔21的高度大致等于其所在的InGaAs层20a的厚度。空腔21的面积不小于VCSEL器件的出光口的面积。As shown in FIG3c , the InGaAs layer 20a in the N-type doped InGaAs/InP periodic structure is chemically etched using a H2SO4 : H2O2 : H2O solution to remove part of the InGaAs layer 20a extending from the second epitaxial region 102 to the first epitaxial region 101, thereby forming a cavity 21. The height of the cavity 21 is substantially equal to the thickness of the InGaAs layer 20a in which it is located. The area of the cavity 21 is not less than the area of the light outlet of the VCSEL device.

S4,在第二外延区内生长绝缘外延结构,以封堵InGaAs层内的空腔。S4, growing an insulating epitaxial structure in the second epitaxial region to seal the cavity in the InGaAs layer.

参考图3d所示,在保护气体环境下,在第二外延区102内采用MOCVD方式生长绝缘外延结构60,以封堵InGaAs层20a内的空腔21,并对掏空处的InP层起到支撑作用。绝缘外延结构60生长至与外延结构齐平。其中,InGaAs层20a内的空腔21在MOCVD生长过程中回填了保护气体,保护气体与InP层20b交替设置以形成N型DBR结构20。保护气体选自氮气或氢气或空气。As shown in FIG. 3d, in a protective gas environment, an insulating epitaxial structure 60 is grown in the second epitaxial region 102 by MOCVD to block the cavity 21 in the InGaAs layer 20a and support the InP layer at the hollowed-out position. The insulating epitaxial structure 60 grows to be flush with the epitaxial structure. The cavity 21 in the InGaAs layer 20a is backfilled with protective gas during the MOCVD growth process, and the protective gas and the InP layer 20b are alternately arranged to form an N-type DBR structure 20. The protective gas is selected from nitrogen, hydrogen or air.

在本实施例中,组成N型DBR结构20的InP层20b和氮气(氢气或空气)具有较大的折射率差,且两者的折射率差是固定的,容易控制。此N型DBR结构对VCSEL器件波长光的反射率大于99.9%In this embodiment, the InP layer 20b and nitrogen (hydrogen or air) constituting the N-type DBR structure 20 have a large refractive index difference, and the refractive index difference between the two is fixed and easy to control. The reflectivity of this N-type DBR structure to the wavelength light of the VCSEL device is greater than 99.9%.

在一优选实施例中,绝缘外延结构60的材料为含Fe的InP材料。In a preferred embodiment, the material of the insulating epitaxial structure 60 is an InP material containing Fe.

S5,去除部分N型重掺杂层以暴露出P型重掺杂层。S5, removing a portion of the N-type heavily doped layer to expose the P-type heavily doped layer.

参考图3e所示,利用黄光工艺和ICP刻蚀工艺去除部分N型重掺杂层42,暴露出P型重掺杂层41。3 e , a portion of the N-type heavily doped layer 42 is removed by using a yellow light process and an ICP etching process to expose the P-type heavily doped layer 41 .

S6,在P型重掺杂层被暴露的表面以及N型重掺杂层的部分表面形成P型电极。S6, forming a P-type electrode on the exposed surface of the P-type heavily doped layer and a portion of the surface of the N-type heavily doped layer.

参考图3f所示,在P型重掺杂层41被暴露的表面以及N型重掺杂层42的部分表面利用黄光工艺、Ebeam金属蒸镀工艺制备P型电极50。3 f , a P-type electrode 50 is prepared on the exposed surface of the P-type heavily doped layer 41 and a portion of the surface of the N-type heavily doped layer 42 by using a yellow light process and an Ebeam metal evaporation process.

S7,在P型电极、N型重掺杂层以及绝缘外延结构上形成P型DBR结构。S7, forming a P-type DBR structure on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure.

参考图3g所示,利用AR镀膜设备在P型电极50、N型重掺杂层42以及绝缘外延结构60上交替镀具有第一折射率的第一介质膜层70a和具有第二折射率的第二介质膜层70b,其中,第一折射率高于第二折射率其第一折射率和第二折射率之间具有一定的差值。高折射率和低折射率介质膜的厚度满足布拉格反射条件,对器件波长光的反射率达到90%以上。As shown in FIG3g, a first dielectric film layer 70a having a first refractive index and a second dielectric film layer 70b having a second refractive index are alternately plated on the P-type electrode 50, the N-type heavily doped layer 42 and the insulating epitaxial structure 60 using an AR coating device, wherein the first refractive index is higher than the second refractive index and there is a certain difference between the first refractive index and the second refractive index. The thickness of the high refractive index and low refractive index dielectric films meets the Bragg reflection condition, and the reflectivity of the device wavelength light reaches more than 90%.

S8,刻蚀P型DBR结构以暴露出部分P型电极。S8, etching the P-type DBR structure to expose a portion of the P-type electrode.

参考图3h所示,利用黄光工艺和ICP刻蚀工艺,把部分P型电极50表面的介质膜刻蚀掉,暴露部分P型电极50。其中,P型电极50被暴露的部分的垂直投影与P型重掺杂层41被暴露的区域完全重合。3h, the dielectric film on the surface of a portion of the P-type electrode 50 is etched away by using the yellow light process and the ICP etching process to expose a portion of the P-type electrode 50. The vertical projection of the exposed portion of the P-type electrode 50 completely overlaps with the exposed region of the P-type heavily doped layer 41.

S9,在InP衬底的第二表面形成N型电极。S9, forming an N-type electrode on the second surface of the InP substrate.

参考图1所示,利用上蜡、减薄、抛光工艺,把InP衬底10减薄到100um-150um,再利用Ebeam金属蒸镀工艺在InP衬底10的第二表面制作N型电极80。Referring to FIG. 1 , the InP substrate 10 is thinned to 100 um-150 um by waxing, thinning and polishing processes, and then an N-type electrode 80 is fabricated on the second surface of the InP substrate 10 by an Ebeam metal evaporation process.

与现有技术相比,本发明的VCSEL器件的制作方法及VCSEL器件,利用满足布拉格反射条件的氮气(氢气或空气)/InP周期结构作为适用于InP衬底的N型DBR结构,为制作长波长的VCSEL器件提供了新的思路。此N型DBR结构对VCSEL器件波长光的反射率大于99.9%,且InP层和氮气(氢气或空气)的折射率差是固定的,容易控制。Compared with the prior art, the method for manufacturing a VCSEL device and the VCSEL device of the present invention use a nitrogen (hydrogen or air)/InP periodic structure that meets the Bragg reflection condition as an N-type DBR structure suitable for an InP substrate, providing a new idea for manufacturing a long-wavelength VCSEL device. The reflectivity of the N-type DBR structure to the wavelength light of the VCSEL device is greater than 99.9%, and the refractive index difference between the InP layer and the nitrogen (hydrogen or air) is fixed and easy to control.

本发明的VCSEL器件的制作方法及VCSEL器件,利用隧道结(Tunnel Junction)制作VCSEL器件的P型电极,工艺上更为简单方便且效率更高。且P型电极的金属材料(GeAu/Ni/Au)与P型重掺杂层之间形成的肖特基结构还能对注入VCSEL器件的电流进行限制注入,可以作为VCSEL器件的限流结构,具有限流的效果。The manufacturing method and VCSEL device of the present invention use a tunnel junction to manufacture the P-type electrode of the VCSEL device, which is simpler, more convenient and more efficient in terms of process. In addition, the Schottky structure formed between the metal material (GeAu/Ni/Au) of the P-type electrode and the P-type heavily doped layer can also limit the injection of the current injected into the VCSEL device, and can be used as a current limiting structure of the VCSEL device, having a current limiting effect.

对于本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

此外,应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施例中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims (11)

1. A method of fabricating a VCSEL device, comprising:
providing an InP substrate having opposed first and second surfaces, the first surface having first and second epitaxial regions;
growing an epitaxial structure on the first surface, wherein the epitaxial structure comprises a buffer layer, an N-type InGaAs/InP periodic structure, a resonant cavity, a P-type heavily doped layer and an N-type heavily doped layer which are sequentially grown;
Etching the epitaxial structure in the second epitaxial region to the buffer layer to expose a portion of the buffer layer or etching the epitaxial structure in the second epitaxial region to the substrate to expose a portion of the substrate;
Etching the InGaAs layer in the N-type InGaAs/InP periodic structure to remove part of the InGaAs layer from the second epitaxial region to the extending direction of the first epitaxial region so as to form a cavity;
growing an insulating epitaxial material in the second epitaxial region to form an insulating epitaxial structure so as to block the cavity in the InGaAs layer and support the InP layer;
Removing part of the N-type heavily doped layer to expose the P-type heavily doped layer;
Forming a P-type electrode on the exposed surface of the P-type heavily doped layer and part of the surface of the N-type heavily doped layer;
Forming a P-type DBR structure on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure;
Etching the P-type DBR structure to expose a portion of the P-type electrode;
and forming an N-type electrode on the second surface of the InP substrate.
2. The method of fabricating a VCSEL device as claimed in claim 1, wherein an insulating epitaxial structure is grown in the second epitaxial region in a protective gas atmosphere to block cavities in the InGaAs layer;
the cavity is filled with the protective gas, and the protective gas and the InP layer are alternately arranged to form an N-type DBR structure.
3. The method of fabricating a VCSEL device as claimed in claim 2, wherein the shielding gas is selected from nitrogen or hydrogen; or alternatively
The shielding gas is selected from air.
4. The method of fabricating a VCSEL device as claimed in claim 1, wherein the insulating epitaxial structure is grown to be level with the epitaxial structure; and/or the number of the groups of groups,
The material of the insulating epitaxial structure is an InP material containing Fe.
5. The method of fabricating a VCSEL device as claimed in claim 1, wherein the InGaAs layer in the N-type InGaAs/InP periodic structure is chemically etched using a solution of H 2SO4:H2O2:H2 O; and/or the number of the groups of groups,
The epitaxial structure and the insulating epitaxial structure are grown by metal organic chemical vapor deposition epitaxy or homoepitaxy.
6. The method of fabricating a VCSEL device as claimed in claim 1, wherein forming a P-type DBR structure on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure comprises:
And alternately plating a first dielectric film layer with a first refractive index and a second dielectric film layer with a second refractive index on the P-type electrode, the N-type heavily doped layer and the insulating epitaxial structure, wherein the first refractive index is not equal to the second refractive index.
7. A VCSEL device, comprising:
an InP substrate having opposed first and second surfaces, the first surface having first and second epitaxial regions;
the N-type DBR structure is formed on the first epitaxial region and comprises InGaAs layers and InP layers which are sequentially and alternately arranged, a cavity is formed in the InGaAs layers, and protective gas is filled in the cavity;
The resonant cavity is formed on the N-type DBR structure;
The tunnel junction is formed on the resonant cavity and comprises a P-type heavily doped layer and an N-type heavily doped layer which are formed in sequence, and part of the P-type heavily doped layer is exposed out of the N-type heavily doped layer;
The P-type electrode is formed on the surface of the P-type heavily doped layer and extends to the surface of the N-type heavily doped layer;
an insulating epitaxial structure formed on the second epitaxial region of the first surface;
the P-type DBR structure is formed on the tunnel junction, part of the P-type electrode and the insulating epitaxial structure; and
And the N-type electrode is formed on the second surface of the InP substrate.
8. The VCSEL device as claimed in claim 7, further comprising a buffer layer formed on the first surface of the InP substrate; or alternatively
The InP substrate further comprises a buffer layer which is formed on the first epitaxial region of the first surface of the InP substrate.
9. The VCSEL device as claimed in claim 7, wherein the insulating epitaxial structure is arranged to follow the N-type DBR structure to block cavities in the InGaAs layer; and/or the number of the groups of groups,
The sum of the thicknesses of the N-type DBR structure, the resonant cavity and the tunnel junction is equal to the thickness of the insulating epitaxial structure; and/or the number of the groups of groups,
The material of the insulating epitaxial structure is an InP material containing Fe.
10. The VCSEL device as claimed in claim 7, wherein the shielding gas is selected from nitrogen or hydrogen; or alternatively
The shielding gas is selected from air.
11. The VCSEL device as claimed in claim 7, wherein the resonator cavity comprises an N-type InP layer, an N-type respective confinement layer, an active region, a P-type respective confinement layer and a P-type InP layer formed in sequence; and/or the number of the groups of groups,
The P-type DBR structure comprises a first dielectric film layer with a first refractive index and a second dielectric film layer with a second refractive index which are sequentially and alternately arranged, wherein the first refractive index is not equal to the second refractive index.
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