CN118100916A - Equivalent sampling circuit, device and equivalent sampling method - Google Patents
Equivalent sampling circuit, device and equivalent sampling method Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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Abstract
The application provides an equivalent sampling circuit, an equivalent sampling device and an equivalent sampling method, and relates to the field of circuits. The equivalent sampling circuit includes: the device comprises a phase frequency detector, a voltage controlled oscillator, a first frequency divider, a second frequency divider and a sampling unit; the phase frequency detector is used for acquiring a reference signal and a first frequency-dividing signal, and comparing the respective frequencies and phases of the first frequency-dividing signal and the reference signal to obtain a frequency difference value and a phase difference value of the first frequency-dividing signal and the reference signal; a voltage-controlled oscillator for generating a second oscillation signal based on the frequency difference and the phase difference; the second frequency divider is used for carrying out integer frequency division on the second oscillating signal by utilizing an integer frequency division coefficient to generate a second frequency division signal; and the sampling unit is used for equivalently sampling the signal to be detected based on the second frequency division signal. The equivalent sampling circuit can greatly improve the time delay stepping of the second frequency division signal, does not increase the circuit cost, and ensures the sampling accuracy.
Description
Technical Field
The application relates to the field of circuits, in particular to an equivalent sampling circuit, an equivalent sampling device and an equivalent sampling method.
Background
Equivalent sampling is a technique that reconstructs the waveform of an original signal by sampling and recombining a signal multiple times, and is centered on how to generate a sampling pulse having a stable step size with respect to the original signal.
In the related art, the pulse is mainly generated by a delay chip, but the delay chip is formed by connecting independent delay circuits in series, and the delay stepping value of the sampling pulse is mainly determined by the number of the delay circuits. If the delay step value of the sampling pulse is to be improved, the number of delay circuits is generally required to be increased, which leads to the increase of the circuit cost and the volume of the delay chip, and on the other hand, the mode cannot meet the requirement of greatly improving the delay step value of the sampling pulse.
Disclosure of Invention
In view of the above, the embodiment of the application provides an equivalent sampling circuit, an equivalent sampling device and an equivalent sampling method.
In a first aspect, an embodiment of the present application provides an equivalent sampling circuit, including: the device comprises a phase frequency detector, a voltage controlled oscillator, a first frequency divider, a second frequency divider and a sampling circuit; the output end of the voltage-controlled oscillator is respectively connected with the input end of a first frequency divider and the input end of a second frequency divider, the output end of the first frequency divider is connected with the input end of the frequency-discrimination phase detector, the first input end of the sampling unit is used for receiving a signal to be detected, and the second input end of the sampling unit is connected with the output end of the second frequency divider; the phase frequency discriminator is used for acquiring a reference signal and a first frequency-dividing signal, comparing the respective frequencies and phases of the first frequency-dividing signal and the reference signal to obtain a frequency difference value and a phase difference value of the first frequency-dividing signal and the reference signal, wherein the frequencies and phases of the reference signal and the frequency and phases of the signal to be detected have a corresponding relation, and the first frequency-dividing signal is obtained by performing fractional frequency division on the first oscillating signal by using a fractional frequency division coefficient; a voltage-controlled oscillator for generating a second oscillation signal based on the frequency difference and the phase difference; the second frequency divider is used for carrying out integer frequency division on the second oscillating signal by utilizing an integer frequency division coefficient to generate a second frequency division signal; and the sampling unit is used for equivalently sampling the signal to be detected based on the second frequency division signal.
With reference to the first aspect, in some implementations of the first aspect, the sampling unit is further configured to calculate a target sampling rate based on a fractional frequency division coefficient corresponding to the first frequency division signal and an integer frequency division coefficient corresponding to the second frequency division signal; determining a target sampling period based on the signal period of the signal to be detected and the target sampling rate; determining a sampling interval based on a signal period and a target sampling period of a signal to be detected; and based on the sampling interval, performing equivalent sampling on the signal to be detected by using the second frequency division signal.
With reference to the first aspect, in certain implementations of the first aspect, the sampling intervalWherein T represents a signal period of a signal to be measured, M represents an integer value in the fractional frequency division coefficient, a represents a value of a numerator after converting the fractional value in the fractional frequency division coefficient into a fraction, b represents a value of a denominator after converting the fractional value in the fractional frequency division coefficient into a fraction, and c represents a difference value between the integer frequency division coefficient and the integer value in the fractional frequency division coefficient.
With reference to the first aspect, in certain implementations of the first aspect, the fractional frequency division coefficient and the integer frequency division coefficient are determined based on a sampling interval of the signal under test, wherein the fractional frequency division coefficient includes an integer value and a fractional value, and a difference between the integer frequency division coefficient and the integer value of the fractional frequency division coefficient is equal to the target value.
With reference to the first aspect, in certain implementations of the first aspect, the voltage controlled oscillator is further configured to generate an error signal based on the frequency difference and the phase difference; based on the error signal, a second oscillation signal of a corresponding frequency is generated.
With reference to the first aspect, in certain implementation manners of the first aspect, the circuit further includes a trigger unit, an input end of the trigger unit is used for receiving a signal to be tested, and an output end of the trigger unit is connected with an input end of the phase frequency detector: the triggering unit is used for acquiring a signal to be detected; detecting a signal to be detected to obtain a detection result; and if the detection result meets the target trigger condition, generating a reference signal based on the frequency and the phase of the signal to be detected.
In a second aspect, an embodiment of the present application provides an equivalent sampling method, applied to an equivalent sampling device, where the equivalent sampling device includes an equivalent sampling circuit, and the equivalent sampling circuit includes: the device comprises a phase frequency detector, a voltage controlled oscillator, a first frequency divider, a second frequency divider and a sampling unit; the output end of the phase frequency detector is connected with the input end of the voltage-controlled oscillator, the output end of the voltage-controlled oscillator is respectively connected with the input end of the first frequency divider and the input end of the second frequency divider, the output end of the first frequency divider is connected with the input end of the phase frequency detector, the first input end of the sampling unit is used for receiving signals to be detected, and the second input end of the sampling unit is connected with the output end of the second frequency divider. The method comprises the following steps: acquiring a reference signal by using a phase frequency detector, wherein the frequency and the phase of the reference signal have a corresponding relation with the frequency and the phase of a signal to be detected; the method comprises the steps that a phase frequency detector is used for obtaining a first frequency division signal, and the first frequency division signal is obtained by the fact that a first frequency divider performs fractional frequency division on a first oscillating signal by using a fractional frequency division coefficient; the frequency and the phase of each of the first frequency-divided signal and the reference signal are respectively compared by utilizing a frequency-frequency discriminator to obtain a frequency difference value and a phase difference value of the first frequency-divided signal and the reference signal; generating a second oscillation signal based on the frequency difference and the phase difference by using a voltage-controlled oscillator; utilizing a second frequency divider to carry out integer frequency division on the second oscillating signal based on an integer frequency division coefficient to generate a second frequency division signal; and performing equivalent sampling on the signal to be detected based on the second frequency division signal by using a sampling unit.
With reference to the second aspect, in some implementations of the second aspect, equivalently sampling, with a sampling unit, a signal to be measured based on the second divided signal includes: calculating a target sampling rate by using a sampling unit based on a fractional frequency division coefficient corresponding to the first frequency division signal and an integer frequency division coefficient corresponding to the second frequency division signal; determining a target sampling period based on the signal period of the signal to be detected and the target sampling rate; determining a sampling interval based on a signal period and a target sampling period of a signal to be detected; and based on the sampling interval, performing equivalent sampling on the signal to be detected by using the second frequency division signal.
With reference to the second aspect, in certain implementations of the second aspect, the sampling intervalWherein T represents a signal period of a signal to be measured, M represents an integer value in the fractional frequency division coefficient, a represents a value of a numerator after converting the fractional value in the fractional frequency division coefficient into a fraction, b represents a value of a denominator after converting the fractional value in the fractional frequency division coefficient into a fraction, and c represents a difference value between the integer frequency division coefficient and the integer value in the fractional frequency division coefficient.
In a third aspect, an embodiment of the present application provides an equivalent sampling device, including an equivalent sampling circuit as described in the first aspect above.
In the equivalent sampling circuit, a first frequency divider performs fractional frequency division on a first oscillation signal by using a fractional frequency division coefficient to obtain a first frequency division signal, and a second frequency divider performs integer frequency division on the basis of the first frequency division signal to obtain a second frequency division signal, wherein the second frequency division signal is used as a sampling signal for equivalent sampling of a signal to be detected. In general, the number of bits of the fractional division coefficient is relatively high, so by adjusting the parameters in the fractional division coefficient corresponding to the first frequency divider, the delay step of the second frequency division signal can be greatly improved, and the circuit cost is not increased in this way. And secondly, the integer frequency division coefficient corresponding to the second frequency divider can ensure the integer multiple relation between the frequency of the second frequency division signal and the frequency of the signal to be detected, so that the waveform information of the signal to be detected can be accurately reflected in the sampling process.
Furthermore, if the frequency of the sampled signal is too high, a higher performance equivalent sampling circuit is required to process the sampled data, which increases the complexity and cost of the circuit. Therefore, by integer-dividing the second oscillation signal, the frequency of the second divided signal can also be reduced, thereby reducing the complexity and cost of the equivalent sampling circuit. Furthermore, the first frequency divider divides the first oscillating signal by a fraction, which pushes the first oscillating signal to a higher frequency, but also introduces quantization noise, fractional spurious and other problems, so that on the basis of the first frequency dividing signal, the second frequency divider divides the second oscillating signal by an integer, which can make the quantization noise power be evenly distributed in a plurality of sampling periods, and further make the noise power in each sampling period greatly reduced. Furthermore, the phase frequency detector can improve the accuracy and precision of sampling by comparing the frequency difference value and the phase difference value between the first frequency division signal and the reference signal, and provides a reliable basis for the subsequent processing and analysis of sampling results.
Drawings
The above and other objects, features and advantages of the present application will become more apparent by describing embodiments of the present application in more detail with reference to the attached drawings. The accompanying drawings are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate the application and together with the embodiments of the application, and not constitute a limitation to the application. In the drawings, like reference numerals generally refer to like parts or steps.
Fig. 1 is a schematic diagram of a related circuit for performing equivalent sampling.
Fig. 2 is a schematic structural diagram of an equivalent sampling circuit according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of an equivalent sampling circuit according to another embodiment of the present application.
Fig. 4 is a flow chart of an equivalent sampling method according to an embodiment of the application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The core idea of the equivalent sampling technology is to realize equivalent sampling of the signal to be tested through a specific algorithm and circuit design, namely, under the condition that a certain condition is met, the same result as a high sampling rate is obtained by using a relatively low sampling rate. The technology can be applied to the scenes of oscilloscopes, TDR (Time Domain Reflectometry, time domain reflectometer) impedance measurement, UWB (Ultra-wide-band, carrierless communication technology) ranging and the like, and can analyze the characteristics of frequency, amplitude, phase and the like of a signal to be detected by carrying out equivalent sampling on the signal to be detected, or be used for calculating certain statistical indexes of the signal to be detected, such as average value and variance, or quantify the signal to be detected, and convert the signal to a digital signal which can be further analyzed and processed, or detect whether a corresponding system works normally or not and whether abnormality exists.
Fig. 1 is a schematic diagram of a related circuit for performing equivalent sampling. In the related art, a controllable delay circuit is a key part in the equivalent sampling technology, and by introducing controllable delay, the sampling signal is shifted in time. Therefore, the state of the signal to be detected at different times can be simulated by changing the delay time, and further the behavior of the signal to be detected at different times is captured. Specifically, in the equivalent sampling process, the trigger unit generates trigger pulses at specific positions of the signal to be detected, and then the sampling unit is controlled to sample in different periods of the signal to be detected through the controllable delay circuit. In this way, multiple samples can be taken in a longer periodic signal, and the sampled results are appropriately processed and combined to obtain the same signal reconstruction result as the high sampling rate.
The equivalent sampling technique can greatly reduce the sampling rate and the data storage rate, thereby reducing the burden and the cost of hardware. Meanwhile, the equivalent sampling technology can further improve the accuracy and effect of signal reconstruction through an optimization algorithm and a circuit design, and a more flexible, efficient and accurate data acquisition and processing mode is provided for the digital oscilloscope. However, the controllable delay circuit in the circuit structure shown in fig. 1 is formed by serially connecting independent delay units, and the delay step depends on the number of the independent delay units. If the sampling efficiency is to be improved, the number of the delay units can be piled up. And the delay step increased by the delay unit is typically only around 1K.
Based on the above, another equivalent sampling circuit is provided to overcome the defects existing in the related circuit. Specifically, fig. 2 is a schematic structural diagram of an equivalent sampling circuit according to an embodiment of the present application. The equivalent sampling circuit comprises a phase frequency detector 10, a voltage controlled oscillator 20, a first frequency divider 40, a second frequency divider 30 and a sampling unit 50. The output end of the phase frequency detector 10 is connected with the input end of the voltage controlled oscillator 20, the output end of the voltage controlled oscillator 20 is respectively connected with the input end of the first frequency divider 40 and the input end of the second frequency divider 30, the output end of the first frequency divider 40 is connected with the input end of the phase frequency detector 10, the first input end of the sampling unit 50 is used for receiving a signal to be detected, and the second input end of the sampling unit 50 is connected with the output end of the second frequency divider 30.
The phase frequency detector 10 is configured to obtain a reference signal and a first frequency-divided signal, and compare frequencies and phases of the first frequency-divided signal and the reference signal, respectively, to obtain a frequency difference value and a phase difference value of the first frequency-divided signal and the reference signal. The voltage controlled oscillator 20 is configured to generate a second oscillation signal based on the frequency difference value and the phase difference value. The second frequency divider 30 is configured to divide the second oscillation signal by an integer division coefficient to generate a second divided signal; the sampling unit 50 is configured to equivalently sample the signal to be tested based on the second frequency division signal.
The frequency and phase of the reference signal in this embodiment have a corresponding relationship with the frequency and phase of the signal to be measured, specifically, the relationship refers to a direct corresponding relationship between the frequency and phase of the reference signal and the frequency and phase of the signal to be measured, so that the characteristics of the signal to be measured can be accurately reflected in the equivalent sampling process. For example, correspondence may be established in terms of frequency tuning, phase adjustment, amplitude matching, etc., so that more accurate results are obtained in the equivalent sampling process.
The reference signal corresponding to the signal to be measured can be generated by an oscillator by the following specific processes: according to the frequency of the signal to be measured, the capacitance or inductance of the oscillator is changed, and then the oscillator is correspondingly tuned, so that the oscillator generates a reference signal with the frequency identical to or in a multiple relation with the frequency of the signal to be measured. The reference signal in this embodiment may be used to generate the sampling pulse on the one hand and to adjust the phase and frequency of the sampling pulse on the other hand to ensure that the correlation between the sampling pulse and the signal to be measured yields useful information. Therefore, by adjusting the parameters of the reference signal, different sampling strategies of the signal to be tested can be realized.
The first frequency-divided signal in the present embodiment is obtained by dividing the first oscillation signal by the first frequency divider 40 by a fractional frequency division coefficient. Then, the second frequency divider 30 performs integer frequency division on the basis of the first frequency-divided signal to generate a second frequency-divided signal at the current time. The principle of fractional division by the first frequency divider 40 is that the average of the frequency division over a period of time is calculated by having different values of the frequency division ratio over different periods. For example, if a fractional division factor of 40.5 is desired, then a division ratio of 40 is generated in one cycle and a division ratio of 41 is generated in the next cycle, resulting in a division ratio of 40.5 for both cycles.
The phase frequency detector 10 in this embodiment is an electronic component for comparing the frequency and phase differences of two signals, and the phase frequency detector 10 receives two input signals, i.e., a first divided signal and a reference signal, when performing equivalent sampling. It compares the frequency and phase of the two signals and outputs their frequency and phase differences, respectively.
Further, the voltage controlled oscillator 20 generates a second oscillation signal based on the frequency difference value and the phase difference value. The voltage-controlled oscillator 20 is an electronic component, which generates an oscillating signal, the frequency of which is controlled by an external voltage. In the equivalent sampling circuit, the voltage controlled oscillator 20 adjusts the frequency and phase of the second oscillation signal by receiving the frequency difference and the phase difference output from the phase frequency detector 10. In this process, the frequency difference value and the phase difference value are converted into control voltages suitable for the voltage-controlled oscillator 20, and then the voltage-controlled oscillator 20 adjusts its internal parameters according to the control voltages, thereby changing the frequency and phase of the second oscillation signal.
The second frequency divider 30 performs integer frequency division on the second oscillation signal mainly by performing logic operation on the input second oscillation signal through an internal logic gate circuit, such as an and gate, an or gate, a not gate, and the like, to obtain a second frequency-divided signal with a frequency of 1/n (n is a positive integer) of the frequency of the second oscillation signal. In other words, the second frequency divider 30 is an integer frequency divider, and since the phase frequency detector 10 is a digital module, the frequency of the oscillation signal of the voltage controlled oscillator 20 is high, and thus the second frequency divider 30 is required to convert the frequency of the second oscillation signal thereof into a low frequency.
In this embodiment, the sampling unit 50 equivalently samples the signal to be measured using the second divided signal. Illustratively, the sampling unit 50 compares the second divided signal with the signal under test via one or more flip-flops (e.g., comparators, logic gates, etc.). When each second frequency division signal rises or falls, the trigger compares the voltage values of the second frequency division signals with the voltage value of the signal to be detected, and if the voltage value of the signal to be detected is higher than the voltage value of the second frequency division signal, the trigger outputs a logic high level; if the voltage value of the signal to be tested is lower than the voltage value of the second frequency division signal, the trigger outputs a logic low level.
In this way, the sampling unit 50 equivalently samples the signal to be measured. Since the frequency of the second divided signal and the frequency of the signal to be detected maintain an integer multiple relationship, the sampling unit 50 can accurately capture the state change of the signal to be detected in the period of each second divided signal, thereby obtaining the effect of equivalent sampling.
The equivalent sampling circuit in this embodiment first performs fractional frequency division on the first oscillation signal by using the first frequency divider 40 to obtain a first frequency-divided signal, and performs integer frequency division on the basis of the first frequency-divided signal by using the second frequency divider 30 to obtain a second frequency-divided signal, where the second frequency-divided signal is used as a sampling signal for performing equivalent sampling on a signal to be measured. Typically, the number of bits of the fractional division factor is high, so by adjusting the division parameter in the first divider 40, the delay step of the second divided signal can be greatly increased, and this way the circuit cost is not increased. Second, the second frequency divider 30 can ensure an integer multiple relationship between the frequency of the second divided signal and the frequency of the signal to be measured, so that waveform information of the signal to be measured can be accurately reflected in the sampling process. Furthermore, if the frequency of the sampled signal is too high, a higher performance equivalent sampling circuit is required to process the sampled data, which increases the complexity and cost of the circuit. Thus, by means of the second frequency divider 30, the frequency of the second divided signal can also be reduced, thereby reducing the complexity and cost of the sampling circuit. Furthermore, after the first oscillating signal passes through the first frequency divider 40, the first frequency divider 40 pushes the first oscillating signal to a higher frequency, but at the same time, the problems of quantization noise, fractional spurious and the like are also introduced, so that on the basis of the first frequency dividing signal, the second oscillating signal is subjected to integer frequency division by the second frequency divider 30, so that the quantization noise power can be evenly distributed into a plurality of sampling periods, and the noise power in each sampling period is greatly reduced. Further, by comparing the frequency difference value and the phase difference value between the first frequency-divided signal and the reference signal by the phase frequency detector 10, the accuracy and precision of sampling can be improved, and a reliable basis is provided for the subsequent processing and analysis of the sampling result.
The embodiment shown in fig. 3 is extended on the basis of the embodiment shown in fig. 2. Specifically, fig. 3 is a schematic structural diagram of an equivalent sampling circuit according to another embodiment of the present application. As shown in fig. 3, the circuit further includes a trigger unit 60, an input terminal of the trigger unit 60 receives a signal to be tested, and an output terminal of the trigger unit 60 is connected to an input terminal of the phase frequency detector 10. That is, in the present embodiment, the trigger unit 60 detects the signal to be detected to obtain a detection result, and generates the reference signal based on the frequency and the phase of the signal to be detected in the case where the detection result satisfies the target trigger condition.
Illustratively, in this process, the trigger unit 60 measures and analyzes the amplitude, frequency, and phase of the signal under test, and these measurements can be used to determine the characteristics and properties of the signal under test. Further, the triggering condition may be set based on the frequency, phase, amplitude or other related parameters of the signal to be measured, for example, the triggering unit 60 generates the reference signal only when the frequency of the signal reaches or exceeds a certain preset value; or when the phase of the signal to be measured reaches or exceeds a certain preset value (such as a specific angle or a specific time point), the trigger unit 60 generates the reference signal; or the trigger unit 60 generates the reference signal only when the frequency of the signal to be measured falls within a certain range and its phase satisfies a certain condition.
Upon detecting that the signal under test satisfies the trigger condition, the trigger unit 60 generates a reference signal based on the signal under test. For example, the signal to be measured may be a signal obtained by performing some processing or transformation on the signal to be measured. In addition, after the reference signal is generated, the triggering unit 60 may also adjust and optimize the amplitude, frequency or phase of the reference signal as needed, for example, to fine tune the amplitude, frequency or phase of the reference signal to ensure the best match between the reference signal and the signal under test.
In this embodiment, the trigger unit 60 detects the signal to be detected, and generates the reference signal if the detection result satisfies the trigger condition. By setting proper triggering conditions, the generation of the reference signal can be ensured to be more accurate and reliable, so that the sampling precision is improved, and the sampling error is reduced. In addition, in the equivalent sampling, the output frequency of the voltage controlled oscillator 20 is adjusted according to the input signal of the phase frequency detector 10, and the error signal is obtained by the phase difference and the frequency difference between the reference signal and the first frequency-divided signal outputted from the first frequency divider 40, so that the generation of the reference signal is very important, which ensures the accuracy and reliability of the equivalent sampling circuit in the present application.
In combination with the foregoing embodiments, in other embodiments of the present application, the voltage controlled oscillator 20 is further configured to generate an error signal based on the frequency difference and the phase difference; based on the error signal, a second oscillation signal of a corresponding frequency is generated.
In this process, the error signal is indicative of the difference in frequency and phase between the reference signal and the first divided signal, and is further passed to the voltage controlled oscillator 20 for adjusting its output frequency to reduce the frequency and phase difference from the signal under test. By this closed loop feedback mechanism, the second oscillation signal output from the voltage controlled oscillator 20 can be automatically adjusted to be consistent with the frequency and phase of the signal to be measured, and the adjustment process is performed according to the error signal output from the phase frequency detector 10.
In this embodiment, by comparing the frequency and phase difference values of the reference signal and the first frequency-divided signal, the difference between the reference signal and the first frequency-divided signal can be more accurately known, and such accurate difference measurement can greatly improve the sampling precision and accuracy. In case the phase frequency detector 10 detects a frequency or phase difference, it may immediately generate an error signal. The error signal can adjust the output of the voltage controlled oscillator 20 in real time to ensure that the output is consistent with the frequency and phase of the signal to be measured, and the real-time adjustment mechanism is helpful to improve the real-time performance and dynamic response of sampling. At the same time, the presence of the error signal enables the system to self-correct and remain in a steady state, such an adjustment based on the error signal ensuring the stability and reliability of the sampling even in the presence of noise or interference.
In combination with the foregoing embodiments, in other embodiments of the present application, the sampling unit 50 is further configured to calculate the target sampling rate based on the fractional frequency division coefficient corresponding to the first frequency division signal and the integer frequency division coefficient corresponding to the second frequency division signal; determining a target sampling period based on the signal period of the signal to be detected and the target sampling rate; determining a sampling interval based on a signal period and a target sampling period of a signal to be detected; and based on the sampling interval, performing equivalent sampling on the signal to be detected by using the second frequency division signal.
Specifically, if T represents a signal period of a signal to be measured, M represents an integer value in the fractional frequency division coefficient, a represents a value of a numerator after converting the fractional value in the fractional frequency division coefficient into a fraction, b represents a value of a denominator after converting the fractional value in the fractional frequency division coefficient, and c represents a difference between the integer frequency division coefficient and the integer value in the fractional frequency division coefficient. Then the fractional division coefficient of the first frequency divider 40 is counted asThe integer division coefficient of the second frequency divider 30 is denoted as (m+c), the sampling period/>, of the reference signalI.e. the sampling period of the second divided signal can be noted/>
Further, sampling interval
Based on the above, when the equivalent sampling is performed on the signal to be detected, the time delay step value
For example, the current common fractional divider can be 18 bits, which means that the values of a and b can be from 1 to 2 18, so that N can easily reach millions, and further the application requirement of greatly improving the time delay stepping value of the sampling signal (the second frequency division signal is the sampling signal in the application) is met.
The sampling unit 50 described above takes into consideration the periodicity and frequency of the signal under test and the specific requirements of the target sampling rate, and thus, the characteristics of the signal under test can be captured and reproduced more accurately. In addition, the target sampling rate can be easily adjusted by changing the fractional frequency division coefficient corresponding to the first frequency division signal and the integer frequency division coefficient corresponding to the second frequency division signal so as to meet different application requirements. Moreover, this approach is relatively simple to implement and does not require complex hardware or algorithms.
As described above, the fractional frequency division coefficient and the integer frequency division coefficient are determined based on the sampling interval of the signal to be measured, the fractional frequency division coefficient includes an integer value and a fractional value, and the difference between the integer frequency division coefficient and the integer value of the fractional frequency division coefficient is equal to the target value, in the present application, c represents the target value.
Illustratively, when c takes 1, then
Next, on the basis of fig. 2, a specific implementation procedure of performing the equivalent sampling method by using the equivalent sampling circuit will be briefly described with reference to fig. 4.
Specifically, fig. 4 is a flow chart illustrating an equivalent sampling method according to an embodiment of the present application. Illustratively, the method is applied to an equivalent sampling circuit comprising: the device comprises a phase frequency detector, a voltage controlled oscillator, a first frequency divider, a second frequency divider and a sampling unit; the output end of the phase frequency detector is connected with the input end of the voltage-controlled oscillator, the output end of the voltage-controlled oscillator is respectively connected with the input end of the first frequency divider and the input end of the second frequency divider, the output end of the first frequency divider is connected with the input end of the phase frequency detector, the first input end of the sampling unit is used for receiving signals to be detected, and the second input end of the sampling unit is connected with the output end of the second frequency divider. As shown in fig. 4, the equivalent sampling provided in this embodiment includes the following steps.
In step S410, a reference signal is obtained by using a phase frequency detector.
The frequency and phase of the reference signal have a corresponding relationship with the frequency and phase of the signal to be measured. Specifically, the relationship refers to a direct correspondence between the frequency and phase of the reference signal and the frequency and phase of the signal to be measured, so that the characteristics of the signal to be measured can be accurately reflected in the equivalent sampling process.
The reference signal corresponding to the signal to be measured can be generated by an oscillator by the following specific processes: according to the frequency of the signal to be measured, the capacitance or inductance of the oscillator is changed, and then the oscillator is correspondingly tuned, so that the oscillator generates a reference signal with the frequency identical to or in a multiple relation with the frequency of the signal to be measured.
In step S420, the first divided signal is obtained by using a phase frequency detector.
The first frequency-divided signal is generated by dividing the second oscillation signal of the previous time output from the voltage-controlled oscillator 20 by a fraction by the first frequency divider 40. Then, the second frequency divider 30 performs integer frequency division on the basis of the first frequency-divided signal to generate a second frequency-divided signal at the current time.
Step S430, the frequency and the phase of each of the first frequency-divided signal and the reference signal are compared by using a phase frequency detector, so as to obtain a frequency difference value and a phase difference value of the first frequency-divided signal and the reference signal.
In step S440, a second oscillation signal is generated based on the frequency difference and the phase difference using a voltage controlled oscillator.
In the equivalent sampling, the voltage controlled oscillator 20 adjusts the frequency and phase of the second oscillation signal by receiving the frequency difference and the phase difference output from the phase frequency detector 10. In this process, the frequency difference value and the phase difference value are converted into control voltages suitable for the voltage-controlled oscillator 20, and then the voltage-controlled oscillator 20 adjusts its internal parameters according to the control voltages, thereby changing the frequency and phase of the second oscillation signal.
In step S450, the second frequency divider divides the second oscillation signal by an integer based on the integer division coefficient to generate a second divided signal.
In other words, the second frequency divider 30 is an integer frequency divider, and since the phase frequency detector 10 is a digital module, the frequency of the oscillation signal of the voltage controlled oscillator 20 is high, and thus the second frequency divider 30 is required to convert the frequency of the second oscillation signal thereof into a low frequency.
Step S460, the sampling unit is utilized to equivalently sample the signal to be detected based on the second frequency division signal.
Specifically, in the present embodiment, the sampling unit 50 equivalently samples the signal to be measured using the second divided signal. Since the frequency of the second divided signal and the frequency of the signal to be detected maintain an integer multiple relationship, the sampling unit 50 can accurately capture the state change of the signal to be detected in the period of each second divided signal, thereby obtaining the effect of equivalent sampling.
In this embodiment, the first oscillation signal is first subjected to fractional frequency division by using a fractional frequency division coefficient to obtain a first frequency division signal, and integer frequency division is performed on the basis of the first frequency division signal to obtain a second frequency division signal, where the second frequency division signal is used as a sampling signal for equivalently sampling a signal to be measured. In general, the number of bits of the fractional frequency division coefficient is high, so by adjusting the parameters in the fractional frequency division coefficient, the delay step of the second frequency division signal can be greatly improved, and the circuit cost is not increased in this way. And secondly, integer frequency division can ensure the integer multiple relation between the frequency of the second frequency division signal and the frequency of the signal to be detected, so that the waveform information of the signal to be detected can be accurately reflected in the sampling process. Furthermore, if the frequency of the sampled signal is too high, then higher performance sampling circuitry is required to process the sampled data, which increases the complexity and cost of the circuitry. Therefore, by integer dividing the second oscillation signal, the frequency of the second divided signal can be reduced, thereby reducing the complexity and cost of the sampling circuit. Furthermore, the first oscillating signal is divided by a fraction, which pushes the first oscillating signal to a higher frequency, but also introduces quantization noise, fractional spurious and other problems, so that the quantization noise power can be evenly distributed in a plurality of sampling periods by dividing the second oscillating signal by an integer based on the first frequency dividing signal, and the noise power in each sampling period is greatly reduced. Further, by comparing the frequency difference value and the phase difference value between the first frequency division signal and the reference signal, the accuracy and precision of sampling can be improved, and a reliable basis is provided for processing and analyzing subsequent sampling results.
As described in connection with fig. 4, in other embodiments of the present application, the equivalently sampling the signal to be tested based on the second frequency-divided signal by using the sampling unit includes: calculating a target sampling rate by using a sampling unit based on a fractional frequency division coefficient corresponding to the first frequency division signal and an integer frequency division coefficient corresponding to the second frequency division signal; determining a target sampling period based on the signal period of the signal to be detected and the target sampling rate; determining a sampling interval based on a signal period and a target sampling period of a signal to be detected; and based on the sampling interval, performing equivalent sampling on the signal to be detected by using the second frequency division signal.
Specifically, sampling intervalWherein T represents a signal period of a signal to be measured, M represents an integer value in the fractional frequency division coefficient, a represents a value of a numerator after converting the fractional value in the fractional frequency division coefficient into a fraction, n represents a value of a denominator after converting the fractional value in the fractional frequency division coefficient into a fraction, and c represents a difference value between the integer frequency division coefficient and the integer value in the fractional frequency division coefficient.
The method in the embodiment considers the periodicity and frequency of the signal to be measured and the specific requirement of the target sampling rate, so that the characteristics of the signal to be measured can be captured and duplicated more accurately. In addition, the target sampling rate can be easily adjusted by changing the fractional frequency division coefficient corresponding to the first frequency division signal and the integer frequency division coefficient corresponding to the second frequency division signal so as to meet different application requirements. Moreover, this approach is relatively simple to implement and does not require complex hardware or algorithms.
An embodiment of the present application further provides an equivalent sampling device, including any one of the equivalent sampling circuits described in the foregoing embodiments. The circuit firstly performs fractional frequency division on a first oscillating signal by using a first frequency divider to obtain a first frequency division signal, and performs integer frequency division on the basis of the first frequency division signal by using a second frequency divider to obtain a second frequency division signal, wherein the second frequency division signal is used as a sampling signal for equivalently sampling a signal to be detected. In general, the number of bits of the fractional division coefficient is high, so by adjusting the division parameter in the first frequency divider, the delay step of the second division signal can be greatly improved, and the circuit cost is not increased in this way. And secondly, the second frequency divider can ensure the integral multiple relation between the frequency of the second frequency division signal and the frequency of the signal to be detected, so that the waveform information of the signal to be detected can be accurately reflected in the sampling process. Furthermore, if the frequency of the sampled signal is too high, then higher performance sampling circuitry is required to process the sampled data, which increases the complexity and cost of the circuitry. Thus, by means of the second frequency divider, the frequency of the second divided signal can be reduced, thereby reducing the complexity and cost of the sampling circuit. Furthermore, after the first oscillation signal passes through the first frequency divider, the first frequency divider pushes the first oscillation signal to a higher frequency, but at the same time, the problems of quantization noise, fractional spurious and the like are also introduced, so that on the basis of the first frequency division signal, the second oscillation signal is subjected to integer frequency division by the second frequency divider, the quantization noise power can be evenly distributed into a plurality of sampling periods, and the noise power in each sampling period is greatly reduced. Furthermore, the frequency difference value and the phase difference value between the first frequency division signal and the reference signal are compared through the phase frequency detector, so that the accuracy and precision of sampling can be improved, and a reliable basis is provided for processing and analyzing subsequent sampling results.
It can be understood that the equivalent sampling method and the equivalent sampling device in the present application correspond to the operations and functions that can be implemented by each unit in the equivalent sampling circuit in the foregoing embodiments, so, for more detailed implementation of the equivalent sampling method and the equivalent sampling device, reference may be made to the corresponding embodiments of the equivalent sampling circuit, and for avoiding repetition, a description is omitted herein.
The basic principles of the present application have been described above in connection with specific embodiments, but it should be noted that the advantages, benefits, effects, etc. mentioned in the present application are merely examples and not intended to be limiting, and these advantages, benefits, effects, etc. are not to be construed as necessarily possessed by the various embodiments of the application. Furthermore, the specific details disclosed herein are for purposes of illustration and understanding only, and are not intended to be limiting, as the application is not necessarily limited to practice with the above described specific details.
The block diagrams of devices, apparatuses, units, circuits referred to in the present application are only illustrative examples and are not intended to require or imply that the connections, arrangements, configurations must be made in the manner shown in the block diagrams. These devices, apparatuses, units, circuits may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are words of openness and mean "including but not limited to," and are used interchangeably therewith. The terms "or" and "as used herein refer to and are used interchangeably with the term" and/or "unless the context clearly indicates otherwise. The term "such as" as used herein refers to, and is used interchangeably with, the phrase "such as, but not limited to.
It should also be noted that in the circuits, devices and methods of the present application, the components or steps may be separated and/or recombined. Such decomposition and/or recombination should be considered as equivalent aspects of the present application.
The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the application. Thus, the present application is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The foregoing description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit embodiments of the application to the form disclosed herein. Although a number of example aspects and embodiments have been discussed above, a person of ordinary skill in the art will recognize certain variations, modifications, alterations, additions, and subcombinations thereof.
Claims (10)
1. An equivalent sampling circuit, comprising: the device comprises a phase frequency detector, a voltage controlled oscillator, a first frequency divider, a second frequency divider and a sampling unit; the output end of the phase frequency detector is connected with the input end of the voltage-controlled oscillator, the output end of the voltage-controlled oscillator is respectively connected with the input end of the first frequency divider and the input end of the second frequency divider, the output end of the first frequency divider is connected with the input end of the phase frequency detector, the first input end of the sampling unit is used for receiving a signal to be detected, and the second input end of the sampling unit is connected with the output end of the second frequency divider;
The phase frequency discriminator is used for acquiring a reference signal and a first frequency-dividing signal, comparing the respective frequencies and phases of the first frequency-dividing signal and the reference signal to obtain a frequency difference value and a phase difference value of the first frequency-dividing signal and the reference signal, wherein the frequencies and phases of the reference signal have a corresponding relation with those of a signal to be detected, and the first frequency-dividing signal is obtained by dividing the frequency of a first oscillating signal by a decimal frequency dividing coefficient through a first frequency divider;
The voltage-controlled oscillator is used for generating a second oscillation signal based on the frequency difference value and the phase difference value;
The second frequency divider is configured to divide the second oscillation signal by an integer by using an integer division coefficient to generate a second divided signal;
The sampling unit is used for equivalently sampling the signal to be detected based on the second frequency division signal.
2. The equivalent sampling circuit of claim 1, wherein the sampling unit is further configured to calculate a target sampling rate based on the fractional frequency division coefficient corresponding to the first divided signal and the integer frequency division coefficient corresponding to the second divided signal; determining a target sampling period based on the signal period of the signal to be detected and the target sampling rate; determining a sampling interval based on the signal period of the signal to be detected and the target sampling period; and based on the sampling interval, performing equivalent sampling on the signal to be detected by using the second frequency division signal.
3. The equivalent sampling circuit of claim 2, wherein the sampling interval Wherein T represents a signal period of the signal to be measured, M represents an integer value in the fractional frequency division coefficient, a represents a value of a numerator after converting the fractional value in the fractional frequency division coefficient into a fraction, b represents a value of a denominator after converting the fractional value in the fractional frequency division coefficient into a fraction, and c represents a difference value between the integer frequency division coefficient and the integer value in the fractional frequency division coefficient.
4. An equivalent sampling circuit according to any one of claims 1 to 3, characterized in that the fractional frequency division coefficient and the integer frequency division coefficient are determined based on the sampling interval of the signal to be measured, wherein the fractional frequency division coefficient comprises an integer value and a fractional value, and the difference between the integer frequency division coefficient and the integer value of the fractional frequency division coefficient is equal to a target value.
5. An equivalent sampling circuit according to any one of claims 1 to 3, wherein the voltage controlled oscillator is further configured to generate an error signal based on the frequency difference value and the phase difference value; the second oscillation signal of a corresponding frequency is generated based on the error signal.
6. An equivalent sampling circuit according to any one of claims 1 to 3, further comprising a trigger unit, wherein an input end of the trigger unit is used for receiving the signal to be detected, and an output end of the trigger unit is connected with an input end of the phase frequency detector;
The triggering unit is used for acquiring a signal to be detected; detecting the signal to be detected to obtain a detection result; and if the detection result meets the target trigger condition, generating the reference signal based on the frequency and the phase of the signal to be detected.
7. An equivalent sampling method, characterized by being applied to an equivalent sampling device, the equivalent sampling device comprising an equivalent sampling circuit, the equivalent sampling circuit comprising: the device comprises a phase frequency detector, a voltage controlled oscillator, a first frequency divider, a second frequency divider and a sampling unit; the output end of the phase frequency detector is connected with the input end of the voltage-controlled oscillator, the output end of the voltage-controlled oscillator is respectively connected with the input end of the first frequency divider and the input end of the second frequency divider, the output end of the first frequency divider is connected with the input end of the phase frequency detector, the first input end of the sampling unit is used for receiving a signal to be detected, and the second input end of the sampling unit is connected with the output end of the second frequency divider; the method comprises the following steps:
Acquiring a reference signal by using the phase frequency detector, wherein the frequency and the phase of the reference signal have a corresponding relation with the frequency and the phase of a signal to be detected;
The phase frequency detector is used for obtaining a first frequency division signal, and the first frequency division signal is obtained by the first frequency divider through fractional frequency division of a first oscillating signal by using a fractional frequency division coefficient;
Comparing the frequency and the phase of each of the first frequency-divided signal and the reference signal by using the phase frequency discriminator to obtain a frequency difference value and a phase difference value of the first frequency-divided signal and the reference signal;
Generating a second oscillation signal based on the frequency difference and the phase difference using the voltage controlled oscillator;
utilizing the second frequency divider to carry out integer frequency division on the second oscillating signal based on an integer frequency division coefficient to generate a second frequency division signal;
And performing equivalent sampling on the signal to be detected by using the sampling unit based on the second frequency division signal.
8. The method according to claim 7, wherein the equivalently sampling the signal to be measured based on the second divided signal with the sampling unit includes:
Calculating a target sampling rate by using the sampling unit based on the fractional frequency division coefficient corresponding to the first frequency division signal and the integer frequency division coefficient corresponding to the second frequency division signal; determining a target sampling period based on the signal period of the signal to be detected and the target sampling rate; determining a sampling interval based on the signal period of the signal to be detected and the target sampling period; and based on the sampling interval, performing equivalent sampling on the signal to be detected by using the second frequency division signal.
9. The equivalent sampling method of claim 8, wherein the sampling interval Wherein T represents a signal period of the signal to be measured, M represents an integer value in the fractional frequency division coefficient, a represents a value of a numerator after converting the fractional value in the fractional frequency division coefficient into a fraction, b represents a value of a denominator after converting the fractional value in the fractional frequency division coefficient into a fraction, and c represents a difference value between the integer frequency division coefficient and the integer value in the fractional frequency division coefficient.
10. An equivalent sampling device comprising an equivalent sampling circuit as claimed in any one of claims 1 to 6.
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