CN118100660B - Synchronous rectification control circuit, chip and switching power supply - Google Patents
Synchronous rectification control circuit, chip and switching power supply Download PDFInfo
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- CN118100660B CN118100660B CN202410461310.7A CN202410461310A CN118100660B CN 118100660 B CN118100660 B CN 118100660B CN 202410461310 A CN202410461310 A CN 202410461310A CN 118100660 B CN118100660 B CN 118100660B
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- 238000001514 detection method Methods 0.000 claims abstract description 35
- 101150088150 VTH2 gene Proteins 0.000 claims abstract description 27
- 238000005070 sampling Methods 0.000 claims abstract description 7
- 230000007423 decrease Effects 0.000 claims description 7
- 238000004146 energy storage Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 8
- 230000008859 change Effects 0.000 description 7
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- 102000012677 DET1 Human genes 0.000 description 5
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33576—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
- H02M3/33592—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Rectifiers (AREA)
Abstract
The application relates to a synchronous rectification control circuit, a chip and a switching power supply, wherein the synchronous rectification control circuit comprises: a first comparing circuit for comparing input signals of the first input terminal and the second input terminal and outputting a first comparison signal CP1; the first input end is used for receiving a sampling voltage VDS of drain-source voltage of the secondary side switching tube, and the second input end is used for receiving a first threshold voltage VTH1 and a second threshold voltage VTH2 in a time-sharing mode; and the control circuit is electrically connected with the output end of the first comparison circuit and is used for judging whether the falling rate of the VDS is larger than a preset rate according to the first comparison signal CP1 and outputting a secondary side conduction signal when the falling rate is larger than the preset rate so as to control the conduction of the secondary side switching tube. The secondary side switching tube is controlled by detecting the falling slope of the drain-source voltage of the secondary side switching tube, so that the false conduction is avoided, meanwhile, the comparator is multiplexed during slope detection, the circuit is optimized, and the chip area is saved.
Description
Technical Field
The application belongs to the technical field of switching power supplies, and particularly relates to a synchronous rectification control circuit, a chip and a switching power supply.
Background
Secondary side rectification schemes for switching power supplies currently come in two types: an asynchronous rectification scheme using a diode, a synchronous rectification scheme using a MOS Transistor (Metal Oxide Semiconductor FIELD EFFECT Transistor, MOSFET, metal oxide semiconductor field effect Transistor). The synchronous rectification scheme has higher efficiency of power conversion than the asynchronous rectification scheme using diodes.
In synchronous rectification schemes, the on and off of the secondary side switching tube is typically controlled according to the drain-source voltage (Vds) of the secondary side switching tube (i.e., synchronous rectifier tube, specifically, MOSFET tube). False triggering is often caused by the oscillation of drain-source voltage (Vds) of the secondary side switching tube, and the primary side switching tube and the secondary side switching tube are simultaneously conducted, so that extra chip loss is caused, and even the chip is burnt.
In the prior art, a slope detection mode is adopted to control the secondary side switching tube so as to avoid the false conduction of the secondary side switching tube, but the circuit design is complex, the chip area is large, and the miniaturization requirement and the low power consumption requirement of the existing electronic product are not facilitated.
The above problems are an urgent need to be solved.
Disclosure of Invention
In view of the above, the present application is directed to a synchronous rectification control circuit, a chip and a switching power supply, so as to improve the problem of misconduction and the problem of excessive chip area that may occur in the conventional synchronous rectification scheme.
Embodiments of the present application are implemented as follows:
In a first aspect, an embodiment of the present application provides a synchronous rectification control circuit, including: a first comparing circuit for comparing input signals of the first input terminal and the second input terminal and outputting a first comparison signal CP1; the first input end is used for receiving a sampling voltage VDS of drain-source voltage of the secondary side switching tube, and the second input end is used for receiving a first threshold voltage VTH1 and a second threshold voltage VTH2 in a time-sharing mode;
And the control circuit is electrically connected with the output end of the first comparison circuit and is used for judging whether the falling rate of the VDS is larger than a preset rate according to the first comparison signal CP1 and outputting a secondary side conduction signal when the falling rate is larger than the preset rate so as to control the secondary side switching tube to be conducted.
Optionally, determining whether the falling rate of the VDS is greater than a preset rate according to the first comparison signal CP1 includes:
Determining a falling time period for the VDS to fall from VTH1 to VTH2 based on the first comparison signal CP1, and judging whether the falling time period is not more than a first preset time period T1.
Optionally, the control circuit includes: a switching circuit;
the switching circuit is used for switching the second input end of the first comparison circuit to be VTH1 or VTH2.
Optionally, in the reset state, the second input terminal of the first comparison circuit is connected to VTH1;
And the switching circuit is used for switching the second input end of the first comparison circuit from VTH1 to VTH2 after the VDS is reduced to VTH1 and switching the second input end of the first comparison circuit back to VTH1 after the slope detection is completed.
Optionally, the control circuit can determine the falling rate of the VDS when the secondary side switching tube is in the off state.
Optionally, the control circuit may determine the falling rate of the VDS after the VDS is greater than VTH1 for a second preset period of time T2.
Optionally, the control circuit further comprises: a first reset circuit;
And the first reset circuit is used for resetting the first comparison circuit when the VDS is reduced to be lower than VTH 1.
Optionally, the control circuit includes: the first judging unit and the second judging unit;
A first judgment unit that judges whether VDS is less than VTH1 based on the first comparison signal CP1, and outputs a first detection signal;
And a second judging unit that judges whether VDS is lowered to VTH2 within T1 based on the first detection signal and the first comparison signal CP 1.
Optionally, the second judging unit comprises a timing module and a second judging module;
the timing module is used for outputting a first timing signal PULSE representing a first preset duration T1 when the VDS is smaller than the VTH 1;
The second judging module is configured to judge whether the VDS decreases to VTH2 within a first preset period T1 according to the first timing signal PULSE and the first comparison signal CP 1.
In a second aspect, an embodiment of the present application provides a synchronous rectification control chip, which includes the synchronous rectification control circuit according to the first aspect.
In a third aspect, the application provides a switching power supply, which comprises a secondary side switching tube, an energy storage device and the synchronous rectification control chip in the second aspect. Wherein the energy storage device comprises a capacitor.
The application has the advantages that:
the synchronous rectification control circuit/chip is simple in structure, and the conduction of the rectifying tube is controlled according to the descending rate of the Vds of the synchronous rectifying tube, so that the error opening of the rectifying tube is avoided. Multiplexing of the comparator is achieved through time-sharing switching of the threshold values, and chip area and cost are saved. Additional features and advantages of the application will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. The above and other objects, features and advantages of the present application will become more apparent from the accompanying drawings. Like reference numerals refer to like parts throughout the several views of the drawings. The drawings are not intended to be drawn to scale, with emphasis instead being placed upon illustrating the principles of the application.
Fig. 1 is a schematic diagram of a switching power supply according to an embodiment of the application.
Fig. 2 shows a schematic diagram of a synchronous rectification control circuit according to an embodiment of the application.
Fig. 3 shows a switching circuit according to an embodiment of the application.
Fig. 4 shows a schematic diagram of a synchronous rectification control circuit according to an embodiment of the application.
Fig. 5 shows a schematic diagram of a control circuit according to an embodiment of the application.
Fig. 6 is a schematic diagram of a second determining unit according to an embodiment of the application.
Fig. 7 shows a schematic diagram of a first timing signal according to an embodiment of the application.
FIG. 8 illustrates an enabling circuit provided by an embodiment of the present application.
Fig. 9 shows a schematic diagram III of a synchronous rectification control circuit according to an embodiment of the present application;
fig. 10 shows an operation waveform diagram of a switching power supply according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
It should be noted that: relational terms such as "first," "second," and the like may be used solely to distinguish one entity or action from another entity or action in the description of the application without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "connected," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; or may be an electrical connection; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
In view of the fact that the conventional synchronous rectification scheme may cause erroneous conduction of a secondary side switching tube (such as a MOS tube represented by P1 in FIG. 1), the conventional scheme for solving erroneous conduction has a complex circuit structure, a large chip area and large power consumption, the application provides a synchronous rectification control circuit, a chip and a switching power supply, which can accurately control the conduction time of the secondary side switching tube by detecting the change rate of drain-source voltages (represented by Vds) at two ends of the secondary side switching tube, thereby avoiding erroneous conduction of the secondary side switching tube.
For easy understanding, the following description will explain a switching power supply provided in connection with an embodiment of the present application, where the switching power supply includes a synchronous rectification control circuit for controlling on or off of a secondary side switching tube P1. As shown in fig. 1, the switching power supply includes a synchronous rectification control circuit, a transformer T, a primary side switching tube P2, a secondary side switching tube P1, and an energy storage capacitor C0. Wherein, the resistor R0 is a load powered by the switching power supply.
Normally, the primary side switching tube P2 and the secondary side switching tube P1 cannot be turned on at the same time, and when the primary side switching tube P2 is turned on, the secondary side switching tube P1 is in an off state. The time for Vd to drop from Vth1 to Vth2 is long (slow drop) when the secondary side switching transistor P1 is turned off, and the time for Vd to drop from Vth1 to Vth2 is short (fast drop) when P2 is turned off. Therefore, in the embodiment of the application, the falling rate of the switching voltage (the voltage difference between the drain end and the source end of the drain-source voltage Vds and the voltage difference between the drain end and the source end of the P1) at two ends of the secondary side switching tube is detected, specifically, the falling duration of the sampling voltage Vds of the Vds from the first preset threshold value to the second preset threshold value is detected, when the falling duration is smaller than the preset duration, the falling speed of the switching voltage is proved to be fast, and oscillation when the P1 is turned off can be eliminated, so that the secondary side switching tube can be controlled to be conducted reliably, and the false conduction of the secondary side switching tube is avoided.
Next, a synchronous rectification control circuit 10 according to an embodiment of the present application will be described with reference to fig. 2. The synchronous rectification control circuit 10 includes:
A first comparing circuit 1 for comparing input signals of a first input terminal and a second input terminal of the first comparing circuit 1 and outputting a first comparing signal CP1; the first input end is used for receiving a sampling voltage VDS of drain-source voltage Vds of the secondary side switching tube, and the second input end is used for receiving a first threshold voltage VTH1 and a second threshold voltage VTH2 in a time-sharing mode; here, the drain-source voltage Vds refers to a voltage difference between the drain and the source of the rectifier P1, and if the connection method shown in fig. 1, i.e., the source is grounded, the detection of the P1 drain-source voltage is also considered as the drain-source voltage of P1 according to the present application.
The control circuit 2 is electrically connected to the output end of the first comparing circuit 1, so as to receive the first comparing signal CP1, and is configured to determine whether the falling rate of the VDS is greater than a preset rate according to the first comparing signal CP1, and output a secondary side conduction signal (ton=1) when the falling rate is greater than the preset rate, so as to control the secondary side switching tube P1 to be turned on. Here, the judgment of the falling rate, i.e., the slope detection.
In the application, the descending speed is larger than or equal to 0, and the descending speed is large, which means that the descending speed is high. The drop rate is the absolute value of the rate of change during the drop of the VDS. For example, the rate of change is-5, and the rate of drop is 5.
In the prior art, the judgment of the falling speed of the VDS generally needs to be performed with two different thresholds for two comparisons, which often needs two comparators, certainly increases the chip area and is not beneficial to the miniaturization of the secondary side control chip.
According to the application, the voltage of the second input end of the first comparison circuit 1 is switched in a time-sharing manner, so that the judgment of the change rate of the VDS is realized based on the time-sharing comparison result, the slope detection can be completed under the condition that only one comparator is used, the chip area is reduced, and the cost is saved.
In some embodiments, determining whether the decreasing rate of the VDS is greater than a preset rate according to the first comparison signal CP1 includes:
A falling time period during which the VDS falls from VTH1 to VTH2 is determined based on the first comparison signal CP1, and it is judged whether the falling time period is not greater than a first preset time period T1.
If the duration of the VDS falling from the first threshold voltage VTH1 to the second threshold voltage VTH2 is not greater than the first preset duration T1, which indicates that the VDS falls quickly, it is considered that the drain-source voltage VDS caused by the disconnection of the primary side switching tube P2 falls quickly, but not the ringing when the secondary side switching tube P1 is disconnected, and at this time, the secondary side switching tube P1 can be controlled to be turned on.
As described above, in the prior art, the determination of the falling speed of VDS requires that VDS be compared with two different thresholds twice, which usually requires two comparator circuits, which undoubtedly increases the chip area, and is disadvantageous for miniaturization of the secondary control chip. In the application, only one comparison circuit (the first comparison circuit 1) is adopted, and corresponding logic is configured in a mode of comparing by multiplexing the comparators and switching the thresholds in a time-sharing way, so that the judgment of the falling speed (speed) of the VDS can be realized, and the chip size is reduced as much as possible while the erroneous conduction of the secondary side switching tube is avoided.
In some embodiments, as in fig. 3, the control circuit 2 comprises: a switching circuit 3;
The switching circuit 3 is configured to switch the second input terminal of the first comparing circuit 1 to VTH1 or VTH2. The switching circuit 3 may include a switch S1 and a switch S2 as shown in fig. 3. Wherein the switch S1 and the switch S2 are not turned on at the same time.
In some embodiments, in the initial state, the second input terminal of the first comparison circuit 1 is connected to the first threshold voltage VTH1. The switching circuit 3 switches the second input terminal of the first comparing circuit 1 from the first threshold voltage VTH1 to the second threshold voltage VTH2 after VDS falls to the first threshold voltage VTH1, and switches the second input terminal of the first comparing circuit 1 back to VTH1 after the slope detection is completed.
After the slope detection is completed, the synchronous rectification control circuit completes one-time slope detection, that is, the control circuit completes the judgment of the falling rate of the VDS, that is, completes one-time judgment of whether the falling rate of the VDS is greater than the preset rate. Depending on the circuit design, a different signal may be selected to characterize a detection completion, e.g., the falling edge of the PULSE signal output by timer 221 in fig. 9, e.g., EN1A in fig. 8.
In some embodiments, the switching circuit 3 configures (switches) the second input terminal of the first comparing circuit 1 to VTH1 when the sampling voltage VDS is greater than a certain threshold value (the threshold value is greater than or equal to VTH 1).
In some embodiments, as in fig. 9, the switching circuit 3 may be controlled by the control circuit 2. The control circuit 2 may sense the magnitude of the sampling voltage VDS in some way with respect to a certain threshold value (e.g. VTH 1) as described above. The second input is immediately configured as VTH1 when VDS is detected to be greater than VTH1, and the second input of the first comparison circuit 1 may be immediately configured as VTH2 when VDS is detected to be less than (down to) VTH 1.
In some embodiments, when the secondary side switch tube is in the on state, the control circuit 2 does not determine the falling rate of the VDS, that is, the control circuit 2 is in the disabled state.
In some embodiments, the control circuit 2 is allowed to determine the falling rate of the VDS after the secondary side switching tube is turned off (in the off state).
In some embodiments, as in fig. 4, the present application may configure the enable circuit 4, the enable circuit 4 being used to enable/disable or reset the control circuit 2. The enabling circuit 4 may be as shown in fig. 8, and the specific operation principle will be described later.
In some embodiments, as shown in fig. 4, the control circuit 2 further includes: a reset circuit 5;
And a reset circuit 5 for resetting the first comparison circuit 1 when VDS falls below VTH 1.
In the present application, the control circuit 2 may detect whether VDS is smaller than VTH1, and when detecting that VDS is smaller than VTH1, output a control signal to the reset circuit 5, and instruct the reset circuit 5 to reset the first comparison circuit. For example, when the first comparing circuit 1 compares that VDS falls below VTH1, the output is high, and at this time, the control circuit 2 detects a high level and then outputs a control signal to the reset circuit 5 to control the reset circuit 5 to reset the first comparing circuit 1, and the output of the first comparing circuit 1 is inverted to be low, see fig. 10. At this time, as described above, the switching circuit 3 may be controlled by the control circuit 2 to switch the second input terminal of the first comparing circuit 1 to VTH2.
In some embodiments, the reset circuit 5 may include a pulse enabling module B, as shown in fig. 9, which outputs a pulse signal to reset the first comparing circuit 1 when receiving a signal (e.g., det1=1) output by the control circuit 2 indicating that VDS is smaller than VTH 1. Here, the pulse enable module B is preferably a flip-flop, and the pulse enable module implemented by the flip-flop circuit can more precisely guarantee reset than the pulse enable module implemented by the RC circuit.
In some embodiments, as in fig. 5, the control circuit 2 comprises: a first judgment unit 21, a second judgment unit 22;
The first judgment unit 21 judges whether VDS is smaller than VTH1 based on the first comparison signal CP1, and outputs a first detection signal DET1;
The second judging unit 22 judges whether or not the VDS decreases to VTH2 within the first preset period T1 based on the first detection signal DET1 and the first comparison signal CP 1.
According to the foregoing, the enabling circuit 4 controls the first judging unit 21 and the second judging unit 22 to be in the disabled state when the secondary side switching tube is in the on state, i.e., neither unit performs detection regarding the falling rate of the VDS. Only after the secondary side switching transistor P1 is turned off (gate=0, gate=1), a judgment of the length of the falling period/the falling rate of the VDS from VTH1 to VTH2 is performed. In some embodiments, the enabling circuit 4 includes a comparison circuit, a pulse enabling module a, an not gate, and an and gate, as shown in fig. 8. After detecting that VDS is greater than a preset threshold (e.g., VTH 1), the pulse enable module A will output a pulse signal (e.g., a low level pulse) such that EN1 is briefly low, as shown in FIG. 10. In the present application, gate=1 indicates that the secondary side switching transistor P1 is in an on state, and gate=0 indicates that the secondary side switching transistor P1 is in an off state. GATEN is the signal after the GATE inversion.
In some embodiments, the first determining unit 21 may determine whether the VDS is smaller than VTH1 after the VDS is greater than VTH1 for the second preset period T2. For example, even after the secondary side switch tube is turned off, the first judging unit 21 (e.g., the trigger in fig. 9) is enabled, and the first judging unit 21 still needs to satisfy a condition to start detecting the magnitudes of VDS and VTH1, for example, that VDS is detected to be greater than a certain threshold (e.g., VTH 1) for the second preset period T2. This ensures a minimum turn-off time of the secondary side switching tube.
In some embodiments, the first determining unit 21 may be configured as shown in fig. 9, including a detection enabling module 211 and a first detecting module 212. The first detection module 212 may be a trigger. The detection enable module 211 may include a comparator (not shown), a timer, and a trigger. The comparator (which may be the same comparator as the comparator in fig. 8 or may be different from the comparator, and a comparator is additionally provided) is used for comparing VDS with the first threshold voltage VTH1, and the timer is used for timing whether the duration of VDS greater than the first threshold voltage VTH1 reaches the second preset duration T2, if so, the trigger CLK end of the detection enabling module 211 will receive a jump signal (for example, from low to high), and the output of the output Q of the trigger will be equal to the input of the D end thereof, i.e., the high level. Thereafter, the flip-flop D of the first detection module 212 receives an enable signal (EN goes from low to high), and if a transition signal (e.g., CP1 transitions from low to high) is received after the CLK end of the first detection module 212, the output Q of the first detection module 212 will be equal to the level of the input D, i.e., transitions high, indicating that VDS falls below VTH 1.
The second judging unit 22 is electrically connected to the first judging unit 21, and outputs a secondary side on signal (for example, ton=1) when judging that the VDS decreases to VTH2 within the first preset period T1 based on the first detection signal DET1 and the first comparison signal CP1 after receiving the first detection signal DET1, indicating that the VDS decreases fast. Here, it may be that when the first determination unit 21 detects that VDS is smaller than VTH1, det1=1, at which time the trigger enable or the trigger second determination unit 22 starts to execute its corresponding function.
In some embodiments, as shown in fig. 6, the second judging unit 22 includes a timing module 221 and a second judging module 222;
A timing module 221, configured to output a first timing signal PULSE that characterizes a first preset duration T1 when VDS is less than VTH1, for example, as shown in fig. 7, a duration corresponding to a high level of the PULSE is T1;
The second determining module 222 is configured to determine whether the VDS decreases to VTH2 within the first preset duration T1 according to the first timing signal PULSE and the first comparison signal CP 1.
In the present application, as shown in fig. 9, when VDS is determined to be smaller than VTH1, the output signal det1=1 of the first determining unit 21, and the timing module 221 is connected to the output terminal of the first determining unit 21, and is triggered to start timing when det1=1 until the timing is full of the first preset time period T1. That is, when det1=1, the timing module 221 will output a timing signal PULSE characterizing the duration T1, as shown in fig. 7. In fig. 7, the first transition edge of the PULSE signal corresponds to the time when the timing module 221 starts to count, and the second transition edge corresponds to the time when the first preset duration T1 is full. The second judging module 222 synthesizes the first timing signal PULSE and the first comparison signal CP1, and based on the two signals, judges whether the VDS falls to VTH2 within the first preset time period T1, if so, it indicates that the VDS falls fast, which is caused by the disconnection of the primary side switching tube P2. It should be noted that, in some embodiments, the second determining module 222 is enabled or reset under the control of GATEN signals (GATE represents the on-off state of the secondary side switching tube, GATEN is the inverted signal thereof). When in the enabled state, it may perform its judgment function.
As shown in fig. 9, the second judging module 222 is optionally a flip-flop, the data input end (D end) of which is connected to the output end of the timing module 221, the CLK end is connected to the output end of the first comparing circuit 1 to receive the first comparing signal CP1, the Set end receives GATEN signal, and the output signal of the output end Q is used as the on control signal Ton of the secondary side switching tube. The second determination module 222 performs detection only when the secondary side switching tube is turned off (GATEN =1). For example, in fig. 9, GATEN =1, the Q output will change according to the D and CLK signals, and when GATEN =0, the Q will always be 0.
The operation principle of the synchronous rectification circuit according to the above embodiment of the present application will be described below with reference to fig. 8 to 10.
In the initial state, when VDS > VTH1, vds_det=1, the output of the pulse enable module a in the enable circuit 4 is reset once (for example, EN1A is a short low level pulse, i.e. EN1A jumps low immediately after VDS exceeds VTH1, after a short time, and jumps high), and after and, EN1 is also briefly low (see fig. 10), the first determination module 212 is reset, and q=0 is output. Further, ckn=1, ckp=0, and vth1 is input to the non-inverting terminal of the comparator through the transmission gate. Meanwhile, when the detection enabling module 211 detects that VDS > VTH1 reaches T2, the detection enabling module 211 output signal EN will be pulled high. When the primary switch is turned off and Vds suddenly drops, after Vds < VTH1, CP1 is turned to 1, det1 is turned to 1, and det1 is high, a reset signal (e.g., EN2 is a short low pulse) is generated by the reset circuit 5 to reset the first comparison circuit 1, and CP1 is pulled low. Meanwhile, ckn=0 and ckp=1, and the threshold value of the same-phase end of the first comparison circuit 1 is changed to VTH2. While DET1 is high, the timer module 221 starts to count, the PULSE high level has a width of T1, if VDS < VTH2, CP1 is pulled high during the time T1 (when PULSE is high), ton=1, which represents that the VDS/VDS drop rate is fast, and the synchronous rectifier will be turned on.
In the embodiment shown in fig. 9, the detection enabling module 211 and the first determining module 212 are enabled only after the secondary side switching tube P1 is turned off. For example, referring to fig. 9, after the secondary side switch P1 is turned on, the detection enable module 211 triggers the Set terminal to 0 (en1=0), and the Q terminal will output 0, and at this time, the output of the trigger will not change according to the signals of the D terminal and the CLK terminal. Similarly, after the secondary side switch tube P1 is turned on, the Set end of the first judging module 212 is 0, and the q end will output 0, and at this time, the output of the flip-flop will not change according to the signals of the D end and the CLK end. And only after the secondary side switch tube P1 is disconnected, the detection enabling module and the first judging module can be enabled, namely the Set end can be 1, and the output of the trigger can be changed according to the signals of the D end and the CLK end, so that detection is realized. Also, the second determination module 222 changes the output according to the D-terminal and CLK-terminal signals only when GATEN =1, thereby realizing detection.
In a second aspect, an embodiment of the present application provides a synchronous rectification control chip, which includes the synchronous rectification control circuit according to the first aspect.
In a third aspect, the application provides a switching power supply, which comprises a secondary side switching tube, an energy storage device and the synchronous rectification control chip in the second aspect. Wherein the energy storage device comprises a capacitor.
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described as different from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A synchronous rectification control circuit, comprising:
a first comparing circuit for comparing input signals of the first input terminal and the second input terminal and outputting a first comparison signal CP1; the first input end is used for receiving a sampling voltage VDS of drain-source voltage of the secondary side switching tube, and the second input end is used for receiving a first threshold voltage VTH1 and a second threshold voltage VTH2 in a time-sharing mode;
and the control circuit is electrically connected with the output end of the first comparison circuit and is used for determining the falling time length of the VDS from the VTH1 to the VTH2 based on the first comparison signal CP1 and outputting a secondary side conduction signal when the falling time length is not more than a first preset time length T1 so as to control the secondary side switching tube to be conducted.
2. The synchronous rectification control circuit according to claim 1, wherein said control circuit comprises: a switching circuit;
The switching circuit is configured to switch the second input terminal of the first comparison circuit to be VTH1 or VTH2.
3. The synchronous rectification control circuit of claim 2, wherein,
In an initial state, the second input end of the first comparison circuit is connected with VTH1;
The switching circuit switches the second input end of the first comparison circuit from VTH1 to VTH2 after VDS is lowered to VTH1, and switches the second input end of the first comparison circuit back to VTH1 after slope detection is completed.
4. The synchronous rectification control circuit of claim 3, wherein said control circuit further comprises: a reset circuit;
The reset circuit is used for resetting the first comparison circuit when VDS is reduced to be lower than VTH 1.
5. The synchronous rectification control circuit as claimed in any one of claims 1 to 4, wherein,
When the secondary side switching tube is in an off state, the control circuit can judge the falling rate of the VDS.
6. The synchronous rectification control circuit according to claim 5, wherein said control circuit comprises: the first judging unit and the second judging unit;
The first judging unit judges whether VDS is smaller than VTH1 based on the first comparison signal CP1 and outputs a first detection signal;
The second judging unit judges whether VDS decreases to VTH2 within a first preset period T1 based on the first detection signal and the first comparison signal CP 1.
7. The synchronous rectification control circuit of claim 6, wherein said control circuit further comprises a control circuit for controlling said synchronous rectification circuit,
After VDS is greater than VTH1 for a second preset period of time T2, the first determining unit may determine whether VDS is less than VTH 1.
8. The synchronous rectification control circuit according to claim 7, wherein said second judging unit comprises a timing module and a second judging module;
The timing module is configured to output a first timing signal PULSE representing the first preset duration T1 when VDS is smaller than VTH 1;
The second judging module is configured to judge whether VDS decreases to VTH2 within the first preset duration T1 according to the first timing signal PULSE and the first comparison signal CP 1.
9. A synchronous rectification control chip, characterized by comprising the synchronous rectification control circuit according to any one of claims 1 to 8.
10. A switching power supply comprising a secondary side switching tube, an energy storage device and the synchronous rectification control chip of claim 9.
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