CN118100599B

CN118100599B - Transient detection circuit, voltage converter and power supply device

Info

Publication number: CN118100599B
Application number: CN202410503046.9A
Authority: CN
Inventors: 陈柬仲; 游剑
Original assignee: Shenzhen Weiyuan Semiconductor Co ltd
Current assignee: Shenzhen Weiyuan Semiconductor Co ltd
Priority date: 2024-04-25
Filing date: 2024-04-25
Publication date: 2024-07-26
Anticipated expiration: 2044-04-25
Also published as: CN118100599A

Abstract

The application is suitable for the technical field of electronic circuits and provides a transient detection circuit, a voltage converter and a power supply device. The transient detection circuit comprises a first logic unit, a second logic unit, a first adjusting unit and a second adjusting unit, wherein the first adjusting unit is electrically connected with the first logic unit and the second adjusting unit respectively, the second logic unit is electrically connected with the second adjusting unit, the first adjusting unit and the second adjusting unit are both used for being electrically connected with a voltage conversion module in the voltage converter, and the first logic unit and the second logic unit are both used for being electrically connected with a voltage acquisition module in the voltage converter. According to the embodiment of the application, the transient detection circuit is additionally arranged, so that the output voltage can be quickly regulated when the load is suddenly changed, and the output voltage can be quickly restored to a normal value. The problem that the transient response speed of the existing voltage converter is low when the load suddenly changes is solved, and the transient response speed of the voltage converter is improved.

Description

Transient detection circuit, voltage converter and power supply device

Technical Field

The present application relates to a transient detection circuit, a voltage converter and a power supply device, and particularly to a transient detection circuit, a voltage converter and a power supply device.

Background

In the field of direct current power sources, the voltage converter has the characteristics of high conversion efficiency, low cost, good dynamic response and the like, and becomes an important structure of a power module. The topology structure of the voltage converter comprises an output filter circuit consisting of an inductor and a capacitor. The transient response of a voltage converter mainly comprises a load transient response, which refers to a situation that causes a change in the output voltage when a load suddenly changes. However, in the conventional voltage converter, due to the hysteresis of the output filter circuit and the response speed of the control loop, when the load is changed relatively greatly, the output voltage is shifted relatively greatly, and the output voltage needs to be restored to a normal value for a long time, so that the transient response is slow.

Disclosure of Invention

The embodiment of the application provides a transient detection circuit, a voltage converter and a power supply device, which can solve the problems that the output voltage of the existing voltage converter needs to be recovered to a normal value for a long time and the transient response is slow when a load is changed greatly rapidly.

In a first aspect, an embodiment of the present application provides a transient detection circuit, including a first logic unit, a second logic unit, a first adjusting unit and a second adjusting unit, where the first adjusting unit is electrically connected to the first logic unit and the second adjusting unit, the second logic unit is electrically connected to the second adjusting unit, the first adjusting unit and the second adjusting unit are both used for being electrically connected to a voltage conversion module in a voltage converter, and the first logic unit and the second logic unit are both used for being electrically connected to a voltage acquisition module in the voltage converter;

The voltage acquisition module is used for acquiring the output voltage of the voltage conversion module and outputting the acquired voltage according to the output voltage of the voltage conversion module; when the falling slope of the output voltage of the voltage conversion module is smaller than a first preset slope, the first logic unit is used for outputting a first logic signal according to a preset reference voltage and the acquisition voltage; the first regulating unit is used for outputting a first regulating current to the voltage conversion module according to the first logic signal; the first regulating current is used for indicating the voltage conversion module to increase the falling slope of the output voltage;

When the rising slope of the output voltage of the voltage conversion module is larger than a second preset slope, the second logic unit is used for outputting a second logic signal according to the preset reference voltage and the acquisition voltage; the second adjusting unit is used for outputting a second adjusting current to the voltage conversion module according to the second logic signal; the second regulated current is used for instructing the voltage conversion module to reduce the rising slope of the output voltage.

In one possible implementation manner of the first aspect, the first logic unit includes a first resistor, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube and a fifth switching tube, a gate of the first switching tube is used for being electrically connected with the voltage acquisition module, a drain of the first switching tube is respectively electrically connected with a drain of the third switching tube, a gate of the third switching tube and a gate of the fourth switching tube, and a source of the first switching tube is electrically connected with a first end of the first resistor; the grid electrode of the second switching tube is used for receiving the preset reference voltage, the drain electrode of the second switching tube is respectively and electrically connected with the drain electrode of the fourth switching tube and the first adjusting unit, and the source electrode of the second switching tube is respectively and electrically connected with the second end of the first resistor and the drain electrode of the fifth switching tube; the source electrode of the third switching tube and the source electrode of the fourth switching tube are electrically connected with a power supply, the grid electrode of the fifth switching tube is used for receiving a first bias voltage, and the source electrode of the fifth switching tube is grounded.

In a possible implementation manner of the first aspect, the first logic unit further includes a sixth switching tube, a seventh switching tube, and an eighth switching tube, a gate of the sixth switching tube is electrically connected to a drain of the fourth switching tube and a drain of the second switching tube, a source of the sixth switching tube is electrically connected to the power supply, a drain of the sixth switching tube is electrically connected to a drain of the eighth switching tube and the first adjusting unit, a gate of the seventh switching tube is electrically connected to a drain of the seventh switching tube, a gate of the fifth switching tube, and a gate of the eighth switching tube, and a source of the seventh switching tube and a source of the eighth switching tube are all grounded.

In a possible implementation manner of the first aspect, the second logic unit includes a second resistor, a ninth switching tube, a tenth switching tube, an eleventh switching tube, a twelfth switching tube, and a thirteenth switching tube, a gate of the ninth switching tube is used for receiving the collection voltage, a drain of the ninth switching tube is electrically connected to the drain of the eleventh switching tube, the gate of the eleventh switching tube, and the gate of the twelfth switching tube, and a source of the ninth switching tube is electrically connected to a second end of the second resistor and the drain of the thirteenth switching tube, respectively; the grid electrode of the tenth switching tube is used for receiving the preset reference voltage, the drain electrode of the tenth switching tube is respectively and electrically connected with the drain electrode of the twelfth switching tube and the second adjusting unit, and the source electrode of the tenth switching tube is electrically connected with the first end of the second resistor; the source electrode of the eleventh switching tube and the source electrode of the twelfth switching tube are electrically connected with a power supply, the grid electrode of the thirteenth switching tube is used for receiving a second bias voltage, and the source electrode of the thirteenth switching tube is grounded.

In a possible implementation manner of the first aspect, the second logic unit further includes a fourteenth switching tube, a fifteenth switching tube, and a sixteenth switching tube, a gate of the fourteenth switching tube is electrically connected to a drain of the twelfth switching tube and a drain of the tenth switching tube, a source of the fourteenth switching tube is electrically connected to the power supply, a drain of the fourteenth switching tube is electrically connected to a drain of the fifteenth switching tube and the second adjusting unit, a gate of the fifteenth switching tube is electrically connected to a gate of the thirteenth switching tube, a gate of the sixteenth switching tube, and a drain of the sixteenth switching tube, and a source of the fifteenth switching tube and a source of the sixteenth switching tube are all grounded.

In a possible implementation manner of the first aspect, the first adjusting unit includes a seventeenth switching tube, a gate of the seventeenth switching tube is electrically connected to the first logic unit, a drain of the seventeenth switching tube is electrically connected to the voltage conversion module and the second adjusting unit, and a source of the seventeenth switching tube is grounded.

In a possible implementation manner of the first aspect, the second adjusting unit includes an eighteenth switching tube, a gate electrode of the eighteenth switching tube is electrically connected to the second logic unit, a drain electrode of the eighteenth switching tube is electrically connected to the voltage conversion module and the first adjusting unit, and a source electrode of the eighteenth switching tube is electrically connected to a power supply.

In a possible implementation manner of the first aspect, the transient detection circuit further includes a first current source and a second current source, a first end of the first current source is used for being electrically connected with a power supply, and a second end of the first current source is electrically connected with the first logic unit; the first end of the second current source is used for being electrically connected with the power supply, and the second end of the second current source is electrically connected with the second logic unit.

In a second aspect, an embodiment of the present application provides a voltage converter, including a voltage conversion module, a voltage acquisition module, and a transient detection circuit according to any one of the first aspects, where the voltage conversion module is electrically connected to the voltage acquisition module and the transient detection circuit, and the voltage acquisition module is electrically connected to the transient detection circuit;

The voltage acquisition module is used for acquiring the output voltage of the voltage conversion module and outputting the acquired voltage according to the output voltage of the voltage conversion module; when the falling slope of the output voltage is smaller than a first preset slope, the transient detection circuit is used for outputting a first regulating current; the voltage conversion module is used for increasing the falling slope of the output voltage according to the first regulating current;

When the rising slope of the output voltage is larger than a first preset slope, the transient detection circuit is used for outputting a second regulating current; the voltage conversion module is used for reducing the rising slope of the output voltage according to the second regulating current.

In a third aspect, an embodiment of the present application provides a power supply device, including the voltage converter according to the second aspect.

Compared with the prior art, the embodiment of the application has the beneficial effects that:

the transient detection circuit provided by the embodiment of the application comprises a first logic unit, a second logic unit, a first adjusting unit and a second adjusting unit, wherein the first adjusting unit is respectively and electrically connected with the first logic unit and the second adjusting unit, the second logic unit is electrically connected with the second adjusting unit, the first adjusting unit and the second adjusting unit are both used for being electrically connected with a voltage conversion module in a voltage converter, and the first logic unit and the second logic unit are both used for being electrically connected with a voltage acquisition module in the voltage converter.

When the falling slope of the output voltage of the voltage conversion module is smaller than a first preset slope, the load is indicated to be rapidly increased, the output voltage of the voltage conversion module collected by the voltage collection module is rapidly reduced, and therefore the collection voltage output by the voltage collection module is rapidly reduced, and the difference between the preset reference voltage and the collection voltage is larger than the first preset voltage. The first logic unit is used for outputting a first logic signal according to a preset reference voltage and a collection voltage, and the first adjusting unit is used for outputting a first adjusting current to the voltage conversion module according to the first logic signal. The voltage conversion module increases the falling slope of the output voltage according to the first regulating current, so that the output voltage can be restored to a normal value in a short time, and the output voltage can be quickly regulated.

When the rising slope of the output voltage of the voltage conversion module is larger than a second preset slope, the load is indicated to be rapidly decreased, the output voltage of the voltage conversion module collected by the voltage collection module is rapidly increased, and therefore the collection voltage output by the voltage collection module is rapidly increased, and the difference between the collection voltage and the preset reference voltage is larger than the second preset voltage. The second logic unit is used for outputting a second logic signal according to the preset reference voltage and the acquisition voltage, and the second regulating unit is used for outputting a second regulating current to the voltage conversion module according to the second logic signal. The voltage conversion module reduces the rising slope of the output voltage according to the second regulating current, so that the output voltage can be restored to a normal value in a short time, and the output voltage can be quickly regulated.

From the above, when the slope of the output voltage is suddenly changed, that is, when the load is suddenly changed, the embodiment of the application can realize the rapid adjustment of the output voltage by adding the transient detection circuit, so that the output voltage is rapidly restored to the normal value. The problem that the output voltage of the existing voltage converter needs to be restored to a normal value for a long time when the load is suddenly changed and the transient response speed is low is solved, and the transient response speed of the voltage converter is improved.

It will be appreciated that the advantages of the second to third aspects may be found in the relevant description of the first aspect, and are not described in detail herein.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic block diagram of a prior art voltage converter;

FIG. 2 is a schematic diagram of a circuit connection of a prior art voltage converter;

FIG. 3 is a schematic diagram of voltage waveforms in a prior art voltage converter;

FIG. 4 is a schematic block diagram of a transient detection circuit according to an embodiment of the present application;

FIG. 5 is a schematic block diagram of a transient detection circuit provided in another embodiment of the application;

FIG. 6 is a schematic block diagram of a transient detection circuit provided in another embodiment of the application;

FIG. 7 is a schematic diagram of a circuit connection of a transient detection circuit according to an embodiment of the present application;

FIG. 8 is a schematic diagram of voltage waveforms in a voltage converter according to an embodiment of the present application;

FIG. 9 is a functional block diagram of a voltage converter provided in an embodiment of the present application;

FIG. 10 is a functional block diagram of a voltage converter provided by another embodiment of the present application;

fig. 11 is a schematic circuit connection diagram of a voltage converter according to an embodiment of the application.

In the figure, 10, a transient detection circuit; 101. a first logic unit; 102. a second logic unit; 103. a first adjusting unit; 104. a second adjusting unit; 20. a voltage conversion module; 201. a voltage conversion circuit; 202. a current sampling circuit; 203. a harmonic compensation circuit; 204. a logic circuit; 205. an operational amplifier circuit; 206. a loop compensation circuit; 207. a comparison circuit; 208. a control circuit; 209. a driving circuit; 30. and the voltage acquisition module.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.

As used in the present description and the appended claims, the term "if" may be interpreted in context as "when …" or "once" or "in response to a determination" or "in response to detection. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".

Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

A schematic block diagram of a prior art voltage converter suitable for peak current control is shown in fig. 1. The conventional voltage converter includes a voltage conversion circuit 201, a current sampling circuit 202, a harmonic compensation circuit 203, a logic circuit 204, a voltage acquisition module 30, an operational amplification circuit 205, a loop compensation circuit 206, a comparison circuit 207, a control circuit 208, and a driving circuit 209. The voltage conversion circuit 201 is electrically connected to the driving circuit 209, the current sampling circuit 202, and the voltage acquisition module 30, the logic circuit 204 is electrically connected to the current sampling circuit 202, the harmonic compensation circuit 203, and the comparison circuit 207, the operational amplification circuit 205 is electrically connected to the voltage acquisition module 30, the comparison circuit 207, and the loop compensation circuit 206, and the control circuit 208 is electrically connected to the comparison circuit 207 and the driving circuit 209.

The voltage conversion circuit 201 is configured to provide the output voltage VOUT to the voltage acquisition module 30 according to the driving signal; the voltage acquisition module 30 is configured to divide the output voltage VOUT and output an acquisition voltage VFB to the operational amplifier circuit 205; the operational amplifier circuit 205 is configured to output a reference voltage VCOM to the comparison circuit 207 according to the collection voltage VFB and a preset reference voltage VREF; the current sampling circuit 202 is configured to sample the inductor current in the voltage conversion circuit 201 and output the inductor current to the logic circuit 204; the harmonic compensation circuit 203 is configured to output a harmonic current to the logic circuit 204; the logic circuit 204 is configured to output a logic voltage VSUM to the comparison circuit 207 according to the inductor current and the harmonic current; the comparison circuit 207 is configured to output a PWM signal to the control circuit 208 according to the logic voltage VSUM and the reference voltage VCOM; the control circuit 208 is configured to output a control signal Vctrl to the driving circuit 209 according to the clock signal CLK and the PWM signal; the driving circuit 209 is configured to output a driving signal to the voltage conversion circuit 201 according to the control signal Vctrl; the loop compensation circuit 206 is used to form a proportional-integral compensation zero to stabilize the loop.

A schematic diagram of the circuit connection of a prior art voltage converter suitable for peak current control is shown in fig. 2. The voltage acquisition module 30 includes a tenth resistor R10 and a twentieth resistor R20, where a first end of the twentieth resistor R20 is electrically connected to the voltage conversion circuit 201, and a second end of the twentieth resistor R20 is electrically connected to a first end of the tenth resistor R10 and the operational amplifier circuit 205, respectively, and a second end of the tenth resistor R10 is grounded. The tenth resistor R10 and the twentieth resistor R20 are used for dividing the output voltage VOUT and outputting the sampling voltage VFB to the operational amplifier circuit 205. The operational amplifier circuit 205 includes an operational amplifier EA, a first input terminal (negative input terminal) of the operational amplifier EA is configured to receive the collection voltage VFB, a second input terminal (positive input terminal) of the operational amplifier EA is configured to receive the preset reference voltage VREF, and an output terminal of the operational amplifier EA is configured to output the reference voltage VCOM to the comparison circuit 207. The logic circuit 204 includes an adder and a sampling resistor Rsum, a first input terminal of the adder is used for receiving the inductive current output by the current sampling circuit 202, a second input terminal of the adder is used for receiving the harmonic current output by the harmonic compensation circuit 203, an output terminal of the adder is used for connecting a first terminal of the sampling resistor Rsum, and a second terminal of the sampling resistor Rsum is electrically connected with the comparison circuit 207. The adder is used for adding the inductor current and the harmonic current, and outputting the logic voltage VSUM to the comparison circuit 207 through the sampling resistor Rsum. The comparison circuit 207 includes a comparator COMP, a first input terminal (positive input terminal) of the comparator COMP is configured to receive the logic voltage VSUM, a second input terminal (negative input terminal) of the comparator COMP is configured to receive the reference voltage VCOM, and an output terminal of the comparator COMP is configured to output the PWM signal to the control circuit 208. The loop compensation circuit 206 includes a thirty-first resistor R30 and a tenth capacitor C10, wherein a first end of the thirty-first resistor R30 is electrically connected to the output terminal of the operational amplifier EA and the second input terminal of the comparator COMP, and a second end of the thirty-first resistor R30 is electrically connected to a first end of the tenth capacitor C10, and a second end of the tenth capacitor C10 is grounded. The thirty-first resistor R30 and the tenth capacitor C10 form a proportional integral (Proportional Integral, PI) compensation zero to achieve loop stability.

As can be seen from the above, when the load changes, the inner loop current loop transmits the detected inductor current to the logic circuit 204 through the current sampling circuit 202, and the logic circuit 204 outputs the logic voltage VSUM according to the inductor current and the harmonic current. In the outer loop voltage loop, the voltage acquisition module 30 divides the output voltage VOUT and then outputs an acquisition voltage VFB, which is transmitted to the operational amplifier EA, and the operational amplifier EA outputs a reference voltage VCOM according to the acquisition voltage VFB and a preset reference voltage VREF. The comparator adjusts the duty ratio of the PWM signal according to the logic voltage VSUM and the reference voltage VCOM to realize the adjustment of the output voltage VOUT. The outer loop voltage loop may oscillate due to the presence of multiple poles, thus requiring the series connection of the thirty-first resistor R30 and the tenth capacitor C10 to form a proportional-integral compensation zero to achieve outer loop voltage loop stability.

Fig. 3 is a schematic diagram of a voltage waveform in a conventional voltage converter. The inner loop current loop is compared with a reference voltage VCOM by a path logic voltage VSUM generated by the current sampling circuit 202 and the harmonic compensation circuit 203. When the logic voltage VSUM reaches the desired reference voltage VCOM, the comparator toggles to generate a PWM signal. For constant frequency systems, each switching cycle begins and the switching tube is triggered to turn on (increase in inductor current during turn-on) by the clock signal CLK until the switching tube turns off (decrease in inductor current during turn-off) after the PWM signal toggles. The ratio of the on time and the off period of the switching tube is the duty ratio. Therefore, as long as the current in the system is slightly changed, the duty cycle can be adjusted to make the output voltage VOUT approach the set voltage VREF/r1 (r1+r2). However, in the process of regulating the output voltage VOUT when the load suddenly changes, the voltage converter has the problem that the output voltage VOUT needs to be recovered to a normal value for a long time, and the transient response is slow.

Based on the above-mentioned problems, the transient detection circuit 10 provided by the embodiment of the application includes a first logic unit 101, a second logic unit 102, a first adjusting unit 103 and a second adjusting unit 104, where the first adjusting unit 103 is electrically connected with the first logic unit 101 and the second adjusting unit 104, the second logic unit 102 is electrically connected with the second adjusting unit 104, the first adjusting unit 103 and the second adjusting unit 104 are both used for electrically connecting with the voltage conversion module 20 in the voltage converter, and the first logic unit 101 and the second logic unit 102 are both used for electrically connecting with the voltage acquisition module 30 in the voltage converter.

When the falling slope of the output voltage VOUT of the voltage conversion module 20 is smaller than the first preset slope, it is indicated that the load is rapidly increased, and the output voltage VOUT of the voltage conversion module 20 collected by the voltage collection module 30 is rapidly decreased, so that the collected voltage VFB output by the voltage collection module 30 is rapidly decreased, and the difference between the preset reference voltage VREF and the collected voltage VFB is larger than the first preset voltage. The first logic unit 101 is configured to output a first logic signal according to a preset reference voltage VREF and a collection voltage VFB, and the first adjusting unit 103 is configured to output a first adjusting current to the voltage conversion module 20 according to the first logic signal. The voltage conversion module 20 increases the falling slope of the output voltage VOUT according to the first regulating current, so that the output voltage VOUT can be recovered to a normal value in a short time, and rapid regulation of the output voltage VOUT is realized.

When the rising slope of the output voltage VOUT of the voltage conversion module 20 is greater than the second preset slope, it indicates that the load is rapidly decreased, and the output voltage VOUT of the voltage conversion module 20 collected by the voltage collection module 30 is rapidly increased, so that the collected voltage VFB output by the voltage collection module 30 is rapidly increased, and the difference between the collected voltage VFB and the preset reference voltage VREF is greater than the second preset voltage. The second logic unit 102 is configured to output a second logic signal according to the preset reference voltage VREF and the collection voltage VFB, and the second adjusting unit 104 is configured to output a second adjusting current to the voltage conversion module 20 according to the second logic signal. The voltage conversion module 20 reduces the rising slope of the output voltage VOUT according to the second regulating current, so that the output voltage VOUT can be restored to a normal value in a short time, and the output voltage VOUT can be quickly regulated to the normal value.

As can be seen from the above, when the slope of the output voltage VOUT is suddenly changed, that is, when the load is suddenly changed, the embodiment of the application can realize fast regulation of the output voltage VOUT by adding the transient detection circuit 10, so that the output voltage VOUT is fast recovered to a normal value. The problem that the output voltage VOUT needs to be recovered to a normal value for a long time when the load of the existing voltage converter suddenly changes and the transient response speed is low is solved, and the transient response speed of the voltage converter is improved.

In order to illustrate the technical scheme of the application, the following description is made by specific examples.

Fig. 4 shows a functional block diagram of a transient detection circuit 10 according to an embodiment of the application. Referring to fig. 4, the transient detection circuit 10 includes a first logic unit 101, a second logic unit 102, a first adjusting unit 103, and a second adjusting unit 104, where the first adjusting unit 103 is electrically connected to the first logic unit 101 and the second adjusting unit 104, and the second logic unit 102 is electrically connected to the second adjusting unit 104, and the first adjusting unit 103 and the second adjusting unit 104 are both used to be electrically connected to the voltage conversion module 20 in the voltage converter, and the first logic unit 101 and the second logic unit 102 are both used to be electrically connected to the voltage acquisition module 30 in the voltage converter.

Specifically, when the falling slope of the output voltage VOUT of the voltage conversion module 20 is smaller than the first preset slope, it indicates that the load is rapidly increased, and the output voltage VOUT of the voltage conversion module 20 collected by the voltage collection module 30 is rapidly decreased, so that the collected voltage VFB output by the voltage collection module 30 is rapidly decreased, and the difference between the preset reference voltage VREF and the collected voltage VFB is larger than the first preset voltage. The first logic unit 101 is configured to output a first logic signal according to a preset reference voltage VREF and a collection voltage VFB, and the first adjusting unit 103 is configured to output a first adjusting current to the voltage conversion module 20 according to the first logic signal. The voltage conversion module 20 increases the falling slope of the output voltage VOUT according to the first regulating current, so that the output voltage VOUT can be recovered to a normal value in a short time, and rapid regulation of the output voltage VOUT is realized.

It should be noted that, the slope of the output voltage VOUT is the magnitude of the change of the output voltage VOUT in a unit time. According to the embodiment of the application, the transient detection circuit 10 is additionally arranged, so that the amplitude of the output voltage VOUT which is rapidly reduced or rapidly increased is reduced, and the output voltage VOUT is less influenced by load change, namely the voltage converter provided by the embodiment of the application has a rapid response speed to load mutation, and the output voltage VOUT can be rapidly restored to a stable normal value.

As shown in fig. 5, the voltage conversion module 20 mainly includes a voltage conversion circuit 201, a current sampling circuit 202, a harmonic compensation circuit 203, a logic circuit 204, an operational amplifier circuit 205, a loop compensation circuit 206, a comparison circuit 207, a control circuit 208, and a driving circuit 209. The voltage conversion circuit 201 is electrically connected to the driving circuit 209, the current sampling circuit 202, and the voltage acquisition module 30, the logic circuit 204 is electrically connected to the current sampling circuit 202, the harmonic compensation circuit 203, the first adjusting unit 103, the second adjusting unit 104, and the comparison circuit 207, the operational amplification circuit 205 is electrically connected to the voltage acquisition module 30, the first logic unit 101, the second logic unit 102, the comparison circuit 207, and the loop compensation circuit 206, and the control circuit 208 is electrically connected to the comparison circuit 207 and the driving circuit 209.

Specifically, the voltage conversion circuit 201 is configured to provide the output voltage VOUT to the voltage acquisition module 30 according to the driving signal; the voltage acquisition module 30 is configured to divide the output voltage VOUT and output an acquisition voltage VFB to the first logic unit 101, the second logic unit 102, and the operational amplifier circuit 205; the operational amplifier circuit 205 is configured to output a reference voltage VCOM to the comparison circuit 207 according to the collection voltage VFB and a preset reference voltage VREF; the first logic unit 101 is configured to output a first logic signal when a falling slope of the output voltage VOUT is smaller than a first preset slope, that is, when a difference between the preset reference voltage VREF and the collection voltage VFB is greater than the first preset voltage, and the first adjusting unit 103 is configured to output a first adjusting current to the logic circuit 204 according to the first logic signal; the second logic unit 102 is configured to output a second logic signal when a rising slope of the output voltage VOUT is greater than a second preset slope, that is, when a difference between the collected voltage VFB and the preset reference voltage VREF is greater than a second preset voltage, and the second regulating unit 104 is configured to output a second regulating current to the logic circuit 204 according to the second logic signal; the current sampling circuit 202 is configured to sample the inductor current in the voltage conversion circuit 201 and output the inductor current to the logic circuit 204; the harmonic compensation circuit 203 is configured to output a harmonic current to the logic circuit 204; the logic circuit 204 is configured to output a corresponding logic voltage VSUM to the comparison circuit 207 according to the inductor current, the harmonic current, and the first adjustment current, or the logic circuit 204 is configured to output a corresponding logic voltage VSUM to the comparison circuit 207 according to the inductor current, the harmonic current, and the second adjustment current; the comparison circuit 207 is configured to output a PWM signal to the control circuit 208 according to the logic voltage VSUM and the reference voltage VCOM; the control circuit 208 is configured to output a control signal Vctrl to the driving circuit 209 according to the clock signal CLK and the PWM signal; the driving circuit 209 is configured to output a driving signal to the voltage conversion circuit 201 according to the control signal Vctrl; the loop compensation circuit 206 is used to form a proportional-integral compensation zero to stabilize the loop.

It should be noted that, as shown in fig. 6, the working principle of the voltage converter provided by the embodiment of the application is as follows: the voltage acquisition module 30 includes a tenth resistor R10 and a twentieth resistor R20, where a first end of the twentieth resistor R20 is electrically connected to the voltage conversion circuit 201, and a second end of the twentieth resistor R20 is electrically connected to the first end of the tenth resistor R10, the first logic unit 101, and the second logic unit 102, respectively, and a second end of the tenth resistor R10 is grounded. The tenth resistor R10 and the twentieth resistor R20 are used for dividing the output voltage VOUT and outputting the sampling voltage VFB to the operational amplifier circuit 205. The operational amplifier circuit 205 includes an operational amplifier EA, a first input terminal (negative input terminal) of the operational amplifier EA is configured to receive the collection voltage VFB, a second input terminal (positive input terminal) of the operational amplifier EA is configured to receive the preset reference voltage VREF, and an output terminal of the operational amplifier EA is configured to output the reference voltage VCOM to the comparison circuit 207. The logic circuit 204 includes an adder and a sampling resistor Rsum, a first input terminal of the adder is used for receiving the inductive current output by the current sampling circuit 202, a second input terminal of the adder is used for receiving the harmonic current output by the harmonic compensation circuit 203, a third input terminal of the adder is used for receiving the first adjusting current or the second adjusting current, an output terminal of the adder is used for connecting a first terminal of the sampling resistor Rsum, and a second terminal of the sampling resistor Rsum is electrically connected with the comparison circuit 207. The adder is configured to add the inductor current, the harmonic current, and the first adjustment current (or the inductor current, the harmonic current, and the second adjustment current), convert the added value into a logic voltage VSUM through the sampling resistor Rsum, and output the logic voltage VSUM to the comparison circuit 207. The comparison circuit 207 includes a comparator COMP, a first input terminal (positive input terminal) of the comparator COMP is configured to receive the logic voltage VSUM, a second input terminal (negative input terminal) of the comparator COMP is configured to receive the reference voltage VCOM, and an output terminal of the comparator COMP is configured to output the PWM signal to the control circuit 208. The loop compensation circuit 206 includes a thirty-first resistor R30 and a tenth capacitor C10, wherein a first end of the thirty-first resistor R30 is electrically connected to the output terminal of the operational amplifier EA and the second input terminal of the comparator COMP, and a second end of the thirty-first resistor R30 is electrically connected to a first end of the tenth capacitor C10, and a second end of the tenth capacitor C10 is grounded. The thirty-first resistor R30 and the tenth capacitor C10 form a proportional integral (Proportional Integral, PI) compensation zero to achieve loop stability.

When the load changes, the inner loop current loop transmits the detected inductance current to the logic circuit 204 through the current sampling circuit 202, the first adjusting current output by the first adjusting unit 103 is transmitted to the logic circuit 204, and the second adjusting current output by the second adjusting unit 104 is transmitted to the logic circuit 204. The logic circuit 204 outputs a logic voltage VSUM based on the inductor current, the harmonic current, and the regulating current (either the first regulating current or the second regulating current). In the outer loop voltage loop, the voltage acquisition module 30 divides the output voltage VOUT and then outputs an acquisition voltage VFB, which is transmitted to the operational amplifier EA, and the operational amplifier EA outputs a reference voltage VCOM according to the acquisition voltage VFB and a preset reference voltage VREF. The comparator adjusts the duty ratio of the PWM signal according to the logic voltage VSUM and the reference voltage VCOM to realize the adjustment of the output voltage VOUT. As can be seen from the above, when the load suddenly changes, (wherein the sudden change of the load includes the sudden change of the load from the light load to the heavy load and the sudden change of the load from the heavy load to the light load), the first adjusting unit 103/the second adjusting unit 104 in the transient detection circuit 10 outputs the first adjusting current or the second adjusting current to the logic circuit 204, so as to quickly pull down/up the logic voltage VSUM output by the logic circuit 204, so that the duty ratio of the PWM signal output by the comparing circuit 207 is increased/decreased, thereby quickly adjusting the output voltage VOUT, enabling the output voltage VOUT to return to the normal value in a short time, and improving the transient response speed of the voltage converter.

In one embodiment of the present application, as shown in fig. 7, the first logic unit 101 includes a first resistor R1, a first switching tube M1, a second switching tube M2, a third switching tube M3, a fourth switching tube M4, and a fifth switching tube M5, wherein a gate of the first switching tube M1 is electrically connected to the voltage acquisition module 30, and a drain of the first switching tube M1 is electrically connected to a drain of the third switching tube M3, a gate of the third switching tube M3, and a gate of the fourth switching tube M4, respectively, and a source of the first switching tube M1 is electrically connected to a first end of the first resistor R1; the grid electrode of the second switching tube M2 is used for receiving a preset reference voltage VREF, the drain electrode of the second switching tube M2 is respectively and electrically connected with the drain electrode of the fourth switching tube M4 and the first regulating unit 103, and the source electrode of the second switching tube M2 is respectively and electrically connected with the second end of the first resistor R1 and the drain electrode of the fifth switching tube M5; the source electrode of the third switching tube M3 and the source electrode of the fourth switching tube M4 are electrically connected with the power supply VDD, the grid electrode of the fifth switching tube M5 is used for receiving the first bias voltage, and the source electrode of the fifth switching tube M5 is grounded.

Specifically, the third switching tube M3 and the fourth switching tube M4 form a current mirror, and the currents flowing through the third switching tube M3 and the fourth switching tube M4 are the same. The first switching tube M1, the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 may form an operational amplifier, the first logic unit 101 is further added with a first resistor R1, and the first resistor R1, the first switching tube M1, the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 form a first-stage operational amplifier. The first input terminal (positive input terminal) of the first operational amplifier is used for receiving the preset reference voltage VREF, the second input terminal (negative input terminal) of the first operational amplifier is used for receiving the sampling voltage VFB, and the output terminal of the first operational amplifier is electrically connected to the first adjusting unit 103 (not shown in fig. 7) and is used for outputting the first logic signal to the first adjusting unit 103. Since the second end of the first resistor R1 intersects the source of the second switching tube M2 at a point, the second end of the first resistor R1 is the same as the source voltage of the second switching tube M2. Meanwhile, a voltage drop occurs across the first resistor R1 when the first switching transistor M1 is in an on state, and thus, an output logic signal is determined according to a relationship between the sum of the collection voltage VFB and the voltage drop and the preset reference voltage VREF. When the preset reference voltage VREF is greater than the sum of the acquisition voltage VFB and the voltage drop, namely the output voltage VOUT drops by a first threshold voltage, the first-stage operational amplifier outputs a first logic signal to the first regulating unit 103, so that the first regulating unit 103 is conducted and generates a pull-down current; when the preset reference voltage VREF is smaller than or equal to the sum of the collection voltage VFB and the voltage drop, that is, the output voltage VOUT is greater than or equal to the set voltage, the first stage operational amplifier outputs a third logic signal to the first adjusting unit 103, so that the first adjusting unit 103 is turned off, and no pull-down current is generated.

It should be noted that, if the preset reference voltage VREF is greater than the sum of the collected voltage VFB and the voltage drop, it indicates that the load is rapidly increased, and the falling slope of the output voltage VOUT is smaller than the first preset slope, that is, the output voltage VOUT is rapidly decreased, so that the collected voltage VFB is rapidly decreased, and when the collected voltage VFB is smaller than the difference between the preset reference voltage VREF and the voltage drop, the first logic unit 101 in the transient detection circuit 10 may be triggered to output the first logic signal. If the preset reference voltage VREF is less than or equal to the sum of the collected voltage VFB and the voltage drop, the load is not suddenly changed, and the first logic unit 101 in the transient detection circuit 10 is not triggered to output the first logic signal, and the first logic unit 101 outputs the third logic signal.

For example, the designer may select the types of the first switching tube M1, the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 according to actual situations, that is, all the fully-controlled power devices such as metal oxide field effect transistors or insulated gate bipolar transistors may be adopted. For example, the first switching tube M1, the second switching tube M2, and the fifth switching tube M5 may be selected to be PMOS tubes, and the third switching tube M3 and the fourth switching tube M4 may be selected to be NMOS tubes. The designer can select the size of the first switching tube M1 and the second switching tube M2 according to the actual situation, for example, the size of the first switching tube M1 and the second switching tube M2 can be selected to be the same.

In an embodiment of the present application, as shown in fig. 7, the first logic unit 101 further includes a sixth switching tube M6, a seventh switching tube M7, and an eighth switching tube M8, wherein the gate of the sixth switching tube M6 is electrically connected to the drain of the fourth switching tube M4 and the drain of the second switching tube M2, respectively, the source of the sixth switching tube M6 is electrically connected to the power supply VDD, the drain of the sixth switching tube M6 is electrically connected to the drain of the eighth switching tube M8 and the first adjusting unit 103, the gate of the seventh switching tube M7 is electrically connected to the drain of the seventh switching tube M7, the gate of the fifth switching tube M5, and the gate of the eighth switching tube M8, respectively, and the source of the seventh switching tube M7 and the source of the eighth switching tube M8 are all grounded.

Specifically, the sixth switching tube M6, the seventh switching tube M7, and the eighth switching tube M8 are added in the first logic unit 101, and may form a second operational amplifier together with the first operational amplifier, where a first input end (positive input end) of the second operational amplifier is used to receive the preset reference voltage VREF, a second input end (negative input end) of the second operational amplifier is used to receive the collection voltage VFB, and an output end of the second operational amplifier is electrically connected to the first adjusting unit 103 and is used to output the first logic signal to the first adjusting unit 103. Since a voltage drop occurs on the first resistor R1 when the first switching tube M1 is in the on state, when the preset reference voltage VREF is greater than the sum of the collection voltage VFB and the voltage drop, that is, the output voltage VOUT drops by a first threshold voltage, the second operational amplifier outputs a first logic signal to the first adjusting unit 103, so that the first adjusting unit 103 is turned on and generates a pull-down current; when the preset reference voltage VREF is smaller than or equal to the sum of the collection voltage VFB and the voltage drop, that is, the output voltage VOUT is greater than or equal to the set voltage, the second operational amplifier outputs a third logic signal to the first adjusting unit 103, so that the first adjusting unit 103 is turned off, and no pull-down current is generated.

It should be noted that the operational amplifier may be a primary operational amplifier, a secondary operational amplifier or a multi-stage operational amplifier, and the working principle thereof is basically similar, and will not be described herein in detail.

For example, the designer may select the types of the sixth switching transistor M6, the seventh switching transistor M7, and the eighth switching transistor M8 according to the actual situation, that is, all the fully-controlled power devices such as the metal oxide field effect transistor or the insulated gate bipolar transistor may be adopted. For example, the sixth switching tube M6 may be selected to be NMOS tubes, and the seventh switching tube M7 and the eighth switching tube M8 may be selected to be PMOS tubes.

In one embodiment of the present application, as shown in fig. 7, the first adjusting unit 103 includes a seventeenth switching tube M17, a gate of the seventeenth switching tube M17 is electrically connected to the first logic unit 101, a drain of the seventeenth switching tube M17 is electrically connected to the voltage conversion module 20 and the second adjusting unit 104, and a source of the seventeenth switching tube M17 is grounded.

Specifically, the seventeenth switching transistor M17 is used as a switching device for conducting according to the first logic signal received by the gate, so as to conduct between the source and the drain, thereby generating a pull-down current, and outputting the first adjustment current to the logic circuit 204. The seventeenth switching transistor M17 is further configured to turn off according to the third logic signal received by the gate, so that the source and the drain are turned off, and no pull-down current is generated.

The magnitude of the pull-down current generated in the seventeenth switching transistor M17 is:

Wherein I ₁ is a pull-down current, gm1 is a loop gain in the first logic unit 101, VREF is a preset reference voltage, VFB is a collection voltage, Is the voltage drop across the first resistor R1. Wherein,The voltage of the voltage output by the voltage conversion module 20 needs to be larger than the ripple magnitude of the output voltage VOUT during normal operation, so as to prevent the first logic unit 101 in the transient detection circuit 10 from being triggered by mistake when the voltage conversion module 20 is stable.

For example, a designer may choose the type of the seventeenth switching transistor M17 according to the actual situation, that is, all the fully-controlled power devices such as a metal oxide field effect transistor or an insulated gate bipolar transistor may be used. For example, the seventeenth switching transistor M17 may be selected as a PMOS transistor.

The operation principle of the voltage converter will be described in detail with reference to schematic circuit connection diagrams of the first logic unit 101 and the first adjusting unit 103 in fig. 6 and 7.

When the load rapidly increases, the falling slope of the output voltage VOUT is smaller than the first preset slope, that is, the output voltage VOUT rapidly decreases, so as to cause the collected voltage VFB to rapidly decrease, and when the collected voltage VFB is smaller than the difference between the preset reference voltage VREF and the voltage drop, the first logic unit 101 may be triggered to output the first logic signal to the seventeenth switching tube M17. The seventeenth switching transistor M17 is turned on according to the first logic signal, thereby generating a pull-down current, and outputs a first regulating current to the logic circuit 204, so that the logic voltage VSUM output by the logic circuit 204 is quickly pulled down, the duty ratio of the PWM signal output by the comparison circuit 207 is increased, the inductor current is increased in the process, and more energy is transmitted to the output voltage VOUT, so that the output voltage VOUT is quickly regulated to a normal value. Referring to a T1 period shown in fig. 8, a solid line represents a voltage waveform diagram in a conventional voltage converter, and a dotted line represents a voltage waveform diagram in a voltage converter according to an embodiment of the present application. As can be seen from the T1 time period in fig. 8, compared with the conventional voltage converter, the voltage converter provided with the transient detection circuit 10 according to the embodiment of the application has the falling slope of the output voltage VOUT smaller than the first preset slope when the load is rapidly increased, i.e. the output voltage VOUT is rapidly decreased, thereby increasing the reference voltage VCOM. The transient detection circuit 10 pulls down the logic voltage VSUM, thereby increasing the duty cycle of the PWM signal, and eventually increasing the inductor current, and achieving a fast regulation of the output voltage VOUT.

In one embodiment of the present application, as shown in fig. 7, the second logic unit 102 includes a second resistor R2, a ninth switching tube M9, a tenth switching tube M10, an eleventh switching tube M11, a twelfth switching tube M12, and a thirteenth switching tube M13, a gate of the ninth switching tube M9 is configured to receive the collection voltage VFB, a drain of the ninth switching tube M9 is electrically connected to a drain of the eleventh switching tube M11, a gate of the eleventh switching tube M11, and a gate of the twelfth switching tube M12, and a source of the ninth switching tube M9 is electrically connected to a second end of the second resistor R2 and a drain of the thirteenth switching tube M13, respectively; the gate of the tenth switching tube M10 is configured to receive a preset reference voltage VREF, the drain of the tenth switching tube M10 is electrically connected to the drain of the twelfth switching tube M12 and the second adjusting unit 104, and the source of the tenth switching tube M10 is electrically connected to the first end of the second resistor R2; the source of the eleventh switching tube M11 and the source of the twelfth switching tube M12 are both electrically connected to the power supply VDD, the gate of the thirteenth switching tube M13 is configured to receive the second bias voltage, and the source of the thirteenth switching tube M13 is grounded.

Specifically, the eleventh switching transistor M11 and the twelfth switching transistor M12 form a current mirror, and the currents flowing through the eleventh switching transistor M11 and the twelfth switching transistor M12 are the same. The ninth switching tube M9, the tenth switching tube M10, the eleventh switching tube M11, the twelfth switching tube M12 and the thirteenth switching tube M13 may form an operational amplifier, and the second logic unit 102 is further added with a second resistor R2, where the second resistor R2, the ninth switching tube M9, the tenth switching tube M10, the eleventh switching tube M11, the twelfth switching tube M12 and the thirteenth switching tube M13 form a first-stage operational amplifier. The first input terminal (positive input terminal) of the first operational amplifier is used for receiving the preset reference voltage VREF, the second input terminal (negative input terminal) of the first operational amplifier is used for receiving the sampling voltage VFB, and the output terminal of the first operational amplifier is electrically connected to the first adjusting unit 103 (not shown in fig. 7) and is used for outputting the second logic signal to the second adjusting unit 104. Since the second end of the second resistor R2 intersects the source of the ninth switching transistor M9 at a point, the second end of the second resistor R2 is the same as the source voltage of the ninth switching transistor M9. Meanwhile, a voltage drop occurs across the second resistor R2 when the tenth switching transistor M10 is in the on state, and thus, an output logic signal is determined according to a relationship between the sum of the sampling voltage VFB and the voltage drop and the preset reference voltage VREF. When the preset reference voltage VREF is smaller than the difference between the collected voltage VFB and the voltage drop, i.e., the output voltage VOUT is overcharged with a second threshold voltage, the first-stage operational amplifier outputs a second logic signal to the second adjusting unit 104, so that the second adjusting unit 104 is turned on and generates a pull-up current; when the preset reference voltage VREF is greater than or equal to the difference between the collection voltage VFB and the voltage drop, that is, the output voltage VOUT is less than or equal to the set voltage, the first-stage operational amplifier outputs a fourth logic signal to the second adjusting unit 104, so that the second adjusting unit 104 is disconnected and no pull-up current is generated.

It should be noted that, if the preset reference voltage VREF is smaller than the difference between the collected voltage VFB and the voltage drop, it indicates that the load is rapidly decreased, and the rising slope of the output voltage VOUT is larger than the second preset slope, that is, the output voltage VOUT is rapidly increased, so that the collected voltage VFB is rapidly increased, and when the collected voltage VFB is larger than the sum of the preset reference voltage VREF and the voltage drop, the second logic unit 102 in the transient detection circuit 10 is triggered to output the second logic signal. If the preset reference voltage VREF is greater than or equal to the difference between the collected voltage VFB and the voltage drop, the load is not suddenly changed, and the second logic unit 102 in the transient detection circuit 10 is not triggered to output the second logic signal, and the second logic unit 102 outputs the fourth logic signal.

For example, the designer may select the types of the ninth switching transistor M9, the tenth switching transistor M10, the eleventh switching transistor M11, the twelfth switching transistor M12, and the thirteenth switching transistor M13 according to the actual situation, that is, all the fully-controlled power devices such as the metal oxide field effect transistor or the insulated gate bipolar transistor may be adopted. For example, the ninth switching transistor M9, the tenth switching transistor M10, and the thirteenth switching transistor M13 may be selected to be PMOS transistors, and the eleventh switching transistor M11 and the twelfth switching transistor M12 may be selected to be NMOS transistors. The designer may select the sizes of the ninth switching tube M9 and the tenth switching tube M10 according to the actual situation, for example, the sizes of the ninth switching tube M9 and the tenth switching tube M10 may be the same.

In an embodiment of the present application, as shown in fig. 7, the second logic unit 102 further includes a fourteenth switching tube M14, a fifteenth switching tube M15, and a sixteenth switching tube M16, the gate of the fourteenth switching tube M14 is electrically connected to the drain of the twelfth switching tube M12 and the drain of the tenth switching tube M10, respectively, the source of the fourteenth switching tube M14 is electrically connected to the power supply VDD, the drain of the fourteenth switching tube M14 is electrically connected to the drain of the fifteenth switching tube M15 and the second adjusting unit 104, respectively, the gate of the fifteenth switching tube M15 is electrically connected to the gate of the thirteenth switching tube M13, the gate of the sixteenth switching tube M16, and the drain of the sixteenth switching tube M16, respectively, and the source of the fifteenth switching tube M15 and the source of the sixteenth switching tube M16 are all grounded.

Specifically, the fourteenth switching tube M14, the fifteenth switching tube M15 and the sixteenth switching tube M16 are added in the second logic unit 102, and may form a second operational amplifier together with the first operational amplifier, where a first input end (positive input end) of the second operational amplifier is used for receiving the preset reference voltage VREF, a second input end (negative input end) of the second operational amplifier is used for receiving the collected voltage VFB, and an output end of the second operational amplifier is electrically connected to the second adjusting unit 104 and is used for outputting the second logic signal to the second adjusting unit 104. Since a voltage drop occurs in the second resistor R2 when the tenth switching tube M10 is in the on state, when the preset reference voltage VREF is smaller than the difference between the collected voltage VFB and the voltage drop, that is, the output voltage VOUT is overcharged with a second threshold voltage, the operational amplifier outputs a second logic signal to the second adjusting unit 104, so that the second adjusting unit 104 is turned on and generates a pull-up current; when the preset reference voltage VREF is greater than or equal to the difference between the collection voltage VFB and the voltage drop, that is, the output voltage VOUT is less than or equal to the set voltage, the operational amplifier outputs a fourth logic signal to the second adjusting unit 104, so that the second adjusting unit 104 is turned off, and no pull-up current is generated.

For example, the designer may select the types of the fourteenth switching transistor M14, the fifteenth switching transistor M15 and the sixteenth switching transistor M16 according to the actual situation, that is, all the fully-controlled power devices such as the metal oxide field effect transistor or the insulated gate bipolar transistor may be adopted. For example, the fourteenth switching transistor M14 may be selected to be an NMOS transistor, and the fifteenth switching transistor M15 and the sixteenth switching transistor M16 may be selected to be PMOS transistors.

In one embodiment of the present application, as shown in fig. 7, the second adjusting unit 104 includes an eighteenth switching tube M18, a gate of the eighteenth switching tube M18 is electrically connected to the second logic unit 102, a drain of the eighteenth switching tube M18 is electrically connected to the voltage conversion module 20 and the first adjusting unit 103, and a source of the eighteenth switching tube M18 is electrically connected to the power supply VDD.

Specifically, the eighteenth switching transistor M18 is used as a switching device, and is configured to be turned on according to the second logic signal received by the gate, so as to conduct between the source and the drain, thereby generating a pull-up current, and output a second adjustment current to the logic circuit 204. The eighteenth switching transistor M18 is further configured to turn off according to the fourth logic signal received by the gate, so that the source and the drain are turned off, and no pull-up current is generated.

The magnitude of the pull-up current generated in the eighteenth switching transistor M18 is as follows:

Wherein I ₂ is a pull-up current, gm2 is a loop gain in the second logic unit 102, VREF is a preset reference voltage, VFB is a collection voltage, Is the voltage drop across the second resistor R2. Wherein,The voltage of the voltage output by the voltage conversion module 20 needs to be larger than the ripple magnitude of the output voltage VOUT during normal operation, so as to prevent the false triggering of the second logic unit 102 in the transient detection circuit 10 when the voltage conversion module 20 is stable.

It should be noted that, when considering the ripple of the output voltage VOUT, if the load does not suddenly change, the output total voltage is the sum of the output voltage VOUT and the ripple voltage, that is:

In this process, the first adjusting unit 103 does not generate a pull-down current, the second adjusting unit 104 does not generate a pull-up current, and the transient detection circuit 10 does not output the first adjusting current or the second adjusting current to the logic circuit 204. That is, if V _{Total (S)} satisfies the formula:

the transient detection circuit 10 is not triggered, i.e. does not intervene in the normal operating loop of the voltage converter and does not affect the normal operation of the voltage converter. In this process, the acquisition voltage VFB satisfies:

It should be noted that, when the load is not suddenly changed, the transient detection circuit 10 is not triggered by the normal ripple generated by the output voltage VOUT.

For example, a designer may choose the type of the eighteenth switching transistor M18 according to the actual situation, that is, all the fully-controlled power devices such as a metal oxide field effect transistor or an insulated gate bipolar transistor may be used. For example, the eighteenth switching transistor M18 may be selected as an NMOS transistor.

The operation principle of the voltage converter will be described in detail with reference to schematic circuit connection diagrams of the second logic unit 102 and the second regulating unit 104 in fig. 6 and 7.

When the load is rapidly decreased, the rising slope of the output voltage VOUT is greater than the second preset slope, that is, the output voltage VOUT is rapidly increased, so as to cause the collected voltage VFB to rapidly increase, and when the collected voltage VFB is greater than the sum of the preset reference voltage VREF and the voltage drop, the second logic unit 102 is triggered to output the second logic signal to the eighteenth switching tube M18. The eighteenth switching transistor M18 is turned on according to the second logic signal, thereby generating a pull-up current, and outputs a second regulating current to the logic circuit 204, so that the logic voltage VSUM output by the logic circuit 204 is quickly pulled up, the duty ratio of the PWM signal output by the comparison circuit 207 is reduced, the inductor current is reduced in the process, and less energy is transmitted to the output voltage VOUT, so that the output voltage VOUT is quickly regulated to a normal value. Referring to a T2 period shown in fig. 8, a solid line represents a voltage waveform diagram in a conventional voltage converter, and a dotted line represents a voltage waveform diagram in a voltage converter according to an embodiment of the present application. As can be seen from the T2 time period in fig. 8, compared with the conventional voltage converter, the voltage converter provided with the transient detection circuit 10 according to the embodiment of the application has a rising slope of the output voltage VOUT greater than the second preset slope when the load is rapidly decreased, i.e. the output voltage VOUT is rapidly decreased, thereby resulting in a decrease of the reference voltage VCOM. The transient detection circuit 10 pulls up the logic voltage VSUM, thereby reducing the duty cycle of the PWM signal, and eventually reducing the inductor current, to achieve a fast regulation of the output voltage VOUT.

In one embodiment of the present application, as shown in fig. 7, the sampling resistor Rsum is configured to sample the inductor current, the harmonic current, and the regulating current (the first regulating current or the second regulating current), convert the sampled currents into the logic voltage VSUM, and transmit the logic voltage VSUM to the comparison circuit 207.

In one embodiment of the present application, as shown in fig. 7, the transient detection circuit 10 further includes a first current source I1 and a second current source I2, wherein a first end of the first current source I1 is electrically connected to the power supply VDD, and a second end of the first current source I1 is electrically connected to the first logic unit 101; the first end of the second current source I2 is electrically connected to the power supply VDD, and the second end of the second current source I2 is electrically connected to the second logic unit 102.

Specifically, the first current source I1 and the second current source I2 can both generate constant current, which is used for providing stable bias for the operational amplifier, so as to ensure that the operational amplifier works in a linear region. Wherein the first current source I1 is used for providing a stable bias for the first logic unit 101, and the second current source I2 is used for providing a stable bias for the second logic unit 102. Meanwhile, the first current source I1 and the second current source I2 can reduce nonlinear distortion caused by factors such as temperature, process variation and the like, and the reliability of the transient detection circuit 10 is improved.

As shown in fig. 7, the bias current source IDC is used to provide a bias current.

The application also discloses a voltage converter, the schematic block diagram of which is shown in fig. 9, comprising a voltage conversion module 20, a voltage acquisition module 30 and the transient detection circuit 10, wherein the voltage conversion module 20 is respectively and electrically connected with the voltage acquisition module 30 and the transient detection circuit 10, and the voltage acquisition module 30 is electrically connected with the transient detection circuit 10.

Specifically, the voltage collection module 30 is configured to collect the output voltage VOUT of the voltage conversion module 20, where the voltage conversion module 20 is configured to increase the falling slope of the output voltage VOUT according to the first regulating current output by the transient detection circuit 10 when the falling slope of the output voltage VOUT is smaller than the first preset slope; the voltage conversion module 20 is further configured to reduce the rising slope of the output voltage VOUT according to the second regulated current output by the transient detection circuit 10 when the rising slope of the output voltage VOUT is greater than the first preset slope.

In one embodiment of the present application, as shown in fig. 10, the voltage conversion module 20 includes a voltage conversion circuit 201, a current sampling circuit 202, a harmonic compensation circuit 203, a logic circuit 204, an operational amplification circuit 205, a loop compensation circuit 206, a comparison circuit 207, a control circuit 208, and a driving circuit 209.

The voltage conversion circuit 201 is electrically connected to the driving circuit 209, the current sampling circuit 202, and the voltage acquisition module 30, the logic circuit 204 is electrically connected to the current sampling circuit 202, the harmonic compensation circuit 203, the transient detection circuit 10, and the comparison circuit 207, the operational amplification circuit 205 is electrically connected to the voltage acquisition module 30, the transient detection circuit 10, the comparison circuit 207, and the loop compensation circuit 206, and the control circuit 208 is electrically connected to the comparison circuit 207 and the driving circuit 209.

Specifically, the voltage conversion circuit 201 is configured to provide the output voltage VOUT to the voltage acquisition module 30 according to the driving signal; the voltage acquisition module 30 is used for dividing the output voltage VOUT and outputting an acquisition voltage VFB to the transient detection circuit 10 and the operational amplification circuit 205; the operational amplifier circuit 205 is configured to output a reference voltage VCOM to the comparison circuit 207 according to the collection voltage VFB and a preset reference voltage VREF; the transient detection circuit 10 is configured to output a first regulating current to the logic circuit 204 when a falling slope of the output voltage VOUT is smaller than a first preset slope; the transient detection circuit 10 is further configured to output a second regulating current to the logic circuit 204 when the rising slope of the output voltage VOUT is greater than a second preset slope; the current sampling circuit 202 is configured to sample the inductor current in the voltage conversion circuit 201 and output the inductor current to the logic circuit 204; the harmonic compensation circuit 203 is configured to output a harmonic current to the logic circuit 204; the logic circuit 204 is configured to output a corresponding logic voltage VSUM to the comparison circuit 207 according to the inductor current, the harmonic current, and the first adjustment current, or the logic circuit 204 is configured to output a corresponding logic voltage VSUM to the comparison circuit 207 according to the inductor current, the harmonic current, and the second adjustment current; the comparison circuit 207 is configured to output a PWM signal to the control circuit 208 according to the logic voltage VSUM and the reference voltage VCOM; the control circuit 208 is configured to output a control signal Vctrl to the driving circuit 209 according to the clock signal CLK and the PWM signal; the driving circuit 209 is configured to output a driving signal to the voltage conversion circuit 201 according to the control signal Vctrl; the loop compensation circuit 206 is used to form a proportional-integral compensation zero to stabilize the loop.

Therefore, when the slope of the output voltage VOUT suddenly changes, that is, when the load suddenly changes, compared with the conventional voltage converter, the embodiment of the application can realize the fast regulation of the output voltage VOUT by adding the transient detection circuit 10, so that the output voltage VOUT is fast recovered to the normal value. The problem that the output voltage VOUT needs to be recovered to a normal value for a long time when the load of the existing voltage converter suddenly changes and the transient response speed is low is solved, and the transient response speed of the voltage converter is improved.

It should be noted that, according to the above description of the transient detection circuit 10 in the voltage converter, it can be known that the first preset voltage is the voltage drop generated on the first resistor R1, and the second preset voltage is the voltage drop generated on the second resistor R2.

In an embodiment of the present application, a schematic circuit connection diagram of the voltage converter is shown in fig. 11, and the operational amplifying circuit 205, the loop compensating circuit 206, the voltage acquisition module 30, the logic circuit 204, the comparing circuit 207 and the internal circuit of the above-mentioned existing voltage converter in the voltage converter provided by the embodiment of the present application have the same working principle, and are not repeated herein.

The application also discloses a power supply device which comprises the voltage converter, and can realize the rapid regulation of the output voltage when the load is suddenly changed, so that the output voltage is rapidly restored to a normal value. The transient response speed of the voltage converter is improved, and the efficiency of the power supply device is improved.

Since the processing and functions implemented by the power supply device in this embodiment basically correspond to the embodiments, principles and examples of the transient detection circuit and the voltage converter, the description of this embodiment is not exhaustive, and reference may be made to the related descriptions in the foregoing embodiments, which are not repeated herein.

The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. The transient detection circuit is characterized by comprising a first logic unit, a second logic unit, a first regulating unit and a second regulating unit, wherein the first regulating unit is electrically connected with the first logic unit and the second regulating unit respectively, the second logic unit is electrically connected with the second regulating unit, the first regulating unit and the second regulating unit are both used for being electrically connected with a voltage conversion module in a voltage converter, and the first logic unit and the second logic unit are both used for being electrically connected with a voltage acquisition module in the voltage converter;

When the rising slope of the output voltage of the voltage conversion module is larger than a second preset slope, the second logic unit is used for outputting a second logic signal according to the preset reference voltage and the acquisition voltage; the second adjusting unit is used for outputting a second adjusting current to the voltage conversion module according to the second logic signal; the second regulating current is used for indicating the voltage conversion module to reduce the rising slope of the output voltage;

The first adjusting unit comprises a seventeenth switching tube, the grid electrode of the seventeenth switching tube is electrically connected with the first logic unit, the drain electrode of the seventeenth switching tube is respectively electrically connected with the voltage conversion module and the second adjusting unit, and the source electrode of the seventeenth switching tube is grounded.

2. The transient detection circuit of claim 1, wherein the first logic unit comprises a first resistor, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, and a fifth switching tube, wherein a gate of the first switching tube is electrically connected with the voltage acquisition module, a drain of the first switching tube is electrically connected with a drain of the third switching tube, a gate of the third switching tube, and a gate of the fourth switching tube, respectively, and a source of the first switching tube is electrically connected with a first end of the first resistor; the grid electrode of the second switching tube is used for receiving the preset reference voltage, the drain electrode of the second switching tube is respectively and electrically connected with the drain electrode of the fourth switching tube and the first adjusting unit, and the source electrode of the second switching tube is respectively and electrically connected with the second end of the first resistor and the drain electrode of the fifth switching tube; the source electrode of the third switching tube and the source electrode of the fourth switching tube are electrically connected with a power supply, the grid electrode of the fifth switching tube is used for receiving a first bias voltage, and the source electrode of the fifth switching tube is grounded.

3. The transient detection circuit of claim 2, wherein the first logic unit further comprises a sixth switching tube, a seventh switching tube, and an eighth switching tube, wherein a gate of the sixth switching tube is electrically connected to a drain of the fourth switching tube and a drain of the second switching tube, respectively, a source of the sixth switching tube is electrically connected to the power supply, a drain of the sixth switching tube is electrically connected to a drain of the eighth switching tube and the first adjusting unit, respectively, a gate of the seventh switching tube is electrically connected to a drain of the seventh switching tube, a gate of the fifth switching tube, and a gate of the eighth switching tube, respectively, and a source of the seventh switching tube and a source of the eighth switching tube are all grounded.

4. The transient detection circuit of claim 1, wherein the second logic unit comprises a second resistor, a ninth switching tube, a tenth switching tube, an eleventh switching tube, a twelfth switching tube, and a thirteenth switching tube, wherein a gate of the ninth switching tube is used for receiving the collection voltage, a drain of the ninth switching tube is electrically connected with a drain of the eleventh switching tube, a gate of the eleventh switching tube, and a gate of the twelfth switching tube, respectively, and a source of the ninth switching tube is electrically connected with a second end of the second resistor and a drain of the thirteenth switching tube, respectively; the grid electrode of the tenth switching tube is used for receiving the preset reference voltage, the drain electrode of the tenth switching tube is respectively and electrically connected with the drain electrode of the twelfth switching tube and the second adjusting unit, and the source electrode of the tenth switching tube is electrically connected with the first end of the second resistor; the source electrode of the eleventh switching tube and the source electrode of the twelfth switching tube are electrically connected with a power supply, the grid electrode of the thirteenth switching tube is used for receiving a second bias voltage, and the source electrode of the thirteenth switching tube is grounded.

5. The transient detection circuit of claim 4, wherein the second logic unit further comprises a fourteenth switching tube, a fifteenth switching tube, and a sixteenth switching tube, wherein a gate of the fourteenth switching tube is electrically connected to a drain of the twelfth switching tube and a drain of the tenth switching tube, respectively, a source of the fourteenth switching tube is electrically connected to the power supply, a drain of the fourteenth switching tube is electrically connected to a drain of the fifteenth switching tube and the second adjusting unit, respectively, a gate of the fifteenth switching tube is electrically connected to a gate of the thirteenth switching tube, a gate of the sixteenth switching tube, and a drain of the sixteenth switching tube, respectively, and a source of the fifteenth switching tube and a source of the sixteenth switching tube are all grounded.

6. The transient detection circuit of claim 1, wherein the second regulation unit comprises an eighteenth switching tube, a gate of the eighteenth switching tube is electrically connected to the second logic unit, a drain of the eighteenth switching tube is electrically connected to the voltage conversion module and the first regulation unit, respectively, and a source of the eighteenth switching tube is electrically connected to a power supply.

7. The transient detection circuit of any of claims 1-6, further comprising a first current source and a second current source, wherein a first end of the first current source is configured to be electrically connected to a power supply, and wherein a second end of the first current source is configured to be electrically connected to the first logic unit; the first end of the second current source is used for being electrically connected with the power supply, and the second end of the second current source is electrically connected with the second logic unit.

8. A voltage converter, comprising a voltage conversion module, a voltage acquisition module and the transient detection circuit of any one of claims 1-7, wherein the voltage conversion module is electrically connected to the voltage acquisition module and the transient detection circuit, respectively, and the voltage acquisition module is electrically connected to the transient detection circuit;

When the rising slope of the output voltage is larger than a second preset slope, the transient detection circuit is used for outputting a second regulating current; the voltage conversion module is used for reducing the rising slope of the output voltage according to the second regulating current.

9. A power supply device comprising the voltage converter of claim 8.