CN118099922A - Method for etching compound semiconductor multilayer structure by inductively coupled plasma - Google Patents
Method for etching compound semiconductor multilayer structure by inductively coupled plasma Download PDFInfo
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- CN118099922A CN118099922A CN202410520608.0A CN202410520608A CN118099922A CN 118099922 A CN118099922 A CN 118099922A CN 202410520608 A CN202410520608 A CN 202410520608A CN 118099922 A CN118099922 A CN 118099922A
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- multilayer structure
- compound semiconductor
- inductively coupled
- semiconductor multilayer
- etching
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 56
- 238000005530 etching Methods 0.000 title claims abstract description 49
- 150000001875 compounds Chemical class 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000009616 inductively coupled plasma Methods 0.000 title claims abstract description 40
- 239000000126 substance Substances 0.000 claims abstract description 7
- 238000001020 plasma etching Methods 0.000 claims abstract description 6
- 238000000059 patterning Methods 0.000 claims abstract description 4
- 239000012495 reaction gas Substances 0.000 claims abstract description 3
- 239000007789 gas Substances 0.000 claims description 8
- 239000010410 layer Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 5
- 150000002500 ions Chemical class 0.000 claims description 4
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 claims description 3
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 238000003486 chemical etching Methods 0.000 claims description 3
- 239000012792 core layer Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 abstract description 2
- 239000000203 mixture Substances 0.000 abstract description 2
- 230000003287 optical effect Effects 0.000 abstract description 2
- 238000001039 wet etching Methods 0.000 abstract description 2
- 210000002381 plasma Anatomy 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 229910021617 Indium monochloride Inorganic materials 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000007795 chemical reaction product Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- APHGZSBLRQFRCA-UHFFFAOYSA-M indium(1+);chloride Chemical compound [In]Cl APHGZSBLRQFRCA-UHFFFAOYSA-M 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- 238000012369 In process control Methods 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 1
- 229910052794 bromium Inorganic materials 0.000 description 1
- 125000001246 bromo group Chemical group Br* 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 150000001805 chlorine compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 125000001183 hydrocarbyl group Chemical group 0.000 description 1
- 238000010965 in-process control Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0201—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
- H01S5/0203—Etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
- H01J37/32449—Gas control, e.g. control of the gas flow
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32908—Utilities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/334—Etching
- H01J2237/3343—Problems associated with etching
- H01J2237/3345—Problems associated with etching anisotropy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention discloses a method for etching a compound semiconductor multilayer structure by inductively coupled plasma, which specifically comprises the following steps: s1, patterning a mask on the surface of a compound semiconductor multilayer structure; s2, etching the multilayer structure without the mask by adopting inductively coupled plasma anisotropically in the vertical direction of the surface by using chemical plasma generated by HBr, N2 and other small amount of mixed reaction gas; the invention relates to the technical field of plasma etching methods. According to the method for etching the compound semiconductor multilayer structure by using the inductively coupled plasma, the chemical composition of the InGaAs/InGaAsP/InP multilayer structure is etched by using the inductively coupled plasma to form the anisotropic etching method, compared with a wet etching method, the method for obtaining a smooth etching surface side wall, the ratio of the contact surface width to the active area width is increased, the loss between the optical upper surfaces is reduced, and the characteristics of the device are improved.
Description
Technical Field
The invention relates to the technical field of plasma etching methods, in particular to a method for etching a compound semiconductor multilayer structure by inductively coupled plasma.
Background
Plasma etching, which is a dry etching technique using plasma; higher pressure and less rf power are typically used and the atoms or molecules on the surface of the chip contact and react with reactive atoms in the plasma atmosphere to form gaseous products that leave the crystal plane to cause etching.
The plasma dry etching of iii-v compound semiconductor materials has been widely used In the major processes of most optoelectronic devices, where low roughness is required to be etched on the surface of the InP semiconductor laser resonator, in the grating between the laser and the integrated device, etc., and where well controlled etching rate and selectivity are required, the etching gas CH 4/H2 is a gas commonly used for etching In-based, but is liable to cause deposition of hydrocarbon polymers In the cavity and passivation of the material surface, and the etching rate is slow. The common Cl-based gas used for III-V semiconductor etching is adopted, the reaction product InCl 3 is easy to form InCl x on the surface, the surface is rough and the etching rate is slow, and the physical bombardment can be enhanced by adding Ar to accelerate the dissociative adsorption of In 2Clx, but the surface of the material is easy to be damaged; to this end, the present invention proposes a method of inductively coupled plasma etching a compound semiconductor multilayer structure to solve the above-mentioned problems.
Disclosure of Invention
(One) solving the technical problems
In order to overcome the defects in the prior art, the invention provides a method for etching a compound semiconductor multilayer structure by inductively coupled plasma, which solves the problems mentioned in the background art.
(II) technical scheme
In order to achieve the above purpose, the invention is realized by the following technical scheme: the method for etching the compound semiconductor multilayer structure by inductively coupled plasma specifically comprises the following steps:
S1, patterning a mask on the surface of a compound semiconductor multilayer structure;
S2, etching the multilayer structure without the mask by adopting inductively coupled plasma in the vertical direction of the surface in the chemical plasma generated by HBr, N 2 and other small amount of mixed reaction gas;
Wherein, the inductively coupled plasma utilizes gas molecules such as bromine radical and the generated ions and free radicals to perform physical impact sputtering and chemical etching of the maskless compound semiconductor multilayer structure;
wherein the compound semiconductor multilayer structure includes: inP-p layer, quantum well core layer, inP-n layer, substrate.
Preferably, the patterned mask in the step S1 is SiO 2 deposited by a PECVD apparatus.
Preferably, the compound semiconductor multilayer structure method adopts a photoetching technology to manufacture photoresist patterns on a mask, the etching of the mask adopts reactive ion etching, and after photoresist is removed by organic chemistry, the pattern mask of silicon dioxide is obtained on the compound semiconductor multilayer structure.
Preferably, the multi-layer structure comprising the semiconductor is in an inductively coupled plasma at a temperature above 110 ℃.
Preferably, wherein the semiconductor multilayer structure comprises In but is not limited to InGaAsP, inP, gaAs.
Preferably, the compound semiconductor multilayer structure method further comprises an inductively coupled plasma etcher system.
Preferably, the etching rate is not less than 1 μm/min.
Preferably, the pressure in the inductively coupled plasma etched multilayer structure is greater than 2 millitorr.
Preferably, the semiconductor substrate includes any one of InP, inGaAs, and InGaAsP.
(III) beneficial effects
The invention provides a method for etching a compound semiconductor multilayer structure by inductively coupled plasma. Compared with the prior art, the method has the following beneficial effects:
(1) The inductively coupled plasma etching method for the compound semiconductor multilayer structure adopts the chemical selection of bromine groups, and the vapor pressures InBrx and PBrx of reaction products are relatively low compared with corresponding chlorides; compared with Ar, N 2 has lower ion energy and weakened physical bombardment, thereby meeting the requirement of reducing the etching damage of the material; the technology adopts HBr and N 2 as etching gases to obtain a method for etching the indium-containing compound semiconductor multilayer structure by reasonable parameters, obtains a smooth surface with small surface roughness and controllable amorphous etching rate of 0.11mm/min, and is an etching process suitable for semiconductor optoelectronic devices.
(1) According to the method for etching the compound semiconductor multilayer structure by using the inductively coupled plasma, the chemical composition of the InGaAs/InGaAsP/InP multilayer structure is etched by using the inductively coupled plasma to form the anisotropic etching method, compared with a wet etching method, the smooth etching surface side wall is obtained, the ratio of the contact surface width to the active area width is increased, the loss between the optical upper surfaces is reduced, the characteristics of a device are improved, the device performance is improved, and meanwhile, the difficulty in process control of the current injection surface is remarkably reduced by the technology.
Drawings
FIG. 1 is a schematic view of a compound semiconductor multilayer structure provided by the invention;
FIG. 2 is a schematic diagram of the overall structure with high substrate temperature provided by the invention;
FIG. 3 is a flow chart of etching a compound semiconductor multilayer structure provided by the invention;
fig. 4 is a schematic view of an etched surface of a compound semiconductor multilayer structure according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The embodiment of the invention provides the following technical scheme:
the method for etching the compound semiconductor multilayer structure by inductively coupled plasma specifically comprises the following steps:
S1, patterning a mask on the surface of a compound semiconductor multilayer structure;
Wherein the patterned mask is SiO 2 deposited by PECVD equipment, a photoresist pattern is manufactured on the mask by adopting a photoetching technology, the mask is etched by adopting reactive ion etching, and after the photoresist is removed by organic chemistry, the patterned mask of silicon dioxide is obtained on the compound semiconductor multilayer structure, as shown in figure 2;
S2, etching the multilayer structure by using chemical plasmas generated by mixing HBr, N 2 and other small amounts of mixed reaction gases in the vertical direction of the surface in an anisotropic manner, wherein the etching rate is not less than 1 mu m/min, and the pressure in the inductively coupled plasma etching multilayer structure is more than 2 milliTorr;
Wherein the inductively coupled plasma performs physical impact sputtering and chemical etching of the maskless compound semiconductor multilayer structure by using gas molecules such as bromine and generated ions and free radicals, as shown in fig. 3.
The compound semiconductor multilayer structure includes: inP-p layer, quantum well core layer, inP-n layer, substrate, as shown in fig. 1; wherein the semiconductor multilayer structure comprises In but is not limited to InGaAsP, inP, gaAs; the semiconductor substrate includes any one of InP, inGaAs, and InGaAsP.
In the embodiment of the invention, the semiconductor multilayer structure is included in the inductively coupled plasma at the temperature of more than 110 ℃.
In an embodiment of the invention, the method for manufacturing the compound semiconductor multilayer structure further comprises an inductively coupled plasma etching system.
In this embodiment, the bulk structure with high substrate temperature (as shown in fig. 2) is etched using inductively coupled plasma to obtain a vertical and smooth etched surface (as shown in fig. 4), and when HBr/N 2 in inductively coupled plasma is applied to the structure with indium-containing InP and InGaAsP layers in fig. 2, a highly vertical, non-notched, smooth and clean surface is obtained as shown in fig. 4.
And all that is not described in detail in this specification is well known to those skilled in the art.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (9)
1. A method for etching a compound semiconductor multilayer structure by inductively coupled plasma, which is characterized by comprising the following steps:
S1, patterning a mask on the surface of a compound semiconductor multilayer structure;
S2, etching the multilayer structure without the mask by adopting inductively coupled plasma in the vertical direction of the surface in the chemical plasma generated by HBr, N 2 and other small amount of mixed reaction gas;
Wherein, the inductively coupled plasma utilizes gas molecules such as bromine radical and the generated ions and free radicals to perform physical impact sputtering and chemical etching of the maskless compound semiconductor multilayer structure;
wherein the compound semiconductor multilayer structure includes: inP-p layer, quantum well core layer, inP-n layer, substrate.
2. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: the patterned mask in the step S1 is SiO 2 deposited by a PECVD apparatus.
3. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: the compound semiconductor multilayer structure method adopts a photoetching technology to manufacture photoresist patterns on a mask, the etching of the mask adopts reactive ion etching, and after photoresist is removed by organic chemistry, the pattern mask of silicon dioxide is obtained on the compound semiconductor multilayer structure.
4. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: the semiconductor multilayer structure is included in an inductively coupled plasma at a temperature above 110 ℃.
5. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: wherein the semiconductor multilayer structure comprises In but is not limited to InGaAsP, inP, gaAs.
6. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: the compound semiconductor multilayer structure method further includes an inductively coupled plasma etcher system.
7. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: the etching rate is not less than 1 μm/min.
8. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: the inductively coupled plasma etches the multilayer structure at a pressure greater than 2 millitorr.
9. The method for inductively coupled plasma etching a compound semiconductor multilayer structure according to claim 1, wherein: wherein the semiconductor substrate comprises any one of InP, inGaAs and InGaAsP.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410520608.0A CN118099922A (en) | 2024-04-28 | 2024-04-28 | Method for etching compound semiconductor multilayer structure by inductively coupled plasma |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410520608.0A CN118099922A (en) | 2024-04-28 | 2024-04-28 | Method for etching compound semiconductor multilayer structure by inductively coupled plasma |
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| CN118099922A true CN118099922A (en) | 2024-05-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410520608.0A Pending CN118099922A (en) | 2024-04-28 | 2024-04-28 | Method for etching compound semiconductor multilayer structure by inductively coupled plasma |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03196623A (en) * | 1989-12-26 | 1991-08-28 | Sony Corp | Dry etching |
| WO1998056037A1 (en) * | 1997-06-03 | 1998-12-10 | Applied Materials, Inc. | SELECTIVE PLASMA ETCHING OF SILICON NITRIDE IN PRESENCE OF SILICON OR SILICON OXIDES USING MIXTURE OF (NH3 OR SF6) AND HBr AND N¿2? |
| CN1426597A (en) * | 2000-03-31 | 2003-06-25 | 兰姆研究公司 | Method for improving uniformity and reducing etch rate variation of etching polysilicon |
| CN1669128A (en) * | 2002-07-19 | 2005-09-14 | 优利讯美国有限公司 | High temperature anisotropic etching of multi-layer structures |
| CN110610842A (en) * | 2018-06-15 | 2019-12-24 | 三星电子株式会社 | Low temperature etching method and plasma etching equipment |
| CN117334574A (en) * | 2022-06-30 | 2024-01-02 | Spts科技有限公司 | Post-treatment of indium-containing compound semiconductors |
-
2024
- 2024-04-28 CN CN202410520608.0A patent/CN118099922A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03196623A (en) * | 1989-12-26 | 1991-08-28 | Sony Corp | Dry etching |
| WO1998056037A1 (en) * | 1997-06-03 | 1998-12-10 | Applied Materials, Inc. | SELECTIVE PLASMA ETCHING OF SILICON NITRIDE IN PRESENCE OF SILICON OR SILICON OXIDES USING MIXTURE OF (NH3 OR SF6) AND HBr AND N¿2? |
| CN1426597A (en) * | 2000-03-31 | 2003-06-25 | 兰姆研究公司 | Method for improving uniformity and reducing etch rate variation of etching polysilicon |
| CN1669128A (en) * | 2002-07-19 | 2005-09-14 | 优利讯美国有限公司 | High temperature anisotropic etching of multi-layer structures |
| CN110610842A (en) * | 2018-06-15 | 2019-12-24 | 三星电子株式会社 | Low temperature etching method and plasma etching equipment |
| CN117334574A (en) * | 2022-06-30 | 2024-01-02 | Spts科技有限公司 | Post-treatment of indium-containing compound semiconductors |
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