CN118091372A - A chip testing mechanism - Google Patents
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- CN118091372A CN118091372A CN202410371978.2A CN202410371978A CN118091372A CN 118091372 A CN118091372 A CN 118091372A CN 202410371978 A CN202410371978 A CN 202410371978A CN 118091372 A CN118091372 A CN 118091372A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
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Abstract
本发明涉及一种芯片测试机构,属于芯片测试技术领域。为解决现有测试机构在测试芯片时,存在接触阻抗变化大,信号失真的问题。本申请包括测试插座和若干个测试探针,测试插座上设有放置芯片的凹槽,测试插座的内部设有用于安装测试探针的安装槽,安装槽的一端与凹槽相联通,形成第一出口,另一端贯穿测试插座,形成第二出口;测试探针的针体安装于安装槽,且其一端延伸至第一出口外,构成弹性测试端,另一端延伸至第二出口外,构成连接端;测试插座安装在测试板上,测试探针的连接端与测试板相接触。本申请在测试时能保证接触阻值稳定性,降低了信号传输的路经长度,可以保证对信号的干扰最小,测试探针采用一体式结构,能承载大的电流传输。
The present invention relates to a chip testing mechanism, and belongs to the field of chip testing technology. In order to solve the problem that the existing testing mechanism has large contact impedance changes and signal distortion when testing chips. The present application includes a test socket and a plurality of test probes. The test socket is provided with a groove for placing the chip, and the inside of the test socket is provided with a mounting groove for installing the test probe. One end of the mounting groove is connected to the groove to form a first outlet, and the other end passes through the test socket to form a second outlet; the needle body of the test probe is installed in the mounting groove, and one end thereof extends outside the first outlet to form an elastic test end, and the other end extends outside the second outlet to form a connection end; the test socket is installed on a test board, and the connection end of the test probe contacts the test board. The present application can ensure the stability of the contact resistance value during testing, reduce the path length of signal transmission, and can ensure that the interference to the signal is minimized. The test probe adopts an integrated structure and can carry large current transmission.
Description
技术领域Technical Field
本申请涉及一种芯片测试机构,属于芯片测试技术领域。The present application relates to a chip testing mechanism, and belongs to the technical field of chip testing.
背景技术Background technique
随着人工智能技术的快速发展,促进了图像处理器市场的爆发增长,对图像的清晰度要求也越来越高,然而对应处理高清图像需要的芯片的ADDC转换的位数也越来越大。这些芯片在测试过程中对信号的稳定性要求越来越高,从而需要更高阶的测试机构满足这类芯片的测试要求。With the rapid development of artificial intelligence technology, the image processor market has exploded, and the requirements for image clarity are getting higher and higher. However, the number of bits of ADDC conversion required by chips for processing high-definition images is also increasing. These chips have higher and higher requirements for signal stability during the testing process, so higher-level testing institutions are needed to meet the testing requirements of such chips.
近年来,新能源汽车、智能家居、储能市场的需求迅猛增长,我国电源管理芯片仍然保持强劲增长。车载电源管理芯片是电源管理芯片中应用增长最快的领域,汽车电源管理芯片供应缺口大,国产替代势头迅猛。电源类芯片在测试过程中,由于芯片本身的功耗比较大,芯片容易发热,从而导致芯片的引脚上的焊锡与测试机构的探针发生沾粘,从而导致测试参数不稳定,容易将良品判为不合格品。In recent years, the demand for new energy vehicles, smart homes, and energy storage markets has grown rapidly, and my country's power management chips have maintained strong growth. Automotive power management chips are the fastest growing application area of power management chips. There is a large supply gap for automotive power management chips, and domestic substitution is gaining momentum. During the testing process of power chips, due to the high power consumption of the chip itself, the chip is prone to heat up, which causes the solder on the chip pins to stick to the probes of the test organization, resulting in unstable test parameters and easy judgment of good products as unqualified products.
对应这些领域的芯片测试,传统的探针都是上下运动,在测试过程中探针针尖容易与芯片引脚上的焊锡发生沾粘,从而使沾粘后的探针阻值增加,导致客户芯片的测试良率下降,客户在使用过程中清洁频次增加。最终导致客户的测试成本和周期拉长,导致芯片的成本增加,从而失去市场。因此亟需一种芯片测试机构,以解决现有芯片测试机构,在测试时,探针易与芯片针脚的焊锡发生沾粘,导致影响测试结果精度和造成芯片成本上升的问题。For chip testing in these fields, traditional probes move up and down. During the test, the probe tips are prone to sticking to the solder on the chip pins, which increases the resistance of the probes after sticking, resulting in a decrease in the test yield of the customer's chips and an increase in the frequency of cleaning during use. Ultimately, the customer's test costs and cycles are lengthened, resulting in an increase in the cost of the chip, and thus a loss of market share. Therefore, a chip testing mechanism is urgently needed to solve the problem that the existing chip testing mechanism, during testing, the probes are prone to sticking to the solder on the chip pins, which affects the accuracy of the test results and causes an increase in chip costs.
发明内容Summary of the invention
针对现有技术中存在的问题与不足,本申请提供一种芯片测试机构,以解决上述的技术问题。In view of the problems and shortcomings in the prior art, the present application provides a chip testing mechanism to solve the above-mentioned technical problems.
为实现上述目的,本申请提供如下技术方案:一种芯片测试机构,包括测试插座和若干个测试探针,测试插座上设有放置芯片的凹槽,测试插座的内部设有用于安装测试探针的安装槽,且安装槽的一端与凹槽相联通,形成第一出口,另一端贯穿测试插座,形成第二出口;测试探针的针体安装于安装槽,且其一端朝第一出口延伸至第一出口外,构成弹性测试端,另一端朝第二出口延伸至第二出口外,构成连接端;测试插座安装在测试板上,测试探针的连接端与测试板相接触,芯片从凹槽上方放入,芯片针脚推动测试探针的弹性测试端发生形变而蓄能,弹性测试端在形变蓄能的作用下抵靠于芯片针脚,进行芯片测试工作。To achieve the above-mentioned purpose, the present application provides the following technical solutions: a chip testing mechanism, including a test socket and a plurality of test probes, the test socket is provided with a groove for placing the chip, the inside of the test socket is provided with a mounting groove for installing the test probe, and one end of the mounting groove is connected with the groove to form a first outlet, and the other end passes through the test socket to form a second outlet; the needle body of the test probe is installed in the mounting groove, and one end thereof extends toward the first outlet to the outside of the first outlet, forming an elastic test end, and the other end extends toward the second outlet to the outside of the second outlet, forming a connecting end; the test socket is installed on a test board, and the connecting end of the test probe contacts the test board, the chip is placed from above the groove, and the chip pin pushes the elastic test end of the test probe to deform and store energy, and the elastic test end presses against the chip pin under the action of deformation energy storage to perform chip testing.
具体的,测试插座包括上盖和底座;上盖设有一上、下开口的通孔;底座上设有安装槽;上盖固定安装在底座上,通孔与底座之间形成凹槽;底座上的安装槽的一端沿水平方向朝凹槽方向延伸并与凹槽相联通,之间构成测试探针的弹性测试端的安装空腔,另一端沿径向朝下贯穿底座,之间构成测试探针的连接端的安装空腔。这样设置以实现测试机构与测试板能快速安装连接,测试时,芯片直接放置于凹槽,提高测试效率。Specifically, the test socket includes an upper cover and a base; the upper cover is provided with a through hole with upper and lower openings; the base is provided with a mounting groove; the upper cover is fixedly mounted on the base, and a groove is formed between the through hole and the base; one end of the mounting groove on the base extends horizontally toward the groove and is connected to the groove, forming a mounting cavity for the elastic test end of the test probe, and the other end radially penetrates the base downward, forming a mounting cavity for the connection end of the test probe. This arrangement enables the test mechanism and the test board to be quickly installed and connected. During testing, the chip is directly placed in the groove to improve test efficiency.
具体的,底座的安装槽内固定安装有探针安装座,探针安装座沿径向设有两层安装层,每层安装层间隔设有若干个子安装槽,两层安装层的子安装槽沿径向构成若干组测试探针安装槽。这样设置以实现测试探针安装于探针安装座,保证测试探针在测试过程中,各测试探针之间信号传输彼此相互分开,不会发生相互干扰,提高测试数据精准性。Specifically, a probe mounting seat is fixedly installed in the mounting groove of the base, and the probe mounting seat is provided with two mounting layers in the radial direction, and each mounting layer is provided with a plurality of sub-mounting grooves at intervals, and the sub-mounting grooves of the two mounting layers form a plurality of groups of test probe mounting grooves in the radial direction. This arrangement enables the test probe to be installed on the probe mounting seat, and ensures that during the test process, the signal transmission between the test probes is separated from each other, and no mutual interference occurs, thereby improving the accuracy of the test data.
具体的,每个测试探针包括两个子测试探针,两个子测试探针构成一组子测试探针;若干个测试探针构成的若干组子测试探针一一对应的安装于若干组测试探针安装槽,且位于上层安装层的子测试探针定义为第一子测试探针,下层安装层的子测试探针定义为第二子测试探针。本申请采用双针构成一个测试探针,以实现在芯片测试过程中,通过sense探测补偿技术,使得测试结果更加精准。Specifically, each test probe includes two sub-test probes, and the two sub-test probes constitute a group of sub-test probes; several groups of sub-test probes constituted by several test probes are installed one by one in several groups of test probe installation slots, and the sub-test probes located in the upper installation layer are defined as the first sub-test probes, and the sub-test probes in the lower installation layer are defined as the second sub-test probes. The present application adopts a double needle to constitute a test probe, so as to achieve more accurate test results through sense detection compensation technology during chip testing.
具体的,子安装槽内设有安装卡槽,若干个子安装槽的安装卡槽相互联通为一连接卡槽;子测试探针的中部针体与安装卡槽相对应的位置向外凸起,形成一安装凸起;子测试探针通过安装凸起安装于安装卡槽而安装于子安装槽。这样设置以实现子测试探针通过中部针体固定安装于子安装槽内,而两端的弹性测试端和连接端则位于子安装槽内,保证芯片在测试时,探针本身不会因弹性测试端发生变形而在子安装槽内发生位移,以提高测试精度。Specifically, a mounting slot is provided in the sub-mounting slot, and the mounting slots of several sub-mounting slots are interconnected to form a connecting slot; the middle needle body of the sub-test probe protrudes outward at a position corresponding to the mounting slot to form a mounting protrusion; the sub-test probe is installed in the sub-mounting slot by installing the mounting protrusion in the mounting slot. This arrangement enables the sub-test probe to be fixedly installed in the sub-mounting slot through the middle needle body, while the elastic test ends and the connection ends at both ends are located in the sub-mounting slot, ensuring that when the chip is tested, the probe itself will not be displaced in the sub-mounting slot due to deformation of the elastic test end, so as to improve the test accuracy.
具体的,第一子测试探针位于第一出口侧的针体上设有沿径向朝下折弯的第一折弯部,在第一折弯部上设有沿水平方向朝第一出口方向折弯的第二折弯部;第一折弯部、第二折弯部以及第一折弯部和第二折弯部之间的针体构成第一弹性变形部;第二子测试探针位于第一出口侧的针体设有朝第一出口向上倾斜的倾斜折弯部;倾斜折弯部构成第二弹性变形部。本申请通过仿真模拟,实现子测试探针在测试过程中,通过芯片安装进凹槽时,芯片下压测试探针的弹性测试端,使得子测试探针的第一弹性变形部和第二弹性变形部发生一定的位移变形,使得弹性测试端发生变形而产生弹性力,实现测试探针在弹性力的反作用力下能使得紧贴于芯片针脚,保证测试过程中,探针于芯片针脚接触充分,提高测试精准性。同时弹性测试端发生变形的过程产生的位移,带动针尖状探针头于芯片表面产生刮擦动作,可将芯片针脚的表面氧化层刮掉,另外亦可将探针针头表面残留的沾污刮除掉,从而进一步保证探针针头与芯片针脚的接触稳定。Specifically, the needle body of the first sub-test probe located on the first outlet side is provided with a first bending portion that is bent radially downward, and the first bending portion is provided with a second bending portion that is bent horizontally toward the first outlet; the first bending portion, the second bending portion, and the needle body between the first bending portion and the second bending portion constitute a first elastic deformation portion; the needle body of the second sub-test probe located on the first outlet side is provided with an inclined bending portion that is inclined upward toward the first outlet; the inclined bending portion constitutes a second elastic deformation portion. The present application uses simulation to achieve that during the test process, when the chip is installed into the groove, the chip presses down the elastic test end of the test probe, so that the first elastic deformation portion and the second elastic deformation portion of the sub-test probe undergo a certain displacement deformation, so that the elastic test end is deformed and generates an elastic force, so that the test probe can be tightly attached to the chip pin under the reaction force of the elastic force, ensuring that the probe is in full contact with the chip pin during the test process, thereby improving the test accuracy. At the same time, the displacement caused by the deformation of the elastic test end drives the needle-shaped probe head to scrape the chip surface, which can scrape off the surface oxide layer of the chip pins and also scrape off the residual contamination on the surface of the probe needle head, thereby further ensuring the stable contact between the probe needle head and the chip pins.
具体的,第一子测试探针和第二子测试探针的弹性测试端的端部分别沿径向朝上弯折,构成径向测试端,且径向测试端的端部设置为针尖状结构;第一子测试探针和第二子测试探针的连接端的端部设置为弧形折弯结构。Specifically, the ends of the elastic test ends of the first sub-test probe and the second sub-test probe are respectively bent upward radially to form radial test ends, and the ends of the radial test ends are set as needle-like structures; the ends of the connecting ends of the first sub-test probe and the second sub-test probe are set as arc-shaped bending structures.
具体的,第一子测试探针和第二子测试探针的径向测试端的径向高度相同,第一子测试探针和第二子测试探针的连接端的端部的径向高度相同。这样设置以实现第一子测试探针和第二子测试探针的弹性测试端的端部能与芯片针脚同时接触,保证接触稳固,而第一子测试探针和第二子测试探针的连接端能与测试板稳定接触。Specifically, the radial heights of the radial test ends of the first sub-test probe and the second sub-test probe are the same, and the radial heights of the ends of the connection ends of the first sub-test probe and the second sub-test probe are the same. This arrangement enables the ends of the elastic test ends of the first sub-test probe and the second sub-test probe to contact the chip pins at the same time, ensuring a stable contact, and the connection ends of the first sub-test probe and the second sub-test probe to stably contact the test board.
具体的,测试探针为一体成型结构。这样设置以实现改变测试探针多部件组合,使其在耐电流能力方面更大。Specifically, the test probe is an integrally formed structure, which is configured to change the combination of multiple components of the test probe so that it has a greater current resistance capability.
具体的,测试探针由铍铜材料制成,且其针体外侧设有镀金层。这样设置为保证弹性折弯部的弹力和异形测试探针的信号传导性,异形测试探针采用铍铜材料,并通过热处理以产生足够的硬度保证弹力,通过表面镀金处理保证信号传导性。Specifically, the test probe is made of beryllium copper material, and a gold-plated layer is provided on the outer side of the needle body. This arrangement is to ensure the elastic force of the elastic bending portion and the signal conductivity of the special-shaped test probe. The special-shaped test probe is made of beryllium copper material, and is heat-treated to generate sufficient hardness to ensure the elastic force, and the surface is gold-plated to ensure signal conductivity.
与现有技术相比,本申请的有益效果在于:Compared with the prior art, the beneficial effects of this application are:
1.本申请通过测试探针安装在子安装槽内,一端作为弹性测试端与芯片待测针脚相抵靠,弹性测试端在芯片针脚的推动下在子安装槽产生下压变形运动,变形产生弹性力进行蓄能,探针在反作用力的作用下测试端能紧贴于芯片针脚,同时测试探针在运动过程中,探针针头将芯片针脚的焊锡的氧化层进行刮擦,以及将针头自身残存的锡以及氧化层进行刮擦去除,测试探针与芯片针脚的有效接触,保证测试信号接触阻抗稳定性,以及保证信号传输不失真。1. In the present application, the test probe is installed in the sub-mounting groove, and one end of the test probe serves as an elastic test end to be pressed against the chip pin to be tested. The elastic test end is pushed by the chip pin to produce a downward pressure deformation movement in the sub-mounting groove, and the deformation produces an elastic force to store energy. Under the action of the reaction force, the test end of the probe can be tightly attached to the chip pin. At the same time, during the movement of the test probe, the probe needle scrapes the oxide layer of the solder of the chip pin, and scrapes and removes the remaining tin and oxide layer of the needle itself. The effective contact between the test probe and the chip pin ensures the stability of the contact impedance of the test signal and ensures that the signal transmission is not distorted.
2.本申请通过将探针采用一体式结构,不需要传统探针几个布局组合而成,因此在形状上可以做得更小,信号在通过异型探针时的路经就很短,对信号的影响也就最小,同时可承载更大的测试电流,提高产品适用范围。并且采用一体成型结构,亦可实现探针在高低温环境中均可使用,提高产品实用性。2. The present application adopts an integrated structure for the probe, which does not require the combination of several layouts of traditional probes. Therefore, the shape can be made smaller, and the path of the signal when passing through the special-shaped probe is very short, which minimizes the impact on the signal. At the same time, it can carry a larger test current and improve the product's applicability. In addition, the integrated molding structure can also enable the probe to be used in high and low temperature environments, improving the practicality of the product.
3.本申请采用测试探针材料本身的弹性变形特性,使其变形产生的弹力替代了传统的探针弹簧弹力,从而降低了探针的成本。3. The present application uses the elastic deformation characteristics of the test probe material itself, so that the elastic force generated by its deformation replaces the traditional probe spring force, thereby reducing the cost of the probe.
4.本申请采用双针结构构成一个测试探针,以实现在芯片测试过程中,通过sense探测补偿技术,使得测试结果更加精准。4. This application adopts a double-needle structure to form a test probe, so as to achieve more accurate test results through sense detection compensation technology during chip testing.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为本实施例的芯片测试机构的结构示意图;FIG1 is a schematic diagram of the structure of a chip testing mechanism according to the present embodiment;
图2为本实施例的芯片测试机构的顶部示意图;FIG2 is a top schematic diagram of a chip testing mechanism of this embodiment;
图3为本实施例的芯片测试机构的底部示意图;FIG3 is a bottom schematic diagram of the chip testing mechanism of this embodiment;
图4为本实施例的芯片测试机构的结构剖视图;FIG4 is a cross-sectional view of the structure of the chip testing mechanism of this embodiment;
图5为本实施例的芯片测试机构的部件爆炸示意图;FIG5 is an exploded schematic diagram of components of a chip testing mechanism of this embodiment;
图6为本实施例的芯片测试机构的测试探针与探针安装座的安装示意图;FIG6 is a schematic diagram of the installation of a test probe and a probe mounting seat of a chip testing mechanism of this embodiment;
图7为本实施例的芯片测试机构的探针安装座的部件爆炸示意图;FIG7 is an exploded schematic diagram of components of a probe mounting base of a chip testing mechanism of the present embodiment;
图8为本实施例的芯片测试机构的单个测试探针的结构示意图。FIG. 8 is a schematic diagram of the structure of a single test probe of the chip testing mechanism of this embodiment.
图中:1、测试插座;2、测试探针;3、凹槽;4、安装槽;5、弹性测试端;6、连接端;7、上盖;8、底座;9、探针安装座;10、安装层;11、子安装槽;12、第一子测试探针;13、第二子测试探针;14、连接卡槽;15、安装凸起;16、第一折弯部;17、第二折弯部;18、倾斜折弯部。In the figure: 1. test socket; 2. test probe; 3. groove; 4. mounting groove; 5. elastic test end; 6. connecting end; 7. upper cover; 8. base; 9. probe mounting seat; 10. mounting layer; 11. sub-mounting groove; 12. first sub-test probe; 13. second sub-test probe; 14. connecting card slot; 15. mounting protrusion; 16. first bending portion; 17. second bending portion; 18. inclined bending portion.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图,进一步阐述本申请。The present application will be further described below in conjunction with the accompanying drawings in the embodiments of the present application.
请参阅图1-图8,本实施例公开了一种芯片测试机构,包括测试插座1和若干个测试探针2,测试插座1上设有放置芯片的凹槽3,测试插座1的内部设有用于安装测试探针的安装槽4,且安装槽的一端与凹槽相联通,形成第一出口,另一端贯穿测试插座,形成第二出口;本实施例的测试探针2为一体成型结构,其针体由铍铜材料制成,且针体外侧设有镀金层。测试探针的针体安装于安装槽,且其一端朝第一出口延伸至第一出口外,构成弹性测试端5,另一端朝第二出口延伸至第二出口外,构成连接端6;测试插座1安装在测试板(未图示)上,测试探针的连接端与测试板相接触,芯片(未图示)从凹槽上方放入,芯片针脚推动测试探针的弹性测试端5发生形变而蓄能,弹性测试端在形变蓄能的作用下抵靠于芯片针脚,进行芯片测试工作。Please refer to Figures 1 to 8. This embodiment discloses a chip testing mechanism, including a test socket 1 and a plurality of test probes 2. The test socket 1 is provided with a groove 3 for placing the chip. The inside of the test socket 1 is provided with a mounting groove 4 for mounting the test probe, and one end of the mounting groove is connected with the groove to form a first outlet, and the other end penetrates the test socket to form a second outlet. The test probe 2 of this embodiment is an integrated structure, and its needle body is made of beryllium copper material, and a gold-plated layer is provided on the outer side of the needle body. The needle body of the test probe is installed in the mounting groove, and one end of the needle body extends toward the first outlet to the outside of the first outlet to form an elastic test end 5, and the other end extends toward the second outlet to the outside of the second outlet to form a connection end 6. The test socket 1 is installed on a test board (not shown), and the connection end of the test probe contacts the test board. The chip (not shown) is placed from the top of the groove, and the chip pin pushes the elastic test end 5 of the test probe to deform and store energy. Under the action of deformation energy storage, the elastic test end abuts against the chip pin to perform chip testing.
进一步的,测试插座1包括上盖7和底座8;上盖7设有一上、下开口的通孔;底座8上设有安装槽4;上盖固定安装在底座上,通孔与底座之间形成凹槽;底座上的安装槽的一端沿水平方向朝凹槽方向延伸并与凹槽相联通,之间构成测试探针的弹性测试端的安装空腔,另一端沿径向朝下贯穿底座,之间构成测试探针的连接端的安装空腔。其中,本实施例的底座的安装槽内固定安装有探针安装座9,探针安装座沿径向设有两层安装层10,每层安装层间隔设有若干个子安装槽11,两层安装层的子安装槽沿径向构成若干组测试探针安装槽。Furthermore, the test socket 1 includes an upper cover 7 and a base 8; the upper cover 7 is provided with a through hole with upper and lower openings; the base 8 is provided with a mounting groove 4; the upper cover is fixedly mounted on the base, and a groove is formed between the through hole and the base; one end of the mounting groove on the base extends horizontally toward the groove and is connected to the groove, forming a mounting cavity for the elastic test end of the test probe, and the other end radially penetrates the base downward, forming a mounting cavity for the connection end of the test probe. Among them, a probe mounting seat 9 is fixedly mounted in the mounting groove of the base of this embodiment, and the probe mounting seat is provided with two mounting layers 10 in the radial direction, and each mounting layer is provided with a plurality of sub-mounting grooves 11 at intervals, and the sub-mounting grooves of the two mounting layers form a plurality of groups of test probe mounting grooves in the radial direction.
进一步的,每个测试探针包括两个子测试探针,两个子测试探针构成一组子测试探针;若干个测试探针构成的若干组子测试探针一一对应的安装于若干组测试探针安装槽,且位于上层安装层的子测试探针定义为第一子测试探针12,下层安装层的子测试探针定义为第二子测试探针13。Furthermore, each test probe includes two sub-test probes, and the two sub-test probes constitute a group of sub-test probes; several groups of sub-test probes consisting of several test probes are installed one by one in several groups of test probe mounting slots, and the sub-test probe located on the upper mounting layer is defined as the first sub-test probe 12, and the sub-test probe located on the lower mounting layer is defined as the second sub-test probe 13.
另外,本实施例的子安装槽内设有安装卡槽,若干个子安装槽的安装卡槽相互联通为一连接卡槽14;子测试探针的中部针体与安装卡槽相对应的位置向外凸起,形成一安装凸起15;子测试探针通过安装凸起安装于安装卡槽而安装于子安装槽。而本实施例的第一子测试探针12和第二子测试探针13的弹性测试端的端部分别沿径向朝上弯折,构成径向测试端,且径向测试端的端部设置为针尖状结构;第一子测试探针和第二子测试探针的连接端的端部设置为弧形折弯结构。同时,本实施例的第一子测试探针和第二子测试探针的径向测试端的径向高度相同,第一子测试探针和第二子测试探针的连接端的端部的径向高度相同。In addition, a mounting slot is provided in the sub-mounting slot of the present embodiment, and the mounting slots of several sub-mounting slots are interconnected to form a connecting slot 14; the middle needle body of the sub-test probe protrudes outward at a position corresponding to the mounting slot to form a mounting protrusion 15; the sub-test probe is installed in the sub-mounting slot by installing the mounting protrusion in the mounting slot. The ends of the elastic test ends of the first sub-test probe 12 and the second sub-test probe 13 of the present embodiment are respectively bent upward in the radial direction to form a radial test end, and the end of the radial test end is set to a needle-like structure; the end of the connecting end of the first sub-test probe and the second sub-test probe is set to an arc-shaped bending structure. At the same time, the radial heights of the radial test ends of the first sub-test probe and the second sub-test probe of the present embodiment are the same, and the radial heights of the ends of the connecting ends of the first sub-test probe and the second sub-test probe are the same.
而本实施例的第一子测试探针12位于第一出口侧的针体上设有沿径向朝下折弯的第一折弯部16,在第一折弯部上设有沿水平方向朝第一出口方向折弯的第二折弯部17;第一折弯部、第二折弯部以及第一折弯部和第二折弯部之间的针体构成第一弹性变形部;第二子测试探针13位于第一出口侧的针体设有朝第一出口向上倾斜的倾斜折弯部18;倾斜折弯部构成第二弹性变形部。In this embodiment, the first sub-test probe 12 is provided with a first bending portion 16 bent radially downward on the needle body located on the first outlet side, and a second bending portion 17 bent horizontally toward the first outlet is provided on the first bending portion; the first bending portion, the second bending portion and the needle body between the first bending portion and the second bending portion constitute a first elastic deformation portion; the second sub-test probe 13 is provided with an inclined bending portion 18 inclined upward toward the first outlet on the needle body located on the first outlet side; the inclined bending portion constitutes a second elastic deformation portion.
工作原理:本实施例提供的芯片测试机构,包括上盖和底座,上盖和底座之间构成的凹槽用于安装芯片,芯片的针脚从凹槽进入与测试探针的弹性测试端相抵靠。一体式测试探针安装在底座的安装槽内,且其弹性测试端从凹槽伸出,另一端的连接端从底座下开口伸出,用于与测试板相接触。本实施例的测试机构在测试时,芯片由人工或放料机构放置并安装进凹槽内,在安装时,芯片的待测针脚首先与测试探针的弹性测试端相抵靠并沿凹槽下压,推动弹性测试端发生变形,使得弹性测试端的第一弹性变形部和第二弹性变形部分别发生形变产生弹性蓄能,而弹性测试端在弹性势能的反作用力下能紧贴于待测试针脚,并且在芯片下压过程中,弹性测试端的径向测试端的针尖因形变而在芯片针脚上发生滑动刮擦动作,实现对芯片针脚上的锡氧化层进行刮擦,同时径向测试端的针尖通过刮擦亦可除去自身存在的锡以及氧化层等杂物,保证芯片安装后在进行测试时,芯片针脚与弹性测试端的接触阻值处于稳定状态,实现测试信号通过一体式针体能有效传输至连接端,进而传输给测试板进行芯片针脚测试。Working principle: The chip testing mechanism provided in this embodiment includes an upper cover and a base. The groove formed between the upper cover and the base is used to install the chip. The pins of the chip enter from the groove and abut against the elastic test end of the test probe. The integrated test probe is installed in the installation groove of the base, and its elastic test end extends from the groove, and the connection end at the other end extends from the lower opening of the base to contact the test board. When the test mechanism of this embodiment is used for testing, the chip is placed and installed into the groove manually or by a feeding mechanism. During installation, the pin to be tested of the chip first abuts against the elastic test end of the test probe and is pressed down along the groove, pushing the elastic test end to deform, so that the first elastic deformation part and the second elastic deformation part of the elastic test end are respectively deformed to generate elastic energy storage, and the elastic test end can be tightly attached to the pin to be tested under the reaction force of the elastic potential energy, and in the process of pressing the chip down, the needle tip of the radial test end of the elastic test end slides and scrapes on the chip pin due to deformation, so as to scrape the tin oxide layer on the chip pin, and at the same time, the needle tip of the radial test end can also remove the tin and oxide layer and other debris existing in itself by scraping, so as to ensure that the contact resistance between the chip pin and the elastic test end is in a stable state when testing after the chip is installed, so that the test signal can be effectively transmitted to the connection end through the integrated needle body, and then transmitted to the test board for chip pin testing.
上面结合实施例对本申请的实施方式作了详细说明,但是本申请并不限于上述实施方式,对于本技术领域的普通技术人员来说,在获知本申请中记载内容后,在不脱离本申请原理的前提下,还可以对其作出若干同等变换和替代,这些同等变换和替代也应视为属于本申请的保护范围。The implementation methods of the present application are described in detail above in conjunction with the embodiments, but the present application is not limited to the above-mentioned implementation methods. For ordinary technicians in this technical field, after knowing the contents recorded in the present application, they can make several equivalent changes and substitutions thereto without departing from the principles of the present application, and these equivalent changes and substitutions should also be regarded as belonging to the protection scope of the present application.
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