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CN118012784A - Memory expansion access method, equipment and storage medium - Google Patents

Memory expansion access method, equipment and storage medium Download PDF

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Publication number
CN118012784A
CN118012784A CN202311764290.2A CN202311764290A CN118012784A CN 118012784 A CN118012784 A CN 118012784A CN 202311764290 A CN202311764290 A CN 202311764290A CN 118012784 A CN118012784 A CN 118012784A
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China
Prior art keywords
memory
mapping relation
constructing
establishing
random access
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Application number
CN202311764290.2A
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Chinese (zh)
Inventor
李晓强
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Deyi Microelectronics Co ltd
SHENZHEN SILICONGO MICROELECTRONICS CO Ltd
Original Assignee
Deyi Microelectronics Co ltd
SHENZHEN SILICONGO MICROELECTRONICS CO Ltd
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Priority to CN202311764290.2A priority Critical patent/CN118012784A/en
Publication of CN118012784A publication Critical patent/CN118012784A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

The invention relates to the field of memory access, and discloses an extended access method, device and storage medium for a memory. The method comprises the following steps: constructing a remapping table, constructing N memory sets in a read-only memory, and constructing M memory objects in a random access memory, wherein M, N is a positive integer; establishing a first mapping relation between N memory sets and the remapping table, and establishing a second mapping relation between M memory objects and the remapping table; and executing a memory access request in the random access memory based on the first mapping relation and the second mapping relation. In the embodiment of the invention, the problem that the internal codes of the current read-only memory are too fixed to meet the flexible change requirement of the memory is solved.

Description

Memory expansion access method, equipment and storage medium
Technical Field
The present invention relates to the field of memory access, and in particular, to a method, apparatus, and storage medium for extended access to a memory.
Background
Read-only memory (ROM) and random-access memory (RAM) are storage media used for storing codes and data in a chip, and half of the storage media occupy a large area ratio for an ASIC chip, and can be generally close to 1/3 to 1/2, so how to increase the density of the storage media is very important for reducing the cost of the chip.
In the storage medium, ROM is a storage medium for storing fixed codes in a chip, has the advantage of being much higher than RAM in density, but can only be solidified into a hardware circuit before chip streaming, if codes are to be changed, the hardware circuit needs to be modified again, and the corresponding photomask is replaced to reproduce the chip. Thus, conventional techniques have a large limitation on the application of the ROM, and only codes that can be cured are stored in the ROM. Therefore, a new technology is needed to solve the technical problem that the internal code of the current read-only memory is too fixed to meet the flexible change requirement of the memory.
Disclosure of Invention
The invention mainly aims to solve the technical problem that the internal codes of the existing read-only memory are too fixed to meet the flexible change requirement of the memory.
The first aspect of the present invention provides an extended access method for a memory, where the extended access method for a memory includes:
Constructing a remapping table, constructing N memory sets in a read-only memory, and constructing M memory objects in a random access memory, wherein M, N is a positive integer;
establishing a first mapping relation between N memory sets and the remapping table, and establishing a second mapping relation between M memory objects and the remapping table;
And executing a memory access request in the random access memory based on the first mapping relation and the second mapping relation.
Optionally, in a first implementation manner of the first aspect of the present invention, the constructing a remapping table, constructing N memory sets in a read-only memory, and constructing M memory objects in a random access memory includes:
N 1 curing codes are built in a read-only memory, N 2 ROM unit addresses are arranged in the read-only memory, wherein N 1 and N 2 are positive integers;
m storage RAM addresses are constructed in the random access memory.
Optionally, in a second implementation manner of the first aspect of the present invention, establishing a first mapping relationship between the N memory sets and the remap table, and establishing a second mapping relationship between the M memory objects and the remap table includes:
Establishing a mapping relation between N 2 ROM unit addresses and N 1 curing codes to obtain a first mapping relation;
And establishing a mapping relation between N 2 ROM unit addresses and M storage RAM addresses to obtain a second mapping relation.
Optionally, in a third implementation manner of the first aspect of the present invention, the executing, in the random access memory, a memory access request based on the first mapping relationship and the second mapping relationship includes:
based on a memory access request, finding out a target RAM address from M storage RAM addresses in the random access memory;
according to the first mapping relation, a target ROM unit address corresponding to the target RAM address is found from N 2 ROM unit addresses;
And according to a second mapping relation, finding a target curing code corresponding to the target ROM unit address from N 1 curing codes, and executing the target curing code to realize the memory access request.
Optionally, in a fourth implementation manner of the first aspect of the present invention, the constructing a remapping table, constructing N memory sets in a read-only memory, and constructing M memory objects in a random access memory includes:
Constructing N function parameter handles in a read-only memory;
M 1 object pointers are constructed in a random access memory, and M 2 structure data are constructed in the random access memory.
Optionally, in a fifth implementation manner of the first aspect of the present invention, establishing a first mapping relationship between the N memory sets and the remap table, and establishing a second mapping relationship between the M memory objects and the remap table includes:
establishing mapping relations between N function parameter handles and M 1 object pointers to obtain a first mapping relation;
and establishing a mapping relation between M 2 structural data and M 1 object pointers to obtain a second mapping relation.
Optionally, in a sixth implementation manner of the first aspect of the present invention, the executing, in the random access memory, a memory access request based on the first mapping relationship and the second mapping relationship includes:
based on a memory access request, M 1 object pointers find a target object pointer in the random access memory;
According to the first mapping relation, a target handle corresponding to the target object pointer is found in the N function parameter handles, or according to the second mapping relation, structural data corresponding to the target object pointer is found in the M 2 structural data, so that the target handle or the structural data can realize the memory access request.
Optionally, in a seventh implementation manner of the first aspect of the present invention, the object pointer includes: parameter pointer, function pointer.
A second aspect of the present invention provides an extended access device for a memory, including: a memory and at least one processor, the memory having instructions stored therein, the memory and the at least one processor being interconnected by a line; and the at least one processor calls the instruction in the memory so that the memory expansion access device executes the memory expansion access method.
A third aspect of the present invention provides a computer readable storage medium having instructions stored therein which, when run on a computer, cause the computer to perform the above-described memory extended access method.
In the embodiment of the invention, the conversion mapping table is established between the ROM and the RAM, and the chip can fully utilize the advantage of high storage density of the ROM based on the conversion mapping table, so that more codes can be transferred from the RAM to the ROM for solidification, and meanwhile, the ROM internal codes have enough flexible changing and expanding capabilities, thereby solving the problem that the current ROM internal codes are too fixed and can not meet the flexible memory changing requirement.
Drawings
FIG. 1 is a schematic diagram of an embodiment of a memory extended access method according to an embodiment of the present invention;
FIG. 2 is a diagram of one embodiment of a method for extended access to memory;
FIG. 3 is a diagram of another embodiment of a method for extended access to memory;
FIG. 4 is a schematic diagram of an embodiment of a memory extended access device according to an embodiment of the present invention.
Detailed Description
The embodiment of the invention provides an extended access method, equipment and storage medium for a memory.
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While the present disclosure has been illustrated in the drawings in some form, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and examples of the present disclosure are for illustrative purposes only and are not intended to limit the scope of the present disclosure.
In describing embodiments of the present disclosure, the term "comprising" and its like should be taken to be open-ended, i.e., including, but not limited to. The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first," "second," and the like, may refer to different or the same object. Other explicit and implicit definitions are also possible below.
For easy understanding, the following describes a specific flow of an embodiment of the present invention, referring to fig. 1, and one embodiment of a method for expanding access to a memory in an embodiment of the present invention includes:
101. Constructing a remapping table, constructing N memory sets in a read-only memory, and constructing M memory objects in a random access memory, wherein M, N is a positive integer;
102. establishing a first mapping relation between N memory sets and the remapping table, and establishing a second mapping relation between M memory objects and the remapping table;
103. And executing a memory access request in the random access memory based on the first mapping relation and the second mapping relation.
In steps 101-103, a remapping table can be opened up independently, and the remapping table is set independently and is not in ROM and RAM. The remap table can be opened up in a read only memory ROM or in a random access memory RAM. The remap table opens up different implementation methods at different positions. N memory sets are constructed in the read-only memory, and the internal sets can be code contents of different addresses, can also be set as parameter handles and function call objects, and can be set for different data processing according to requirements. M storage objects are constructed in the random access memory, the storage objects can be structures and specific functions, the storage objects can also be mapped addresses, and different data processing is set according to requirements.
And mapping and associating the opened N memory sets with the remapping table to generate a first mapping relation, and mapping and associating the opened M memory objects with the remapping table to generate a second mapping relation. The ROM and RAM are related by the remapping table, and when the RAM obtains the access request of the user, the external control state in the ROM can be flexibly configured by adjusting the mapping relation of the mapping table. Based on the first mapping relation and the second mapping relation, the mapping relation between the read-only memory ROM and the random access memory RAM can be flexibly transformed, and the flexible access to the fixed code programs and data in the read-only memory ROM when the memory access request is executed in the random access memory is realized.
In one embodiment, please refer to fig. 2, fig. 2 is a schematic diagram showing one embodiment of a method for expanding access to a memory, wherein step 101 includes the following embodiments:
1011. N 1 curing codes are built in a read-only memory, N 2 ROM unit addresses are arranged in the read-only memory, wherein N 1 and N 2 are positive integers;
1012. M storage RAM addresses are constructed in the random access memory.
In the step 1011-1012, N 1 solidifying codes of code M, code N, etc. are opened up in ROM memory, N 2 ROM unit addresses of address M, address N, etc. are set in the ROM memory, and M storage RAM addresses of RAM address M, RAM address N, etc. are constructed in RAM.
The step 102 includes the following specific embodiments:
1021. Establishing a mapping relation between N 2 ROM unit addresses and N 1 curing codes to obtain a first mapping relation;
1022. And establishing a mapping relation between N 2 ROM unit addresses and M storage RAM addresses to obtain a second mapping relation.
Step 103 includes the following specific embodiments:
1031. Based on a memory access request, finding out a target RAM address from M storage RAM addresses in the random access memory;
1032. According to the first mapping relation, a target ROM unit address corresponding to the target RAM address is found from N 2 ROM unit addresses;
1033. And according to a second mapping relation, finding a target curing code corresponding to the target ROM unit address from N 1 curing codes, and executing the target curing code to realize the memory access request.
In steps 1021-1022 and 1031-1033, the mapping table in the register is composed of two parts, the first part is the unit address value table in ROM, and the second part is the corresponding mapping new RAM address. However, when the MCU (microprocessor) fetches the instruction or data from the ROM through the address bus controller, the address bus controller will first use one clock cycle to retrieve from the ROM internal unit address value table whether there is a performance equal to the current address, if so, the PC pointer (the address to which the current program is executed) is directly pointed to the RAM address corresponding to the table entry, and returns the instruction and value in the RAM address, after which the program will continue to execute from the RAM address. Thus, the code in ROM can be replaced by the address remapping table in the register and the instruction and data defined in the corresponding RAM address, so as to achieve the effect of dynamic code expansion. With this mode, ROM code design is flexible and no prior programmatic preparation is required for the code extension, only when the extension is actually needed, the dynamic configuration performs memory access requests.
In another embodiment, please refer to fig. 3, fig. 3 is a schematic diagram illustrating another embodiment of a method for expanding access to a memory, wherein step 101 further includes the following embodiments:
1013. constructing N function parameter handles in a read-only memory;
1014. M 1 object pointers are constructed in a random access memory, and M 2 structure data are constructed in the random access memory, wherein M 1 and M 2 are positive integers.
In the steps 1013-1014, N function parameter handles such as parameter handle 1, function call 1, parameter handle N, function call N, etc. are opened up in the read only memory ROM, and M 1 object pointers such as parameter pointer 1, parameter pointer N, etc., function pointer 1, function pointer N, etc., are opened up in the random access memory RAM1, and M 2 structure data such as structure 1, structure N, etc., function 1, function N, etc., are opened up in the random access memory RAM 1.
Step 102 further includes the following specific embodiments:
1023. establishing mapping relations between N function parameter handles and M 1 object pointers to obtain a first mapping relation;
1024. And establishing a mapping relation between M 2 structural data and M 1 object pointers to obtain a second mapping relation.
Step 103 further includes the following specific embodiments:
1034. Based on a memory access request, M 1 object pointers find a target object pointer in the random access memory;
1035. According to the first mapping relation, a target handle corresponding to the target object pointer is found in the N function parameter handles, or according to the second mapping relation, structural data corresponding to the target object pointer is found in the M 2 structural data, so that the target handle or the structural data can realize the memory access request.
In steps 1023-1024 and 1034-1035, a RAM1 area is preset for storing the parameter pointers and function pointers of the functions to be replaced. In the ROM area, for those functions that were previously planned to have code changes, upgrades possible, their function calls are structured, the parameters and return values are saved into the structure located in RAM2 pointed to by the parameter pointer in RAM1, the function call is located at the function entry in RAM1, which in turn is actually pointed to the specific function located in RAM 2. The advantage of this is that in the chip design stage, the code in ROM can be determined in advance, including the address of the function and the variable in RAM related to the code, and the number of the variables and the length of the function can be adjusted at any time in the following specific design. That is, under a memory access request, a target object pointer is found through M 1 object pointers, corresponding structure data is found from M 2 structure data of the random access memory RAM by the target object pointer, or a target handle is found from N function parameter handles of the read only memory ROM by the target object pointer, so that the target handle or the structure data realizes the memory access request.
And, the object pointer includes: parameter pointer, function pointer, if the pointer is parameter pointer, the mapped parameter data is called, if the pointer is function pointer, the mapped function data is called.
In the embodiment of the invention, the conversion mapping table is established between the ROM and the RAM, and the chip can fully utilize the advantage of high storage density of the ROM based on the conversion mapping table, so that more codes can be transferred from the RAM to the ROM for solidification, and meanwhile, the ROM internal codes have enough flexible changing and expanding capabilities, thereby solving the problem that the current ROM internal codes are too fixed and can not meet the flexible memory changing requirement.
Fig. 4 is a schematic structural diagram of an extended access device for a memory according to an embodiment of the present invention, where the extended access device 400 for a memory may have a relatively large difference due to different configurations or performances, and may include one or more processors (central processing units, CPUs) 410 (e.g., one or more processors) and a memory 420, and one or more storage mediums 430 (e.g., one or more mass storage devices) for storing application programs 433 or data 432. Wherein memory 420 and storage medium 430 may be transitory or persistent storage. The program stored on the storage medium 430 may include one or more modules (not shown), each of which may include a series of instruction operations in the extended access device 400 to memory. Still further, the processor 410 may be configured to communicate with the storage medium 430 to execute a series of instruction operations in the storage medium 430 on the memory expansion access device 400.
The memory-based extended access device 400 may also include one or more power supplies 440, one or more wired or wireless network interfaces 450, one or more input/output interfaces 460, and/or one or more operating systems 431, such as Windows Serve, mac OS X, unix, linux, free BSD, and the like. Those skilled in the art will appreciate that the memory-based extended access device structure shown in fig. 4 is not limiting and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
The present invention also provides a computer readable storage medium, which may be a non-volatile computer readable storage medium, or may be a volatile computer readable storage medium, where instructions are stored in the computer readable storage medium, when the instructions are executed on a computer, cause the computer to perform the steps of the memory expansion access method.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
Moreover, although operations are depicted in a particular order, this should be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.

Claims (10)

1. The memory expansion access method is characterized by comprising the following steps:
Constructing a remapping table, constructing N memory sets in a read-only memory, and constructing M memory objects in a random access memory, wherein M, N is a positive integer;
establishing a first mapping relation between N memory sets and the remapping table, and establishing a second mapping relation between M memory objects and the remapping table;
And executing a memory access request in the random access memory based on the first mapping relation and the second mapping relation.
2. The method for expanding and accessing the memory according to claim 1, wherein constructing the remapping table, constructing N memory sets in the read-only memory, and constructing M memory objects in the random access memory includes:
N 1 curing codes are built in a read-only memory, N 2 ROM unit addresses are arranged in the read-only memory, wherein N 1 and N 2 are positive integers;
m storage RAM addresses are constructed in the random access memory.
3. The method for extended access to a memory according to claim 2, wherein said establishing a first mapping relationship between the N memory sets and the remap table, and establishing a second mapping relationship between the M memory objects and the remap table comprises:
Establishing a mapping relation between N 2 ROM unit addresses and N 1 curing codes to obtain a first mapping relation;
And establishing a mapping relation between N 2 ROM unit addresses and M storage RAM addresses to obtain a second mapping relation.
4. The method of claim 3, wherein the performing the memory access request in the random access memory based on the first mapping relationship and the second mapping relationship comprises:
based on a memory access request, finding out a target RAM address from M storage RAM addresses in the random access memory;
according to the first mapping relation, a target ROM unit address corresponding to the target RAM address is found from N 2 ROM unit addresses;
And according to a second mapping relation, finding a target curing code corresponding to the target ROM unit address from N 1 curing codes, and executing the target curing code to realize the memory access request.
5. The method for expanding and accessing the memory according to claim 1, wherein constructing the remapping table, constructing N memory sets in the read-only memory, and constructing M memory objects in the random access memory includes:
Constructing N function parameter handles in a read-only memory;
M 1 object pointers are constructed in a random access memory, and M 2 structure data are constructed in the random access memory, wherein M 1 and M 2 are positive integers.
6. The method for extended memory access according to claim 5, wherein establishing a first mapping relationship between the N memory sets and the remap table, and establishing a second mapping relationship between the M memory objects and the remap table comprises:
establishing mapping relations between N function parameter handles and M 1 object pointers to obtain a first mapping relation;
and establishing a mapping relation between M 2 structural data and M 1 object pointers to obtain a second mapping relation.
7. The method of claim 6, wherein the performing the memory access request in the random access memory based on the first mapping relationship and the second mapping relationship comprises:
based on a memory access request, M 1 object pointers find a target object pointer in the random access memory;
According to the first mapping relation, a target handle corresponding to the target object pointer is found in the N function parameter handles, or according to the second mapping relation, structural data corresponding to the target object pointer is found in the M 2 structural data, so that the target handle or the structural data can realize the memory access request.
8. The method for extended access to memory according to claim 5, wherein the object pointer comprises: parameter pointer, function pointer.
9. An extended access device for a memory, wherein the extended access device for a memory includes: a memory and at least one processor, the memory having instructions stored therein, the memory and the at least one processor being interconnected by a line;
The at least one processor invoking the instructions in the memory to cause the memory expansion access device to perform the memory expansion access method of any of claims 1-8.
10. A computer readable storage medium having a computer program stored thereon, wherein the computer program when executed by a processor implements the memory extended access method according to any of claims 1-8.
CN202311764290.2A 2023-12-20 2023-12-20 Memory expansion access method, equipment and storage medium Pending CN118012784A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311764290.2A CN118012784A (en) 2023-12-20 2023-12-20 Memory expansion access method, equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311764290.2A CN118012784A (en) 2023-12-20 2023-12-20 Memory expansion access method, equipment and storage medium

Publications (1)

Publication Number Publication Date
CN118012784A true CN118012784A (en) 2024-05-10

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