CN117874426A

CN117874426A - PHM chip-based signal processing method, PHM chip-based signal processing device and medium

Info

Publication number: CN117874426A
Application number: CN202311745519.8A
Authority: CN
Inventors: 于治楼; 雷维正; 张晋辉; 张孝飞
Original assignee: Chaoyue Technology Co Ltd
Current assignee: Chaoyue Technology Co Ltd
Priority date: 2023-12-15
Filing date: 2023-12-15
Publication date: 2024-04-12

Abstract

The application relates to the technical field of signal denoising, and discloses a PHM chip-based signal processing method, a PHM chip-based signal processing device and a PHM chip-based signal processing medium. The method comprises the following steps: the method comprises the steps that data to be processed are collected through an upper computer and a sensor connected to the upper computer, and are converted into signals to be processed through an analog-to-digital converter; storing a signal to be processed into a sensor register, wherein the original data stored in the register comprises effective data and noise data; the PHM chip accesses the sensor register to extract all data, and the data is verified by the built-in convolution IP to remove noise, so that effective data are screened out; and transmitting the effective data to an upper computer to finish signal denoising processing. The invention can screen out effective signals while realizing high-frequency signal acquisition, eliminate interference and realize effective acquisition and rapid processing of a large amount of data.

Description

PHM chip-based signal processing method, PHM chip-based signal processing device and medium

Technical Field

The application relates to the technical field of signal denoising, and relates to a PHM chip-based signal processing method, a PHM chip-based signal processing device and a PHM chip-based signal processing medium.

Background

Currently, PHM (prognostics and health management) prediction and health management technology is a brand new solution for managing the health status of a system, and is proposed based on the latest research results of artificial intelligence technology and modern information technology. The method realizes the prediction of the intelligent system which is changed from the traditional fault diagnosis based on the hardware sensor to the technology based on embedded, C++, signal filtering and the like as the bottom technology, and is suitable for various industrial production application scenes.

In the process of implementing the embodiments of the present disclosure, it is found that at least the following problems exist in the related art:

in industrial production, according to different use scenes, different types of data need to be collected and processed, but in the process of signal collection, noise signals are inevitably generated, and analysis of effective signals and final collection of required data are affected.

It should be noted that the information disclosed in the foregoing background section is only for enhancing understanding of the background of the present application and thus may include information that does not form the prior art that is already known to those of ordinary skill in the art.

Disclosure of Invention

The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview, and is intended to neither identify key/critical elements nor delineate the scope of such embodiments, but is intended as a prelude to the more detailed description that follows.

The embodiment of the disclosure provides a PHM chip-based signal processing method, a PHM chip-based signal processing device and a PHM chip-based signal processing medium, so as to solve the technical problem of noise signal generation in signal acquisition.

In some embodiments, the method comprises:

the method comprises the steps that data to be processed are collected through an upper computer and a sensor connected to the upper computer, and are converted into signals to be processed through an analog-to-digital converter;

storing a signal to be processed into a sensor register, wherein the original data stored in the register comprises effective data and noise data;

the PHM chip accesses the sensor register to extract all data, and the data is verified by the built-in convolution IP to remove noise, so that effective data are screened out;

and transmitting the effective data to an upper computer to finish signal denoising processing.

Preferably, the sensor comprises a temperature sensor, a humidity sensor, a hydraulic pressure sensor and a stress sensor.

Preferably, the convolution IP core includes an AXIMaster module and a PE module, where data interaction is performed between the AXIMaster module and the PE module through an uplink data buffer and a downlink data buffer, and the uplink data buffer and the downlink data buffer perform data switching by using a MUX module.

Preferably, the uplink data buffer comprises a FIFO module, a MUX module, a format module and a no-operation module, and the downlink data buffer comprises a FIFO module, a MUX module and a no-operation module.

Preferably, the uplink data buffering data processing mode specifically includes:

the AXIMaster module receives original data and sends the data to the FIFO module, the FIFO module sends the processed data to the format module, the MUX module and the no-operation module respectively, the data processed by the format module and the no-operation module are sent to the MUX module, and the MUX module outputs the data to the PE module.

Preferably, the downlink data buffering data processing mode specifically includes:

the PE module sends output data to the MUX module and the non-operation module respectively, the non-operation module sends an output result to the MUX module, the MUX module sends the output result to the FIFO module, the FIFO module sends the output data to the AXIMaster module, and the AXIMaster module sends the received data to an upper computer.

In some embodiments, the apparatus comprises: the PHM chip-based signal processing method is characterized in that the PHM chip-based signal processing method comprises a processor and a memory storing program instructions, wherein the processor is configured to execute the program instructions when the processor executes the program instructions.

In some embodiments, the storage medium stores program instructions that, when executed, perform a PHM chip-based signal processing method.

The signal processing method, device and medium based on PHM chip provided by the embodiment of the disclosure can realize the following technical effects:

the invention can screen out effective signals while realizing high-frequency signal acquisition, eliminate interference and realize effective acquisition and rapid processing of a large amount of data.

The foregoing general description and the following description are exemplary and explanatory only and are not restrictive of the application.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which like reference numerals refer to similar elements, and in which:

FIG. 1 is a schematic flow chart of the method of the present invention;

FIG. 2 is a schematic diagram of a convolutional IP core structure provided by an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of a device usage flow provided by an embodiment of the present disclosure;

FIG. 4 is a schematic view of a device structure provided by an embodiment of the present disclosure;

in the figure: FIFO DOWN represents a downstream Data buffer, FIFO UP represents an upstream Data buffer, and Data Flow represents a Data stream.

Detailed Description

So that the manner in which the features and techniques of the disclosed embodiments can be understood in more detail, a more particular description of the embodiments of the disclosure, briefly summarized below, may be had by reference to the appended drawings, which are not intended to be limiting of the embodiments of the disclosure. In the following description of the technology, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may still be practiced without these details. In other instances, well-known structures and devices may be shown simplified in order to simplify the drawing.

Referring to fig. 1, a signal processing method based on a PHM chip includes:

s101: the method comprises the steps that data to be processed are collected through an upper computer and a sensor connected to the upper computer, and are converted into signals to be processed through an analog-to-digital converter;

s102: storing a signal to be processed into a sensor register, wherein the original data stored in the register comprises effective data and noise data;

s103: the PHM chip accesses the sensor register to extract all data, and the data is verified by the built-in convolution IP to remove noise, so that effective data are screened out;

s104: and transmitting the effective data to an upper computer to finish signal denoising processing.

Optionally, the sensor includes a temperature sensor, a humidity sensor, a hydraulic pressure sensor, and a stress sensor. The corresponding sensor can be selected for acquisition according to the type of data required to be acquired.

Optionally, the convolution IP core includes an AXIMaster module and a PE module, where data interaction is performed between the AXIMaster module and the PE module through an uplink data buffer and a downlink data buffer, where the uplink data buffer and the downlink data buffer perform data switching by using a MUX module.

Optionally, the uplink data buffer includes a FIFO module, a MUX module, a format module, and a no-operation module, and the downlink data buffer includes a FIFO module, a MUX module, and a no-operation module.

Optionally, the uplink data buffering data processing mode specifically includes:

Optionally, the downlink data buffering data processing mode specifically includes:

As shown in connection with fig. 3, an embodiment of the present disclosure provides a PHM chip-based signal processing apparatus 300 including a processor (processor) 304 and a memory (memory) 301. Optionally, the apparatus may further comprise a communication interface (Communication Interface) 302 and a bus 303. The processor 304, the communication interface 302, and the memory 301 may communicate with each other through the bus 303. The communication interface 302 may be used for information transfer. The processor 304 may invoke logic instructions in the memory 301 to perform the PHM chip-based signal processing method of the above-described embodiments. The communication interface 302 is configured to receive sensor data sent by the upper computer, and transmit the sensor data to the memory 303.

Further, the logic instructions in the memory 301 may be implemented in the form of software functional units and stored in a computer readable storage medium when sold or used as a stand alone product.

The memory 301 is used as a computer readable storage medium for storing a software program, a computer executable program, such as program instructions/modules corresponding to the methods in the embodiments of the present disclosure. The processor 304 executes the functional applications and data processing by executing the program instructions/modules stored in the memory 301, i.e., implements the PHM chip-based signal processing method in the above-described embodiment.

The memory 301 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for a function; the storage data area may store data created according to the use of the terminal device, etc. In addition, the memory 301 may include a high-speed random access memory, and may also include a nonvolatile memory.

The specific use mode of the device is as follows:

s201: and powering up the upper computer with the device.

S202: the upper computer performs signal acquisition operation, determines the type of the acquired signal and receives an input signal from the sensor; and after the input source is sent, generating parameter configuration, and starting to read and preprocess the information by the device and storing the information into a memory.

S203: after the parameter configuration reading is completed, parameters containing effective data and noise are obtained, denoising processing is carried out by the built-in convolution IP check data in the processor, and the processed data are sent to the upper computer through the communication interface.

S204: and the upper computer receives and outputs the data which is finally processed.

Embodiments of the present disclosure provide a computer-readable storage medium storing computer-executable instructions configured to perform the above PHM chip-based signal processing method.

The computer readable storage medium may be a transitory computer readable storage medium or a non-transitory computer readable storage medium.

Embodiments of the present disclosure may be embodied in a software product stored on a storage medium, including one or more instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of a method according to embodiments of the present disclosure. And the aforementioned storage medium may be a non-transitory storage medium including: a plurality of media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, randomAccess Memory), a magnetic disk, or an optical disk, or a transitory storage medium.

In the embodiments disclosed herein, the disclosed methods, articles of manufacture (including but not limited to devices, apparatuses, etc.) may be practiced in other ways. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the units may be merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form. The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to implement the present embodiment. In addition, each functional unit in the embodiments of the present disclosure may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. In the description corresponding to the flowcharts and block diagrams in the figures, operations or steps corresponding to different blocks may also occur in different orders than that disclosed in the description, and sometimes no specific order exists between different operations or steps. For example, two consecutive operations or steps may actually be performed substantially in parallel, they may sometimes be performed in reverse order, which may be dependent on the functions involved. Each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Claims

1. The PHM chip-based signal processing method is characterized by comprising the following steps of:

2. The PHM chip-based signal processing method of claim 1, wherein the sensor comprises a temperature sensor, a humidity sensor, a hydraulic sensor, a stress sensor.

3. The PHM chip-based signal processing method of claim 1, wherein the convolutional IP core includes an AXIMaster module and a PE module, and data interaction is performed between the AXIMaster module and the PE module through an uplink data buffer and a downlink data buffer, and the uplink data buffer and the downlink data buffer perform data switching by using a MUX module.

4. The PHM chip-based signal processing method of claim 3, wherein the uplink data buffer includes a FIFO module, a MUX module, a format module, and a no-operation module, and the downlink data buffer includes a FIFO module, a MUX module, and a no-operation module.

5. The PHM chip-based signal processing method of claim 4, wherein the uplink data buffering data processing mode specifically includes:

6. The PHM chip-based signal processing method of claim 4, wherein the downlink data buffer data processing mode specifically includes:

7. A PHM chip-based signal processing apparatus comprising a processor and a memory storing program instructions, wherein the processor is configured to perform the PHM chip-based signal processing method of any one of claims 1 to 6 when the program instructions are executed.

8. A storage medium storing program instructions which, when executed, perform the PHM chip-based signal processing method of any one of claims 1 to 6.