CN117810223B - A polysilicon resistor circuit, a preparation method and an audio differential circuit - Google Patents

Abstract

The present invention relates to the technical field of audio signal processing, and proposes a polysilicon resistor circuit, a preparation method and an audio differential circuit, wherein the polysilicon resistor circuit comprises: a first resistor branch, comprising a first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end; a second resistor branch, comprising a potential adjustment circuit; wherein the potential adjustment circuit is connected to the substrate of the first polysilicon resistor, and is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input end and the total output end. The present invention adjusts the substrate potential of the polysilicon resistor to an intermediate potential between the total input end and the total output end by designing a potential adjustment circuit, thereby ensuring that the polysilicon resistor has a fixed substrate voltage and provides a stable resistance value, thereby maintaining the linear output of the audio differential circuit and improving the THD index.

Description

A polysilicon resistor circuit, a preparation method and an audio differential circuit

Technical Field

The present invention relates to the technical field of audio signal processing, and in particular to a polysilicon resistor circuit, a preparation method and an audio differential circuit.

Background technique

In the field of audio signal processing, the processed audio signal is prone to distortion during the amplification or reduction process, which will cause harmonic mixing or loss of audio signal during transmission. The use of polycrystalline resistors in audio circuits is very common. Polycrystalline resistors themselves have a relatively obvious piezoelectric effect. When the voltages at both ends of the resistor are inconsistent, the resistance value will change slightly, which will affect the order of magnitude of THD. my country is the world's largest consumer electronics market and production base. The demand for a high-fidelity audio power amplifier is increasing day by day. How to improve the THD of audio circuits is crucial.

At present, there are two traditional ways to optimize the THD of audio amplifiers: one is to optimize the structure and performance of the operational amplifier, greatly increase the gain and bandwidth of the operational amplifier to reduce the impact of the feedback small signal on it, or use a differential circuit architecture to reduce the energy of the output high-order even harmonics, but this method has certain limitations and the optimization effect is inevitably related to the circuit process. The other is laser etching. When making the circuit layout, the layer where the resistor is located is laser-etched to change its resistance value to reduce the circuit mismatch and offset to increase the output linearity. This method has a certain effect on the optimization of THD, but the operation is more complicated and uncertain, and the cost is higher in mass production. The above methods can all improve the THD of the audio circuit, but on this basis, a method of improving the THD of the audio circuit that is simple and intuitive to operate and has obvious and visible effects is also needed.

Summary of the invention

In order to solve the above-mentioned problems in the prior art, the present invention provides a polysilicon resistor circuit, a preparation method and an audio differential circuit, aiming to solve the problems of low linearity and poor THD index of the audio differential circuit in the prior art.

The present invention provides a polysilicon resistor circuit, comprising:

A first resistance branch, the first resistance branch comprising a first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end;

A second resistance branch, wherein the second resistance branch includes a potential adjustment circuit;

The potential adjustment circuit is connected to the substrate of the first polysilicon resistor and is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal.

Optionally, the potential adjustment circuit specifically includes:

A polysilicon resistor series structure, a second input connection line connecting the polysilicon resistor series structure and a total input end, a second output connection line connecting the polysilicon resistor series structure and a total output end, and an intermediate potential lead connection line connecting the polysilicon resistor series structure and a first polysilicon resistor substrate;

The polysilicon resistor series structure is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal according to the intermediate potential lead-out connection line.

Optionally, the polysilicon resistor series structure specifically includes:

a second polysilicon resistor, a third polysilicon resistor, and a series connection line connecting the second polysilicon resistor and the third polysilicon resistor;

The second polysilicon resistor and the third polysilicon resistor are configured to have the same resistance value, and the intermediate potential lead-out connection line is configured to connect the series connection line and the substrate of the first polysilicon resistor.

Optionally, the first polysilicon resistor, the second polysilicon resistor and the third polysilicon resistor include:

substrate;

An epitaxial layer, an oxide layer, polysilicon and a passivation layer disposed on the oxide layer and covering the polysilicon are sequentially stacked;

The passivation layer is provided with a pair of metal contact holes, and the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

Optionally, the polysilicon resistor series structure is configured to be formed by connecting an independent second polysilicon resistor and a third polysilicon resistor;

Wherein, the second polysilicon resistor and the third polysilicon resistor have independent substrates, epitaxial layers, oxide layers and passivation layers;

The second polysilicon resistor and the third polysilicon resistor are connected only through the series connection line.

Optionally, the polysilicon resistor series structure is configured to be formed by connecting a combined second polysilicon resistor and a third polysilicon resistor;

Wherein, the second polysilicon resistor and the third polysilicon resistor have a common substrate, epitaxial layer, oxide layer and passivation layer;

The polysilicon of the first polysilicon resistor and the polysilicon of the second polysilicon resistor are arranged on a common oxide layer and covered by a common passivation layer, and each pair of metal contact holes is arranged in a passivation layer on the polysilicon.

A second aspect of the present invention provides a method for preparing a polysilicon resistor circuit, comprising:

preparing a first polysilicon resistor;

Constructing a first resistance branch including the first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end;

preparing a potential adjustment circuit;

constructing a second resistance branch including the potential adjustment circuit;

The potential adjustment circuit is connected to a substrate of the first polysilicon resistor to adjust a substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal.

Optionally, preparing a potential adjustment circuit specifically includes:

preparing a polysilicon resistor series structure;

Constructing a potential adjustment circuit including the polysilicon resistor series structure, a second input connection line connecting the polysilicon resistor series structure and a total input end, a second output connection line connecting the polysilicon resistor series structure and a total output end, and an intermediate potential lead connection line connecting the polysilicon resistor series structure and a first polysilicon resistor substrate;

The polysilicon resistor series structure is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal according to the intermediate potential lead-out connection line.

Optionally, the preparation of the polysilicon resistor series structure specifically includes:

preparing a second polysilicon resistor and a third polysilicon resistor;

Constructing a polysilicon resistor series structure including the second polysilicon resistor, the third polysilicon resistor, and a series connection line connecting the second polysilicon resistor and the third polysilicon resistor;

The second polysilicon resistor and the third polysilicon resistor are configured to have the same resistance value, and the intermediate potential lead-out connection line is configured to connect the series connection line and the substrate of the first polysilicon resistor.

Optionally, preparing the first polysilicon resistor, preparing the second polysilicon resistor, and preparing the third polysilicon resistor specifically include:

providing a substrate;

Sequentially stacking an epitaxial layer, an oxide layer, and polysilicon on the substrate, and forming a passivation layer covering the polysilicon on the oxide layer;

A pair of metal contact holes are formed on the passivation layer; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

Optionally, preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically include:

providing two separate substrates;

Forming an epitaxial layer, an oxide layer, and polysilicon on the two independent substrates respectively, and forming a passivation layer covering each polysilicon on the oxide layer;

A pair of metal contact holes is formed on each of the passivation layers; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

Optionally, preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically include:

providing a common substrate;

Forming a common epitaxial layer, a common oxide layer, and polysilicon of the second polysilicon resistor and the third polysilicon resistor on the common substrate, and forming a common passivation layer covering each polysilicon respectively on the common oxide layer;

A pair of metal contact holes are formed in the common passivation layer on each polysilicon, wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

A third aspect of the present invention provides an audio differential circuit, comprising:

Audio operational amplifiers; and

The polysilicon resistor circuit as described above is configured between the inverting input terminal, the non-inverting input terminal, the output terminal or the non-inverting input terminal of the audio operational amplifier and the reference voltage input terminal or the ground terminal.

The beneficial effects of the present invention are as follows: a polysilicon resistor circuit, a preparation method and an audio differential circuit are proposed, wherein the polysilicon resistor circuit comprises: a first resistor branch, wherein the first resistor branch comprises a first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end; a second resistor branch, wherein the second resistor branch comprises a potential adjustment circuit; wherein the potential adjustment circuit is connected to the substrate of the first polysilicon resistor and is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input end and the total output end. The present invention adjusts the substrate potential of the polysilicon resistor to an intermediate potential between the total input end and the total output end by designing a potential adjustment circuit, thereby ensuring that the polysilicon resistor has a fixed substrate voltage and provides a stable resistance value, thereby maintaining the linear output of the audio differential circuit and improving the THD index.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of the structure of an existing polysilicon resistor;

FIG2 is a schematic diagram of the structure of an existing audio differential circuit;

FIG3 is a schematic diagram of the structure of a polysilicon resistor circuit provided by the present invention;

FIG4 is a schematic flow chart of a method for preparing a polysilicon resistor circuit provided by the present invention;

FIG5 is a schematic diagram of an audio differential circuit in an inverting mode provided by the present invention;

FIG6 is a schematic diagram of an audio differential circuit in a normal phase mode provided by the present invention;

FIG. 7 is a schematic diagram of an audio differential circuit in a fully differential mode provided by the present invention.

Detailed ways

The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

Embodiment 1:

An embodiment of the present invention provides a polysilicon resistor circuit. In this embodiment, a polysilicon resistor circuit includes: a first resistor branch, the first resistor branch includes a first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end; a second resistor branch, the second resistor branch includes a potential adjustment circuit; wherein the potential adjustment circuit is connected to the substrate of the first polysilicon resistor and is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input end and the total output end.

It should be noted that, at present, there are two traditional ways to optimize the THD of audio amplifiers: one is to optimize the structure and performance of the operational amplifier, greatly increase the gain and bandwidth of the operational amplifier to reduce the impact of the feedback small signal on it, or use a differential circuit architecture to reduce the energy of the output high-order even harmonics, but this method has certain limitations and the optimization effect is inevitably related to the circuit process. The other is laser etching, which is to laser etch the layer where the resistor is located during circuit layout to change its resistance value to reduce circuit mismatch and offset to increase output linearity. This method has a certain effect on THD optimization, but the operation is more complicated and uncertain and the cost is higher in mass production.

In order to solve the above problems, this embodiment considers using polysilicon resistors with higher stability, stronger anti-interference ability and better voltage resistance to construct an audio differential circuit. However, due to the existence of existing polysilicon resistors, the resistance of the polysilicon resistor changes with the change of the substrate voltage, which leads to the instability of the circuit gain of the audio differential circuit containing the polysilicon resistor, affecting the linearity of the output signal and causing the deterioration of the THD index. Specifically, as shown in Figure 1, when a voltage is applied to the metal contact hole and a current flows through the resistor, the polysilicon strip is doped with the substrate to form a plate, and the oxide layer is used as a medium to form a capacitor. The charge is distributed in a trapezoidal shape along the current direction in the area close to the oxide layer. More charge is gathered in the high potential area and less charge is gathered in the low potential area, thus causing the actual resistance of the polycrystalline resistor to change with the change of the substrate voltage. At this time, assuming that the difference between the substrate voltage and the polysilicon voltage is V _Δ , and a substrate voltage coefficient is fitted as Cs, it can be obtained that the resistance after considering the influence of the substrate is R _b , and the original resistance of the resistor is R, it can be obtained:

At this time, the voltage on the polysilicon is approximately equal to the average voltage across the polysilicon resistor, that is:

.

As shown in FIG. 2 , illustratively, the polysilicon resistor described above is in the inverting input mode of the audio differential circuit, that is, VIP=Vref=0V, and the following can be obtained:

Vx+=Vx-=0V

At this time, the gain G = //> , and the substrate potential in this design is consistent, we can get:

It can be seen that when the input signal becomes larger, the gain (absolute value) will become larger. The result at this time shows that the change in circuit gain affects the linearity of the output signal, causing the output waveform to be distorted. The distortion is reflected in the output spectrum as harmonics. The more severe the distortion, the higher the harmonic energy, causing the deterioration of the THD index.

In order to solve the resistance stability of the polysilicon resistor, the present embodiment improves the structure of the polysilicon resistor circuit. By designing a potential adjustment circuit, the substrate potential of the polysilicon resistor is adjusted to an intermediate potential between the total input end and the total output end, thereby ensuring that the substrate voltage of the polysilicon resistor remains stable, ensuring that the polysilicon resistor has a fixed substrate voltage and provides a stable resistance value, so that it will not be unstable with the change of the substrate voltage, thereby maintaining the linear output of the audio differential circuit and improving the THD index.

In a preferred embodiment, the potential adjustment circuit specifically includes: a polysilicon resistor series structure, a second input connection line connecting the polysilicon resistor series structure and a total input end, a second output connection line connecting the polysilicon resistor series structure and a total output end, and an intermediate potential lead-out connection line connecting the polysilicon resistor series structure and a first polysilicon resistor substrate; wherein the polysilicon resistor series structure is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input end and the total output end according to the intermediate potential lead-out connection line.

Among them, the polysilicon resistor series structure specifically includes: a second polysilicon resistor, a third polysilicon resistor and a series connection line connecting the second polysilicon resistor and the third polysilicon resistor; wherein the second polysilicon resistor and the third polysilicon resistor are configured to have the same resistance value, and the intermediate potential lead-out connection line is configured to connect the series connection line and the substrate of the first polysilicon resistor.

In this embodiment, in the circuit design process of adjusting the substrate potential of the polysilicon resistor to the intermediate potential between the total input terminal and the total output terminal by using the potential adjustment circuit, by analyzing the gain G= //> The expression of , found that if it satisfies both/> =/> /2,/> =/> /2, then the gain is always -1 and remains unchanged. Based on this, when designing a potential adjustment circuit to adjust the substrate potential of the first polysilicon resistor, it can be considered to adjust the substrate potential of the polysilicon resistors in the audio differential circuit to /2. /2 and /> /2, thus, the gain G=/> //> The result is always kept at -1, and finally the linear output of the audio differential circuit is maintained, and the THD index is improved. Furthermore, as shown in FIG3, in order to achieve the Stable in/> /2, while /> Stable in/> /2, this embodiment sets a polysilicon resistor series structure connected between the total input terminal and the total output terminal, uses the polysilicon resistor series structure to obtain the intermediate potential between the total input terminal and the total output terminal, and uses the intermediate potential lead-out connection line to lead the intermediate potential to the substrate of the first polysilicon resistor, so that the substrate potential of the first polysilicon resistor always maintains the intermediate potential between the total input terminal and the total output terminal, thereby ensuring that the gain of the audio differential circuit constructed using the first polysilicon resistor remains stable and does not affect the linearity of the output signal, thereby having a better THD index.

In a preferred embodiment, the first polysilicon resistor, the second polysilicon resistor and the third polysilicon resistor include: a substrate; an epitaxial layer, an oxide layer, polysilicon and a passivation layer arranged on the oxide layer and covering the polysilicon stacked in sequence on the substrate; wherein the passivation layer is provided with a pair of metal contact holes, and the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

In a specific embodiment, the polysilicon resistor series structure is configured to be formed by connecting an independent second polysilicon resistor and a third polysilicon resistor; wherein the second polysilicon resistor and the third polysilicon resistor have independent substrates, epitaxial layers, oxide layers and passivation layers; wherein the second polysilicon resistor and the third polysilicon resistor are connected only through the series connection line.

In another specific embodiment, the polysilicon resistor series structure is configured to be formed by connecting a merged second polysilicon resistor and a third polysilicon resistor; wherein the second polysilicon resistor and the third polysilicon resistor have a common substrate, epitaxial layer, oxide layer and passivation layer; wherein the polysilicon of the first polysilicon resistor and the polysilicon of the second polysilicon resistor are arranged on a common oxide layer and covered by a common passivation layer, and each pair of metal contact holes is arranged in a passivation layer on the polysilicon.

In this embodiment, for the design of the polysilicon resistor series structure, the second polysilicon resistor and the third polysilicon resistor can be constructed respectively by using independent substrates, epitaxial layers, oxide layers and passivation layers, or the combined second polysilicon resistor and the third polysilicon resistor can be constructed by using a common substrate, epitaxial layer, oxide layer and passivation layer. When the second polysilicon resistor and the third polysilicon resistor are constructed independently, the second polysilicon resistor and the third polysilicon resistor are connected through metal contact holes and series connection lines therebetween, and this method has high flexibility in the selection and use of polysilicon resistors; and when the second polysilicon resistor and the third polysilicon resistor are constructed in combination, in addition to being connected by metal contact holes and series connection lines therebetween, the second polysilicon resistor and the third polysilicon resistor also have a common substrate, epitaxial layer, oxide layer and passivation layer, and this method has high preparation efficiency; thus, a variety of optional implementation methods are provided for the polysilicon resistor series structure.

Embodiment 2:

4 , which is a schematic flow chart of a method for preparing a polysilicon resistor circuit according to an embodiment of the present invention.

As shown in FIG4 , a method for preparing a polysilicon resistor circuit includes:

Step S1: preparing a first polysilicon resistor;

Step S2: constructing a first resistance branch including the first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end;

Step S3: preparing a potential adjustment circuit;

Step S4: constructing a second resistance branch including the potential adjustment circuit;

Step S5: connecting the potential adjustment circuit to the substrate of the first polysilicon resistor to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal.

It should be noted that, at present, there are two traditional ways to optimize the THD of audio amplifiers: one is to optimize the structure and performance of the operational amplifier, greatly increase the gain and bandwidth of the operational amplifier to reduce the impact of the feedback small signal on it, or use a differential circuit architecture to reduce the energy of the output high-order even harmonics, but this method has certain limitations and the optimization effect is inevitably related to the circuit process. The other is laser etching, which is to laser etch the layer where the resistor is located during circuit layout to change its resistance value to reduce circuit mismatch and offset to increase output linearity. This method has a certain effect on THD optimization, but the operation is more complicated and uncertain and the cost is higher in mass production.

In order to solve the above problems, this embodiment considers using polysilicon resistors with higher stability, stronger anti-interference ability and better voltage resistance to construct an audio differential circuit. However, due to the existence of existing polysilicon resistors, the resistance of the polysilicon resistor changes with the change of the substrate voltage, which leads to the instability of the circuit gain of the audio differential circuit containing the polysilicon resistor, affecting the linearity of the output signal and causing the deterioration of the THD index. Specifically, as shown in Figure 1, when a voltage is applied to the metal contact hole and a current flows through the resistor, the polysilicon strip is doped with the substrate to form a plate, and the oxide layer is used as a medium to form a capacitor. The charge is distributed in a trapezoidal shape along the current direction in the area close to the oxide layer. More charge is gathered in the high potential area and less charge is gathered in the low potential area. Therefore, the resistance of the actual polycrystalline resistor changes with the change of the substrate voltage. At this time, assuming that the difference between the substrate voltage and the polysilicon voltage is V _Δ , and a substrate voltage coefficient is fitted as Cs, it can be obtained that the resistance after considering the influence of the substrate is R _b , and the original resistance of the resistor is R, it can be obtained:

At this time, the voltage on the polysilicon is approximately equal to the average voltage across the polysilicon resistor, that is:

.

As shown in FIG. 2 , illustratively, the polysilicon resistor described above is in the inverting input mode of the audio differential circuit, that is, VIP=Vref=0V, and the following can be obtained:

Vx+=Vx-=0V

At this time, the gain G = //> , and the substrate potential in this design is consistent, we can get:

It can be seen that when the input signal becomes larger, the gain (absolute value) will become larger. The result at this time shows that the change in circuit gain affects the linearity of the output signal, causing the output waveform to be distorted. The distortion is reflected in the output spectrum as harmonics. The more severe the distortion, the higher the harmonic energy, causing the deterioration of the THD index.

In order to solve the resistance stability of the polysilicon resistor, the present embodiment improves the structure of the polysilicon resistor circuit. By designing a potential adjustment circuit, the substrate potential of the polysilicon resistor is adjusted to an intermediate potential between the total input end and the total output end, thereby ensuring that the substrate voltage of the polysilicon resistor remains stable, ensuring that the polysilicon resistor has a fixed substrate voltage and provides a stable resistance value, so that it will not be unstable with the change of the substrate voltage, thereby maintaining the linear output of the audio differential circuit and improving the THD index.

In a preferred embodiment, a potential adjustment circuit is prepared, specifically comprising:

Step S31: preparing a polysilicon resistor series structure;

Step S32: constructing a potential adjustment circuit including the polysilicon resistor series structure, a second input connection line connecting the polysilicon resistor series structure and a total input end, a second output connection line connecting the polysilicon resistor series structure and a total output end, and an intermediate potential lead connection line connecting the polysilicon resistor series structure and a first polysilicon resistor substrate;

The polysilicon resistor series structure is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal according to the intermediate potential lead-out connection line.

In a preferred embodiment, the preparation of the polysilicon resistor series structure specifically includes:

Step S311: preparing a second polysilicon resistor and a third polysilicon resistor;

Step S312: constructing a polysilicon resistor series structure including the second polysilicon resistor, the third polysilicon resistor, and a series connection line connecting the second polysilicon resistor and the third polysilicon resistor;

The second polysilicon resistor and the third polysilicon resistor are configured to have the same resistance value, and the intermediate potential lead-out connection line is configured to connect the series connection line and the substrate of the first polysilicon resistor.

In this embodiment, in the circuit design process of using the potential adjustment circuit to adjust the substrate potential of the polysilicon resistor to the intermediate potential between the total input terminal and the total output terminal, by analyzing the gain G= //> The expression of , found that if it satisfies both/> =/> /2,/> =/> /2, then the gain is always -1 and remains unchanged. Based on this, when designing a potential adjustment circuit to adjust the substrate potential of the first polysilicon resistor, it can be considered to adjust the substrate potential of the polysilicon resistors in the audio differential circuit to be respectively / /2 and /> /2, thus, the gain G=/> //> The result is always kept at -1, and finally the linear output of the audio differential circuit is maintained, and the THD index is improved. Furthermore, as shown in FIG3, in order to achieve the Stable in/> /2, while /> Stable in/> /2, this embodiment sets a polysilicon resistor series structure connected between the total input terminal and the total output terminal, uses the polysilicon resistor series structure to obtain the intermediate potential between the total input terminal and the total output terminal, and uses the intermediate potential lead-out connection line to lead the intermediate potential to the substrate of the first polysilicon resistor, so that the substrate potential of the first polysilicon resistor always maintains the intermediate potential between the total input terminal and the total output terminal, thereby ensuring that the gain of the audio differential circuit constructed using the first polysilicon resistor remains stable and does not affect the linearity of the output signal, thereby having a better THD index.

In a preferred embodiment, preparing the first polysilicon resistor, preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically include:

Step A1: providing a substrate;

Step A2: sequentially stacking an epitaxial layer, an oxide layer, and polysilicon on the substrate, and forming a passivation layer covering the polysilicon on the oxide layer;

Step A3: forming a pair of metal contact holes on the passivation layer; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

In a preferred embodiment, preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically include:

Step B1: providing two independent substrates;

Step B2: forming an epitaxial layer, an oxide layer, and polysilicon on the two independent substrates respectively, and forming a passivation layer covering each polysilicon on the oxide layer;

Step B3: forming a pair of metal contact holes on each of the passivation layers; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

In a preferred embodiment, preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically include:

Step C1: providing a common substrate;

Step C2: forming a common epitaxial layer, a common oxide layer and polysilicon of the second polysilicon resistor and the third polysilicon resistor on the common substrate, and forming a common passivation layer covering each polysilicon respectively on the common oxide layer;

Step C3: forming a pair of metal contact holes in the common passivation layer on each polysilicon; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line.

In this embodiment, for the design of the polysilicon resistor series structure, the second polysilicon resistor and the third polysilicon resistor can be constructed respectively by using independent substrates, epitaxial layers, oxide layers and passivation layers, or the combined second polysilicon resistor and the third polysilicon resistor can be constructed by using a common substrate, epitaxial layer, oxide layer and passivation layer. When the second polysilicon resistor and the third polysilicon resistor are constructed independently, the second polysilicon resistor and the third polysilicon resistor are connected through metal contact holes and series connection lines therebetween, and this method has high flexibility in the selection and use of polysilicon resistors; and when the second polysilicon resistor and the third polysilicon resistor are constructed in combination, in addition to being connected by metal contact holes and series connection lines therebetween, the second polysilicon resistor and the third polysilicon resistor also have a common substrate, epitaxial layer, oxide layer and passivation layer, and this method has high preparation efficiency; thus, a variety of optional implementation methods are provided for the polysilicon resistor series structure.

Embodiment 3:

An embodiment of the present invention provides an audio differential circuit. In this embodiment, an audio differential circuit includes:

Audio operational amplifiers; and

The polysilicon resistor circuit as described above is configured between the inverting input terminal, the non-inverting input terminal, the output terminal or the non-inverting input terminal of the audio operational amplifier and the reference voltage input terminal or the ground terminal.

In practical applications, as shown in FIG5 , when the audio differential circuit is in the inverting mode, the polysilicon resistor circuit is set at the inverting input terminal and the output terminal, R1, R2, and R3 constitute the polysilicon resistor circuit set at the inverting input terminal, and R4, R5, and R6 constitute the polysilicon resistor circuit set at the output terminal. At this time:

satisfy =/> /2,/> =/> /2, while in the normal phase mode Vx+= Vx-=0V, /> //> The result is a constant -1, which means the output remains linearly increasing with increasing THD.

In practical applications, as shown in FIG6 , when the audio differential circuit is in the positive phase mode, the polysilicon resistor circuit is set at the positive phase input terminal and between the positive phase input terminal and the reference voltage input terminal, R7, R8, and R9 constitute a polysilicon resistor circuit set at the negative phase input terminal, and R10, R11, and R12 constitute a polysilicon resistor circuit set between the positive phase input terminal and the reference voltage input terminal. At this time:

The expression is: ;

When VREF=0, V _B,10 =Vx+/2, and the above equation can be simplified as follows: ;

The expression is: ;

When VREF=0, V _B,3 =Vx-/2, and the above equation can be simplified as follows: ;

It can be deduced from Vx+=Vx- that Vip=V _OUT and it will not change with the change of input signal amplitude, that is, the output remains linear and THD is improved.

In practical applications, as shown in FIG7 , when the audio differential circuit is in full differential mode, the polysilicon resistor circuit is arranged at the inverting input terminal, the non-inverting input terminal, the output terminal, and between the non-inverting input terminal and the ground terminal, R1, R2, and R3 constitute a polysilicon resistor circuit arranged at the inverting input terminal, R4, R5, and R6 constitute a polysilicon resistor circuit arranged between the non-inverting input terminal and the reference voltage input terminal, R7, R8, and R9 constitute a polysilicon resistor circuit arranged at the inverting input terminal, and R10, R11, and R12 constitute a polysilicon resistor circuit arranged between the non-inverting input terminal and the ground terminal. At this time:

The input Vin and Vip are a pair of fully differential signals, and the constant =/> /2, =/> /2,/> =/> /2,/> =/> /2, so at this time the resistance of each R in the circuit is no longer affected by the substrate potential and remains constant, so the gain remains constant, ensuring the linearity of the output signal and greatly improving the THD index of the output signal.

Therefore, this embodiment provides an audio differential circuit, which ensures that the gain of the circuit remains constant and the output and input are in a linear relationship by improving the substrate of the polysilicon resistor, so that the above circuit can maintain high linearity in the application of positive and negative phase and full differential modes, and the THD can be maintained at a high level.

The specific implementation of the audio differential circuit of the present application is basically the same as the above-mentioned embodiments of the polysilicon resistor circuit, and will not be repeated here.

In the description of the embodiments of the present invention, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "center", "top", "bottom", "top", "bottom", "inside", "outside", "inner side", "outer side" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. Among them, "inside" refers to an internal or enclosed area or space. "Periphery" refers to the area surrounding a specific component or a specific area.

In the description of the embodiments of the present invention, the terms "first", "second", "third", and "fourth" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second", "third", and "fourth" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

In the description of the embodiments of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", and "assemble" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

In the description of the embodiments of the present invention, specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

In the description of the embodiments of the present invention, it should be understood that "-" and "~" represent the range between two values, and the range includes the endpoints. For example: "A-B" represents a range greater than or equal to A and less than or equal to B. "A~B" represents a range greater than or equal to A and less than or equal to B.

In the description of the embodiments of the present invention, the term "and/or" herein is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and/or B may represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character "/" herein generally indicates that the associated objects before and after are in an "or" relationship.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims (9)

1. A polysilicon resistor circuit, comprising: A first resistance branch, the first resistance branch comprising a first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end; A second resistance branch, wherein the second resistance branch includes a potential adjustment circuit; The potential adjustment circuit is connected to the substrate of the first polysilicon resistor and is configured to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal; The potential adjustment circuit specifically comprises: A polysilicon resistor series structure, a second input connection line connecting the polysilicon resistor series structure and a total input end, a second output connection line connecting the polysilicon resistor series structure and a total output end, and an intermediate potential lead connection line connecting the polysilicon resistor series structure and a first polysilicon resistor substrate; Wherein, the polysilicon resistor series structure is configured to adjust the substrate potential of the first polysilicon resistor to the middle potential between the total input terminal and the total output terminal according to the middle potential lead-out connection line; The polysilicon resistor series structure specifically comprises: a second polysilicon resistor, a third polysilicon resistor, and a series connection line connecting the second polysilicon resistor and the third polysilicon resistor; The second polysilicon resistor and the third polysilicon resistor are configured to have the same resistance value, and the intermediate potential lead-out connection line is configured to connect the series connection line and the substrate of the first polysilicon resistor. 2. The polysilicon resistor circuit according to claim 1, wherein the first polysilicon resistor, the second polysilicon resistor and the third polysilicon resistor comprise: substrate; An epitaxial layer, an oxide layer, polysilicon and a passivation layer disposed on the oxide layer and covering the polysilicon are sequentially stacked; The passivation layer is provided with a pair of metal contact holes, and the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line. 3. The polysilicon resistor circuit according to claim 2, wherein the polysilicon resistor series structure is configured to be formed by connecting an independent second polysilicon resistor and a third polysilicon resistor; Wherein, the second polysilicon resistor and the third polysilicon resistor have independent substrates, epitaxial layers, oxide layers and passivation layers; The second polysilicon resistor and the third polysilicon resistor are connected only through the series connection line. 4. The polysilicon resistor circuit according to claim 2, wherein the polysilicon resistor series structure is configured to be formed by connecting a combined second polysilicon resistor and a third polysilicon resistor; Wherein, the second polysilicon resistor and the third polysilicon resistor have a common substrate, epitaxial layer, oxide layer and passivation layer; The polysilicon of the first polysilicon resistor and the polysilicon of the second polysilicon resistor are arranged on a common oxide layer and covered by a common passivation layer, and each pair of metal contact holes is arranged in a passivation layer on the polysilicon. 5. A method for preparing a polysilicon resistor circuit, comprising: preparing a first polysilicon resistor; Constructing a first resistance branch including the first polysilicon resistor, a first input connection line connecting the first polysilicon resistor and a total input end, and a first output connection line connecting the first polysilicon resistor and a total output end; preparing a potential adjustment circuit; constructing a second resistance branch including the potential adjustment circuit; Connecting the potential adjustment circuit to the substrate of the first polysilicon resistor to adjust the substrate potential of the first polysilicon resistor to an intermediate potential between the total input terminal and the total output terminal; A potential adjustment circuit is prepared, specifically comprising: preparing a polysilicon resistor series structure; Constructing a potential adjustment circuit including the polysilicon resistor series structure, a second input connection line connecting the polysilicon resistor series structure and a total input end, a second output connection line connecting the polysilicon resistor series structure and a total output end, and an intermediate potential lead-out connection line connecting the polysilicon resistor series structure and a first polysilicon resistor substrate; Wherein, the polysilicon resistor series structure is configured to adjust the substrate potential of the first polysilicon resistor to the middle potential between the total input terminal and the total output terminal according to the middle potential lead-out connection line; The method of preparing the polysilicon resistor series structure specifically includes: preparing a second polysilicon resistor and a third polysilicon resistor; Constructing a polysilicon resistor series structure including the second polysilicon resistor, the third polysilicon resistor, and a series connection line connecting the second polysilicon resistor and the third polysilicon resistor; The second polysilicon resistor and the third polysilicon resistor are configured to have the same resistance value, and the intermediate potential lead-out connection line is configured to connect the series connection line and the substrate of the first polysilicon resistor. 6. The method for preparing a polysilicon resistor circuit according to claim 5, characterized in that preparing the first polysilicon resistor, preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically comprises: providing a substrate; Sequentially stacking an epitaxial layer, an oxide layer, and polysilicon on the substrate, and forming a passivation layer covering the polysilicon on the oxide layer; A pair of metal contact holes are formed on the passivation layer; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line. 7. The method for preparing a polysilicon resistor circuit according to claim 6, wherein preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically comprises: providing two separate substrates; Forming an epitaxial layer, an oxide layer, and polysilicon on the two independent substrates respectively, and forming a passivation layer covering each polysilicon on the oxide layer; A pair of metal contact holes is formed on each of the passivation layers; wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line. 8. The method for preparing a polysilicon resistor circuit according to claim 6, wherein preparing the second polysilicon resistor and preparing the third polysilicon resistor specifically comprises: providing a common substrate; Forming a common epitaxial layer, a common oxide layer, and polysilicon of the second polysilicon resistor and the third polysilicon resistor on the common substrate, and forming a common passivation layer covering each polysilicon respectively on the common oxide layer; A pair of metal contact holes are formed in the common passivation layer on each polysilicon, wherein the metal contact holes include a first metal contact hole connected to the second input connection line or the second output connection line and a second metal contact hole connected to the series connection line. 9. An audio differential circuit, comprising: Audio operational amplifiers; and A polysilicon resistor circuit as described in any one of claims 1 to 4 is configured between the inverting input terminal, the non-inverting input terminal, the output terminal or the non-inverting input terminal and the reference voltage input terminal or the ground terminal of the audio operational amplifier.