CN117742438A - Low-power consumption LDO circuit applied to high power supply voltage - Google Patents
Low-power consumption LDO circuit applied to high power supply voltage Download PDFInfo
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- CN117742438A CN117742438A CN202311806662.3A CN202311806662A CN117742438A CN 117742438 A CN117742438 A CN 117742438A CN 202311806662 A CN202311806662 A CN 202311806662A CN 117742438 A CN117742438 A CN 117742438A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention relates to a low-power consumption LDO circuit applied to high power supply voltage, which comprises a zero temperature drift voltage generation module, a voltage conversion module, a reference voltage selection module and an LDO output module, wherein one end of the zero temperature drift voltage generation module is provided with a power supply VDD2, and an output voltage signal VREF1 generated by the zero temperature drift voltage generation module is used as an input signal of the voltage conversion module; the output signal of the power supply VDD2 is also arranged at one end of the reference voltage selection module, and meanwhile, the reference voltage selection module is provided with a D1 adjusting resistor string RA; and the output signals VREF2 and VREF3 generated by the reference voltage selection module are respectively used as input signals of the voltage conversion module and the LDO output module. The low-power consumption LDO circuit disclosed by the invention realizes the conversion of a high-voltage high-noise power supply into a low-noise LDO output voltage serving as a chip global power supply voltage, and improves the working stability of the whole structure.
Description
Technical Field
The invention relates to an integrated chip technology, in particular to a low-power consumption LDO circuit applied to high power supply voltage.
Background
In a structure using high-voltage and high-ripple such as a battery as a power supply of a chip, in order to reduce the influence of noise in the power supply on the chip, improve the stability of the chip operation and reduce the power consumption of the whole chip, a design of converting the power supply into a voltage output by an LDO structure as a global power supply is needed.
Disclosure of Invention
In order to solve the technical problems, the low-power consumption LDO circuit applied to high power supply voltage comprises a zero temperature drift voltage generation module, a voltage conversion module, a reference voltage selection module and an LDO output module, wherein one end of the zero temperature drift voltage generation module is provided with a power supply VDD2, the power supply VDD2 is output by the voltage conversion module, and meanwhile, an output voltage signal VREF1 generated by the zero temperature drift voltage generation module is used as an input signal of the voltage conversion module;
the output signal of the power supply VDD2 is also arranged at one end of the reference voltage selection module, and the proportionality coefficient of the D1 regulating resistor string RA arranged in the reference voltage selection module is controlled by the digital module of the chip; the output signals VREF2 and VREF3 generated by the reference voltage selection module are respectively used as input signals of the voltage conversion module and the LDO output module;
the input signal end of the power tube stage in the LDO output module is provided with VDD1 which is a power supply voltage signal provided by the outside; and the control module arranged in the LDO output module generates a first control signal, a second control signal and a third control signal, wherein the first control signal and the third control signal are used as input control signals of the voltage conversion module, and the other second control signal is used as control signals of the reference voltage selection module.
In one embodiment of the present invention, the zero temperature drift voltage generating module generates and outputs a zero temperature drift current I0, and the current I0 is converted to generate an output voltage VREF1; meanwhile, the zero temperature drift voltage generation module also comprises a transistor MP1, a transistor MP2 and a transistor MP3; the size ratio is 1:1:1, the saturation region currents flowing through transistors MN1, MN2, and MN3 are equal i1=i2=i3=0.5×i0.
In one embodiment of the present invention, the voltage conversion module includes an M1 transistor, an M2 transistor, an operational amplifier AMP1, and an operational amplifier AMP2; the source end of the M1 transistor is connected with VDD1, the gate end of the M1 transistor is controlled by a first control signal, the first control signal determines the on-off of the output of the operational amplifier AMP1 and the gate end of the transistor M1, meanwhile, one end of the drain end of the transistor M1 is connected to a resistor string formed by R3, R4 and R5, and the other end of the resistor string formed by R3, R4 and R5 is grounded as the output end of VDD 2;
the negative polarity of the operational amplifier AMP1 is connected with an input signal VREF1, which is provided by a zero temperature drift voltage generation module, and a branch of VDD1 is conducted by an M1 pipe under the control of a first control signal; the source end of the transistor M2 is connected with VLDO, the gate end of the transistor M2 is connected with the output of the operational amplifier AMP2, the third control signal controls the operational amplifier output to be switched on or off with the transistor M2, the drain end of the transistor M2 is connected with one end of the resistor R5, and the other end of the resistor R5 is grounded.
In one embodiment of the present invention, wherein the negative polarity of the op AMP2 is connected with the input signal VREF2, while the positive polarity terminal is connected with the resistor R5 and the drain terminal of the transistor M2; negative feedback structure formed by power supply VDD1, M1 tube, first control signal, AMP1, R3, R4, R5, produce output voltage:
wherein VREF1 is the output voltage generated by the zero temperature drift voltage generation module;
and the negative feedback structure formed by the same power supply VLDO, the M2 tube, the third control signal and AMP2, R4 and R5 generates output voltage:
where VREF2 is the bandgap reference voltage generated by the reference voltage selection module.
In one embodiment of the present invention, the second control signal connected to the input end of the reference voltage selection module controls the output of the bandgap reference module voltage VREF2, and the resistor string selection module RA generates the output voltage VREF3 under the control of the selection control signal D1:
VREF3＝VREF2*D1*RA，
wherein VREF2 is zero temperature drift reference voltage generated by the band gap reference module, RA is the total resistance of the resistor string selection module, and D1 is the proportionality coefficient for dividing the resistor string.
In one embodiment of the present invention, the LDO output module includes a power tube M3, an operational amplifier AMP3, and a control module; the source end of the power tube M3 is connected with VDD1, the gate end is connected with the output of the operational amplifier AMP3, the drain end of the power tube M3 is connected to a resistor string formed by R6 and R7, meanwhile, the other end of the resistor string formed by R6 and R7 is grounded, the negative polarity signal of the operational amplifier AMP3 is provided by VREF3 of a reference voltage selection module, the positive polarity end of the operational amplifier AMP3 is connected with one end of the resistor R7, and the other end of the resistor R7 is grounded;
the input end of the control module is connected with a VLDO signal, and a first control signal, a second control signal and a third control signal are obtained by sampling the VLDO signal, and the three control signals ensure the realization of a low-power consumption LDO structure applied to high power supply voltage.
In one embodiment of the present invention, the negative feedback loop formed by the voltage VDD1, the transistor M3, the op AMP3, R5, R6, results in an output voltage:
wherein VREF2 is zero temperature drift output voltage generated by the band gap reference module, D1 is a constant, resistors RA, R6 and R7 are the same type of resistors, and the output voltage VLDO of all LDO output module structures is zero temperature drift output voltage.
Compared with the prior art, the technical scheme of the invention has the following advantages: the low-power consumption LDO circuit disclosed by the invention realizes the conversion of a high-voltage high-noise power supply into a low-noise LDO output voltage serving as a chip global power supply voltage, improves the working stability of the whole structure and reduces the whole power consumption.
Drawings
In order that the invention may be more readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof that are illustrated in the appended drawings.
FIG. 1 is a schematic diagram of the overall system of the LDO circuit with low power consumption applied to high power supply voltage.
Fig. 2 is a schematic diagram of a zero temperature drift voltage generating module according to the present invention.
Fig. 3 is a schematic diagram of a voltage conversion module according to the present invention.
Fig. 4 is a schematic diagram of a reference voltage selection module according to the present invention.
Fig. 5 is a schematic structural diagram of an LDO output module according to the present invention.
Detailed Description
As shown in fig. 1, the embodiment provides a low-power consumption LDO circuit applied to high power supply voltage, which comprises four parts, namely a zero temperature drift voltage generation module, a voltage conversion module, a reference voltage selection module and an LDO output module. In the overall structure, the power supply voltage VDD1 may be a battery or a button cell, etc., and the power supply voltage signal provided from the outside is used as a power supply signal having high voltage and high ripple noise in the circuit structure. The zero temperature drift voltage generation module power supply VDD2 is provided by the voltage conversion module, and the generated output voltage signal VREF1 is used as an input signal of the voltage conversion module. VDD1 and VLDO are used as power supply voltages of the voltage conversion module, VREF1 and VREF2 are respectively provided by the zero temperature drift voltage generation module and the reference voltage selection module, the first control signal and the second control signal are provided by the LDO output module, and the VDD2 output signal is provided for the zero temperature drift voltage generation module and the reference voltage selection module. The reference voltage selection module is characterized in that the VDD2 voltage is provided by a voltage conversion module, the second control signal is provided by an LDO output module, the D1 adjusts the proportionality coefficient of the resistor string RA, and the reference voltage selection module is controlled by a digital module of a chip to generate output signals VREF2 and VREF3 which are respectively used as input signals of the voltage conversion module and the LDO output module. VDD1 is used as an input signal of a power tube stage of the LDO output module, VREF3 input signals are provided by the reference voltage selection module, output voltage VLDO is generated as an input signal of the voltage conversion module, first control signals and third control signals generated by the control module are used as input control signals of the voltage conversion module, and second control signals are used as control signals of the reference voltage selection module. The integrated structure converts VDD1 power supply into VLDO power supply through the voltage conversion module, and VLDO is low-noise high-precision voltage generated by LDO, so that the LDO circuit structure with low power consumption and low noise, which can be applied to high power supply voltage, is realized.
Fig. 2 is a schematic diagram of a zero temperature drift voltage generating module, in which a power supply voltage VDD2 is provided by a voltage converting module, and the module generates an output voltage VREF1 by generating a zero temperature drift current I0 independent of the power supply voltage, and converting the current I0. The size ratio of the transistor MP1, the transistor MP2, and the transistor MP3 is 1:1:1, the saturation current flowing through transistors MN1, MN2 and MN3 is equal i1=i2=i3=0.5×i0, and the saturation current can be expressed asThe size ratio of the transistors MN1 and MN2 is M1, one end of the resistor string of R1 and R2 is connected with the source end of the transistor MN1, the other end is grounded, and the current flowing through the resistor string is +.> The resistor strings of R1 and R2 select resistors with positive and negative temperature coefficients, and the values of the numbers K1 and K2 of the resistors are adjusted to enable the R1 and R2 to form the resistor string with zero temperature coefficient, and the resistors are->The first branch current I0 is obtained as a zero temperature drift current. The size ratio of the transistor MP4 to the transistor MP1 is n:1, so that the ratio of the current flowing through the transistor MN4 to the current flowing through the transistor MN1 is i4=ni1=n0.5i0, and the output of the zero temperature drift voltage generating module is obtained Wherein I0 is zero temperature drift current in the first branch of the zero temperature drift voltage generation module, which is not considered hereSince the threshold voltage determined by the process is affected by the temperature, the output voltage VREF1 of the zero temperature drift voltage generation module is the zero temperature drift voltage.
Fig. 3 is a schematic diagram of a voltage conversion module, VDD1 is an externally provided high-ripple high-noise high-voltage power supply, and VDD1 may be a lead storage battery, a coin cell battery, or the like, for example. The VDD1 power supply is connected with the source end of an M1 transistor in the voltage conversion module, the gate end of the M1 transistor is controlled by a first control signal, the first control signal determines the on-off of the output of the operational amplifier AMP1 and the gate end of the transistor M1, the drain end of the transistor M1 is connected with one end of a resistor string formed by R3, R4 and R5, the end is simultaneously used as the output end of VDD2, and the other end of the resistor string formed by R3, R4 and R5 is grounded. The negative input signal VREF1 of the operational amplifier AMP1 is provided by the zero temperature drift voltage generating module, and the VDD1 branch is controlled by the first control signal to conduct the M1 pipe. The VLDO is a power supply voltage provided by an LDO output module, the VLDO signal is a low-ripple low-noise stable power supply, the VLDO is connected with a source end of a transistor M2, a gate end of the transistor M2 is connected with an output of an operational amplifier AMP2, a third control signal controls the operational amplifier to be turned on and off with the transistor M2, a drain end of the transistor is connected with one end of a resistor R5, and the other end of the resistor R5 is grounded. The negative polarity input signal VREF2 of the operational amplifier AMP2 is supplied from the reference voltage selection block, and the positive polarity terminal is connected to the resistor R5 and the drain terminal of the transistor M2. The power supply VDD1, M1 tube, the first control signal, the negative feedback structure formed by AMP1, R3, R4, R5, generate output voltageWherein VREF1 is the output voltage generated by the zero temperature drift voltage generation module. The power supply VLDO, M2 tube, the third control signal, AMP2, R4, R5 form a negative feedback structure to generate an output voltage +.>Where VREF2 is the bandgap reference voltage generated by the reference voltage selection module. VLDO is the low ripple low noise voltage produced by the LDO. In the voltage conversion module, the first branch is composed of a power supply voltage VDD1, a transistor M1, a first control signal, an operational amplifier AMP1, a resistor R3, a resistor R4, and a power supplyThe resistor R5 is formed by a VLDO, a transistor M2, a third control signal, an operational amplifier AMP2 and a resistor R5, the two branches are switched by the first control signal and the third control signal, the output VDD2 can be obtained, and the output VDD2 obtained by a loop formed by the second branch is used as the power supply voltage of other modules of the chip, so that the low-ripple and low-noise characteristics are realized.
Fig. 4 is a schematic diagram of a reference voltage selection module, a power supply voltage VDD2, and a bandgap reference module, which are used for generating a bandgap reference voltage, wherein a second control signal controls the output of the bandgap reference module voltage VREF2, and a resistor string selection module RA generates an output voltage VREF3 under the control of a selection control signal D1, VREF 3=vref 2×d1×ra, wherein VREF2 is a zero temperature drift reference voltage generated by the bandgap reference module, RA is the total resistance value of the resistor string selection module, and D1 is a proportionality coefficient for performing resistor string voltage division.
FIG. 5 shows a schematic diagram of an LDO output module, in which a power supply voltage VDD1 is a high-voltage high-noise signal provided from the outside, and is connected to a source terminal of a power tube M3, a gate terminal of the power tube M3 is connected to an output terminal of an operational amplifier AMP3, a drain terminal of the power tube M3 is connected to one terminal of a resistor string composed of R6 and R7, the other terminal of the resistor string composed of R6 and R7 is grounded, a negative polarity signal of the operational amplifier AMP3 is provided by VREF3 of a reference voltage selection module, a positive polarity terminal of the operational amplifier AMP3 is connected to one terminal of the resistor R7, and the other terminal of the R7 is grounded, thereby obtaining an output voltage Wherein VREF2 is zero temperature drift output voltage generated by the band gap reference module, D1 is a constant, resistors RA, R6 and R7 are the same type of resistors, and the output voltage VLDO of all LDO output module structures is zero temperature drift output voltage. The VLDO voltage is provided for other modules such as a voltage conversion module and the like to serve as a power supply voltage with high stability and low noise, and meanwhile, in an LDO output module, the VLDO signal is also used as the input of a control module, and the VLDO signal is fed through a voltage conversion moduleSampling to obtain a first control signal, a second control signal and a third control signal, wherein the three control signals ensure that the method is applied to the realization of a low-power LDO structure with high power supply voltage. For example, when the VLDO voltage is low, three control signals may be implemented, the first control signal opening the M1 pipe, the second control signal opening the VREF2 output, and the third control signal closing the M2 pipe. In contrast, when the VLDO voltage reaches the set value, three control signals are available, the first control signal closes the M1 pipe, the second control signal opens the VREF2 output, and the third control signal opens the M2 pipe, thereby achieving the operation of the overall loop.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations and modifications of the present invention will be apparent to those of ordinary skill in the art in light of the foregoing description. It is not necessary here nor is it exhaustive of all embodiments. And obvious variations or modifications thereof are contemplated as falling within the scope of the present invention.
Claims (7)
1. The low-power consumption LDO circuit is characterized by comprising a zero temperature drift voltage generation module, a voltage conversion module, a reference voltage selection module and an LDO output module, wherein one end of the zero temperature drift voltage generation module is provided with a power supply VDD2, the power supply VDD2 is output by the voltage conversion module, and meanwhile, an output voltage signal VREF1 generated by the zero temperature drift voltage generation module is used as an input signal of the voltage conversion module;
the output signal of the power supply VDD2 is also arranged at one end of the reference voltage selection module, and the proportionality coefficient of the D1 regulating resistor string RA arranged in the reference voltage selection module is controlled by the digital module of the chip; the output signals VREF2 and VREF3 generated by the reference voltage selection module are respectively used as input signals of the voltage conversion module and the LDO output module;
the input signal end of the power tube stage in the LDO output module is provided with VDD1 which is a power supply voltage signal provided by the outside; and the control module arranged in the LDO output module generates a first control signal, a second control signal and a third control signal, wherein the first control signal and the third control signal are used as input control signals of the voltage conversion module, and the other second control signal is used as control signals of the reference voltage selection module.
2. The low power LDO circuit of claim 1, wherein: the zero temperature drift voltage generation module generates and outputs zero temperature drift current I0, and the current I0 is converted to generate output voltage VREF1; meanwhile, the zero temperature drift voltage generation module also comprises a transistor MP1, a transistor MP2 and a transistor MP3; the size ratio is 1:1:1, the saturation region currents flowing through transistors MN1, MN2, and MN3 are equal i1=i2=i3=0.5×i0.
3. The low power LDO circuit of claim 1, wherein: the voltage conversion module comprises an M1 transistor, an M2 transistor, an operational amplifier AMP1 and an operational amplifier AMP2; the source end of the M1 transistor is connected with VDD1, the gate end of the M1 transistor is controlled by a first control signal, the first control signal determines the on-off of the output of the operational amplifier AMP1 and the gate end of the transistor M1, meanwhile, one end of the drain end of the transistor M1 is connected to a resistor string formed by R3, R4 and R5, and the other end of the resistor string formed by R3, R4 and R5 is grounded as the output end of VDD 2;
the negative polarity of the operational amplifier AMP1 is connected with an input signal VREF1, which is provided by a zero temperature drift voltage generation module, and a branch of VDD1 is conducted by an M1 pipe under the control of a first control signal; the source end of the transistor M2 is connected with VLDO, the gate end of the transistor M2 is connected with the output of the operational amplifier AMP2, the third control signal controls the operational amplifier output to be switched on or off with the transistor M2, the drain end of the transistor M2 is connected with one end of the resistor R5, and the other end of the resistor R5 is grounded.
4. The low power LDO circuit of claim 3, wherein: wherein the negative polarity of the operational amplifier AMP2 is connected with the input signal VREF2, while the positive polarity terminal is connected with the resistor R5 and the drain terminal of the transistor M2; negative feedback structure formed by power supply VDD1, M1 tube, first control signal, AMP1, R3, R4, R5, produce output voltage:
wherein VREF1 is the output voltage generated by the zero temperature drift voltage generation module;
and the negative feedback structure formed by the same power supply VLDO, the M2 tube, the third control signal and AMP2, R4 and R5 generates output voltage:
where VREF2 is the bandgap reference voltage generated by the reference voltage selection module.
5. The low power LDO circuit of claim 1, wherein: the second control signal connected with the input end of the reference voltage selection module controls the output of the provided band gap reference module voltage VREF2, and the resistor string selection module RA generates an output voltage VREF3 under the control of the selection control signal D1:
VREF3＝VREF2*D1*RA，
wherein VREF2 is zero temperature drift reference voltage generated by the band gap reference module, RA is the total resistance of the resistor string selection module, and D1 is the proportionality coefficient for dividing the resistor string.
6. The low power LDO circuit of claim 1, wherein: the LDO output module comprises a power tube M3, an operational amplifier AMP3 and a control module; the source end of the power tube M3 is connected with VDD1, the gate end is connected with the output of the operational amplifier AMP3, the drain end of the power tube M3 is connected to a resistor string formed by R6 and R7, meanwhile, the other end of the resistor string formed by R6 and R7 is grounded, the negative polarity signal of the operational amplifier AMP3 is provided by VREF3 of a reference voltage selection module, the positive polarity end of the operational amplifier AMP3 is connected with one end of the resistor R7, and the other end of the resistor R7 is grounded;
the input end of the control module is connected with a VLDO signal, and a first control signal, a second control signal and a third control signal are obtained by sampling the VLDO signal, and the three control signals ensure the realization of a low-power consumption LDO structure applied to high power supply voltage.
7. The low power LDO circuit of claim 6, wherein: the negative feedback loop formed by the voltage VDD1, the transistor M3, the operational amplifier AMP 5 and the operational amplifier AMP 6 obtains output voltage:
wherein VREF2 is zero temperature drift output voltage generated by the band gap reference module, D1 is a constant, resistors RA, R6 and R7 are the same type of resistors, and the output voltage VLDO of all LDO output module structures is zero temperature drift output voltage.
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| CN202311806662.3A CN117742438A (en) | 2023-12-26 | 2023-12-26 | Low-power consumption LDO circuit applied to high power supply voltage |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN118157646A (en) * | 2024-03-28 | 2024-06-07 | 上海芯炽科技集团有限公司 | A switch circuit for high voltage conduction |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118157646A (en) * | 2024-03-28 | 2024-06-07 | 上海芯炽科技集团有限公司 | A switch circuit for high voltage conduction |
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