CN117715468B - Display panel and preparation method thereof - Google Patents

Abstract

The application provides a display panel and a preparation method thereof, the display panel comprises a substrate, a flat layer, a wiring layer, an electron transport layer and a cathode layer. The flat layer comprises a first connecting surface, a first inclined surface and a second inclined surface, wherein the first connecting surface is connected with the substrate, the first inclined surface and the second inclined surface are connected to two opposite sides of the first connecting surface, and the extending direction of the first inclined surface is intersected with the extending direction of the second inclined surface. The wiring layer is connected to the surface of the flat layer, which is away from the substrate, and covers the first inclined plane and the second inclined plane. The electron transmission layer is connected to one side of the wiring layer, which is away from the flat layer, and the orthographic projection of the electron transmission layer to the substrate is staggered with the first inclined plane. The cathode layer is connected to one side of the wiring layer, which is away from the flat layer, and the orthographic projection of the cathode layer to the substrate covers the first inclined plane. The technical scheme provided by the embodiment of the application can enable the cathode layer to be in direct contact with the wiring layer, and improve the electrical connection stability of the cathode layer and the wiring layer, so that the display panel works more stably.

Description

Display panel and method for manufacturing the same

Technical Field

The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof.

Background Art

At present, the electron transport layer in the display panel is generally formed by evaporating its material on the entire panel, so the cathode layer and the wiring layer in the display panel are generally separated by the electron transport layer. The electron transport layer is generally organic and has a large resistance, which will cause poor overlap between the cathode layer and the wiring layer, or cause a large resistance between the cathode layer and the wiring layer, resulting in higher power consumption of the display panel, and ultimately causing the display panel to be unable to work stably.

Summary of the invention

The embodiments of the present application provide a display panel and a method for manufacturing the same, which can enable the cathode layer to be in direct contact with the wiring layer, thereby improving the electrical connection stability between the cathode layer and the wiring layer, thereby making the operation of the display panel more stable.

In a first aspect, the present application provides a display panel, the display panel comprising:

Substrate;

a flat layer, comprising a first connecting surface, a first inclined surface and a second inclined surface, wherein the first connecting surface is connected to the substrate, the first inclined surface and the second inclined surface are connected to opposite sides of the first connecting surface, and an extending direction of the first inclined surface intersects an extending direction of the second inclined surface;

A routing layer connected to a surface of the flat layer facing away from the substrate, the routing layer covering the first inclined surface and the second inclined surface;

an electron transport layer, connected to a side of the routing layer away from the planar layer, wherein an orthographic projection of the electron transport layer onto the substrate is offset from the first inclined surface; and

A cathode layer is connected to a side of the wiring layer away from the flat layer, and an orthographic projection of the cathode layer onto the substrate covers the first inclined surface.

In this embodiment, the flat layer has a first inclined surface and a second inclined surface. The first inclined surface and the second inclined surface are arranged opposite to each other. The first inclined surface can be used for the deposition of the electron transport layer. The first inclined surface can be used for the deposition of the cathode layer, and the second inclined surface can be used for the deposition of the electron transport layer, so that the cathode layer located on the first inclined surface can directly contact the wiring layer, avoiding the cathode layer and the wiring layer being separated by the electron transport layer, thereby ensuring that the electrical connection between the cathode layer and the wiring layer is more stable, and ensuring the working stability of the display panel.

In a possible implementation manner, an included angle between the first inclined surface and the first connecting surface is an acute angle, and an included angle between the second inclined surface and the first connecting surface is an acute angle.

In a possible implementation manner, an orthographic projection of the electron transport layer onto the substrate covers the second inclined surface.

In a possible implementation manner, the planar layer further includes a second connecting surface, the second connecting surface is connected between the first inclined surface and the second inclined surface, the second connecting surface is arranged opposite to the first connecting surface, and the routing layer covers the first connecting surface.

In a possible implementation manner, the electron transport layer covers the second connection surface.

In a possible implementation manner, part of the cathode layer is located on a side of the electron transport layer away from the first connection surface, and an orthographic projection of the cathode layer onto the substrate covers the second connection surface.

In a possible implementation manner, the planar layer further includes a protrusion, the protrusion is connected to the second connection surface, the protrusion extends from the second connection surface in a direction away from the substrate, and the routing layer covers the protrusion.

In a second aspect, the present application provides a method for preparing a display panel, comprising:

providing a substrate;

forming a flat layer on the substrate, the flat layer comprising a first connecting surface, a first inclined surface and a second inclined surface, the first connecting surface contacts the substrate, the first inclined surface and the second inclined surface are connected to opposite sides of the first connecting surface, and an extension direction of the first inclined surface intersects an extension direction of the second inclined surface;

forming a wiring layer on a side of the flat layer away from the substrate, the wiring layer being connected to a surface of the flat layer away from the substrate, and the wiring layer covering the first inclined surface and the second inclined surface;

An electron transport layer is formed on a side of the wiring layer away from the flat layer, wherein an orthographic projection of the electron transport layer onto the substrate is staggered with the first inclined surface; and

forming a first cathode sublayer on a side of the wiring layer away from the flat layer, wherein an orthographic projection of the first cathode sublayer onto the substrate covers the first inclined surface;

A second cathode sublayer is formed on a side of the electron transport layer away from the wiring layer, and the second cathode sublayer is connected to the first cathode sublayer to form a cathode layer.

In one possible embodiment, the electron transport layer is formed by an evaporation process, and the material of the electron transport layer is evaporated toward the second inclined surface. The angle between the evaporation direction and the substrate is a first angle, and the angle between the first inclined surface and the substrate is a second angle, and the first angle is less than or equal to the second angle.

In one possible embodiment, the cathode layer is formed by an evaporation process, and the material of the cathode layer is evaporated toward the first inclined surface. The angle between the evaporation direction and the substrate is a third angle, and the angle between the second inclined surface and the substrate is a fourth angle, and the second angle is less than or equal to the fourth angle.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solution of the present application, the drawings required for use in the implementation manner will be briefly introduced below. Obviously, the drawings described below are only some implementation manners of the present application. For ordinary technicians in this field, other drawings can be obtained like these drawings without paying any creative work.

FIG1 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application;

FIG2 is a schematic cross-sectional view of the display panel shown in FIG1 ;

FIG3 is a cross-sectional schematic diagram of the display structure shown in FIG2 ;

FIG4 is another schematic cross-sectional view of the display panel shown in FIG1 ;

FIG5 is a schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

FIG6 is a schematic cross-sectional view of a display panel formed after S300 is completed in the method for manufacturing a display panel;

7 is a schematic cross-sectional view of a display panel formed after S400 is completed in the method for manufacturing a display panel;

FIG8 is a schematic cross-sectional view of a display panel formed after S500 is completed in the method for manufacturing a display panel;

FIG. 9 is a schematic cross-sectional view of a display panel formed after S600 in the method for manufacturing a display panel.

Figure numerals: display device 100, shell 10, display panel 20, substrate 21, display structure 22, flat layer 23, wiring layer 24, electron transport layer 25, cathode layer 26, display area 27, non-display area 28, anode layer 221, hole transport layer 222, light-emitting layer 223, first connecting surface 231, second connecting surface 232, first inclined surface 233, second inclined surface 234, protrusion 29, first side surface 291, second side surface 292, third connecting surface 293, second angle α2, fourth angle α4, first angle α1, first cathode sublayer 251, third angle α3, second cathode sublayer 252.

DETAILED DESCRIPTION

For ease of understanding, the terms involved in the embodiments of the present application are first explained.

And/or: It is just a way to describe the association relationship of associated objects, indicating that there can be three relationships. For example, A and/or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

Multiple: refers to two or more than two.

Connection: should be understood in a broad sense. For example, A and B are connected, which can be either direct or indirect through an intermediary.

The specific implementation of the present application will be clearly described below in conjunction with the accompanying drawings.

Please refer to FIG. 1 and FIG. 2 . FIG. 1 is a schematic diagram of the structure of a display device 100 provided in an embodiment of the present application. The display device 100 may include a housing 10 and a display panel 20 . The display panel 20 is fixedly mounted on the housing 10 .

Fig. 2 is a schematic cross-sectional view of the display panel 20 shown in Fig. 1. The display panel 20 includes a substrate 21, a display structure 22, a planar layer 23, a wiring layer 24, an electron transport layer 25, and a cathode layer 26. The display structure 22, the planar layer 23, the wiring layer 24, the electron transport layer 25, and the cathode layer 26 are disposed on the substrate 21.

The display panel 20 includes a display area 27 and a non-display area 28. The display area 27 and the non-display area 28. The display structure 22 is located in the display area 27 of the display panel 20. The planar layer 23 and the wiring layer 24 may be located in the non-display area 28 of the display panel 20. The electron transport layer 25 and the cathode layer 26 are located in the display area 27 and the non-display area 28 of the display panel 20.

The display panel 20 may be, but is not limited to, an electronic device such as a cell phone, a notebook computer, a tablet personal computer, a laptop computer, a personal digital assistant, a wearable device, or a mobile device.

Exemplarily, the substrate 21 may be a glass substrate, a sapphire substrate or a silicon wafer substrate. Alternatively, the substrate may be a flexible substrate, which may be made of any one or more of the following materials: polyimide, polyethylene terephthalate (PET), polyethylene naphthalate diformic acid glycol ester (PEN), cycloolefin polymer (COP), polycarbonate (PC), polystyrene (PS), polypropylene (PP), polytetrafluoroethylene (PTFE). In other implementations, the substrate 21 may also be a ceramic substrate, etc., which is not limited in the present application.

It should be noted that the purpose of Figure 2 is only to schematically describe the connection relationship between the substrate 21, the display structure 22, the flat layer 23, the wiring layer 24, the electron transport layer 25 and the cathode layer 26, and it does not specifically limit the connection position, specific structure and quantity of each device. The structure illustrated in the embodiment of the present application does not constitute a specific limitation on the display panel 20. In other embodiments of the present application, the display panel 20 may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The illustrated components can be implemented in hardware, software, or a combination of software and hardware.

Please refer to FIG3, which is a cross-sectional schematic diagram of the display structure 22 shown in FIG2. The display structure 22 may include an anode layer 221, a hole transport layer 222, and a light-emitting layer 223. In the direction away from the substrate 21, the anode layer 221, the hole transport layer 222, and the light-emitting layer 223 are arranged in sequence. The side of the anode layer 221 facing away from the hole transport layer 222 is connected to the substrate 21. The side of the light-emitting layer 223 facing away from the hole transport layer 222 is connected to the electron transport layer 25.

In this embodiment, the display structure 22, the electron transport layer 25 and the cathode layer 26 can form an organic light emitting diode display (Organic Light Emitting Diode, OLED) light emitting structure. The principle of OLED light emission is based on the phenomenon that organic semiconductor materials and light emitting materials cause light emission through carrier injection and recombination under electric field drive. Specifically, under a certain voltage drive, electrons and holes are injected from the cathode and anode into the electron transport layer 25 and the hole transport layer 222, respectively, and the electrons and holes migrate to the light emitting layer 223 through the electron transport layer 25 and the hole transport layer 222, respectively, and meet in the light emitting layer 223 to form excitons and excite the light emitting molecules, which emit visible light after radiation relaxation. Since OLED organic semiconductors are adjustable, the intensity of light can be controlled by changing the voltage between the cathode layer 26 and the anode layer 221.

In the first possible embodiment, please refer to FIG. 2 again, the flat layer 23 includes a first connecting surface 231, a second connecting surface 232, a first inclined surface 233 and a second inclined surface 234. Exemplarily, the cross section of the flat layer 23 may be a trapezoid. The first connecting surface 231 and the second connecting surface 232 are arranged opposite to each other. Among them, the second connecting surface 232 may be a plane or an arc surface. The first inclined surface 233 and the second inclined surface 234 are arranged opposite to each other. The first inclined surface 233 and the second inclined surface 234 are connected to opposite sides of the first connecting surface 231, and the extension direction of the first inclined surface 233 and the extension direction of the second inclined surface 234 intersect. The angle between the first inclined surface 233 and the first connecting surface 231 may be an acute angle, and the angle between the second inclined surface 234 and the first connecting surface 231 may be an acute angle. The first connecting surface 231 is connected to the substrate 21. The flat layer 23 is located in the non-display area 28 of the display panel 20. The flat layer 23 is spaced apart from the display structure 22. The first inclined surface 233 and the second inclined surface 234 are both arranged to be inclined relative to the substrate 21. For example, the cross section of the planar layer 23 may also be a plurality of trapezoids.

In this embodiment, the material of the planar layer 23 may be a non-conductive material. The surface of the planar layer 23 may be connected to the wiring layer 24 .

The routing layer 24 is connected to the surface of the flat layer 23 facing away from the substrate 21, and the routing layer 24 covers the flat layer 23. The routing is spaced apart from the display structure 22. The routing layer 24 is located in the non-display area 28 of the display panel 20. Specifically, the routing layer 24 can cover the second connecting surface 232, the first inclined surface 233 and the second inclined surface 234. Exemplarily, the routing layer 24 can be formed in the same preparation step as the anode layer 221 of the display structure 22, that is, a conductive layer material can be deposited on the surface of the substrate 21, and the conductive layer material can be patterned to form the anode layer 221 and the routing layer 24.

The electron transport layer 25 is connected to the side of the wiring layer 24 away from the flat layer 23. The electron transport layer 25 is located in the display area 27 and the non-display area 28 of the display panel 20. The electron transport layer 25 covers the display structure 22, the substrate 21 between the display structure 22 and the wiring layer 24, and part of the wiring layer 24. And the orthographic projection of the electron transport layer 25 to the substrate 21 covers the first inclined surface 233 and the second connecting surface 232. The orthographic projection of the electron transport layer 25 to the substrate 21 is also staggered with the first inclined surface 233. It should be explained that the staggered setting means that the positions of the two are completely staggered and do not overlap.

The cathode layer 26 is connected to the side of the wiring layer 24 away from the flat layer 23, part of the cathode layer 26 is located on the side of the electron transport layer 25 away from the first connection surface 231, and part of the cathode layer 26 is located on the side of the wiring layer 24 not covered by the electron transport layer 25 away from the flat layer 23. The cathode layer 26 is located in the display area 27 and the non-display area 28 of the display panel 20. The orthographic projection of the cathode layer 26 to the substrate 21 covers the display structure 22, the flat layer 23 and the electron transport layer 25. Among them, the orthographic projection of the cathode layer 26 to the substrate 21 covers the first inclined surface 233, the second connection surface 232 and the second inclined surface 234.

With the development of optoelectronic display technology and semiconductor manufacturing technology, display technologies such as organic light emitting diode display (OLED) and liquid crystal display (LCD) have been mass-produced. OLED display technology has become more and more popular in the market due to its advantages such as high color gamut, high contrast, and wide viewing angle. The light-emitting part of OLED is generally composed of an anode (providing positive voltage, holes), a hole transport layer, a light-emitting layer, an electron transport layer, and a cathode (providing negative voltage, electrons). The cathode signal is generally transmitted to the cathode by a conductive pattern through the cathode overlap area at the edge of the panel. However, when the OLED material is evaporated, the electron transport layer is not evaporated accurately to the pixel area using a fine metal mask (Fine Metal Mask, FMM), but an open mask is used to evaporate the material to the entire substrate. Therefore, the electron transport layer is sandwiched between the cathode layer and the wiring layer. Since the electron transport layer is generally an organic substance with a large resistance, it may cause poor overlap between the cathode layer and the wiring layer, or a large resistance in the overlap area between the cathode layer and the wiring layer, resulting in higher power consumption of the display panel.

In this embodiment, the planar layer 23 has a first inclined surface 233 and a second inclined surface 234. The first inclined surface 233 and the second inclined surface 234 are arranged opposite to each other. The first inclined surface 233 can be used for the deposition of the electron transport layer 25. The first inclined surface 233 can be used for the deposition of the cathode layer 26, and the second inclined surface 234 can be used for the deposition of the electron transport layer 25, so that the cathode layer 26 located on the first inclined surface 233 can directly contact the wiring layer 24, avoiding the cathode layer 26 and the wiring layer 24 being separated by the electron transport layer 25, thereby ensuring that the electrical connection between the cathode layer 26 and the wiring layer 24 is more stable, and ensuring the working stability of the display panel 20.

In a second possible implementation, please refer to FIG4 , which is another cross-sectional schematic diagram of the display panel 20 shown in FIG1 . The display panel 20 of this embodiment is different from the display panel 20 of the first possible embodiment in that the flat layer 23 further includes a protrusion 29 .

The protrusion 29 may be connected to the side where the second connection surface 232 is connected to the second inclined surface 234. The protrusion 29 extends from the second connection surface 232 in a direction away from the substrate 21. The end of the protrusion 29 away from the substrate 21 may intersect with the extension direction of the first inclined surface 233. That is, the height of the protrusion 29 needs to reach the extension line of the first inclined surface 233. The protrusion 29 includes a first side surface 291, a second side surface 292 and a third connection surface 293 opposite to each other along its width direction. The third connection surface 293 is connected to the first side surface 291 and the second side surface 292 away from the second connection surface 232. The first side surface 291 faces the first inclined surface 233. The first side surface 291 may be connected to the second connection surface 232. The end of the second connection surface 232 away from the first side surface 291 may be connected to the first inclined surface 233. The second side surface 292 faces the second inclined surface 234. The second side surface 292 may be connected to the side of the second inclined surface 234 away from the substrate 21.

The wiring layer 24 covers the first side surface 291, the second side surface 292 and the third connection surface 293 of the protrusion 29. The orthographic projection of the electron transport layer 25 to the substrate 21 covers the second side surface 292 and the third connection surface 293 of the protrusion 29. The orthographic projection of the electron transport layer 25 to the substrate 21 is staggered with the second side surface 292 of the protrusion 29. The orthographic projection of the cathode layer 26 to the substrate 21 covers the first side surface 291, the second side surface 292 and the third connection surface 293 of the protrusion 29.

In this embodiment, the protrusion 29 can better prevent the material of the electron transport layer 25 from being deposited on the first inclined surface 233 and the second connecting surface 232 during the deposition process. The protrusion 29 can block the material of the electron transport layer 25 on one side of the second inclined surface 234, increase the contact area between the cathode layer 26 and the wiring layer 24, thereby ensuring that the cathode layer 26 can directly contact the wiring layer 24, so that the cathode layer 26 and the wiring layer 24 have good electrical connection stability, so that the display panel 20 will not have display abnormalities due to poor electrical connection between the cathode layer 26 and the wiring layer 24.

Please refer to Fig. 5, which is a schematic flow chart of a method for manufacturing a display panel 20 provided in an embodiment of the present application. The manufacturing method includes but is not limited to steps S100-S600.

S100: providing a substrate 21.

S200: A flat layer 23 is formed on the substrate 21, wherein the flat layer 23 includes a first connecting surface 231, a first inclined surface 233 and a second inclined surface 234, wherein the first connecting surface 231 contacts the substrate 21, the first inclined surface 233 and the second inclined surface 234 are connected to opposite sides of the first connecting surface 231, and an extension direction of the first inclined surface 233 intersects with an extension direction of the second inclined surface 234.

The planar layer 23 may be prepared using a half-transparent mask (HTM). The cross-section of the planar layer 23 may be a plurality of trapezoids, and the top surfaces and side surfaces of the plurality of trapezoids may form a wavy structure.

S300 : forming a wiring layer 24 on a side of the flat layer 23 away from the substrate 21 . The wiring layer 24 is connected to a surface of the flat layer 23 away from the substrate 21 . The wiring layer 24 covers the first inclined surface 233 and the second inclined surface 234 .

The material of the wiring layer 24 may be indium tin oxide (ITO). Since the flat layer 23 has the second connecting surface 232, the wiring layer 24 on the first inclined surface 233 and the wiring layer 24 on the second inclined surface 234 may be transitionally connected through the wiring layer 24 on the second connecting surface 232, thereby preventing the wiring layer 24 from being disconnected between the first inclined surface 233 and the second inclined surface 234.

S400 : forming an electron transport layer 25 on a side of the wiring layer 24 away from the planar layer 23 , wherein an orthographic projection of the electron transport layer 25 onto the substrate 21 is offset from the first inclined surface 233 .

Among them, the electron transport layer 25 is formed by an evaporation process, and the material of the electron transport layer 25 is evaporated toward the second inclined surface 234. The angle between the evaporation direction and the substrate 21 is a first angle, and the angle between the first inclined surface 233 and the substrate 21 is a second angle α2. The first angle is less than or equal to the second angle α2.

S500 : forming a first cathode sublayer on a side of the routing layer 24 away from the planar layer 23 , wherein an orthographic projection of the first cathode sublayer onto the substrate 21 covers the first inclined surface 233 .

S600 : forming a second cathode sublayer on a side of the electron transport layer away from the wiring layer 24 , and connecting the second cathode sublayer to the first cathode sublayer to form a cathode layer 26 .

Among them, the cathode layer 26 is formed by an evaporation process, and the material of the cathode layer 26 is evaporated toward the first inclined surface 233. The angle between the evaporation direction and the substrate 21 is the third angle, and the angle between the second inclined surface 234 and the substrate 21 is the fourth angle α4. The third angle is less than or equal to the fourth angle α4.

In this embodiment, since the first inclined surface 233 and the second inclined surface 234 are inclined relative to the substrate 21, the film material of the electron transport layer 25 can be directly evaporated toward the second inclined surface 234. When evaporating toward the second inclined surface 234, the evaporation direction can avoid the first inclined surface 233, so the first inclined surface 233 will not be deposited by the film material of the electron transport layer 25. The wiring layer 24 of the first inclined surface 233 will not be covered by the electron transport layer 25, so that the cathode layer 26 can be directly deposited on the surface of the wiring layer 24 during deposition, and then the cathode layer 26 is in direct contact with the wiring layer 24, thereby improving the electrical connection stability between the cathode layer 26 and the wiring layer 24.

Each step will be further described below.

The above steps S300 - S600 will be described below in conjunction with the drawings. Please refer to FIG. 6 , which is a cross-sectional schematic diagram of the display panel 20 formed after S300 is completed in the method for manufacturing the display panel 20 .

S300 : forming a wiring layer 24 on a side of the flat layer 23 away from the substrate 21 . The wiring layer 24 is connected to a surface of the flat layer 23 away from the substrate 21 . The wiring layer 24 covers the first inclined surface 233 and the second inclined surface 234 .

The wiring layer 24 may cover the flat layer 23. The two sides of the wiring layer 24 protruding relative to the width direction of the flat layer 23 may be connected to the substrate 21.

Please refer to FIG. 7 , which is a schematic cross-sectional view of the display panel 20 formed after S400 in the method for manufacturing the display panel 20 .

S400 : forming an electron transport layer 25 on a side of the wiring layer 24 away from the planar layer 23 , wherein an orthographic projection of the electron transport layer 25 onto the substrate 21 is offset from the first inclined surface 233 .

Among them, the film material of the electron transport layer 25 can be evaporated by tilting the substrate 21, and the evaporation process can be open mask evaporation. The evaporation direction is toward the second inclined surface 234, and the angle with the substrate 21 is the first angle α1. The evaporation method of the electron transport layer 25 is also applicable to the hole transport layer 222, the electron blocking layer or other non-conductive film layer structures located between the cathode layer 26 and the wiring layer 24 in the OLED display panel 20.

Please refer to FIG. 8 , which is a cross-sectional schematic diagram of the display panel 20 formed after S500 in the method for manufacturing the display panel 20 .

S500 : forming a first cathode sub-layer 251 on a side of the routing layer 24 away from the planar layer 23 , wherein an orthographic projection of the first cathode sub-layer 251 onto the substrate 21 covers the first inclined surface 233 .

The film material of the first cathode sublayer 251 can be evaporated by tilting the substrate 21, and the evaporation process can be open mask evaporation. The evaporation direction is toward the first inclined surface 233, and the angle with the substrate 21 is the third angle α3.

Please refer to FIG. 9 , which is a cross-sectional schematic diagram of the display panel 20 formed after S600 in the method for manufacturing the display panel 20 .

S600 : forming a second cathode sublayer 252 on a side of the electron transport layer away from the wiring layer 24 , and the second cathode sublayer 252 is connected to the first cathode sublayer 251 to form a cathode layer 26 .

The film material of the second cathode sublayer 252 can be the same as the film material of the first cathode sublayer 251. During the evaporation process of the second cathode sublayer 252, the substrate 21 can be perpendicular to the evaporation direction, so that the second cathode sublayer 252 can cover the surface of the electron transport layer 25 and the first cathode sublayer 251, and is electrically connected to the first cathode sublayer 251.

In this embodiment, by evaporating the inclined substrate 21, the electron transport layer 25 and the first cathode sublayer 251 can be respectively located on one side of the second inclined surface 234 and the first inclined surface 233 of the flat layer 23. Thus, the first cathode sublayer 251 can be directly connected to the wiring layer 24. After the second cathode sublayer 252 is deposited on the surface of the first cathode sublayer 251 and the electron transport layer 25, the second cathode sublayer 252 can be electrically connected to the first cathode sublayer 251, so that part of the cathode layer 26 located in the display area 27 (above the display structure 22) can be connected to the wiring layer 24.

The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims (9)

1. A display panel, the display panel comprising:

A substrate;

The flat layer comprises a first connecting surface, a first inclined surface and a second inclined surface, wherein the first connecting surface is connected with the substrate, the first inclined surface and the second inclined surface are connected to two opposite sides of the first connecting surface, the extending direction of the first inclined surface is intersected with the extending direction of the second inclined surface, the included angle between the first inclined surface and the first connecting surface is an acute angle, and the included angle between the second inclined surface and the first connecting surface is an acute angle;

The wiring layer is connected to the surface of the flat layer, which is away from the substrate, and covers the first inclined plane and the second inclined plane;

the electronic transmission layer is connected to one side of the wiring layer, which is away from the flat layer, and orthographic projection of the electronic transmission layer to the substrate is staggered with the first inclined plane; and

And the cathode layer is connected to one side of the wiring layer, which is away from the flat layer, and orthographic projection of the cathode layer to the substrate covers the first inclined plane.

2. The display panel of claim 1, wherein an orthographic projection of the electron transport layer onto the substrate covers the second inclined plane.

3. The display panel of claim 2, wherein the flat layer further comprises a second connection surface connected between the first and second inclined surfaces, the second connection surface being disposed opposite the first connection surface, the trace layer covering the first connection surface.

4. A display panel according to claim 3, wherein the electron transport layer covers the second connection face.

5. The display panel of claim 4, wherein a portion of the cathode layer is located on a side of the electron transport layer facing away from the first connection surface, and wherein an orthographic projection of the cathode layer onto the substrate covers the second connection surface.

6. The display panel of claim 5, wherein the planar layer further comprises a bump connected to the second connection surface, the bump extending from the second connection surface away from the substrate, the trace layer covering the bump.

7. A method for manufacturing a display panel, comprising:

Providing a substrate;

Forming a flat layer on the substrate, wherein the flat layer comprises a first connecting surface, a first inclined surface and a second inclined surface, the first connecting surface is in contact with the substrate, the first inclined surface and the second inclined surface are connected to two opposite sides of the first connecting surface, the extending direction of the first inclined surface and the extending direction of the second inclined surface intersect, an included angle between the first inclined surface and the first connecting surface is an acute angle, and an included angle between the second inclined surface and the first connecting surface is an acute angle;

Forming a wiring layer on one side of the flat layer, which is away from the substrate, wherein the wiring layer is connected to the surface of the flat layer, which is away from the substrate, and covers the first inclined plane and the second inclined plane;

forming an electron transmission layer on one side of the wiring layer, which is away from the flat layer, wherein the orthographic projection of the electron transmission layer to the substrate is staggered with the first inclined plane; and

Forming a first cathode sub-layer on one side of the wiring layer, which is away from the flat layer, wherein the orthographic projection of the first cathode sub-layer to the substrate covers the first inclined plane;

And forming a second cathode sub-layer on one side of the electron transmission layer, which is away from the wiring layer, wherein the second cathode sub-layer is connected with the first cathode sub-layer to form a cathode layer.

8. The method for manufacturing a display panel according to claim 7, wherein the electron transport layer is formed by an evaporation process, the material of the electron transport layer is evaporated toward the second inclined plane, an included angle between the evaporation direction and the substrate is a first included angle, an included angle between the first inclined plane and the substrate is a second included angle, and the first included angle is smaller than or equal to the second included angle.

9. The method for manufacturing a display panel according to claim 7 or 8, wherein the first cathode sub-layer is formed by an evaporation process, a material of the first cathode sub-layer is evaporated toward the first inclined plane, an included angle between an evaporation direction and the substrate is a third included angle, an included angle between the second inclined plane and the substrate is a fourth included angle, and the second included angle is smaller than or equal to the fourth included angle.