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CN117640870B - Interface anti-reverse-plug circuit, method and electronic equipment - Google Patents

Interface anti-reverse-plug circuit, method and electronic equipment Download PDF

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Publication number
CN117640870B
CN117640870B CN202410108689.3A CN202410108689A CN117640870B CN 117640870 B CN117640870 B CN 117640870B CN 202410108689 A CN202410108689 A CN 202410108689A CN 117640870 B CN117640870 B CN 117640870B
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China
Prior art keywords
signal
input
output
pin
interface
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CN202410108689.3A
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CN117640870A (en
Inventor
翟佳伟
赵楠
赵红玉
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Honor Device Co Ltd
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Honor Device Co Ltd
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Priority to CN202410108689.3A priority Critical patent/CN117640870B/en
Publication of CN117640870A publication Critical patent/CN117640870A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/268Signal distribution or switching

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

The application relates to the technical field of terminals, and provides an interface anti-reverse-plug circuit, an interface anti-reverse-plug method and electronic equipment, wherein the circuit comprises: the system comprises a plurality of input ends, a plurality of output ends and a switching circuit, wherein each input end can receive a source signal, and the source signal comprises a target source signal and other source signals; the signal processing module is connected with the signal input interfaces of the signal processing module in a one-to-one correspondence mode, the switching circuit is coupled between the input ends and the output ends, the input ends and the output ends are conducted in a one-to-one correspondence mode through the switching circuit, and when the signal processing module receives other source signals from a first signal input interface in the signal input interfaces, the switching circuit can switch the conduction relation between the input ends and the output ends until the signal processing module receives target source signals from the first signal input interface. Therefore, when the signal source is in plugging error, the connection relation between the input end and the output end can be switched, and the problem that equipment cannot be normally used due to plugging error is avoided.

Description

Interface anti-reverse-plug circuit, method and electronic equipment
Technical Field
The present application relates to the field of terminal technologies, and in particular, to an interface anti-reverse-insertion circuit, a method, and an electronic device.
Background
An Audio Video (AV) interface is an interface applied to Audio-visual equipment for transmitting signals, and in the use process of the Audio-visual equipment, the AV interface needs to be connected to a signal source through an AV wire, so that the input and processing of Video and Audio signals are realized.
However, when the user uses the audio-visual device and inserts the AV interface, the actual line sequence of the 3pin AV line inserted and the SOC (System on Chip) line is not matched due to the non-uniform line specification of the AV line manufacturer, and the connection failure causes the electronic device to not find the input signal source, so as to affect the normal use of the electronic device.
Disclosure of Invention
The application provides an interface anti-reverse plug circuit, an interface anti-reverse plug method and electronic equipment, and aims to solve the problem that the AV interface plug line sequence of the electronic equipment cannot be used when the AV interface plug line sequence is not matched with an actual line sequence.
To achieve the above object, in a first aspect, the present application provides an interface anti-reverse plug circuit, including: n input ends and N output ends, wherein each input end is used for receiving a source signal, the source signal comprises a target source signal and other source signals, the N output ends are electrically connected with N signal input interfaces of the signal processing module in one-to-one correspondence, and N is a positive integer greater than 2; the switching circuit is coupled between the N input ends and the N output ends, and the N input ends and the N output ends are conducted in a one-to-one correspondence manner through the switching circuit; the switching circuit is configured to: and when the signal processing module receives other source signals from a first signal input interface of the N signal input interfaces, switching the conduction relation between the N input ends and the N output ends until the signal processing module receives target source signals from the first signal input interface.
Like this, accessible signal processing module detects the source signal of signal source input, when not detecting the target source signal in corresponding passageway, accessible switching circuit switches the output of source signal to when signal source grafting error, automatically regulated in equipment avoids grafting error to lead to the unable normal problem of using of equipment, need not user's plug signal source cable simultaneously, optimizes the use experience of equipment.
In one possible embodiment, the N inputs include a first input and M other inputs; the N output ends comprise a first output end and M other output ends, M is a positive integer greater than 1, and M is less than N; the first output end is connected with the first signal input interface, and the M other output ends are electrically connected with the M second signal input interfaces in a one-to-one correspondence manner; the M second signal input interfaces comprise M other interfaces except the first signal input interface in the N signal input interfaces; the switching circuit comprises a first switching switch and M other switching switches, the first switching switch is arranged between the first output end and the first input end, and the first switching switch is configured to be used for responding to a first control signal to conduct and disconnect the first input end and the first output end; each of the other switches is connected to at least one other input terminal, the first output terminal, and at least one other output terminal, the other switches being configured to switch the conductive relationship of the other input terminals to which they are connected to the first output terminal and the other output terminals in response to the second control signal. Therefore, the corresponding connection relation between the input end and the output end can be switched, and when the source signal output by the first output end is not the target source signal, the switching is performed so as to adjust the source signal output by the first output end to the target source signal.
In a possible embodiment, the M other inputs include a second input and a third input; the M other output ends comprise a second output end and a third output end; the other change-over switches comprise a second change-over switch and a third change-over switch; the second change-over switch is connected with the first input end, the second input end, the first output end and the second output end, and is configured to conduct the first input end and the second output end and conduct the second input end and the first output end or conduct the second input end and the second output end in response to a second control signal; the third transfer switch is connected to the first input terminal, the third input terminal, the first output terminal, and the third output terminal, and is configured to turn on the first input terminal and the third output terminal and to turn on the third input terminal and the first output terminal, or to turn on the third input terminal and the third output terminal, in response to the second control signal. In this way, the corresponding connection of the second input or the third input to the first output can be realized by other switches, so that a switching function is provided when the signal source is connected in error.
In one possible embodiment, the second diverter switch is a double pole double throw switch; the second change-over switch comprises a first input pin, a second input pin, a first output pin, a second output pin, a third output pin and a fourth output pin; the first input pin is connected with the first input end, the second input pin is connected with the second input end, the first output pin is connected with the first output end, and the second output pin, the third output pin and the fourth output pin are connected with the second output end; the second switch is further configured to conduct the second input pin with the first output pin or the second output pin and conduct the third output pin with the first input pin or the fourth output pin in response to the second control signal. Thus, when switching, the first output end and the second input end are conducted, and the second output end and the first input end are conducted, so that the function of switching and inputting source signals is realized.
In one possible embodiment, the third transfer switch is a double pole double throw switch; the third change-over switch comprises a third input pin, a fourth input pin, a fifth output pin, a sixth output pin, a seventh output pin and an eighth output pin; the third input pin is connected with the first input end, the fourth input pin is connected with the third input end, the fifth output pin is connected with the first output end, and the sixth output pin, the seventh output pin and the eighth output pin are connected with the third output end; the third switch is further configured to conduct the fourth input pin with the fifth output pin or the sixth output pin and conduct the seventh output pin with the third input pin or the eighth output pin in response to the second control signal. Therefore, when no target source signal is output from the first output end, the second switch or the third switch is controlled to switch, so that the input ends corresponding to the first output end and the second output end or the third output end are switched, the source signal in the second input end or the third input end is sent to the first output end, the signal processing module is enabled to judge the signal type of the source signal again, whether the switched source signal is the target source signal or not is determined, and switching of the interface circuit is achieved.
In one possible embodiment, the second control signal includes a low voltage signal and a high voltage signal; the second transfer switch is configured to: if the low-voltage signal is received, the second input pin is conducted with the second output pin, the third output pin is conducted with the fourth output pin, and the second input end is conducted with the second output end; if a high voltage signal is received, the second input pin is conducted with the first output pin, and the third output pin is conducted with the first input pin, so that the second input end is conducted with the first output end, and the first input end is conducted with the second output end. Therefore, the low-voltage signal or the high-voltage signal can be sent to the second change-over switch to control the second change-over switch, the complexity of sending the instruction is reduced, and the response speed of the second change-over switch to the second control signal is improved, so that the overall operation stability of the equipment is improved.
In one possible embodiment, the second control signal includes a low voltage signal and a high voltage signal; the third transfer switch is configured to: if a low-voltage signal is received, the fourth input pin is conducted with the sixth output pin, the seventh output pin is conducted with the eighth output pin, and the third input end is conducted with the third output end; and if the high-voltage signal is received, the fourth input pin is conducted with the third output pin, the seventh output pin is conducted with the third input pin, and the third input end is conducted with the first output end and the first input end is conducted with the third output end. Therefore, the third change-over switch can be controlled by sending a low-voltage signal or a high-voltage signal, the complexity of sending instructions is reduced, the response speed of the third change-over switch to the second control signal is improved, and the overall operation stability of the equipment is improved.
In one possible embodiment, the first switch comprises a first control pin and the other switches comprise a second control pin; the first control pin and the second control pin are respectively connected with the signal processing module; the first switch is further configured to: receiving a first control signal sent by a signal processing module through a first control pin; the other switches are also configured to: and receiving a second control signal sent by the signal processing module through a second control pin. In this way, the first and the further switches can be controlled by the control signal in order for the signal processing module to control the switching circuit.
In a possible embodiment, the switching circuit further comprises a fourth switching switch, the fourth switching switch being arranged on a line of the signal processing module connected to the first control pin; the fourth transfer switch is configured to generate and output the first control signal according to the second control signal sent by the signal processing module. Therefore, the first control signal can be generated through the logic circuit, so that the control signal which needs to be sent by the signal processing module is reduced, the instruction complexity is reduced, and the operation stability of the switching circuit is improved.
In one possible embodiment, the fourth switch is a nor gate module; the fourth change-over switch comprises two receiving ends and a transmitting end, the two receiving ends are respectively connected with the signal processing module, and the receiving ends are configured to respectively receive second control signals transmitted to other change-over switches by the signal processing module; the transmitting end is connected with the first control pin, and the fourth change-over switch is configured to output a first control signal with high voltage to the first control pin when the received signals are low-voltage signals according to the second control signal received by the receiving end, and output the first control signal with low voltage to the first control pin when the received signals comprise at least one high-voltage signal. In this way, the second control signals may be logically converted to obtain corresponding first control signals to control the first switch according to the second control signals input to different second control switches.
In one possible implementation, the first switch is an NMOS transistor, the NMOS transistor including a drain, a source, and a gate, the drain being connected to the first input terminal, the source being connected to the first output terminal, the first control pin being the gate; the NMOS transistor is configured to turn on a line between the drain and the source if the gate receives a first control signal of a high voltage. Therefore, the on-off of the first input end and the first output end can be controlled through the high-low voltage signals, the generation and the transmission of the first control signals and the second control signals are facilitated, and the operation stability of the switching circuit is improved.
In a possible embodiment, the other switch is provided with a third control pin, and the third control pin is connected with the signal processing module; the other switches are also configured to receive the enable signal sent by the signal processing module through the third control pin to enable the other switches. Therefore, other change-over switches can be started through the third control pin, and the change-over circuit is prevented from continuously consuming electric energy when the equipment is not in a working state.
In one possible implementation, the first output is configured to receive a source signal of a first media type; the second output is configured to receive a first source signal of a second media type; the third output is configured to receive a second source signal of a second media type; the first media type is different from the second media type. Therefore, source signals of different media types can be received through different output ends and sent to the signal processing module, so that the signal processing module can respectively receive and process the source signals of different types.
In one possible implementation, the switching circuit is coupled to a power supply. In this way, the switching circuit can be supplied with electrical energy to enable it to perform the switching function.
In a second aspect, the present application provides an electronic device comprising: an interface anti-reverse-plug circuit as in any of the first aspects; a plurality of external interfaces; the signal processing module comprises a plurality of signal input interfaces and one or more processors; wherein: the signal input interfaces are respectively connected with the external interfaces through the interface anti-reverse plug circuit, and are configured to respectively receive a source signal through one external interface; the source signals include target source signals and other source signals.
The processor is respectively connected with the plurality of signal input interfaces and the interface anti-reverse-plug circuit; the processor is configured to: if a first signal input interface in the plurality of signal input interfaces receives other source signals, generating a control signal; and sending control signals to a switching circuit in the interface anti-reverse plug circuit so as to control corresponding communication states of the plurality of external interfaces and the plurality of signal input interfaces until the first signal input interface receives the target source signals.
In a third aspect, the present application provides an interface anti-reverse plug method, which is applied to the electronic device provided in the second aspect, and the method includes: respectively receiving source signals through a plurality of external interfaces and respectively sending the source signals to a plurality of signal input interfaces; the source signals include target source signals and other source signals; if a first signal input interface of the plurality of signal input interfaces receives other source signals, a control signal is generated; sending a control signal to the interface anti-reverse-insertion circuit; and responding to the control signal, and switching the external interface corresponding to the communication of the first signal input interface until the first signal input interface receives the target source signal.
It may be appreciated that the advantages achieved by the technical solutions provided in the second aspect to the third aspect may refer to the advantages in any optional embodiment of the first aspect and are not described herein.
Drawings
In order to more clearly illustrate the technical solution of the present application, the drawings that are needed in the embodiments will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a schematic diagram of an interface circuit;
FIG. 2 is a schematic diagram of an interface anti-reverse-plug circuit according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an audio-visual device with an interface anti-reverse circuit according to an embodiment of the present application;
FIG. 4 is a schematic diagram of another interface anti-reverse-plug circuit according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a second switch according to an embodiment of the present application;
Fig. 6 is a schematic structural diagram of a third switch according to an embodiment of the present application;
FIG. 7 is a schematic diagram of a switching circuit according to an embodiment of the present application;
FIG. 8 is a schematic diagram of another switching circuit according to an embodiment of the present application;
FIG. 9 is a schematic diagram of an interface anti-reverse-insertion method according to an embodiment of the present application;
FIG. 10 is a schematic diagram of an interface anti-reverse-plug circuit in an initial state according to an embodiment of the present application;
FIG. 11 is a schematic diagram of an interface anti-reverse-plug circuit in a circuit switching state according to an embodiment of the present application;
FIG. 12 is a flowchart of an interface anti-reverse-plug method according to an embodiment of the present application;
Fig. 13 is a schematic structural diagram of an electronic device with an interface anti-reverse-plug circuit according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are some, but not all, embodiments of the application. Based on the embodiments of the present application, other embodiments that may be obtained by those of ordinary skill in the art without making any inventive effort are within the scope of the present application.
Hereinafter, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", etc. may explicitly or implicitly include one or more such feature. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.
It is also to be understood that in the context of the present application, the term "connected" may be an electrical connection, a communication connection, or a physical connection, unless expressly specified and limited otherwise; meanwhile, "connected" may be directly connected or indirectly connected through an intermediate medium.
Furthermore, in the present application, directional terms "upper", "lower", etc. are defined with respect to the orientation in which the components are schematically disposed in the drawings, and it should be understood that these directional terms are relative concepts, which are used for description and clarity with respect thereto, and which may be changed accordingly in accordance with the change in the orientation in which the components are disposed in the drawings.
In order to facilitate the clear description of the technical solutions of the embodiments of the present application, the following simply describes some terms and techniques involved in the embodiments of the present application:
An AV interface, i.e. an Audio Video interface, also called an Audio Video interface, a composite Video interface, is an interface for transmitting signals, which is applied to Audio-visual equipment. The AV interface is an interface for separate reception of audio and video, and for separate reception of audio signals and video signals, the AV interface generally includes three sub-interfaces, one for receiving video signals and the other two for receiving audio signals of left and right channels, respectively.
The sub-interfaces in the AV interface may be RCA interfaces or BNC interfaces. The RCA interface, also called lotus interface, is an interface standard formulated for Radio Corporation of American. The BNC interface, which is called Bayonet Nut Connector as a bayonet nut connector, is a coaxial cable connection interface. The RCA interface or BNC interface can be used for receiving audio signals and video signals through different cables, so that the transmission of the audio signals and the video signals is realized.
CVBS, collectively Composite Video Broadcast Signal or Composite Video Blanking and Sync, is known as composite synchronous video broadcast signal or composite video blanking and synchronization. CVBS is a widely used video signal standard, also called baseband video or RCA video, for transmitting video data in analog waveforms. The CVBS contains color difference (hue and saturation) and brightness (brightness) information and synchronizes them in blanking pulses, transmitted with the same signal.
SOC, known as System on Chip, i.e., system on Chip or System on Chip, is an integrated circuit with special purpose, which contains the entire System and has the entire contents of embedded software. In the embodiment of the present application, the SOC is connected to the AV interface so as to receive video signals and audio signals input from the AV interface.
Fig. 1 is a schematic diagram of an interface circuit.
As shown in fig. 1, in the present application, the SOC connected to the AV interface receives an audio signal and a video signal received by the AV interface during signal processing, so as to process the signals, respectively. Because of the difference between the processing modes corresponding to different kinds of signals, when the AV interface is connected with the SOC, the interface for transmitting different signals is connected with a module for processing corresponding signals in the SOC, the connection between the sub-interface and the SOC is a channel for transmitting signal application, and the input end of the channel and the output end of the channel have a one-to-one relationship when transmitting signals, namely, the sub-interface is connected with the processing module of the SOC in one-to-one correspondence.
Taking an AV interface for transmitting video signals and audio signals of left and right channels as an example, the AV interface comprises three sub-interfaces and is respectively connected with an SOC, wherein a channel connected with a functional module for processing video signals in the SOC is a CVBS channel, a channel connected with a functional module for processing left and right channel audio signals in the SOC is an L/R audio channel, namely AVLin channels and AVRin channels, and L and R are used for distinguishing audio signals of left and right channels.
After the AV interface is connected with the signal source, detecting the signal type in the CVBS channel through the SOC, and if the transmitted signal is the CVBS, indicating that the audio-visual equipment can read the video signal normally; if the signal transmitted in the CVBS channel is an audio signal, it indicates that the audio-visual device cannot read the video signal and cannot perform subsequent operations.
It should be understood that the L/R audio channels are respectively configured to receive the left channel audio signal and the right channel audio signal, and both are audio signals, so that the functional modules of the SOC connected to the two channels can process the left channel audio signal and the right channel audio signal, and thus, when the left channel audio signal and the right channel audio signal are connected in reverse, the audio-visual device will not be affected to read and display the video signal.
However, when the user uses the audio-visual equipment and inserts the AV interface, the wire specifications of the AV wire manufacturer are not uniform, so that the actual wire sequence of the inserted AV wire and the SOC wire is not matched, and the problem that the audio-visual equipment is affected to process and display video signals is caused, so that the audio-visual equipment cannot recognize the video signals, and the normal use of the audio-visual equipment is affected.
Based on the above problems, the application provides an interface anti-reverse plug circuit, an interface anti-reverse plug method and electronic equipment, which are used for detecting an accessed signal by setting a connecting line between an AV interface and an SOC, so that when the line sequence plugged into the AV interface is not matched with the line sequence between the AV interface and the SOC, the connecting relationship between the AV interface and the SOC is switched, and the problem that the electronic equipment cannot be normally used when the line sequence of the AV interface on the electronic equipment is not matched with the actual line sequence is solved.
The technical scheme provided by the embodiment of the application is described in detail below with reference to the accompanying drawings.
Fig. 2 is a schematic structural diagram of an interface anti-reverse-plug circuit in an embodiment of the present application, and fig. 3 is a schematic structural diagram of an audio-visual device with an interface anti-reverse-plug circuit in an embodiment of the present application.
As shown in fig. 2 and 3, the interface anti-reverse-plug circuit includes N input terminals 210, N output terminals 220, and a switching circuit 230, wherein the switching circuit 230 is coupled between the N input terminals 210 and the N output terminals 220, and the N input terminals 210 and the N output terminals 220 are connected in one-to-one correspondence through the switching circuit 230. Wherein N is a positive integer greater than 2.
The corresponding connection relationship between the input terminal 210 and the output terminal 220 can be switched by the switching circuit 230, so that the signal input by the input terminal 210 is regulated and controlled to be transmitted to the correct output terminal 220 by the switching circuit 230.
The N output terminals 220 may be electrically connected to the N signal input interfaces 311 of the signal processing module 310 in a one-to-one correspondence manner, so that signals input from the input terminals 210 are input to the signal processing module 310 through the signal input interfaces 311, respectively, and different kinds of signals are processed.
As shown in fig. 3, taking the application of the interface anti-reverse plug circuit to an audio-visual device as an example, an external interface 320 for receiving video signals and audio signals is provided on the audio-visual device, so that the video signals and the audio signals are received through a plug-in signal source. For example, the external interface 320 may be an AV interface, where the AV interface includes three sub-interfaces 321, and one input terminal 210 is electrically connected to one sub-interface 321 respectively. The input terminals 210 are connectable to the signal source via the sub-interfaces 321, such that each input terminal 210 is capable of receiving a source signal after the AV interface plugs in the signal source.
Further, the number of the signal input interfaces 311 on the signal processing module 310 is the same as the number of the sub-interfaces 321 in the external interface 320, so that the signal processing module 310 can respectively receive and parse the signals input through the external interface 320, thereby implementing the parsing of the video signal and the audio signal by the audio-visual device.
It should be understood that the audiovisual device may be any device having video and audio signal parsing functions, as well as video and audio playback functions, and the application is not limited in this regard. Meanwhile, in order to process and play the received signals, the audio-visual equipment is also provided with an SOC (system on a chip), a display screen and a loudspeaker, wherein the SOC is a processor of the audio-visual equipment and at least comprises a functional module for processing video signals and a functional module for processing audio signals, so that analysis of the video signals and the audio signals is realized.
It should be noted that, the SOC in the audio-visual device may be replaced by other modules having signal receiving and processing functions, and the processor structure of the audio-visual device is not limited in the present application. In the embodiment of the present application, the signal processing module 310 may be a processor of an audio-visual device, and thus the signal processing module 310 may be an SOC. On this basis, as shown in fig. 3, the signal processing module 310 may include a first functional module 312 and a second functional module 313, and at least one signal input interface 311 is respectively provided on the first functional module 312 and the second functional module 313, so that a signal to be processed is received through the signal input interface 311.
In some embodiments of the present application, the first functional module 312 is capable of processing video signals, and the second functional module 313 is capable of processing audio signals. On this basis, the first functional module 312 may be connected to a display screen of the audio-visual device, and the second functional module 313 may be connected to a speaker of the audio-visual device, so that after the signal analysis is completed, the video and audio obtained by the analysis are played through the display screen and the speaker.
In the embodiment of the present application, the source signal is a signal transmitted by a signal source connected to the external interface 320, and is used to provide an audio signal and a video signal for an audio-visual device. Since the types of signals processed by the first functional module 312 and the second functional module 313 are different, the different functional modules can only process the corresponding signal types. Therefore, when the source signal is input to the signal processing module 310, the signal processing module 310 needs to detect the source signal received by the functional module, and after confirming that the functional module can process the received source signal, each functional module can process the source signal.
It should be appreciated that the types of signals that each functional module is capable of handling are different, and thus, for the output 220 and the functional module, the source signals that it receives may include a target source signal and other source signals. The target source signal is a source signal of the same type as the signal that can be processed by the functional module connected to the output terminal 220, and the other source signals are source signals of different types as the signal that can be processed by the functional module connected to the output terminal 220.
Thus, for the first functional module 312 and the second functional module 313, both correspond to different target source signals and other source signals. For example, the target source signal of the first functional module 312 is a source signal with a signal type that is a video signal, and the other source signals are source signals with a signal type that is not a video signal; similarly, the target source signal of the second functional module 313 is a source signal with a signal type that is an audio signal, and the other source signals are source signals with a signal type that is not an audio signal.
In some embodiments of the present application, in order to facilitate monitoring, and because the problem that the picture of the audio-visual device cannot be displayed normally occurs when the video signal is accessed in error, the output terminal 220 connected to the first functional module 312 may be detected by the signal processing module 310. When the signal received by the first functional module 312 is detected to be the target source signal, the signal is directly processed by the first functional module 312; when the signal received by the first functional module 312 reaches other source signals, the switching circuit 230 is controlled to switch the connection relationship between the input terminal 210 and the output terminal 220 until the first functional module 312 detects that the target source signal is received. Thus, in some embodiments of the present application, the target source signal may be a source signal whose signal type is a video signal, and the other source signals are source signals whose signal type is not a video signal.
It should be understood that the signal types in the target source signal and the other source signals are only one exemplary embodiment of the present application, and the embodiment of the present application may also determine by detecting the signal types received by the second functional module 313, so that the signal types in the target source signal and the other source signals may also be other types, and the present application is not limited herein.
Taking the signal processing module 310 as an example of detecting the output end 220 connected to the first functional module 312, after the user accesses the signal source to the external interface 320, the signal processing module 310 can detect the output end 220 connected to the first signal input interface 311a on the first functional module 312, so as to determine the signal type of the source signal received by the signal processing module. If the signal processing module 310 detects that the first signal input interface 311a receives other source signals, the switching circuit 230 is controlled to switch the connection relationship between the plurality of input terminals 210 and the plurality of output terminals 220 until the signal processing module 310 detects that the signal received by the first signal input interface 311a is the target source signal.
It should be appreciated that the signal processing module 310 may obtain whether the source signal is a target source signal or other source signals by detecting the signal type of the source signal received by the first functional module 312. The first signal input interface 311a of the first functional module 312 and the output terminal 220 connected to the first signal input interface 311a are in one-to-one correspondence with the first functional module 312. Accordingly, the signal processing module 310 may also determine whether the first functional module 312 receives the target source signal by detecting the type of signal received by the first signal input interface 311a or the output 220 connected to the first signal input interface 311 a.
As shown in fig. 3, in some embodiments of the present application, an AV interface is taken as an example, and may include three sub-interfaces 321, which may receive a video signal and left and right channel audio signals, respectively. On this basis, the input terminal 210 and the output terminal 220 each need to be provided with at least three, so as to receive source signals inputted through the three sub-interfaces 321, respectively.
Correspondingly, three functional modules for processing the input source signals are also provided, wherein the three functional modules comprise a first functional module 312 and two second functional modules 313, so that different kinds of source signals are respectively received through the first functional module 312 and the second functional module 313 and are respectively subjected to signal processing.
Fig. 4 is a schematic structural diagram of another interface anti-reverse-plug circuit according to an embodiment of the present application.
On this basis, as shown in fig. 4, the N input terminals 210 may include a first input terminal 211 and M other input terminals 212, and the first input terminal 211 and the other input terminals 212 are respectively connected to one sub-interface 321. Thus, the first input 211 and the other input 212 may receive a source signal transmitted from a signal source after the sub-interface 321 is connected to the signal source. Wherein M is a positive integer greater than 1 and M is less than N.
It should be understood that the external interface 320 and the sub-interface 321 can receive the source signal only after the signal source is connected, so that the type of the signal received by the sub-interface 321 is related to the signal source plugged by the sub-interface 321, and is not related to the arrangement mode of the sub-interface 321. Therefore, the connection and arrangement between the sub-interface 321 and the first input terminal 211 and the other input terminals 212 shown in fig. 4 are only examples, and in the embodiment of the present application, the first input terminal 211 and the other input terminals 212 may be connected to any sub-interface 321 that is not connected to the input terminal 210, and the arrangement of the first input terminal 211 and the other input terminals 212 and the sub-interface 321 is not limited.
Further, the N output terminals 220 include a first output terminal 221 and M other output terminals 222, where the first output terminal 221 is connected to the first signal input interface 311a of the first functional module 312, and at least two other output terminals 222 are respectively connected to the second signal input interfaces 311b of the at least two second functional modules 313 one by one. The second signal input interface 311b is a signal input interface 311 on the signal processing module 310, specifically, the second signal input interface 311b may be other interfaces of the signal input interface 311 except the first signal input interface 311a, and the second signal input interfaces 311b are respectively connected with the second functional modules 313 one by one, so that the second functional modules 313 can receive the source signals through the second signal input interface 311 b.
As shown in fig. 4, in the embodiment of the present application, the M other input terminals 212 may include a second input terminal 212a and a third input terminal 212b, and the M other output terminals 222 may include a second output terminal 222a and a third output terminal 222b. In the case that the signal source plugging order is correct, the first output 221 can receive and output a source signal of a first media type, the second output 222a can receive and output a first source signal of a second media type, and the third output 222b can receive and output a second source signal of the second media type, where the first media type is different from the second media type.
Taking the external interface 320 as an AV interface as an example, the source signal of the first media type may be a video signal, the source signal of the second media type may be an audio signal, and the first and second source signals of the second media type may be left and right channel audio signals. It should be understood that in the scenario where the signal source splicing order is correct, the second output terminal 222a and the third output terminal 222b shown in fig. 4 are only examples for receiving the audio signals of the left channel and the right channel, and the first channel source signal of the second media type received by the second output terminal 222a may also be the right channel audio signal, and the second channel source signal of the second media type received by the third output terminal 222b is the left channel audio signal, which is not limited in the present application.
Meanwhile, in some embodiments of the present application, since the left and right channels do not affect the processing of the audio signal by the second functional module 313, when the first source signal and the second source signal of the second input end 212a and the third input end 212b are connected in reverse, the switching between the left and right channels can be implemented by setting the audio-visual device, and no line or signal source is required to be switched.
In the embodiment of the present application, the N input ends 210 and the N output ends 220 are connected through the switching circuit 230, and the connection relationship between the input ends 210 and the output ends 220 is changed along with the switching of the switching circuit 230 because the connection relationship between the input ends 210 and the output ends 220 can be switched through the switching circuit 230.
In order to switch the connection between the input terminal 210 and the output terminal 220, as shown in fig. 4, the switching circuit 230 includes a first switch 231 and M other switches 232, and the first switch 231 is disposed between the first input terminal 211 and the first output terminal 221, where the first switch 231 can receive and respond to a first control signal to switch on and off a path between the first input terminal 211 and the first output terminal 221.
And each other switch 232 is connected to at least one other input 212, the first output 221 and at least one other output 222. Wherein the number of other inputs 212 is the same as the number of other switches 232, so that each other input 212 can be connected in a one-to-one correspondence with the other switches 232.
The other switch 232 is capable of receiving and responding to the second control signal to switch the conductive relationship between the other input terminal 212 connected thereto and the first output terminal 221 and the other output terminal 222. For example, after receiving the second control signal, the other switch 232 may change the conduction relationship between the input terminal 210 and the output terminal 220 to the conduction between the other input terminal 212 and the first output terminal 221 or to the conduction between the other input terminal 212 and the other output terminal 222 according to the second control signal.
In order to facilitate the description of the change in switching of the switching circuit 230, in the embodiment of the present application, an initial state of the switching circuit 230, and a switching state of the switching circuit 230 are provided. Taking the external interface 320 as an AV interface as an example, the M other input terminals 212 include a second input terminal 212a and a third input terminal 212b, in an initial state of the switching circuit 230, the first input terminal 211 may be connected to the first output terminal 221 through the switching circuit 230, the second input terminal 212a may be connected to the second output terminal 222a through the switching circuit 230, and the third input terminal 212b may be connected to the third output terminal 222b through the switching circuit 230.
One of the other switches 232 is connected to the second input terminal 212a, the first output terminal 221 and the second output terminal 222a, and the other switches 232 can control the conduction relationship between the second input terminal 212a and the first output terminal 221, the second output terminal 222 a. In some embodiments, to connect the first input terminal 211 with the second output terminal 222a, the other switch 232 may also be connected to the first input terminal 211, so as to switch the corresponding connection relationship between the input terminal 210 and the output terminal 220 to connect the first input terminal 211 with the second output terminal 222 a.
Another other switch 232 is connected to the third input end 212b, the first output end 221 and the third output end 222b, and the other switch 232 can control the connection relationship between the third input end 212b and the first output end 221, the third output end 222 b. In some embodiments, to connect the first input terminal 211 and the third output terminal 222b, the fourth switch 232 may also be connected to the first input terminal 211, so as to switch the corresponding connection relationship between the input terminal 210 and the output terminal 220 to connect the first input terminal 211 and the third output terminal 222 b.
As shown in fig. 4, in the initial state of the switching circuit 230, the first switching switch 231 communicates the path between the first input terminal 211 and the first output terminal 221, so that the source signal received by the first input terminal 211 can be transmitted to the first output terminal 221. Further, in the initial state of the switching circuit 230, the two other switches 232 can control the conduction relationship between the second input terminal 212a and the second output terminal 222a and between the third input terminal 212b and the third output terminal 222b, respectively, so that the source signals received by the second input terminal 212a and the third input terminal 212b can be sent to the second output terminal 222a and the third output terminal 222b.
It should be appreciated that, when the switching circuit 230 is in the initial state, the signal source accessed by the sub-interface 321 connected to the first input terminal 211 needs to input the target source signal corresponding to the first functional module 312, so that the first functional module 312 can process the source signal. When the switching circuit 230 is in the initial state, the signal processing module 310 detects that the source signal input by the sub-interface 321 connected to the first input end 211 is other source signals, that is, the source signal that cannot be resolved by the first functional module 312, and at this time, the signal processing module 310 may send the first control signal and the second control signal to the first switching switch 231 and the other switching switches 232, respectively, so as to switch the corresponding connection relationship between the input end 210 and the output end 220 through the switching circuit 230.
For example, the first control signal may be sent to the first switch 231, and after receiving the first control signal, the first switch 231 may interrupt a path between the first input terminal 211 and the first output terminal 221 in response to the first control signal, thereby preventing other source signals from being input into the first functional module 312.
Meanwhile, the second control signal may be sent to the other switch 232, and after receiving the second control signal, the other switch 232 may respond to the second control signal to connect the first input end 211 with the other output end 222, and connect the input end 210 that is originally correspondingly turned on with the other output end with the first output end 221, so as to switch the corresponding connection relationship between the input end 210 and the output end 220, so as to provide the corresponding target source signals for the first functional module 312 and the second functional module 313 respectively.
It should be noted that, during the control process of the switching circuit 230, the signal processing module 310 enables each output terminal 220 to have an input terminal 210 connected thereto, and when the switching circuit 230 receives the control signal to enter the switching state, only one other switch 232 in the switching circuit 230 is in the switching state. In this way, it is avoided that one output terminal 220 is simultaneously connected to a plurality of input terminals 210, so that each output terminal 220 can receive a source signal, stability of the switching circuit 230 during switching is improved, and conflicts between input source signals are avoided.
Because in some embodiments the other input 212 includes a second input 212a and a third input 212b, the other output 222 includes a second output 222a and a third output 222b. Therefore, to implement the switching of the second input end 212a and the second output end 222a and the third input end 212b and the third output end 222b, the other switches 232 include the second switch 232a and the third switch 232b, so as to provide the connection switching function for the second input end 212a and the second output end 222a and the third input end 212b and the third output end 222b, respectively.
The second switching switch 232a may be connected to the first input terminal 211, the first output terminal 221, the second input terminal 212a, and the second output terminal 222a, respectively, so as to switch the output terminal 220 corresponding to the first input terminal 211 and the second input terminal 212a to be turned on by responding to the second control signal.
And the third switch 232b may be connected to the first input terminal 211, the first output terminal 221, the third input terminal 212b, and the third output terminal 222b, respectively, so as to switch the output terminal 220 corresponding to the first input terminal 211 and the third input terminal 212b to be turned on in response to the second control signal.
For example, in performing the switching, the second switch 232a may be used to conduct the first input terminal 211 with the second output terminal 222a, and conduct the second input terminal 212a with the first output terminal 221; the first input terminal 211 is further electrically connected to the third output terminal 222b and the third input terminal 212b is electrically connected to the first output terminal 221 via the third switch 232 b.
To achieve a connection to the input 210 and the output 220, the further switch 232 may be provided with at least three pins, one of which is connected to the further input 212 and the other two of which are connected to the first output 221 and the further output 222, respectively, so that signals transmitted by the signal source can be transmitted from the further input 212 to the first output 221 or the further output 222 via the switch.
In this embodiment, the corresponding connection relationship of the pins may be controlled by the second control signal. For example, after the other switch 232 receives the second control signal, the other input 212 may be controlled to be connected to the other output 222 or the first output 221 according to the second control signal and turned on.
In some embodiments of the present application, the other switch 232 may include four pins, and the added pins are connected to the first input terminal 211 compared to the three pins described above, so as to realize the functions of conducting the first input terminal 211 and the other output terminal 222 and conducting the other input terminal 212 and the first output terminal 221.
When the signal processing module 310 detects that the source signal received by the first functional module 312 is another source signal, the signal processing module sends a second control signal to the other switch 232, and after receiving the second control signal, the other switch 232 may switch the connection mode to the connection mode in which the first input terminal 211 and the other output terminal 222 are turned on and the other input terminal 212 and the first output terminal 221 are turned on in response to the second control signal.
When the switching circuit 230 is in the initial state, the pins connected to the first input terminal 211 in the other switches 232 may not overlap with other lines, so as to avoid transmitting the target source signal input by the first input terminal 211 to the other output terminals 222.
When the other switch 232 receives the second control signal, it will respond to the second control signal to turn on the first input terminal 211 and the other output terminals 222, and turn on the other input terminals 212 and the first output terminal 221, so as to switch the output terminal 220 correspondingly connected to the first input terminal 211 and the other input terminals 212.
The structure of the other switch 232 will be exemplarily described with reference to fig. 5, 6, and a scenario in which the external interface 320 is an AV interface.
It should be understood that in a scenario where the AV interface is applied to an audio visual device as the external interface 320 for video signals and audio signals, there is one transmission line of the video signals and two transmission lines of the audio signals. In the present embodiment, two other switches 232 are provided, and two other switches 232 are respectively disposed between the second input end 212a and the second output end 222a and between the third input end 212b and the third output end 222b, so that when the switching circuit 230 is in the initial state, two audio signals are smoothly transmitted to the two second functional modules 313.
Fig. 5 is a schematic structural diagram of a second switch in an embodiment of the present application, and fig. 6 is a schematic structural diagram of a third switch in an embodiment of the present application.
As shown in fig. 5 and 6, the other switches 232 may include a second switch 232a and a third switch 232b. In some embodiments of the present application, the second switch 232a and the third switch 232b may be double pole double throw switches, and the switching circuit 230 may better implement line switching through the double pole double throw switches, so as to reduce the occurrence of unstable connection in the switching process.
It should be appreciated that a double pole double throw switch has six pins. As shown in fig. 5, the second switch 232a may include a first input pin 2321a, a second input pin 2321b, a first output pin 2322a, a second output pin 2322b, a third output pin 2322c, and a fourth output pin 2322d. As shown in fig. 6, the third switch 232b may include a third input pin 2321c, a fourth input pin 2321d, a fifth output pin 2322e, a sixth output pin 2322f, a seventh output pin 2322g, and an eighth output pin 2322h.
As shown in fig. 5, in the second switch 232a, the first input pin 2321a is connected to the first input terminal 211, the second input pin 2321b is connected to the second input terminal 212a, the first output pin 2322a is connected to the first output terminal 221, and the second output pin 2322b, the third output pin 2322c, and the fourth output pin 2322d are connected to the second output terminal 222 a.
After the second switch 232a receives the second control signal, the second input pin 2321b may be connected to the first output pin 2322a or the second output pin 2322b in a lap joint manner in response to the second control signal, so that the second input pin 2321b is conducted with the first output pin 2322a or the second output pin 2322b, and thereby the second input end 212a and the first output end 221 or the second input end 212a and the second output end 222a are conducted. The third output pin 2322c may also be connected to the first input pin 2321a or the fourth output pin 2322d in a lap joint manner in response to the second control signal, so that the third output pin 2322c is connected to the first input pin 2321a or the fourth output pin 2322d, and thus the line between the first input end 211 and the second output end 222a is connected or disconnected.
It should be appreciated that the components for responding to the second control signal are actually lap joint components provided on the second input pin 2321b and the third output pin 2322c for lap joint of other pins. In practical application of the second switch 232a, the lap joint components on the second input pin 2321b and the third output pin 2322c are interlocked in response to the received second control signal, so that the second switch 232a has two states, namely an initial state as shown in fig. 5 (a) and a switching state as shown in fig. 5 (b). Specifically, in the initial state, the second input pin 2321b in the second switch 232a is overlapped with the second output pin 2322b, and the third output pin 2322c is overlapped with the fourth output pin 2322 d; in the switching state, the second input pin 2321b of the second switch 232a is overlapped with the first output pin 2322a, and the third output pin 2322c is overlapped with the first input pin 2321 a.
As shown in fig. 6, in the third switch 232b, the third input pin 2321c is connected to the first input terminal 211, the fourth input pin 2321d is connected to the third input terminal 212b, the fifth output pin 2322e is connected to the first output terminal 221, and the sixth output pin 2322f, the seventh output pin 2322g, and the eighth output pin 2322h are connected to the third output terminal 222 b.
After the third switch 232b receives the second control signal, the fourth input pin 2321d may be connected to the fifth output pin 2322e or the sixth output pin 2322f in a lap joint manner in response to the second control signal, so that the fourth input pin 2321d is conducted with the fifth output pin 2322e or the sixth output pin 2322f, and thereby the third input end 212b is conducted with the first output end 221 or the third input end 212b is conducted with the third output end 222 b.
Further, after the third switch 232b receives the second control signal, the seventh output pin 2322g may be connected to the third input pin 2321c or the eighth output pin 2322h in a lap joint manner in response to the second control signal, so that the seventh output pin 2322g is connected to the third input pin 2321c or the eighth output pin 2322h, so as to connect or disconnect the line between the first input end 211 and the third output end 222 b.
Similar to the aforementioned structure in the second switch 232a, in this embodiment, the component for responding to the second control signal in the third switch 232b is actually a lap joint component for lap joint of other pins provided on the fourth input pin 2321d and the seventh output pin 2322 g. In practical application of the third switch 232b, the lap joint components on the fourth input pin 2321d and the seventh output pin 2322g are interlocked in response to the received second control signal, so that the third switch 232b has two states as well, namely an initial state as shown in fig. 6 (a) and a switching state as shown in fig. 6 (b). Specifically, in the initial state, the fourth input pin 2321d in the third switch 232b is overlapped with the sixth output pin 2322f, and the seventh output pin 2322g is overlapped with the eighth output pin 2322 h; in the switching state, the fourth input pin 2321d of the third switch 232b is overlapped with the fifth output pin 2322e, and the seventh output pin 2322g is overlapped with the third input pin 2321 c.
It should be noted that at most one of the second switch 232a and the third switch 232b may be in a switching state, and only the two overlapping states exist in the second switch 232a and the third switch 232b in order to protect the transmission stability of the source signal.
It should be understood that the structures of the second switch 232a and the third switch 232b are only exemplary, and the structures thereof may be optimized in practical applications, and the structures of the second switch 232a and the third switch 232b may be the same or different, which is not described herein.
Since the second switch 232a and the third switch 232b have only two overlapping states, in order to control the second switch 232a and the third switch 232b, signals having only two states can be used to control them, and at the same time, the complexity of the signals sent by the signal processing module 310 is reduced.
For example, the second control signal sent by the signal processing module 310 may be a voltage signal, which may include a high voltage signal and a low voltage signal, and the second switch 232a and the third switch 232b may switch the state of the switch by the voltage level in the received voltage signal.
In the second switch 232a, when receiving the low voltage signal, the second input pin 2321b may be turned on to the second output pin 2322b, and the third output pin 2322c may be turned on to the fourth output pin 2322d, so that the second input end 212a and the second output end 222a are turned on; when a high voltage signal is received, the second input pin 2321b is turned on to the first output pin 2322a, and the third output pin 2322c is turned on to the first input pin 2321a, so that the second input end 212a is turned on to the first output end 221, and the first input end 211 is turned on to the second output end 222 a.
In the third switch 232b, when a low voltage signal is received, the fourth input pin 2321d may be turned on with the sixth output pin 2322f, and the seventh output pin 2322g may be turned on with the eighth output pin 2322h, so that the third input end 212b and the third output end 222b may be turned on; when a high voltage signal is received, the fourth input pin 2321d is turned on to the fifth output pin 2322e, and the seventh output pin 2322g is turned on to the third input pin 2321c, so that the third input end 212b is turned on to the first output end 221, and the first input end 211 is turned on to the third output end 222 b.
As can be seen from the state switching of the other switches 232, the switching circuit 230 provided with a plurality of other switches 232 has a plurality of switching states. In some embodiments, the signal processing module 310 does not determine the type of the source signal received by the second functional module 313, but sends the second control signal to each of the plurality of other switches 232 to control one of the other switches 232 to be in a switching state, so as to switch the conduction relationship between the input terminal 210 and the output terminal 220 connected to the other switch 232 in the switching state.
If the source signal received by the first functional module 312 is still another source signal after the other switch 232 is switched, the signal processing module 310 sends a second control signal to the other switch 232 to control the other switch 232 to restore to the initial state, and sends a second control signal to the other switch 232 to control the other switch 232 to switch the connection correspondence between the input end 210 and the output end 220 until different functional modules in the signal processing module 310 can all receive the corresponding target source signals. When the switching circuit 230 is in the switching state, only one other switching switch 232 is in the switching state at the same time.
For example, the switching circuit 230 is provided with a second switch 232a and a third switch 232b, when the switching circuit 230 is in an initial state, the signal processing module 310 may send low voltage signals to the second switch 232a and the third switch 232b, respectively, where the second switch 232a and the third switch 232b are in the initial state, the second input pin 2321b is conducted with the second output pin 2322b, the third output pin 2322c is conducted with the fourth output pin 2322d, the fourth input pin 2321d is conducted with the sixth output pin 2322f, and the seventh output pin 2322g is conducted with the eighth output pin 2322h, so that the first input terminal 211 and the first output terminal 221 are conducted, the second input terminal 212a and the second output terminal 222a are conducted, and the third input terminal 212b and the third output terminal 222b are conducted.
After the signal type of the source signal output by the first output terminal 221 is not the target source signal, the signal processing module 310 may send a high voltage signal to the second switch 232a and continue to send a low voltage signal to the third switch 232b, so as to control the second switch 232a to be in a switching state and keep the third switch 232b unchanged. And simultaneously, the communication between the first input terminal 211 and the first output terminal 221 is interrupted by the first control signal, thereby conducting the second input terminal 212a to the first output terminal 221 and conducting the first input terminal 211 to the second output terminal 222 a.
If the signal type of the source signal output at the first output terminal 221 is still not the target source signal after switching, the signal processing module 310 may send a low voltage signal to the second switch 232a and a high voltage signal to the third switch 232b to control the second switch 232a to restore to the initial state and make the third switch 232b to be in the switching state, and simultaneously interrupt the communication between the first input terminal 211 and the first output terminal 221 through the first control signal, so as to conduct the third input terminal 212b with the first output terminal 221 and conduct the first input terminal 211 with the third output terminal 222b.
In this way, two paths of source signals can be prevented from being transmitted to the same output end 220, the signal processing module 310 can control the first switch 231 and the other switches 232 by sending signals with high voltage or low voltage, so that the complexity of the sent control signals is reduced, the complexity of instructions is reduced, the overall structural complexity of the switching circuit 230 is reduced, and the operation reliability of the interface anti-reverse-insertion circuit is improved.
The first control signal is a generic term of a control signal generated in the signal processing module 310 and transmitted to the first switch 231, and the first control signal may include any one of a signal for interrupting the line of the first switch 231 and a signal for conducting the line of the first switch 231. Similarly, the second control signal is merely a generic term for the control signal generated in the signal processing module 310 and transmitted to the other switch 232, and the second control signal may include any one of a signal for causing the other switch 232 to be in the switch state and a signal for causing the other switch 232 to return to the initial state.
In some embodiments, since the external interface 320 is in a scenario including a plurality of sub-interfaces 321, each sub-interface 321 needs to be plugged with a signal source to realize input of a source signal, the signal processing module 310 may be provided with an activating unit, and after the interface plugs with the signal source and receives the source signal, the signal processing module 310 is activated and detects a type of the source signal received by the first functional module 312.
It should be noted that the above-mentioned activation detection method is only an exemplary implementation manner in the embodiments of the present application, and the signal processing module 310 may be activated in other manners, for example, in a case where the signal processing module 310 has power supply, the plugging state of the interface or the signal input state of the first functional module 312 is periodically detected, so as to obtain whether the first functional module 312 has an active signal input, which is not described herein.
Fig. 7 is a schematic diagram of a switching circuit according to an embodiment of the application.
In some embodiments of the present application, in order to realize control of the switching circuit 230, as shown in fig. 7, control pins are disposed on the first switch 231 and the other switches 232, where the control pin on the first switch 231 is a first control pin 2311, and the control pin on the other switches 232 is a second control pin 2323. The first control pin 2311 and the second control pin 2323 may be respectively connected with the signal processing module 310, so that the first switch 231 and the other switches 232 may obtain the first control signal and the second control signal transmitted by the signal processing module 310 through the control pins.
The signal processing module 310 may detect the source signal received by the signal processing module 310 by detecting the source signal received by the first signal input interface 311a in communication with the first functional module 312. For example, after detecting that the source signal received by the first functional module 312 through the first signal input interface 311a is another source signal, the signal processing module 310 generates a first control signal and a second control signal, and then sends the control signals to the first switch 231 and the other switches 232 through the first control pin 2311 and the second control pin 2323, respectively, to control the switching circuit 230.
Illustratively, as shown in fig. 7, the first switch 231 may be an NMOS transistor. It should be understood that the NMOS transistor has a drain, a source, and a gate, where D represents the drain, S represents the source, and G represents the gate. The drain electrode of the NMOS tube is connected to the first input end 211 of the interface anti-reverse-insertion line through a line, and the source electrode of the NMOS tube is connected to the first output end 221 of the interface anti-reverse-insertion line through a line, so that the NMOS tube can transmit a source signal from the first input end 211 to the first output end 221 when being turned on. The gate is the first control pin 2311 of the first switch 231, and the gate can receive the first control signal from the signal processing module 310, so as to control the NMOS transistor.
Thus, in some embodiments, the first control signal may be the same as the second control signal, and may also include a low voltage signal and a high point signal. The gate of the NMOS transistor can turn on the drain-to-source line when receiving the high voltage signal, so that the source signal can be transmitted from the drain to the source and then to the first output terminal 221. Correspondingly, when the NMOS transistor receives the low voltage signal, the drain-to-source line is interrupted, so that the source signal input by the first input terminal 211 is no longer output through the first output terminal 221.
As can be seen from the above embodiment, when the first switch 231 is an NMOS transistor, the first switch 231 can receive a high voltage signal to turn on the line between the first input terminal 211 and the first output terminal 221, so that the line where the first switch 231 is located is in an initial state. In the above embodiment, the other switches 232 need to receive the low voltage signal to make the circuit of the other switches 232 in the initial state, so that the control signals input to the first switch 231 and the other switches 232 are different, which is inconvenient for the signal processing module 310 to send.
Fig. 8 is a schematic diagram of another switching circuit according to an embodiment of the application.
In some embodiments of the present application, in order to make the first control signal and the second control signal have a logic correlation, as shown in fig. 8, a fourth switch 233 is further disposed on the switch circuit 230, and the fourth switch 233 is disposed on a line between the signal processing module 310 and the first control pin 2311. The fourth switch 233 may control the first switch 231 by receiving the second control signal and generating a corresponding first control signal according to the second control signal.
In order to perform functions such as signal receiving, signal generating, and signal transmitting, the fourth switch 233 may be a nor gate module, and specifically, the fourth switch 233 may be provided with two receiving ends and one transmitting end, where the two receiving ends are respectively connected to the signal processing module 310, so as to respectively receive the second control signals sent by the signal processing module 310 to different other switches 232. The fourth switch 233 can generate a corresponding first control signal according to the content of the received second control signal, and send the corresponding first control signal to the first switch 231 through the sending end and the first control pin 2311 connected with the sending end.
In the case that one first switch 231 and two other switches 232 are provided in the switching circuit 230, the two receiving ends are respectively connected in parallel with the second control pins 2323 of the two other switches 232, so as to be capable of receiving the second control signals sent by the signal processing module 310 at the same time. Meanwhile, when the second control signal sent by the signal processing module 310 is a voltage signal, the parallel structure does not affect the actual voltage of the second control signal, and the voltages of the second control signals received by the other switches 232 and the fourth switch 233 can be the same, so that the subsequent fourth switch 233 can generate the first control signal.
It should be appreciated that the nor gate module has the property of outputting a high voltage signal when the received signals are both low voltage signals, and outputting a low voltage signal when the received signals include at least one high voltage signal. Therefore, when the two other switches 232 are in the initial state, the fourth switch 233 sends a high voltage signal to the first switch 231, so that the first switch 231 is turned on. If any other switch 232 is in the switching state, the first control signal output by the fourth switch 233 is a low voltage signal, so that the connection of the first switch 231 is interrupted, and the line conduction state between the first input terminal 211 and the first output terminal 221 is interrupted, so as to realize the switching of the input terminal 210 and the output terminal 220.
Further, in order to operate the switching circuit 230, as shown in fig. 8, a third control pin 2324 is further provided on each of the other switches 232, and the third control pin 2324 is also connected to the signal processing module 310, and after detecting the active signal input, the signal processing module 310 may send an enable signal to the other switches 232 to enable each of the other switches 232. The other switches 232 may also receive the enable signal sent by the signal processing module 310 through the third control pin 2324 to enable the other switches 232.
It should be appreciated that in order to achieve proper operation of the other switch 232 and the fourth switch 233, both need to be powered to maintain their proper function. Illustratively, the interface anti-reverse circuit may further include an energy line coupled to the switching circuit 230 to provide operating energy to the switching circuit 230 via the energy line. For example, the energy source circuit may be a voltage conversion module, and generate a constant voltage electric signal with a voltage of 3V by receiving the electric energy transmitted by the power line, and send the constant voltage electric signal to the other switch 232 and the fourth switch 233, so as to provide electric energy for the other switch 232 and the fourth switch 233.
In some embodiments, the switching circuit 230 may also be coupled to a power source of the audio-visual device, so that the switching circuit 230 is supported to implement the switching function by the power source drawing power.
It should be noted that the above-mentioned manner of providing the electric power is only one possible embodiment of the present application, and the manner of providing the electric power to the other switch 232 and the fourth switch 233 is not limited in the present application.
In some embodiments of the present application, since the other switch 232 and the fourth switch 233 need to be connected to electrical energy, the other switch 232 and the fourth switch 233 may also be provided with a grounding pin, and the grounding pin may be connected to a ground wire or a grounding device of the audio-visual device, so as to avoid damage caused by leakage of the interface anti-reverse circuit.
Fig. 9 is a schematic diagram of an interface anti-reverse-insertion method in an embodiment of the present application, fig. 10 is a schematic diagram of an interface anti-reverse-insertion circuit in an initial state in an embodiment of the present application, fig. 11 is a schematic diagram of an interface anti-reverse-insertion circuit in a line switching state in an embodiment of the present application, and fig. 12 is a flow diagram of an interface anti-reverse-insertion method in an embodiment of the present application.
On the basis of the interface anti-reverse-insertion circuit provided in the above embodiment, the embodiment of the application also provides an interface anti-reverse-insertion method. As shown in fig. 9, the method includes:
s100: and sending an initial signal to the interface anti-reverse plug circuit.
S200: and accessing a signal source and determining an external interface to which the signal source is accessed.
S300: the source signals are respectively received through a plurality of external interfaces and are respectively sent to a plurality of signal input interfaces.
S400: and if a first signal input interface in the plurality of signal input interfaces receives other source signals, generating a control signal.
S500: and sending a control signal to the interface anti-reverse plug circuit.
S600: and responding to the control signal, and switching the external interface corresponding to the communication of the first signal input interface until the first signal input interface receives the target source signal.
The implementation of the method for preventing interface back-insertion will be described in detail with reference to fig. 9, 10, 11 and 12.
In this embodiment, the interface anti-reverse-insertion method is described by an interface anti-reverse-insertion circuit as shown in fig. 10.
As shown in fig. 9 and 12, first, when the audio-visual device has no signal source connected thereto, the audio-visual device generally needs to be maintained in an initial state as shown in fig. 10, and thus the signal processing module 310 needs to transmit an initial signal to the interface anti-reverse-plug circuit.
The initial signal is a signal for maintaining the interface anti-reverse-plug circuit in an initial state. For example, the initial signal may include a second control signal sent by the signal processing module 310, where the second control signal is a low voltage signal, so as to control the interface anti-reverse-plug circuit to be in an initial state. It should be appreciated that the bold lines in fig. 10 and 11 represent the flow lines of the source signals.
And then the user can connect the signal source to the audio-visual equipment by plugging the signal line corresponding to the interface to the external interface 320. Then, according to the plugged external interface 320, the signal source that needs to be processed by the signal processing module 310 is determined, so as to perform subsequent source signal input and processing.
Taking the example of selecting an AV interface by a user, the user can randomly plug three AV wires and set a signal source as a composite video signal, so that the AV interface is determined as an external interface 320 to which the signal source is connected, and the source signal input function of the audio-visual equipment is realized through the external interfaces 320. As shown in fig. 10, the first output 221 is configured to receive a video signal, the second output 222a is configured to receive a left channel audio signal, and the third output 222b is configured to receive a right channel audio signal.
As shown in fig. 12, after receiving source signals through the external interfaces 320 and sending the source signals to the signal input interfaces 311, the signal processing module 310 detects whether the first signal input interface 311a receives a target source signal. If the signal processing module 310 detects that the first signal input interface 311a receives the target source signal, the signal processing module 310 may upload the message of the received source signal internally, and distinguish the audio signals received by the two second signal input interfaces 311b from each other in the left and right channels, if the audio signals of the left and right channels are reversed, the information of the reversed left and right channels can be prompted through the display screen of the audio-visual device, and the user can switch the audio played in the left and right channels through the interface displayed in the display screen, so that the content played in the left and right channels is consistent with the content corresponding to the actual audio signals.
And when the audio signals of the left channel and the right channel are not connected reversely, the pairing process of the signals and the line is completed. It should be understood that the switching play of the left and right channel sounds may be implemented by a left and right channel switching function commonly used on an audio-visual device, which is not described herein. In some embodiments of the present application, only before source signal processing is performed, the video signal is switched to the corresponding line, so as to avoid affecting the video display of the audio-visual device.
If the signal processing module 310 detects that the first signal input interface 311a receives other source signals, the signal processing module 310 may internally upload a message that the source signal is not received and modify the second control signal transmitted by the signal processing module 310. As shown in fig. 10, the signal processing module 310 may send a high voltage signal to the second switch 232a and a low voltage signal to the third switch 232b, thereby obtaining the switching state of the interface anti-reverse plug circuit as shown in (a) of fig. 11. The first input 211 is now connected to the second output 222a, and the second input 212a is now connected to the first output 221, so that the source signal is transmitted.
At this time, the signal processing module 310 may continuously detect whether the first signal input interface 311a receives the target source signal by the above detection method, and the specific detection process and the subsequent operation refer to the above implementation process, which is not described herein.
If it is still detected that the first signal input interface 311a receives other source signals, the signal processing module 310 may internally upload a message that the source signal is not received, and change the second control signal sent by the signal processing module 310. As shown in fig. 10, the signal processing module 310 may transmit a low voltage signal to the second switching switch 232a and a high voltage signal to the third switching switch 232b, thereby reaching a switching state of the interface anti-reverse-plug circuit as shown in (b) of fig. 11. The first input 211 is now connected to the third output 222b, and the third input 212b is now connected to the first output 221, so that the source signal is transmitted.
The signal processing module 310 detects whether the first signal input interface 311a receives the target source signal by the above detection method, and the specific detection process and the subsequent operation refer to the above implementation process, which is not described herein. It should be understood that, taking the AV interface connected in the present application as an example, if the first signal input interface 311a does not receive the target source signal in both states shown in fig. 10 and 11 (a), then in the state shown in fig. 11 (b), if the signal source is normal and the user has no other operation, the first signal input interface 311a receives the target source signal, that is, the video signal, so as to complete the pairing of the signal and the interface line.
Fig. 13 is a schematic structural diagram of an electronic device with an interface anti-reverse-plug circuit according to an embodiment of the present application.
On the basis of the interface anti-reverse-plug circuit and the interface anti-reverse-plug method provided in the foregoing embodiments, the present application also provides an electronic device, as shown in fig. 13, including the interface anti-reverse-plug circuit 1350, the plurality of external interfaces 1320, the signal processing module 1310, the display 1330 and the speaker 1340 in any of the foregoing embodiments.
Wherein the signal processing module 1310 includes a plurality of signal input interfaces 1311 and one or more processors 1312, the signal processing module 1310 may be an SOC in some embodiments. The plurality of signal input interfaces 1311 are respectively connected to the plurality of external interfaces 1320 through the interface anti-reverse plug circuit 1350, and the plurality of signal input interfaces 1311 can respectively receive a source signal through one external interface 1320, where the source signal includes a target source signal and other source signals.
Processor 1312 is coupled to a plurality of signal input interfaces 1311 and interface anti-reverse circuit 1350, respectively. The processor 1312 is capable of generating a control signal when a first signal input interface of the plurality of signal input interfaces 1311 receives other source signals, and sending the control signal to a switching circuit of the interface anti-reverse-plug circuit 1350 to control the corresponding communication states of the plurality of external interfaces 1320 and the plurality of signal input interfaces 1311 until the first signal input interface receives the target source signal.
The embodiment of the application also provides a computer storage medium, which comprises computer instructions, when the computer instructions run on the electronic device, the electronic device is caused to execute the functions or steps executed by the electronic device in the embodiment of the method.
Embodiments of the present application also provide a computer program product, which when run on a computer causes the computer to perform the functions or steps performed by the electronic device in the method embodiments described above.
It will be apparent to those skilled in the art from this description that, for convenience and brevity of description, only the above-described division of the functional modules is illustrated, and in practical application, the above-described functional allocation may be performed by different functional modules according to needs, i.e. the internal structure of the apparatus is divided into different functional modules to perform all or part of the functions described above.
It is to be understood that, based on the several embodiments provided in the present application, those skilled in the art may combine, split, reorganize, etc. the embodiments of the present application to obtain other embodiments, which all do not exceed the protection scope of the present application.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of modules or units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another apparatus, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and the parts shown as units may be one physical unit or a plurality of physical units, may be located in one place, or may be distributed in a plurality of different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be essentially or a part contributing to the prior art or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, including several instructions for causing a device (may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read Only Memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
It is noted that other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims (14)

1. An interface anti-reverse-insertion circuit, characterized in that is applied to electronic equipment, electronic equipment still includes signal processing module, the interface anti-reverse-insertion circuit includes:
Each input end is used for receiving a source signal, the source signal comprises a target source signal and other source signals, the N output ends are electrically connected with N signal input interfaces of the signal processing module in a one-to-one correspondence manner, and N is a positive integer greater than 2; the switching circuit is coupled between the N input ends and the N output ends, and the N input ends and the N output ends are conducted in a one-to-one correspondence mode through the switching circuit;
The switching circuit is configured to: when the signal processing module receives other source signals from a first signal input interface of the N signal input interfaces, switching the conduction relation between the N input ends and the N output ends until the signal processing module receives the target source signals from the first signal input interface;
The N input ends comprise a first input end, a second input end and a third input end; the N output ends comprise a first output end, a second output end and a third output end;
the first output end is connected with the first signal input interface, and the second output end and the third output end are respectively and correspondingly and electrically connected with the second signal input interface one by one; the second signal input interface comprises other interfaces of the N signal input interfaces except the first signal input interface;
The switching circuit comprises a first switching switch and other switching switches, wherein the other switching switches comprise a second switching switch and a third switching switch; the first changeover switch is arranged between the first output end and the first input end, and is configured to be used for conducting and disconnecting the first input end and the first output end in response to a first control signal;
the second change-over switch is connected with the first input end, the second input end, the first output end and the second output end, and is configured to conduct the first input end and the second output end and conduct the second input end and the first output end or conduct the second input end and the second output end in response to a second control signal;
The third transfer switch is connected to the first input terminal, the third input terminal, the first output terminal, and the third output terminal, and is configured to conduct the first input terminal and the third output terminal and conduct the third input terminal and the first output terminal, or conduct the third input terminal and the third output terminal, in response to a second control signal.
2. The interface anti-reverse-plug circuit of claim 1, wherein,
The second change-over switch is a double-pole double-throw switch;
The second change-over switch comprises a first input pin, a second input pin, a first output pin, a second output pin, a third output pin and a fourth output pin;
The first input pin is connected with the first input end, the second input pin is connected with the second input end, the first output pin is connected with the first output end, and the second output pin, the third output pin and the fourth output pin are connected with the second output end;
The second switch is further configured to conduct the second input pin with the first output pin or the second output pin and conduct the third output pin with the first input pin or the fourth output pin in response to the second control signal.
3. The interface anti-reverse-plug circuit of claim 1, wherein,
The third change-over switch is a double-pole double-throw switch;
The third change-over switch comprises a third input pin, a fourth input pin, a fifth output pin, a sixth output pin, a seventh output pin and an eighth output pin;
The third input pin is connected with the first input end, the fourth input pin is connected with the third input end, the fifth output pin is connected with the first output end, and the sixth output pin, the seventh output pin and the eighth output pin are connected with the third output end;
The third switch is further configured to conduct the fourth input pin with the fifth output pin or the sixth output pin, and conduct the seventh output pin with the third input pin or the eighth output pin in response to the second control signal.
4. The interface anti-reverse-plug circuit of claim 2, wherein,
The second control signal includes a low voltage signal and a high voltage signal;
the second transfer switch is configured to: if the low voltage signal is received, the second input pin is conducted with the second output pin, the third output pin is conducted with the fourth output pin, and the second input end is conducted with the second output end;
And if the high-voltage signal is received, conducting the second input pin with the first output pin, conducting the third output pin with the first input pin, and conducting the second input end with the first output end and the first input end with the second output end.
5. The interface anti-reverse-plug circuit of claim 3, wherein,
The second control signal includes a low voltage signal and a high voltage signal;
the third transfer switch is configured to: if the low voltage signal is received, the fourth input pin is conducted with the sixth output pin, the seventh output pin is conducted with the eighth output pin, and the third input end is conducted with the third output end;
And if the high-voltage signal is received, conducting the fourth input pin with the fifth output pin, conducting the seventh output pin with the third input pin, and conducting the third input end with the first output end and the first input end with the third output end.
6. The interface anti-reverse-plug circuit of claim 1, wherein,
The first change-over switch comprises a first control pin, and the other change-over switches comprise a second control pin;
the first control pin and the second control pin are respectively connected with the signal processing module;
the first transfer switch is further configured to: receiving the first control signal sent by the signal processing module through the first control pin;
the other switch is further configured to: and receiving the second control signal sent by the signal processing module through the second control pin.
7. The interface anti-reverse-plug circuit of claim 6, wherein,
The switching circuit further comprises a fourth switching switch, and the fourth switching switch is arranged on a line, connected to the first control pin, of the signal processing module;
The fourth transfer switch is configured to generate and output the first control signal according to the second control signal sent by the signal processing module.
8. The interface anti-reverse-plug circuit of claim 7, wherein,
The fourth change-over switch is a NOR gate module; the fourth change-over switch comprises two receiving ends and a transmitting end, the two receiving ends are respectively connected with the signal processing module, and the receiving ends are configured to respectively receive the second control signals sent by the signal processing module to the other change-over switches;
The transmitting end is connected with the first control pin, the fourth change-over switch is configured to output the first control signal with high voltage to the first control pin when the received signals are low-voltage signals according to the second control signal received by the receiving end, and output the first control signal with low voltage to the first control pin when at least one high-voltage signal is included in the received signals.
9. The interface anti-reverse-plug circuit of claim 6, wherein,
The first change-over switch is an NMOS tube, the NMOS tube comprises a drain electrode, a source electrode and a grid electrode, the drain electrode is connected with the first input end, the source electrode is connected with the first output end, and the first control pin is the grid electrode;
the NMOS tube is configured to conduct a line between the drain and the source if the gate receives the first control signal of high voltage.
10. The interface anti-reverse-plug circuit of claim 6, wherein,
The other change-over switches are provided with third control pins which are connected with the signal processing module;
The other switches are further configured to receive an enabling signal sent by the signal processing module through the third control pin to enable the other switches.
11. The interface anti-reverse-plug circuit of claim 1, wherein,
The first output is configured to receive a source signal of a first media type;
the second output is configured to receive a first source signal of a second media type;
The third output is configured to receive a second source signal of a second media type;
The first media type is different from the second media type.
12. The interface anti-reverse-plug circuit according to any one of claims 1 to 11, wherein,
The switching circuit is coupled to a power supply.
13. An electronic device, comprising:
the interface anti-reverse-insertion circuit of any one of claims 1 to 12;
n external interfaces, N is a positive integer greater than 2;
A signal processing module comprising N signal input interfaces and one or more processors;
Wherein: the N signal input interfaces are respectively connected with the N external interfaces through the interface anti-reverse-plug circuit, and are configured to respectively receive a source signal through one external interface; the source signals include a target source signal and other source signals;
The processor is respectively connected with the N signal input interfaces and the interface anti-reverse-plug circuit;
The processor is configured to:
If a first signal input interface of the N signal input interfaces receives the other source signals, generating a control signal;
And sending a control signal to the switching circuit in the interface anti-reverse-insertion circuit so as to switch the conduction relation between the N external interfaces and the N signal input interfaces until the first signal input interface receives the target source signal.
14. An interface anti-reverse-plug method, applied to the electronic device of claim 13, comprising:
Respectively receiving source signals through N external interfaces and respectively sending the source signals to N signal input interfaces; the source signals include a target source signal and other source signals; n is a positive integer greater than 2;
If a first signal input interface of the N signal input interfaces receives the other source signals, a control signal is generated;
sending a control signal to the interface anti-reverse-insertion circuit;
and responding to the control signal, and switching the external interface correspondingly communicated with the first signal input interface until the first signal input interface receives the target source signal.
CN202410108689.3A 2024-01-26 2024-01-26 Interface anti-reverse-plug circuit, method and electronic equipment Active CN117640870B (en)

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CN103702055A (en) * 2013-12-13 2014-04-02 乐视致新电子科技(天津)有限公司 Audio and video signal joint self-identifying system and method
CN111934395A (en) * 2020-09-15 2020-11-13 深圳英集芯科技有限公司 Switching control circuit, charging chip and electronic device

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JP2001333500A (en) * 2000-05-24 2001-11-30 Shintom Co Ltd Av equipment and audio input method for the av equipment
CN200980132Y (en) * 2006-11-01 2007-11-21 源富科技(深圳)有限公司 An automatic signal switch of multiple audio-video
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