CN117623216A - MEMS device, preparation method thereof and electronic device - Google Patents
MEMS device, preparation method thereof and electronic device Download PDFInfo
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- CN117623216A CN117623216A CN202311679748.4A CN202311679748A CN117623216A CN 117623216 A CN117623216 A CN 117623216A CN 202311679748 A CN202311679748 A CN 202311679748A CN 117623216 A CN117623216 A CN 117623216A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
- B81C1/00158—Diaphragms, membranes
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
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Abstract
The invention provides a MEMS device, a preparation method thereof and an electronic device, wherein the method comprises the following steps: providing a substrate, and sequentially forming a first sacrificial layer, a vibrating diaphragm, a second sacrificial layer and a third sacrificial layer on the substrate; forming a first through hole and a second through hole, wherein the first through hole exposes the vibrating diaphragm, and the second through hole exposes the substrate; forming a back plate layer on the third sacrificial layer, wherein the back plate layer covers the bottoms and the side walls of the first through holes and the second through holes; forming a first bonding pad electrically connected with the back plate layer, a second bonding pad electrically connected with the vibrating diaphragm and a third bonding pad electrically connected with the substrate; forming a cavity and a back cavity. According to the scheme of the invention, the second bonding pad and the third bonding pad are respectively electrically connected with the vibrating diaphragm and the substrate through the first through hole and the backboard layer in the second through hole, so that the problems of electrical property failure and the like caused by breakage of the second bonding pad and the third bonding pad on the side wall of the through hole are avoided, the structures of the second bonding pad and the third bonding pad are flatter, the problem of uneven gluing in the subsequent photoresist process is avoided, and the device performance and the product yield are improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an MEMS device, a preparation method thereof and an electronic device.
Background
With the continuous development of semiconductor technology, smart phones, integrated CMOS and microelectromechanical systems (MEMS) devices are increasingly becoming the most dominant and advanced technology in the market of sensor-like products, and with the update of technology, the development is towards small size, high performance and low power consumption.
Among them, the MEMS microphone formed based on the fabrication of the microelectromechanical system (MEMS) process is widely used because of its advantages of small size, low cost, and stable performance compared with the conventional microphone. As shown in fig. 1, the related art MEMS microphone generally includes a substrate 100, a diaphragm 101, a back plate 102, a cavity 103, and a back cavity 104, etc. constituting structures, and converts an acoustic signal into an electrical signal through the diaphragm 101,
typically, as shown in fig. 1, one pad 105 is required to lead out the diaphragm 101, the back plate 102 and the substrate 100, respectively, to be connected to an external circuit. However, the bonding pads in the related art are prone to fracture and other phenomena, resulting in failure of the electrical performance of the device; meanwhile, the subsequent photoresist process is also easy to generate uneven photoresist coating and other phenomena, so that photoresist stripping is difficult or cracks and other phenomena are generated.
Disclosure of Invention
In the summary, a series of concepts in a simplified form are introduced, which will be further described in detail in the detailed description. The summary of the invention is not intended to define the key features and essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In view of the problems existing at present, one aspect of the present invention provides a method for manufacturing an MEMS device, including:
providing a substrate, forming a first sacrificial layer on a first surface of the substrate, forming a vibrating diaphragm on the first sacrificial layer, forming a second sacrificial layer on the vibrating diaphragm and the first sacrificial layer, and forming a third sacrificial layer on the second sacrificial layer;
etching the second sacrificial layer and the third sacrificial layer to form a first through hole, and etching the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a second through hole, wherein the first through hole is exposed out of the vibrating diaphragm, and the second through hole is exposed out of the substrate;
forming a backboard layer on the third sacrificial layer, wherein the backboard layer covers the bottoms and the side walls of the first through hole and the second through hole and is attached to the vibrating diaphragm and the substrate;
forming a first bonding pad, a second bonding pad and a third bonding pad on the back plate layer, wherein the first bonding pad is electrically connected with the back plate layer, the second bonding pad is electrically connected with the vibrating diaphragm through the back plate layer in the first through hole, and the third bonding pad is electrically connected with the substrate through the back plate layer in the second through hole;
And removing part of the second sacrificial layer and the third sacrificial layer to form a cavity, and forming a back cavity on the second surface of the substrate, wherein the cavity and the back cavity are exposed out of the vibrating diaphragm.
Illustratively, the back plate layer includes a bottom dielectric layer and a conductive layer on the bottom dielectric layer, the conductive layer includes a first region, a second region, and a third region that are separated from each other, the back plate layer covers bottoms and sidewalls of the first through hole and the second through hole and is attached to the diaphragm and the substrate, and includes:
the bottom dielectric layer covers the side walls of the first through hole and the second through hole;
the conductive layer of the second area covers the bottom of the first through hole and the bottom medium layer in the first through hole and is attached to the vibrating diaphragm;
the conductive layer in the third region covers the bottom of the second through hole and the bottom dielectric layer in the second through hole and is attached to the substrate.
Illustratively, after forming the conductive layer and before forming the first, second, and third pads, the method further comprises:
and forming an isolation layer in the first through hole and the second through hole, wherein the isolation layer fills the rest parts of the first through hole and the second through hole.
Illustratively, the first bonding pad is electrically connected to the back plane layer, the second bonding pad is electrically connected to the diaphragm through the back plane layer in the first through hole, and the third bonding pad is electrically connected to the substrate through the back plane layer in the second through hole, comprising:
the first bonding pad is positioned on the conductive layer of the first area and is electrically connected with the conductive layer of the first area;
the second bonding pad is positioned on the conductive layer of the second area and is electrically connected with the vibrating diaphragm through the conductive layer of the second area;
the third bonding pad is positioned on the conductive layer of the third region and is electrically connected with the substrate through the conductive layer of the third region.
Illustratively, the back plate layer further includes a top dielectric layer on the conductive layer, and forming a first pad, a second pad, and a third pad on the back plate layer, including:
etching the top dielectric layer to form a first opening exposing the conductive layer of the first region, a second opening exposing the conductive layer of the second region, and a third opening exposing the conductive layer of the third region;
and forming the first bonding pad in the first opening, forming the second bonding pad in the second opening, and forming the third bonding pad in the third opening.
Another aspect of the invention provides a MEMS device comprising:
comprising the following steps:
a substrate comprising a first surface and a second surface opposite the first surface;
a first sacrificial layer covering a partial region of the first surface of the substrate;
the vibrating diaphragm is positioned on the first sacrificial layer, and the peripheral edge area of the vibrating diaphragm is overlapped with the first sacrificial layer;
a second sacrificial layer covering a portion of the diaphragm;
a third sacrificial layer covering the second sacrificial layer;
a first through hole penetrating the second sacrificial layer and the third sacrificial layer and exposing the diaphragm;
the second through hole penetrates through the first sacrificial layer, the second sacrificial layer and the third sacrificial layer and exposes the substrate;
a cavity is formed between the back plate layer and the vibrating diaphragm, and the back plate layer covers the bottoms and the side walls of the first through hole and the second through hole and is attached to the vibrating diaphragm and the substrate;
the first bonding pad, the second bonding pad and the second bonding pad are positioned on the back plate layer, the first bonding pad is electrically connected with the back plate layer, the second bonding pad is electrically connected with the vibrating diaphragm through the back plate layer in the first through hole, and the third bonding pad is electrically connected with the substrate through the back plate layer in the second through hole;
And the back cavity penetrates through the substrate and the first sacrificial layer from the second surface of the substrate and exposes the vibrating diaphragm.
Illustratively, the method further comprises:
and the isolation layer fills the rest parts of the first through hole and the second through hole.
Illustratively, the back plate layer includes a bottom dielectric layer and a conductive layer on the bottom dielectric layer, the conductive layer includes a first region, a second region, and a third region that are separated from each other, the back plate layer covers bottoms and sidewalls of the first through hole and the second through hole and is attached to the diaphragm and the substrate, and includes:
the bottom dielectric layer covers the side walls of the first through hole and the second through hole;
the conductive layer of the second area covers the bottom of the first through hole and the bottom medium layer in the first through hole and is attached to the vibrating diaphragm;
the conductive layer in the third region covers the bottom of the second through hole and the bottom dielectric layer in the second through hole and is attached to the substrate.
Illustratively, the first bonding pad is electrically connected to the back plane layer, the second bonding pad is electrically connected to the diaphragm through the back plane layer in the first through hole, and the third bonding pad is electrically connected to the substrate through the back plane layer in the second through hole, comprising:
The first bonding pad is positioned on the conductive layer of the first area and is electrically connected with the conductive layer of the first area;
the second bonding pad is positioned on the conductive layer of the second area and is electrically connected with the vibrating diaphragm through the conductive layer of the second area;
the third bonding pad is positioned on the conductive layer of the third region and is electrically connected with the substrate through the conductive layer of the third region.
In yet another aspect, the present invention provides an electronic device including the MEMS device described above.
According to the MEMS device, the preparation method thereof and the electronic device, the first bonding pad, the second bonding pad and the third bonding pad are formed on the back plate layer only, wherein the second bonding pad and the third bonding pad cannot extend into the first through hole and the second through hole, the second bonding pad and the third bonding pad are respectively electrically connected with the vibrating diaphragm and the substrate through the back plate layer in the first through hole and the second through hole, the problems that in the related art, the second bonding pad and the third bonding pad are broken on the side wall of the through hole to cause electrical performance failure and the like can be avoided, the structures of the second bonding pad and the third bonding pad are flatter, the problem that glue coating is uneven in the subsequent photoresist process can be avoided, and the device performance and the product yield are improved.
Drawings
The following drawings are included to provide an understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and their description to explain the principles of the invention.
In the accompanying drawings:
FIG. 1 shows a schematic cross-sectional view of a MEMS device fabricated by a method of fabricating the device of the related art;
FIG. 2 is a flow chart illustrating a method of fabricating a MEMS device in accordance with an embodiment of the present invention;
fig. 3A-3E are schematic cross-sectional views of a MEMS device according to an embodiment of the present invention, which are sequentially obtained by implementing a method for manufacturing the MEMS device.
Detailed Description
The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size of layers and regions, as well as the relative sizes, may be exaggerated for clarity. Like numbers refer to like elements throughout.
It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatially relative terms, such as "under," "below," "beneath," "under," "above," "over," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "below" and "under" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. In this way, variations from the illustrated shape due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the present invention should not be limited to the particular shapes of the regions illustrated herein, but rather include deviations in shapes that result, for example, from manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and/or implant concentration gradients at its edges rather than a binary change from implanted to non-implanted regions. Also, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface over which the implantation is performed. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present invention.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and/or the present specification and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In order to provide a thorough understanding of the present invention, detailed steps and structures will be presented in the following description in order to illustrate the technical solution presented by the present invention. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments in addition to these detailed descriptions.
As shown in fig. 1, in the MEMS microphone of the related art, when the substrate 100 and the diaphragm 101 are led out through the bonding pad 105, it is often necessary to etch and open other layers on the surfaces of the substrate 100 and the diaphragm 101 to form a through hole, and then deposit the bonding pad 105 in the formed through hole, so that the height difference of the structure of the bonding pad 105 for leading out the substrate 100 and the diaphragm 101 is large, and the bonding pad 105 is made of a metal material, so that the coverage of the bonding pad 105 on the side wall of the through hole is poor, and phenomena such as fracture are easy to occur, and further, the electrical performance of the device is invalid.
Meanwhile, because the height difference of the structure of the leading-out substrate 100 and the bonding pad 105 of the vibrating diaphragm 101 is large, in the subsequent photoresist process, uneven photoresist coating is easily caused, so that thick photoresist is easily removed at places with large depth, and residues are easily generated; other positions can lead to insufficient thickness of the glue, and cracks are easy to occur, so that the device performance and the product yield are reduced.
Therefore, in view of the foregoing technical problems, the present invention proposes a method for manufacturing a MEMS device, as shown in fig. 2, which mainly includes the following steps:
step S1, providing a substrate, wherein a first sacrificial layer is formed on a first surface of the substrate, a vibrating diaphragm is formed on the first sacrificial layer, a second sacrificial layer is formed on the vibrating diaphragm and the first sacrificial layer, and a third sacrificial layer is formed on the second sacrificial layer;
step S2, etching the second sacrificial layer and the third sacrificial layer to form a first through hole, and etching the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a second through hole, wherein the first through hole exposes the vibrating diaphragm, and the second through hole exposes the substrate;
s3, forming a backboard layer on the third sacrificial layer, wherein the backboard layer covers the bottoms and the side walls of the first through hole and the second through hole and is attached to the vibrating diaphragm and the substrate;
step S4, forming a first bonding pad, a second bonding pad and a third bonding pad on the back plate layer, wherein the first bonding pad is electrically connected with the back plate layer, the second bonding pad is electrically connected with the vibrating diaphragm through the back plate layer in the first through hole, and the third bonding pad is electrically connected with the substrate through the back plate layer in the second through hole;
And S5, removing the second sacrificial layer and the third sacrificial layer to form a cavity, and forming a back cavity on the second surface of the substrate, wherein the cavity and the back cavity are exposed out of the vibrating diaphragm.
According to the preparation method of the MEMS device, the first bonding pad, the second bonding pad and the third bonding pad are formed on the back plate layer only, wherein the second bonding pad and the third bonding pad cannot extend into the first through hole and the second through hole, the second bonding pad and the third bonding pad are respectively electrically connected with the vibrating diaphragm and the substrate through the back plate layer in the first through hole and the second through hole, the problems that in the related art, the second bonding pad and the third bonding pad are broken on the side wall of the through hole to cause electrical property failure and the like can be avoided, the structures of the second bonding pad and the third bonding pad are flatter, the problem that glue coating is uneven in the subsequent photoresist process can be avoided, and the device performance and the product yield are improved.
Example 1
Hereinafter, a method for manufacturing a MEMS device according to the present invention will be described in detail with reference to fig. 2 to 3E, wherein fig. 2 shows a flowchart of a method for manufacturing a MEMS device according to an embodiment of the present invention, and fig. 3A to 3E show schematic cross-sectional views of the obtained devices in sequence.
Illustratively, the method of fabricating a MEMS device of the present invention comprises the steps of:
first, step S1 is performed to provide a substrate, a first sacrificial layer is formed on a first surface of the substrate, a diaphragm is formed on the first sacrificial layer, a second sacrificial layer is formed on the diaphragm and the first sacrificial layer, and a third sacrificial layer is formed on the second sacrificial layer.
The MEMS device may be any suitable device known to those skilled in the art, and in this embodiment, the technical solution of the present invention is mainly explained and illustrated by taking the case that the MEMS device is a MEMS microphone as an example.
Specifically, as shown in fig. 3A, the substrate 300 is a bulk silicon substrate, which may be at least one of the following mentioned materials: si, ge, siGe, siC, siGeC, inAs, gaAs, inP, inGaAs or other III/V compound semiconductors, and also include multilayer structures of these semiconductors, or are silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), germanium-on-insulator (GeOI), and the like.
In one example, as shown in fig. 3A, a first sacrificial layer 301 is formed on a first surface of a substrate 300. Illustratively, the first sacrificial layer 301 is an oxide layer, such as silicon oxide and carbon doped silicon oxide (SiOC), but is not limited to the above examples.
In addition, the first sacrificial layer 301 may be formed by various deposition methods commonly used in the art, for example, may be formed by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like. Optionally, the first sacrificial layer 301 may be patterned, including the steps of: forming a mask layer, such as a photoresist layer, on the first sacrificial layer 301; the first sacrificial layer 301 is etched using the mask layer as a mask, and then the mask layer is removed. Dry etching, reactive Ion Etching (RIE), ion beam etching, plasma etching may be selected for this step.
In one example, as shown in fig. 3A, a diaphragm 302 is formed on the first sacrificial layer 301. Illustratively, the diaphragm 302 may be made of polysilicon, siGe, or the like, and is not limited to any one. The diaphragm 302 may be formed by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like, or the diaphragm 302 may be formed by one of a furnace tube growth, a Low Pressure Chemical Vapor Deposition (LPCVD), a Laser Ablation Deposition (LAD), and a Selective Epitaxial Growth (SEG).
In one example, as shown in fig. 3A, a second sacrificial layer 303 is formed on the diaphragm 302 and the first sacrificial layer 301, and a third sacrificial layer 304 is formed on the second sacrificial layer 303. Illustratively, the second sacrificial layer 303 and the third sacrificial layer 304 are selected from oxide layers, such as silicon oxide and carbon doped silicon oxide (SiOC), but are not limited to the above examples. In addition, the second sacrificial layer 303 and the third sacrificial layer 304 may be formed by various deposition methods commonly used in the art, for example, may be formed by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like. Illustratively, after forming the second sacrificial layer 303 and the third sacrificial layer 304, an annealing process is further included, which may be any suitable annealing method known to those skilled in the art, such as rapid thermal annealing, furnace tube annealing, and the like.
Next, step S2 is performed to etch the second sacrificial layer and the third sacrificial layer to form a first through hole, and etch the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a second through hole, where the first through hole exposes the diaphragm, and the second through hole exposes the substrate.
In one example, as shown in fig. 3B, the second sacrificial layer 303 and the third sacrificial layer 304 are etched to form a first via 305, and the first sacrificial layer 301, the second sacrificial layer 303 and the third sacrificial layer 304 are etched to form a second via 306, wherein the first via 305 exposes the diaphragm 302 and the second via 306 exposes the substrate 300. Optionally, etching the second sacrificial layer 303 and the third sacrificial layer 304 to form the first via 305 includes the steps of: forming a mask layer, such as a photoresist layer, on the third sacrificial layer 304; the second sacrificial layer 303 and the third sacrificial layer 304 are etched using the mask layer as a mask, and then the mask layer is removed. Optionally, etching the first sacrificial layer 301, the second sacrificial layer 303, and the third sacrificial layer 304 to form the second via 306 includes the following steps: forming a mask layer, such as a photoresist layer, on the third sacrificial layer 304; the first sacrificial layer 301, the second sacrificial layer 303 and the third sacrificial layer 304 are etched using the mask layer as a mask, and then the mask layer is removed. Dry etching, reactive Ion Etching (RIE), ion beam etching, plasma etching may be selected for this step. Illustratively, one mask layer may be shared in the steps of forming the first via 305 and forming the second via 306.
Next, step S3 is performed, and a back plate layer is formed on the third sacrificial layer, where the back plate layer covers the bottoms and the sidewalls of the first through hole and the second through hole, and is attached to the diaphragm and the substrate. Specifically, as shown in fig. 3C, a back plate layer 307 is formed on the third sacrificial layer 304, and the back plate layer 307 covers the bottoms and sidewalls of the first through holes 305 and the second through holes 306 and is attached to the diaphragm 302 and the substrate 300. Illustratively, a release hole is formed through the backsheet layer 307 in the backsheet layer 307, alternatively the release hole may also be used as an acoustic hole.
In one example, as shown in fig. 3C, the back plate layer 307 includes a bottom dielectric layer 3071 and a conductive layer 3072 on the bottom dielectric layer 3071, the conductive layer 3072 includes a first region, a second region, and a third region that are separated from each other, and the back plate layer 307 covers bottoms and sidewalls of the first through hole 305 and the second through hole 306 and is attached to the diaphragm 302 and the substrate 300, including: the bottom dielectric layer 3071 covers the bottom and sidewalls of the first via 305 and the second via 306; the conductive layer 3072 in the second area covers the bottom of the first through hole 305 and the bottom dielectric layer 3071 on the sidewall in the first through hole 305, and is attached to the diaphragm 302; the conductive layer 3072 in the third region covers the bottom of the second via 306 and the bottom dielectric layer 3071 on the sidewall in the second via 306, and is attached to the substrate 300. Illustratively, the first, second, and third regions of the conductive layer 3072 are separated and insulated from one another, wherein: the conductive layer 3072 in the second region refers to a portion of the conductive layer 3072 that is attached to the diaphragm 302 through the first through hole 305 and is electrically connected to the diaphragm 302; the conductive layer 3072 of the third region refers to a portion of the conductive layer 3072 that is attached to the substrate 300 through the second through hole 306 and is further capable of electrically connecting to the substrate 300; the conductive layer 3072 of the first region refers to a portion of the conductive layer 3072 remaining except for the second region and the third region among the conductive layer 3072, and the conductive layer 3072 of the first region is electrically connected to neither the diaphragm 302 nor the substrate 300. In this embodiment, the material of the bottom dielectric layer 3071 includes silicon nitride. In other embodiments, the material of the bottom dielectric layer 3071 may further include an inorganic insulating layer such as silicon oxide or silicon oxynitride, or an organic insulating layer such as one containing polyvinylphenol, polyimide, or siloxane. Illustratively, the bottom dielectric layer 3071 may be formed by various deposition methods commonly used in the art, for example, by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like.
Optionally, forming the bottom dielectric layer 3071 and the conductive layer 3072 on the bottom dielectric layer 3071 includes the following steps: forming a bottom dielectric layer 3071 on the third sacrificial layer 304, the bottom dielectric layer 3071 covering the surface of the third sacrificial layer 304 and the bottoms and sidewalls of the first and second vias 305 and 306; etching the bottom dielectric layer 3071 in the first through hole 305 and the second through hole 306 to expose the substrate 300 and the diaphragm 302; forming a conductive layer 3072 on the bottom dielectric layer 3071, wherein the conductive layer 3072 covers the surface of the bottom dielectric layer 3071 on the third sacrificial layer 304, covers the bottoms of the first through hole 305 and the second through hole 306 and the bottom dielectric layer 3071 on the side walls in the first through hole 305 and the second through hole 306, and is attached to the diaphragm 302 and the substrate 300; the conductive layer 3072 is etched such that the conductive layer 3072 is divided into a first region, a second region, and a third region which are separated from each other and are not connected to each other, wherein: the conductive layer 3072 in the second area covers the bottom of the first through hole 305 and the bottom dielectric layer 3071 on the side wall in the first through hole 305, and is attached to the diaphragm 302; the conductive layer 3072 of the third region covers the bottom of the second via 306 and the bottom dielectric layer 3071 on the sidewall within the second via 306 and is attached to the substrate 300. Illustratively, dry etching, reactive Ion Etching (RIE), ion beam etching, plasma etching may be selected to etch the bottom dielectric layer 3071 and the conductive layer 3072.
In one example, as shown in fig. 3C, after forming the conductive layer 3072, and before subsequently forming the first pad, the second pad, and the third pad, the method of the present application further includes: an isolation layer 308 is formed in the first via 305 and the second via 306, and the isolation layer 308 fills the remaining portions of the first via 305 and the second via 306. By way of example, the isolation layer 308 may be formed by various deposition methods commonly used in the art, for example, may be formed by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like. In this embodiment, the material of the isolation layer 308 comprises silicon oxide. In other embodiments, the material of the bottom dielectric layer 3071 may further include an inorganic insulating layer such as silicon nitride or silicon oxynitride, or an organic insulating layer such as one containing polyvinyl phenol, polyimide, or siloxane.
In one example, the conductive layer 3072 may be etched first to divide the conductive layer 3072 into a first region, a second region, and a third region that are separated from each other and are not connected to each other, and then the isolation layer 308 is formed. Optionally, forming the isolation layer 308 includes the steps of: depositing an isolation layer 308 on the conductive layer 3072, the isolation layer 308 filling the remaining portions of the first and second vias 305 and 306 and filling the portions exposed by etching the conductive layer 3072; the spacer 308 is planarized such that the surface of the spacer 308 is flush with the surface of the conductive layer 3072. Illustratively, the isolation layer 308 can fill the portion exposed by etching the conductive layer 3072 to form an isolation ring structure, which can enhance the isolation performance between the first, second, and third regions of the conductive layer 3072. Illustratively, by filling the isolation layer 308 in the first via 305 and the second via 306, stress concentration at the first via 305 and the second via 306 may be reduced, improving the reliability of the device. The isolation layer 308 in the isolation ring structure can also extend into the third sacrificial layer 304, even through the third sacrificial layer 304, further extend into the second sacrificial layer 303, even through the second sacrificial layer 303, so that the stress concentration can be reduced and the reliability of the device can be improved.
In one example, as shown in fig. 3C, the backplate layer 307 further includes a top dielectric layer 3073 on the conductive layer 3072. In this embodiment, the material of the bottom dielectric layer 3071 includes silicon nitride. In other embodiments, the material of the bottom dielectric layer 3071 may further include an inorganic insulating layer such as silicon oxide or silicon oxynitride, or an organic insulating layer such as one containing polyvinylphenol, polyimide, or siloxane. Illustratively, the bottom dielectric layer 3071 may be formed by various deposition methods commonly used in the art, for example, by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like.
Next, step S4 is performed, where a first bonding pad, a second bonding pad and a third bonding pad are formed on the back plate layer, the first bonding pad is electrically connected to the back plate layer, the second bonding pad is electrically connected to the diaphragm through the back plate layer in the first through hole, and the third bonding pad is electrically connected to the substrate through the back plate layer in the second through hole. Illustratively, as shown in fig. 3D, a first bonding pad 309, a second bonding pad 310, and a third bonding pad 311 are formed on the backplate layer 307, the first bonding pad 309 is electrically connected to the backplate layer 307, the second bonding pad 310 is electrically connected to the diaphragm 302 through the backplate layer 307 in the first via 305, and the third bonding pad 311 is electrically connected to the substrate 300 through the backplate layer 307 in the second via 306.
Specifically, as shown in fig. 3D, the back plate layer 307 includes a conductive layer 3072, and the conductive layer 3072 includes a first region, a second region, and a third region that are separated from each other and are not connected to each other. The first bonding pad 309 is located on the conductive layer 3072 of the first region, and is electrically connected to the conductive layer 3072 of the first region; the second bonding pad 310 is located on the conductive layer 3072 of the second region, and is electrically connected to the diaphragm 302 through the conductive layer 3072 of the second region; the third pad 311 is positioned on the conductive layer 3072 of the third region, and is electrically connected to the substrate 300 through the conductive layer 3072 of the third region. Illustratively, since the diaphragm 302 and the substrate 300 in the present application are led out through the conductive layer 3072, the conductive layer 3072 needs to be etched into a first region, a second region and a third region that are separated from each other and not connected to each other, so that the first pad 309 is electrically connected to the conductive layer 3072 of the first region for led out the back plate layer 307; the second bonding pad 310 is electrically connected to the diaphragm 302 through the conductive layer 3072 of the second area, and is used for leading out the diaphragm 302; the third pad 311 is electrically connected to the substrate 300 through the conductive layer 3072 of the third region for extraction of the substrate. Illustratively, the first, second, and third pads 309, 310, 311 include at least one metallic material, e.g., al, cu, ti, ta, au, ni, sn, etc., and/or any combination thereof.
For example, the second pad 310 and the third pad 311 in the present application are formed only on the back plate layer 307, and are electrically connected to the diaphragm 302 and the substrate 300 through the conductive layer 3072, so that the problems of fracture and the like caused by poor coverage of the pads for leading out the diaphragm and the substrate on the side wall of the through hole in the related process, which leads to the failure of the electrical performance of the device, can be avoided; meanwhile, the structures of the second bonding pad 310 and the third bonding pad 311 are flatter, no larger height difference exists, and the problems that the adhesive layer is difficult to remove or cracks occur due to uneven adhesive coating in the subsequent photoresist process can be avoided. Illustratively, the conductive layer 3072 of polysilicon material within the first via 305 and the second via 306 has better coverage than the pads of metal material, which can improve the conductive performance of the device.
In one example, as shown in fig. 3D, when the back plane layer 307 includes the conductive layer 3072 and the top dielectric layer 3073, the first pad 309, the second pad 310, and the third pad 311 are formed on the back plane layer 307, including the steps of: etching the top dielectric layer 3073 to form a first opening exposing the conductive layer 3072 of the first region, a second opening exposing the conductive layer 3072 of the second region, and a third opening exposing the conductive layer 3072 of the third region; a first pad 309 is formed in the first opening, a second pad 310 is formed in the second opening, and a third pad 311 is formed in the third opening.
Finally, step S5 is executed, and a portion of the second sacrificial layer and the third sacrificial layer are removed to form a cavity, and a back cavity is formed on the second surface of the substrate, where the cavity and the back cavity both expose the diaphragm.
In one example, as shown in fig. 3E, portions of the second sacrificial layer 303 and the third sacrificial layer 304 are removed to form a cavity 312, and a back cavity 313 is formed on the second surface of the substrate 300, where the cavity 312 and the back cavity 313 are both exposed from the diaphragm 302.
In one example, forming the back cavity 313 on the second surface of the substrate 300 includes: etching the substrate 300 from the second surface of the substrate 300 and stopping at the first sacrificial layer 301 to form a cavity; next, a portion of the first sacrificial layer 301 is removed to form a back cavity 313, where the peripheral edge of the diaphragm 302 overlaps the first sacrificial layer 301. The substrate 300 and the first sacrificial layer 301 may be removed in this step by an etching process commonly used in the art, such as dry etching or wet etching. Optionally, after the substrate 300 is etched and stopped at the first sacrificial layer 301 to form a cavity, a portion of the first sacrificial layer 301, a portion of the second sacrificial layer 303, and a portion of the third sacrificial layer 304 may be removed simultaneously through the cavity to form the cavity 312 and the back cavity 313, or the cavity 312 and the back cavity 313 may be formed sequentially. In some embodiments, portions of the second sacrificial layer 303 and the third sacrificial layer 304 may also be removed by releasing the holes to form the cavity 312. Illustratively, prior to etching the substrate 300, further comprising: the substrate 300 is subjected to a thinning process.
It should be noted that the above steps are merely examples, and the order of the steps may be adjusted without conflict.
The key steps of the method for manufacturing the MEMS device of the present invention are described so far, and the manufacturing of the complete MEMS device may further include other steps, which are not described in detail herein.
In summary, according to the method for manufacturing the MEMS device, the first bonding pad, the second bonding pad and the third bonding pad are formed on the back plate layer only, wherein the second bonding pad and the third bonding pad cannot extend into the first through hole and the second through hole, the second bonding pad and the third bonding pad are respectively electrically connected with the vibrating diaphragm and the substrate through the back plate layer in the first through hole and the second through hole, the problems that in the related art, the second bonding pad and the third bonding pad are broken on the side wall of the through hole to cause electrical performance failure and the like can be avoided, the structures of the second bonding pad and the third bonding pad are flatter, the problem that glue coating is uneven in the subsequent photoresist process can be avoided, and device performance and product yield are improved. Illustratively, the isolation layers are further filled in the first through hole and the second through hole, so that stress concentration at the first through hole and the second through hole can be reduced, and the reliability of the device is improved.
Example two
The present invention also provides a MEMS device prepared by the method of the first embodiment, as shown in fig. 3E, the MEMS device of the present invention includes:
a substrate 300, the substrate 300 comprising a first surface and a second surface opposite to the first surface;
a first sacrificial layer 301 on a first surface of the substrate 300;
the diaphragm 302 is positioned on the first sacrificial layer 301, and the peripheral edge area of the diaphragm 302 is overlapped with the first sacrificial layer 301;
a second sacrificial layer 303 covering a portion of the diaphragm 302;
a third sacrificial layer 304 covering the second sacrificial layer 303;
a first through hole 305 penetrating the second sacrificial layer 303 and the third sacrificial layer 304 and exposing the diaphragm 302;
a second via 306 penetrating the first, second and third sacrificial layers 301, 303 and 304 and exposing the substrate 300;
a cavity 312 is formed between the back plate layer 307 and the diaphragm 302, and the back plate layer 307 covers the bottoms and the side walls of the first through holes 305 and the second through holes 306 and is attached to the diaphragm 302 and the substrate 300;
the first bonding pad 309, the second bonding pad 310 and the third bonding pad 311 are located on the back plate layer 307, the first bonding pad 309 is electrically connected with the back plate layer 307, the second bonding pad 310 is electrically connected with the diaphragm 302 through the back plate layer 307 in the first through hole 305, and the third bonding pad 311 is electrically connected with the substrate 300 through the back plate layer 307 in the second through hole 306;
The back cavity 313 penetrates through the substrate 300 and the first sacrificial layer 301 from the second surface of the substrate 300 and exposes the diaphragm 302.
Specifically, as shown in fig. 3E, the substrate 300 is a bulk silicon substrate, which may be at least one of the following mentioned materials: si, ge, siGe, siC, siGeC, inAs, gaAs, inP, inGaAs or other III/V compound semiconductors, and also include multilayer structures of these semiconductors, or are silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), germanium-on-insulator (GeOI), and the like.
In one example, as shown in fig. 3E, further comprising: an isolation layer 308, the isolation layer 308 filling the remaining portions of the first via 305 and the second via 306. By way of example, the isolation layer 308 may be formed by various deposition methods commonly used in the art, for example, may be formed by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like. In this embodiment, the material of the isolation layer 308 comprises silicon oxide. In other embodiments, the material of the bottom dielectric layer 3071 may further include an inorganic insulating layer such as silicon nitride or silicon oxynitride, or an organic insulating layer such as one containing polyvinyl phenol, polyimide, or siloxane.
Illustratively, by filling the isolation layer 308 in the first via 305 and the second via 306, stress concentration at the first via 305 and the second via 306 may be reduced, improving the reliability of the device.
In one example, as shown in fig. 3E, the back plate layer 307 includes a bottom dielectric layer 3071 and a conductive layer 3072 on the bottom dielectric layer 3071, the conductive layer 3072 includes a first region, a second region, and a third region that are separated from each other, and the back plate layer 307 covers bottoms and sidewalls of the first through hole 305 and the second through hole 306 and is attached to the diaphragm 302 and the substrate 300, including: the bottom dielectric layer 3071 covers the bottom and sidewalls of the first via 305 and the second via 306; the conductive layer 3072 in the second area covers the bottom of the first through hole 305 and the bottom dielectric layer 3071 on the sidewall in the first through hole 305, and is attached to the diaphragm 302; the conductive layer 3072 in the third region covers the bottom of the second via 306 and the bottom dielectric layer 3071 on the sidewall in the second via 306, and is attached to the substrate 300. Illustratively, the first, second, and third regions of the conductive layer 3072 are separated and insulated from one another, wherein: the conductive layer 3072 in the second region refers to a portion of the conductive layer 3072 that is attached to the diaphragm 302 through the first through hole 305 and is electrically connected to the diaphragm 302; the conductive layer 3072 of the third region refers to a portion of the conductive layer 3072 that is attached to the substrate 300 through the second through hole 306 and is further capable of electrically connecting to the substrate 300; the conductive layer 3072 of the first region refers to a portion of the conductive layer 3072 remaining except for the second region and the third region among the conductive layer 3072, and the conductive layer 3072 of the first region is electrically connected to neither the diaphragm 302 nor the substrate 300. In this embodiment, the material of the bottom dielectric layer 3071 includes silicon nitride. In other embodiments, the material of the bottom dielectric layer 3071 may further include an inorganic insulating layer such as silicon oxide or silicon oxynitride, or an organic insulating layer such as one containing polyvinylphenol, polyimide, or siloxane. Illustratively, the bottom dielectric layer 3071 may be formed by various deposition methods commonly used in the art, for example, by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like.
In one example, as shown in fig. 3E, the first bonding pad 309 is electrically connected to the backing layer 307, the second bonding pad 310 is electrically connected to the diaphragm 302 through the backing layer 307 in the first through hole 305, and the third bonding pad 311 is electrically connected to the substrate 300 through the backing layer 307 in the second through hole 306, including: the first bonding pad 309 is located on the conductive layer 3072 of the first region, and is electrically connected to the conductive layer 3072 of the first region; the second bonding pad 310 is located on the conductive layer 3072 of the second region, and is electrically connected to the diaphragm 302 through the conductive layer 3072 of the second region; the third pad 311 is positioned on the conductive layer 3072 of the third region, and is electrically connected to the substrate 300 through the conductive layer 3072 of the third region. Illustratively, since the diaphragm 302 and the substrate 300 in the present application are led out through the conductive layer 3072, the conductive layer 3072 needs to be etched into a first region, a second region and a third region that are separated from each other and not connected to each other, so that the first pad 309 is electrically connected to the conductive layer 3072 of the first region for led out the back plate layer 307; the second bonding pad 310 is electrically connected to the diaphragm 302 through the conductive layer 3072 of the second area, and is used for leading out the diaphragm 302; the third pad 311 is electrically connected to the substrate 300 through the conductive layer 3072 of the third region for extraction of the substrate. Illustratively, the first, second, and third pads 309, 310, 311 include at least one metallic material, e.g., al, cu, ti, ta, au, ni, sn, etc., and/or any combination thereof.
In one example, as shown in fig. 3E, the back plate layer 307 may further include a bottom dielectric layer 3071 and a top dielectric layer 3073, and in this embodiment, the materials of the bottom dielectric layer 3071 and the top dielectric layer 3073 include silicon nitride. In other embodiments, the material of the bottom dielectric layer 3071 may further include an inorganic insulating layer such as silicon oxide or silicon oxynitride, or an organic insulating layer such as one containing polyvinylphenol, polyimide, or siloxane. Illustratively, the bottom dielectric layer 3071 and the top dielectric layer 3073 may be formed by various deposition methods commonly used in the art, for example, by a Chemical Vapor Deposition (CVD) method, a Physical Vapor Deposition (PVD) method, an Atomic Layer Deposition (ALD) method, or the like.
The description of the structure of the MEMS device of the present invention is thus completed, and other constituent structures may be included in the complete device, which will not be described in detail herein.
Because the first bonding pad, the second bonding pad and the third bonding pad are only positioned on the surface of the back plate layer, the second bonding pad and the third bonding pad cannot extend into the first through hole and the second through hole, the second bonding pad and the third bonding pad are respectively electrically connected with the vibrating diaphragm and the substrate through the back plate layer in the first through hole and the second through hole, the problems of electrical property failure and the like caused by breakage of the side wall of the through hole of the second bonding pad and the third bonding pad in the related art can be avoided, the structures of the second bonding pad and the third bonding pad are flatter, the problem of uneven glue coating in the subsequent photoresist process can be avoided, and the device performance and the product yield are improved. Illustratively, forming the isolation layer to fill the remaining portions of the first and second vias can reduce stress concentrations at the first and second vias, thereby improving device reliability.
Example III
The invention also provides an electronic device comprising the MEMS device described in the second embodiment or the MEMS device prepared by the method described in the first embodiment.
The electronic device may be any electronic product or apparatus such as a mobile phone, a tablet computer, a notebook computer, a netbook, a game machine, a television, a VCD, a DVD, a navigator, a camera, a video camera, a recording pen, MP3, MP4, PSP, or an intermediate product having the MEMS device, for example: a mobile phone motherboard with the integrated circuit, etc. The electronic device provided by the embodiment of the invention has better performance due to the adoption of the MEMS device.
Although a number of embodiments have been described herein, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. More particularly, various modifications and alterations may be made in the arrangement and/or component parts of the subject matter within the scope of the disclosure, the drawings, and the appended claims. In addition to modifications and variations in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.
Claims (10)
1. A method of making a MEMS device, the method comprising:
providing a substrate, forming a first sacrificial layer on a first surface of the substrate, forming a vibrating diaphragm on the first sacrificial layer, forming a second sacrificial layer on the vibrating diaphragm and the first sacrificial layer, and forming a third sacrificial layer on the second sacrificial layer;
etching the second sacrificial layer and the third sacrificial layer to form a first through hole, and etching the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a second through hole, wherein the first through hole is exposed out of the vibrating diaphragm, and the second through hole is exposed out of the substrate;
forming a backboard layer on the third sacrificial layer, wherein the backboard layer covers the bottoms and the side walls of the first through hole and the second through hole and is attached to the vibrating diaphragm and the substrate;
forming a first bonding pad, a second bonding pad and a third bonding pad on the back plate layer, wherein the first bonding pad is electrically connected with the back plate layer, the second bonding pad is electrically connected with the vibrating diaphragm through the back plate layer in the first through hole, and the third bonding pad is electrically connected with the substrate through the back plate layer in the second through hole;
And removing part of the second sacrificial layer and the third sacrificial layer to form a cavity, and forming a back cavity on the second surface of the substrate, wherein the cavity and the back cavity are exposed out of the vibrating diaphragm.
2. The method of claim 1, wherein the back plate layer includes a bottom dielectric layer and a conductive layer on the bottom dielectric layer, the conductive layer includes a first region, a second region, and a third region that are separated from each other, the back plate layer covers bottoms and sidewalls of the first and second through holes and is attached to the diaphragm and the substrate, and the method includes:
the bottom dielectric layer covers the side walls of the first through hole and the second through hole;
the conductive layer of the second area covers the bottom of the first through hole and the bottom medium layer in the first through hole and is attached to the vibrating diaphragm;
the conductive layer in the third region covers the bottom of the second through hole and the bottom dielectric layer in the second through hole and is attached to the substrate.
3. The method of manufacturing according to claim 2, wherein after forming the conductive layer, and before forming the first pad, the second pad, and the third pad, the method further comprises:
And forming an isolation layer in the first through hole and the second through hole, wherein the isolation layer fills the rest parts of the first through hole and the second through hole.
4. The method of manufacturing of claim 2, wherein the first bonding pad is electrically connected to the back plane layer, the second bonding pad is electrically connected to the diaphragm through the back plane layer in the first through hole, and the third bonding pad is electrically connected to the substrate through the back plane layer in the second through hole, comprising:
the first bonding pad is positioned on the conductive layer of the first area and is electrically connected with the conductive layer of the first area;
the second bonding pad is positioned on the conductive layer of the second area and is electrically connected with the vibrating diaphragm through the conductive layer of the second area;
the third bonding pad is positioned on the conductive layer of the third region and is electrically connected with the substrate through the conductive layer of the third region.
5. The method of manufacturing of claim 2, wherein the back plane layer further comprises a top dielectric layer on the conductive layer, forming a first pad, a second pad, and a third pad on the back plane layer, comprising:
Etching the top dielectric layer to form a first opening exposing the conductive layer of the first region, a second opening exposing the conductive layer of the second region, and a third opening exposing the conductive layer of the third region;
and forming the first bonding pad in the first opening, forming the second bonding pad in the second opening, and forming the third bonding pad in the third opening.
6. A MEMS device, comprising:
a substrate comprising a first surface and a second surface opposite the first surface;
a first sacrificial layer covering a partial region of the first surface of the substrate;
the vibrating diaphragm is positioned on the first sacrificial layer, and the peripheral edge area of the vibrating diaphragm is overlapped with the first sacrificial layer;
a second sacrificial layer covering a portion of the diaphragm;
a third sacrificial layer covering the second sacrificial layer;
the first through hole penetrates through the second sacrificial layer and the third sacrificial layer and exposes the vibrating diaphragm;
the second through hole penetrates through the first sacrificial layer, the second sacrificial layer and the third sacrificial layer and exposes the substrate;
a cavity is formed between the back plate layer and the vibrating diaphragm, and the back plate layer covers the bottoms and the side walls of the first through hole and the second through hole and is attached to the vibrating diaphragm and the substrate;
The first bonding pad, the second bonding pad and the second bonding pad are positioned on the back plate layer, the first bonding pad is electrically connected with the back plate layer, the second bonding pad is electrically connected with the vibrating diaphragm through the back plate layer in the first through hole, and the third bonding pad is electrically connected with the substrate through the back plate layer in the second through hole;
and the back cavity penetrates through the substrate and the first sacrificial layer from the second surface of the substrate and exposes the vibrating diaphragm.
7. The MEMS device of claim 6, further comprising:
and the isolation layer fills the rest parts of the first through hole and the second through hole.
8. The MEMS device of claim 6, wherein the backplate layer comprises a bottom dielectric layer and a conductive layer on the bottom dielectric layer, the conductive layer comprising a first region, a second region, and a third region separated from each other, the backplate layer covering bottom and sidewalls of the first and second vias and being bonded to the diaphragm and the substrate, comprising:
the bottom dielectric layer covers the side walls of the first through hole and the second through hole;
the conductive layer of the second area covers the bottom of the first through hole and the bottom medium layer in the first through hole and is attached to the vibrating diaphragm;
The conductive layer in the third region covers the bottom of the second through hole and the bottom dielectric layer in the second through hole and is attached to the substrate.
9. The MEMS device of claim 8, wherein the first pad is electrically connected to the backplate layer, the second pad is electrically connected to the diaphragm through the backplate layer within the first via, and the third pad is electrically connected to the substrate through the backplate layer within the second via, comprising:
the first bonding pad is positioned on the conductive layer of the first area and is electrically connected with the conductive layer of the first area;
the second bonding pad is positioned on the conductive layer of the second area and is electrically connected with the vibrating diaphragm through the conductive layer of the second area;
the third bonding pad is positioned on the conductive layer of the third region and is electrically connected with the substrate through the conductive layer of the third region.
10. An electronic device, characterized in that it comprises a MEMS device as claimed in any one of claims 6-9.
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