CN117614431A - Power-on reset circuit - Google Patents
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- CN117614431A CN117614431A CN202311748383.6A CN202311748383A CN117614431A CN 117614431 A CN117614431 A CN 117614431A CN 202311748383 A CN202311748383 A CN 202311748383A CN 117614431 A CN117614431 A CN 117614431A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
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Abstract
The embodiment of the application discloses power-on reset circuit, including: the power supply voltage division module, the core module and the comparator module, wherein the core module comprises a first resistor, a first impedance device, a second impedance device, a first transistor and a second transistor, the comparator module comprises a comparator, and the devices are connected through a specific connection relation. The comparator is used for comparing the input voltage of the first end of the comparator with the input voltage of the second end of the comparator. The POR threshold is less affected by temperature due to the positive temperature characteristic of the difference between the second voltage difference and the first voltage difference and the negative temperature characteristic of the first voltage difference, and the accuracy of the POR threshold is higher; the POR threshold is realized in a voltage comparison mode, so that the current cannot influence the judgment of the comparator on the input voltage, and the voltage drop on the two impedance devices is judged by the comparator only if the voltage drops are unequal, and therefore the power consumption of the power-on reset circuit can be controlled to be very low through the optimal design.
Description
Technical Field
The application relates to the technical field of circuit design, in particular to a power-on reset circuit.
Background
A Power On Reset (POR) circuit provides a Power on Reset signal to the chip, and is generally turned on before the reference circuit, so that the POR threshold accuracy needs to be ensured through the design of the POR circuit itself.
Referring to fig. 1, a POR circuit with high POR threshold accuracy according to the prior art includes: p-type Metal-oxide-semiconductor (PMOS) tube M1', PMOS tube M2', POMS tube M3', N-type Metal-oxide-semiconductor (NMOS) tube M4', NMOS tube M5', NMOS tube M6', resistor R1', resistor R2', resistor R3', inverter inv1', inverter inv2 'and inverter inv3'. However, the POR circuit shown in fig. 1 has high power consumption, and cannot meet the requirement of low power consumption. Therefore, how to design a power-on reset circuit with high POR threshold accuracy and low power consumption is a technical problem to be solved.
Disclosure of Invention
In view of this, the embodiment of the application discloses a power-on reset circuit, which has higher POR threshold accuracy and low power consumption.
The technical scheme provided by the embodiment of the application is as follows:
in a first aspect, embodiments of the present application provide a power-on reset circuit, where the power-on reset circuit includes: the device comprises a power supply voltage division module, a core module and a comparator module, wherein the power supply voltage division module is connected with the core module, and the core module is connected with the comparator module;
the core module includes: a first resistor, a first impedance device, a second impedance device, a first transistor and a second transistor, the first transistor having a size n times the size of the second transistor, the comparator module comprising: a comparator;
a first end of the first resistor is connected with a first end of the first transistor, and a second end of the first resistor is connected with a first end of the second transistor;
the first end of the first impedance device is connected with the first end of the second impedance device, and the second end of the first impedance device is connected with the second end of the first transistor and the first end of the comparator;
the first end of the second impedance device is connected with the second end of the comparator, and the second end of the second impedance device is connected with the second end of the second transistor and the second end of the comparator;
the second end of the first transistor is connected with the first end of the comparator;
a second end of the second transistor is connected with a second end of the comparator, and a third end of the second transistor is connected with a third end of the first transistor;
the comparator is used for comparing the input voltage of the first end of the comparator with the input voltage of the second end of the comparator;
the power-on reset POR threshold is determined by a difference value between a second voltage difference and a first voltage difference, and a resistance value corresponding to the first voltage difference and the power supply voltage division module; the first voltage difference refers to a voltage difference between a third terminal and a first terminal of the first transistor, and the second voltage difference refers to a voltage difference between the third terminal and the first terminal of the second transistor.
In one possible implementation, the power supply voltage dividing module includes: the second resistor, the third resistor, the fourth resistor and the switch;
the first end of the second resistor is connected with the second end of the third resistor and the third end of the first transistor, and the second end of the second resistor is connected with the second end of the first resistor and the first end of the second transistor;
the first end of the third resistor is connected with the second end of the fourth resistor and the second end of the switch, and the second end of the third resistor is connected with the third end of the first transistor;
the first end of the fourth resistor is connected with the first end of the switch and the first end of the first impedance device, and the second end of the fourth resistor is connected with the second end of the switch.
In one possible implementation, the comparator module further includes: a first inverter and a second inverter;
the third end of the comparator is connected with the first end of the first inverter;
the second end of the first inverter is connected with the first end of the second inverter and the third end of the switch;
the first end of the second inverter is connected with the third end of the third switch, and the second end of the second inverter is used as the output end of the power-on reset circuit.
In one possible implementation, the first transistor is a BJT and the second transistor is a BJT;
the first end of the first transistor is an emitter, the second end of the first transistor is a collector, and the third end of the first transistor is a base;
the first end of the second transistor is an emitter, the second end of the second transistor is a collector, and the third end of the second transistor is a base;
the first voltage difference refers to a voltage difference between a base and an emitter of the first transistor, and the second voltage difference refers to a voltage difference between a base and an emitter of the second transistor.
In one possible implementation, the first transistor is a MOSFET and the second transistor is a MOSFET;
the first end of the first transistor is a source electrode, the second end of the first transistor is a drain electrode, and the third end of the first transistor is a grid electrode;
the first end of the second transistor is a source electrode, the second end of the second transistor is a drain electrode, and the third end of the second transistor is a grid electrode;
the first voltage difference refers to a voltage difference between a gate and a source of the first transistor, and the second voltage difference refers to a voltage difference between a gate and a source of the second transistor.
In one possible implementation manner, the power-on reset circuit comprises the following power-on processes:
before the power supply voltage rises to the POR threshold value, the input voltage of the first end of the comparator is smaller than the input voltage of the second end of the comparator, the output signal of the comparator is in a low level, and the output signal of the power-on reset circuit is in a low level;
after the power supply voltage rises to the POR threshold value, the input voltage of the first end of the comparator is larger than the input voltage of the second end of the comparator, the output signal of the comparator is in a high level, and the output signal of the power-on reset circuit is in a high level.
In one possible implementation, the comparator module further includes: schmitt trigger;
the first end of the Schmitt trigger is connected with the third end of the comparator, and the second end of the Schmitt trigger is connected with the first end of the first inverter.
In one possible implementation, the core module further includes a fifth resistor;
the first end of the fifth resistor is connected with the second end of the first resistor and the first end of the second transistor, and the second end of the fifth resistor is connected with the second end of the second resistor.
In one possible implementation, the POR threshold is determined by a difference between a second voltage difference and a first voltage difference, the first voltage difference, a resistance of the first resistor, a resistance of the second resistor, a resistance of the third resistor, a resistance of the fourth resistor, and a resistance of the fifth resistor.
In one possible implementation, the comparator module further includes: a capacitor;
the first end of the capacitor is connected with the first end of the second impedance device, and the second end of the capacitor is connected with the second end of the comparator.
Based on the technical scheme, the application has the following beneficial effects:
the embodiment of the application discloses power-on reset circuit, including: the power supply voltage division module, core module and comparator module, the core module includes: the comparator module includes: and a comparator. The first end of the first resistor is connected with the first end of the first transistor, and the second end of the first resistor is connected with the first end of the second transistor; the first end of the first impedance device is connected with the first end of the second impedance device, and the second end of the first impedance device is connected with the second end of the first transistor and the first end of the comparator; the first end of the second impedance device is connected with the second end of the comparator, and the second end of the second impedance device is connected with the second end of the second transistor and the second end of the comparator; the second end of the first transistor is connected with the first end of the comparator; the second end of the second transistor is connected with the second end of the comparator, the third end of the second transistor is connected with the third end of the first transistor, and a plurality of devices are connected through a specific connection relationship, so that a power-on reset function is realized. The size of the first transistor is n times of that of the second transistor, so that the initial power-on rate of a branch corresponding to the first end of the first transistor is larger than that of a branch corresponding to the first end of the second transistor, the initial current value of the first transistor is larger than that of the second transistor, the voltage drop on the first impedance device is larger than that on the second impedance device, the voltage of the positive input end of the comparator is larger than that of the negative input end of the comparator, the output of the comparator is low, and the POR cannot turn over; and the current at the first end of the second transistor gradually catches up with the current at the first end of the first transistor, the voltage drop on the first impedance device is smaller than the voltage drop on the second impedance device, the voltage of the positive input end of the comparator is smaller than the voltage of the negative input end, the comparator is turned over, the output is high, and the POR is turned over, so that the power-on reset function can be realized. The difference between the second voltage difference and the first voltage difference is a voltage quantity which increases along with the increase of temperature, the first voltage difference is a voltage quantity which decreases along with the increase of temperature, so that temperature complementation can be formed between the difference between the first voltage difference and the second voltage difference, and the temperature compensation can fully play a role due to the specific connection relation of the power-on reset circuit, so that the POR threshold value determined by the difference between the first voltage difference and the second voltage difference, the second voltage and the corresponding resistance value of the power supply voltage division module is less influenced by the temperature, and the accuracy of the POR threshold value is higher. The POR threshold is realized in a voltage comparison mode, so that the current cannot influence the judgment of the comparator on the input voltage, and as long as the voltage drop on the first impedance device and the voltage drop on the second impedance device are unequal, the voltage drop on the first impedance device and the voltage drop on the second impedance device can be judged by the comparator, and the power consumption of the power-on reset circuit can be controlled to be very low through the optimal design, the effects of not influencing the precision of the POR threshold and reducing the power consumption are achieved, and the power-on reset circuit with higher POR threshold precision and low power consumption can be obtained.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained from the disclosed drawings without inventive effort to a person skilled in the art.
FIG. 1 is a schematic diagram of a power-on reset circuit in the prior art;
fig. 2 is a schematic structural diagram of a power-on reset circuit according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a power-on reset circuit according to another embodiment of the present disclosure;
FIG. 4 is a schematic diagram of current and voltage waveforms of a power-on reset circuit according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram illustrating a power-on reset circuit according to another embodiment of the present disclosure;
FIG. 6 is a schematic diagram illustrating a power-on reset circuit according to another embodiment of the present disclosure;
FIG. 7 is a schematic diagram illustrating a power-on reset circuit according to another embodiment of the present disclosure;
FIG. 8 is a schematic diagram illustrating a power-on reset circuit according to another embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of another power-on reset circuit according to an embodiment of the present disclosure.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
Referring to fig. 1, the POR circuit shown in fig. 1 uses a current comparison mode, in which the current cannot be too small, otherwise, the voltage of the node to be compared rises or falls slowly to affect the POR threshold, so that the difference between the current i1 'of the POR circuit during POR turning and the current i1' during normal operation is large, resulting in higher power consumption of the POR circuit, and the requirement of low power consumption cannot be met. In addition, the current comparison mode is affected by the leakage of the device, and is particularly affected by the high temperature condition of the process corner (Fast N Fast P corner, ffcore) of the fast NMOS and the fast PMOS, so that the current cannot be too small, and further the power consumption of the POR circuit shown in fig. 1 is larger.
Therefore, the embodiment of the application discloses a power-on reset circuit, which utilizes the positive temperature characteristic of the difference value between the second voltage difference and the first voltage difference and the negative temperature characteristic of the first voltage difference to ensure that the POR threshold is less influenced by temperature and the accuracy of the POR threshold is higher; the POR threshold is realized in a voltage comparison mode, so that the magnitude of current does not influence the judgment of the comparator on the input voltage, and as long as the voltage drop on the first impedance device and the voltage drop on the second impedance device are unequal, the POR threshold is judged by the comparator, and the power consumption of the power-on reset circuit can be controlled to be very low through the optimal design by virtue of the working characteristics, so that the effects of not influencing the precision of the POR threshold and reducing the power consumption are achieved; therefore, the power-on reset circuit with higher POR threshold accuracy and low power consumption can be obtained.
Referring to fig. 2, a power-on reset circuit disclosed in an embodiment of the present application includes: the device comprises a power supply voltage division module, a core module and a comparator module, wherein the power supply voltage division module is connected with the core module, and the core module is connected with the comparator module;
the core module includes: the first resistor R1, the first impedance device Z1, the second impedance device Z2, the first transistor Q1, and the second transistor Q2, the size of the first transistor Q1 being n times the size of the second transistor Q2, the comparator module comprising: a comparator comp;
a first end of the first resistor R1 is connected with a first end of the first transistor Q1, and a second end of the first resistor R1 is connected with a first end of the second transistor Q2;
a first end of the first impedance device Z1 is connected with a first end of the second impedance device Z2, and a second end of the first impedance device Z1 is connected with a second end of the first transistor Q1 and a first end of the comparator comp;
the first end of the second impedance device Z2 is connected with the second end of the comparator comp, and the second end of the second impedance device Z2 is connected with the second end of the second transistor Q2 and the second end of the comparator comp;
the second end of the first transistor Q1 is connected with the first end of the comparator comp;
a second end of the second transistor Q2 is connected with a second end of the comparator comp, and a third end of the second transistor Q2 is connected with a third end of the first transistor Q1;
a comparator comp for comparing an input voltage of a first terminal of the comparator comp with an input voltage of a second terminal of the comparator;
the POR threshold value is determined by the difference value between the second voltage difference and the first voltage difference, the first voltage difference and the resistance value of the power supply voltage division module; the first voltage difference refers to a voltage difference between the third terminal and the first terminal of the first transistor, and the second voltage difference refers to a voltage difference between the third terminal and the first terminal of the second transistor.
It should be noted that, in the embodiment of the present application, the third terminal of the comparator comp corresponds to the output terminal of the power-on reset circuit, and the POR in fig. 2 is the name of the output terminal of the power-on reset circuit.
As can be seen, in the embodiment of the present application, since the size of the first transistor is n times that of the second transistor, the initial power-up rate of the branch corresponding to the first end of the first transistor is greater than that of the branch corresponding to the first end of the second transistor, so that the initial current value of the first transistor is greater than that of the second transistor, the voltage drop on the first impedance device is greater than that on the second impedance device, resulting in that the voltage of the positive input end of the comparator is greater than that of the negative input end, the output of the comparator is low, and the POR will not turn over; and the current at the first end of the second transistor gradually catches up with the current at the first end of the first transistor, the voltage drop on the first impedance device is smaller than the voltage drop on the second impedance device, the voltage of the positive input end of the comparator is smaller than the voltage of the negative input end, the comparator is turned over, the output is high, and the POR is turned over, so that the power-on reset function can be realized. The difference between the second voltage difference and the first voltage difference is a voltage quantity which increases along with the increase of temperature, the first voltage difference is a voltage quantity which decreases along with the increase of temperature, so that temperature complementation can be formed between the difference between the first voltage difference and the second voltage difference, and the temperature compensation can fully play a role due to the specific connection relation of the power-on reset circuit, so that the POR threshold value determined by the difference between the first voltage difference and the second voltage difference, the second voltage and the corresponding resistance value of the power supply voltage division module is less influenced by the temperature, and the accuracy of the POR threshold value is higher. The POR threshold is realized in a voltage comparison mode, so that the current cannot influence the judgment of the comparator on the input voltage, and as long as the voltage drop on the first impedance device and the voltage drop on the second impedance device are unequal, the voltage drop on the first impedance device and the voltage drop on the second impedance device can be judged by the comparator, and the power consumption of the power-on reset circuit can be controlled to be very low through the optimal design, the effects of not influencing the precision of the POR threshold and reducing the power consumption are achieved, and the power-on reset circuit with higher POR threshold precision and low power consumption can be obtained.
Referring to fig. 3, another power-on reset circuit disclosed in an embodiment of the present application includes: the device comprises a power supply voltage division module, a core module and a comparator module;
the power supply voltage dividing module includes: the second resistor R2, the third resistor R3, the fourth resistor R4 and the switch S1;
the core module includes: a first resistor R1, a first impedance device Z1, a second impedance device Z2, a first transistor Q1, and a second transistor Q2; the size of the first transistor Q1 is n times the size of the second transistor Q2;
the comparator module includes: a comparator comp, a first inverter inv1, a second inverter inv2;
a first end of the first resistor R1 is connected with a first end of the first transistor Q1, and a second end of the first resistor R1 is connected with a first end of the second transistor Q2; the first end of the second resistor R2 is connected with the second end of the third resistor R3 and the third end of the first transistor Q1, and the second end of the second resistor R2 is connected with the second end of the first resistor R1 and the first end of the second transistor Q2; the first end of the third resistor R3 is connected with the second end of the fourth resistor R4 and the second end of the switch S1, and the second end of the third resistor R3 is connected with the third end of the first transistor Q1; the first end of the fourth resistor R4 is connected with the first end of the switch S1 and the first end of the first impedance device Z1, and the second end of the fourth resistor R4 is connected with the second end of the switch S1;
a first end of the first impedance device Z1 is connected with a first end of the second impedance device Z2, and a second end of the first impedance device Z1 is connected with a second end of the first transistor Q1 and a first end of the comparator comp; the first end of the second impedance device Z2 is connected with the second end of the comparator comp, and the second end of the second impedance device Z2 is connected with the second end of the second transistor Q2 and the second end of the comparator comp;
the second end of the first transistor Q1 is connected with the first end of the comparator comp; a second end of the second transistor Q2 is connected with a second end of the comparator comp, and a third end of the second transistor Q2 is connected with a third end of the first transistor Q1;
the third end of the comparator comp is connected with the first end of the first inverter inv 1; the second end of the first inverter inv1 is connected with the first end of the second inverter inv2 and the third end of the switch S1; the first end of the second inverter inv2 is connected with the third end of the switch S1, and the second end of the second inverter inv2 is used as the output end of the power-on reset circuit;
a comparator comp for comparing an input voltage of a first terminal of the comparator comp with an input voltage of a second terminal of the comparator;
the POR threshold value is determined by the difference value between the second voltage difference and the first voltage difference, the resistance value of the second resistor, the resistance value of the third resistor and the resistance value of the fourth resistor; the first voltage difference refers to a voltage difference between the third terminal and the first terminal of the first transistor Q1, and the second voltage difference refers to a voltage difference between the third terminal and the first terminal of the second transistor Q2.
It should be noted that, in the embodiment of the present application, the power consumption of the power voltage division module and the power consumption of the core module are greatly affected by the power supply, so that, in the design process, the resistance value of the corresponding resistor and the resistance value of the corresponding impedance device are designed to be larger, so that the current can be ensured to be smaller, and the power consumption of the power-on reset circuit can be reduced. The power consumption of the comparator can be controlled to be lower through special design, so that the power consumption of the power-on reset circuit is further reduced.
It should be noted that, n is a number greater than 1, and specific values of n are not limited in the embodiment of the present application, and may be 2, 3, and so on. The first end of the comparator is a positive input end, and the second end of the comparator is a negative input end. The switch S1 may be a PMOS or NMOS or a transmission gate, etc. according to the actual design, which is not limited in the embodiment of the present application.
The first inverter inv1 and the second inverter inv2 are used for shaping, enhancing and inverting the output signal of the comparator, wherein the inverting input is 1, the output is 0, and the inverting input is 0 and the output is 1. The POR signal output by the POR circuit is low level 0 before the power supply voltage reaches the POR threshold, which means that the power supply is not ready, when the power supply voltage rises to the POR threshold, the POR signal is turned to high level 1, which means that the power supply signal is ready, the chip can work normally, and the process from 0 to 1 is the turning of the POR.
It should be noted that, in the power-on reset circuit in the embodiment of the present application, in the working process, i1= (V Q2 -V Q1 )/R1＝△V Q R1, i1 represents the current at the first end of the first transistor, V Q2 Representing a second voltage difference, V Q1 Represents a first voltage difference, deltaV Q Representing the difference between the second voltage difference and the first voltage difference, i.e. the voltage drop across the first resistor R1 is always DeltaV Q 。
Referring to fig. 4, a schematic diagram of current and voltage waveforms of a power-on reset circuit is disclosed in an embodiment of the present application. The power-on reset circuit in the embodiment of the application comprises the following power-on processes:
before the power supply voltage AVDD rises to the POR threshold value, AVDD starts to rise from 0, the third terminal voltage of the first transistor Q1 and the third terminal voltage of the second transistor Q2 are equal, V of the first transistor Q1 Q1 And V of the second transistor Q2 Q2 Are smaller than the turn-on voltage of the transistor. Because the size of the first transistor Q1 is n times that of the second transistor Q2, the initial current i1 is caused when the first transistor Q1 and the second transistor Q2 are not conducted>i2, VP<VN, the output signal of the comparator is low level 0, and the output signal POR of the power-on reset circuit is low level 0. Where i2 represents the current at the first end of the second transistor Q2,VP represents the input voltage at the first terminal of comparator comp and VN represents the input voltage at the second terminal of comparator comp.
With the rising of AVDD, V of the first transistor Q1 Q1 And V of the second transistor Q2 Q2 The current increases gradually and with it. Because the first end of the first transistor Q1 has a larger first resistance R1, V is caused Q1 Ratio V Q2 If the rising is slow, i2 increases faster than i1, i2 gradually catches up with i1 until i1=i2, i.e., until the moment of POR turning is reached, the equivalent relationship of turning moment is as follows:
i 1 ＝i 2 (2)
ΔV Q ＝V Q2 -V Q1 ＝i 1 *R 1 (3)
k*AVDD＝V 1 ＝ΔV Q +V Q1 (5)
it will be appreciated that VDD rises from 0, when k AVDD rises to k avdd=v1, i.e. the roll-over threshold for the entire POR is reached, at which point AVDD is equal to the POR threshold.
The POR threshold value can be obtained by the formula, and is only related to the resistance proportion and the voltage difference between the third end and the first end of the transistor, so that the effect of low temperature drift can be achieved.
When the power supply voltage AVDD rises to the POR threshold, i.e., AVDD exceeds the POR threshold, i1< i2, VP > VN, the output signal of the comparator is at high level 1, and the output signal POR of the power-on reset circuit is at high level 1. If the switch S1 is PMOS, the switch S1 is turned on.
It should be noted that, according to the embodiment of the present application, the adjustment of the POR threshold may be achieved by adjusting the resistor proportion k according to the corresponding design requirement, so as to achieve the hysteresis effect.
In one possible implementation manner, the first transistor Q1 in the power-on reset circuit in the embodiment of the present application may be a Metal-Oxide-semiconductor field effect transistor (MOSFET), and the second transistor Q2 may also be a MOSFET. In this case, the first end of the first transistor Q2 is a source, the second end of the first transistor Q1 is a drain, and the third end of the first transistor Q1 is a gate; the first end of the second transistor Q2 is a source electrode, the second end of the second transistor Q2 is a drain electrode, and the third end of the second transistor Q2 is a grid electrode; the first voltage difference refers to the voltage difference Vgs between the gate and the source of the first transistor Q1 1 The second voltage difference refers to the voltage difference Vgs between the gate and the source of the second transistor Q2 2 In this case, the equivalent relationship of the inversion timing is k avdd=v 1 ＝ΔV gs +V gs . Thus utilizing the characteristics of the temperature coefficient of the MOSFET, namely DeltaV gs Is a voltage increasing with increasing temperature, is a positive temperature coefficient, V gs1 Is a voltage decreasing with increasing temperature, is a negative temperature coefficient, deltaV gs And V gs1 And the temperature compensation is formed, and the design of a power-on reset circuit with high precision and low temperature drift is realized.
It should be noted that, in general, the POR circuit is used for reporting the POR signal when the voltage is low, the MOSFET needs to be kept in the operating state of the subthreshold region to achieve the effect of temperature compensation, and the MOSFET generally has two operating states of the subthreshold region and the saturation region, so that the three-terminal voltage of the MOSFET needs to be carefully designed to ensure that Vgs is very close to the threshold voltage (Threshold Voltage, VTH), and the voltage difference Vds between the drain and the source of the MOSFET is very small, so that the state of the subthreshold region of the MOSFET is affected by the voltage, and the dispersion is affected by the voltage, so that the effect of temperature compensation is masked.
For this purpose, in one possible implementation, the first transistor Q1 in the embodiments of the present application may be a bipolar junction transistor (Bipolar Junction Transistor, BJT), the second transistorThe tube Q2 may be a BJT. In this case, the first end of the first transistor Q1 is an emitter, the second end of the first transistor Q1 is a collector, and the third end of the first transistor Q1 is a base; the first end of the second transistor Q2 is an emitter, the second end of the second transistor Q2 is a collector, and the third end of the second transistor Q2 is a base. The first voltage difference refers to the voltage difference Vbe between the base and emitter of the first transistor Q1 1 The second voltage difference refers to the voltage difference Vbe between the base and emitter of the second transistor Q2 2 In this case, the equivalent relationship of the inversion timing is k avdd=v 1 ＝ΔV be +V be1 . Thus utilizing the characteristic of the temperature coefficient of the BJT, namely DeltaV be Is a voltage increasing with increasing temperature, is a positive temperature coefficient, V be1 Is a voltage decreasing with increasing temperature, is a negative temperature coefficient, deltaV be And V be1 And the temperature compensation is formed, and the design of a power-on reset circuit with high precision and zero temperature drift is realized.
The principle of the BJT and the MOSFET as temperature compensation is basically the same, and the exponential variation characteristic of the current is utilized. However, the operation of the BJT is more robust, and since the operation characteristic of the BJT is exponential, the operation characteristic of the BJT is stable and is not affected by voltage basically as long as the BJT can operate, and the MOSFET needs to be kept in the operation state of the sub-threshold region in order to achieve the effect of temperature compensation. In addition, compared with the scheme using BJT, the scheme using MOSFET can save area, and in practical application, flexible BJT or MOSFET can be configured according to the requirement, so that the trade-off selection of area and performance is realized.
The first impedance device Z1 in the embodiment of the present application may be a resistor, and the second impedance device Z2 may be a resistor; alternatively, the first impedance device Z1 may be a gate-drain shorted MOSFET, and the second impedance device Z2 may be a gate-drain shorted MOSFET. When the first impedance device Z1 and the second impedance device Z2 are resistors, vp=avdd-i1×z1, and vn=avdd-i2×z2; when the first and second impedances Z1 and Z2 are MOSFETs with shorted gates and drains, vp=avdd-vsg_z1, vn=avdd-vsg_z2, vsg_z1 represents a voltage difference between the source and the gate of the first impedance Z1, and vsg_z2 represents a voltage difference between the source and the gate of the second impedance Z2.
Referring to fig. 5, a schematic diagram of another power-on reset circuit according to an embodiment of the present application is shown.
In one possible implementation manner, the comparator module in the embodiment of the present application further includes: schmitt trigger schmitt; the first terminal of the schmitt trigger schmitt is connected to the third terminal of the comparator comp and the second terminal of the schmitt trigger schmitt is connected to the first terminal of the first inverter inv 1.
The signals input and output by the Schmitt trigger are in the same direction, and the Schmitt trigger has the effects that the rising judgment turnover threshold value of the input signal is moved upwards, the falling turnover threshold value is moved downwards, and false turnover caused by signal jitter can be prevented.
In one possible implementation manner, the core module in the embodiment of the present application further includes a fifth resistor R5 and a sixth resistor R6; the first end of the fifth resistor R5 is connected with the second end of the first resistor R1 and the second end of the sixth resistor R6, and the second end of the fifth resistor R5 is connected with the second end of the second resistor R2; a first terminal of the sixth resistor R6 is connected to the first terminal of the second transistor Q2. The resistance of the first resistor R1 is greater than that of the sixth resistor R6. The sixth resistor R6 may not be provided, and the first terminal of the fifth resistor R5 may be connected to the second terminal of the first resistor R1 and the first terminal of the second transistor Q2.
In the case where the resistor R5 is provided and the resistor R6 is not provided, the POR threshold is determined by the difference between the second voltage difference and the first voltage difference, the resistance of the first resistor R1, the resistance of the second resistor R2, the resistance of the third resistor R3, the resistance of the fourth resistor R4, and the resistance of the fifth resistor R5. The equivalent relationship at the moment of inversion is specifically as follows:
i 1 ＝i 2 (2)
ΔV Q ＝V Q2 -V Q1 ＝i 1 *R 1 (3)
V 2 ＝2*i 1 *R 5 (6)
in the case of the resistors R5 and R6, the POR threshold is determined by the difference between the second voltage difference and the first voltage difference, the resistance of the first resistor R1, the resistance of the second resistor R2, the resistance of the third resistor R3, the resistance of the fourth resistor R4, the resistance of the fifth resistor R5, and the sixth resistor R6. The equivalent relationship at the moment of inversion is specifically as follows:
i 1 ＝i 2 (2)
ΔV Q ＝V Q2 -V Q1 ＝i 1 *(R 1 -R 6 ) (9)
V 2 ＝2*i 1 *R 5 (6)
in the embodiment of the application, the POR threshold value can be further adjusted by using the fifth resistor and the sixth resistor, so that the POR threshold value can be adjusted by combining multiple resistors, and the POR threshold value can be adjusted more flexibly.
In one possible implementation, the comparator module in the embodiment of the present application further includes a capacitor C1; the first terminal of the capacitor C1 is connected to the first terminal of the second impedance device Z2, and the second terminal of the capacitor C1 is connected to the second terminal of the comparator comp.
In order to avoid false overturn caused by high VP ratio VN due to parasitic capacitance coupling in the quick power-on process of an actual power-on reset circuit, a capacitor is added on the VN side, so that the VN is coupled to be higher than the VP when the power-on is quickly performed, and false alarm of a comparator is avoided.
Referring to fig. 6, a schematic structural diagram of another power-on reset circuit disclosed in an embodiment of the present application is shown, in which a first transistor Q1 and a second transistor Q2 are MOSFETs, and a first impedance device Z1 and a second impedance device Z2 are resistors. The equivalent relationship of the turning moment in this case is:
referring to fig. 7, a schematic structural diagram of another power-on reset circuit disclosed in an embodiment of the present application is shown, in which a first transistor Q1 and a second transistor Q2 are MOSFETs, and a first impedance device Z1 and a second impedance device Z2 are MOSFETs with short-circuited gates and drains. The equivalent relationship of the turning moment in this case is:
referring to fig. 8, a schematic structural diagram of another power-on reset circuit disclosed in an embodiment of the present application is shown, in which a first transistor Q1 and a second transistor Q2 are BJTs, and a first impedance device Z1 and a second impedance device Z2 are resistors. The equivalent relationship of the turning moment in this case is:
referring to fig. 9, a schematic structural diagram of another power-on reset circuit disclosed in an embodiment of the present application is shown, in which a first transistor Q1 and a second transistor Q2 are BJTs, and a first impedance device Z1 and a second impedance device Z2 are MOSFETs with shorted gates and drains. The equivalent relationship of the turning moment in this case is:
therefore, in the embodiment of the application, a zero temperature drift design thought based on a band gap reference (Bandgap voltage reference, bandgap) is adopted, a BJT or MOSFET power-on process is innovatively designed, different Vbe or Vgs are generated to realize a POR function, the characteristics of the temperature coefficient of the BJT or MOSFET are combined, the POR design of high-precision low temperature drift is realized, the designed threshold precision is only about tens mV of deviation under PVT, and the precision can be properly optimized or relaxed continuously according to different requirements so as to meet the requirements of lower power consumption or smaller area. In addition, the power-on reset circuit in the embodiment of the application is simple in structure and low in power consumption, can control the power consumption to be between 100nA and 200nA, and can realize area and performance compromise through two configurations of the BJT or the MOSFET, so that the configuration is flexible. The size of the first transistor is n times of the size of the second transistor, so that the initial power-on rate of the branch corresponding to the first end of the first transistor is greater than that of the branch corresponding to the first end of the second transistor, and the resistance of the branch corresponding to the first end of the first transistor is not present, so that the subsequent power-on rate of the branch corresponding to the first end of the first transistor is smaller than that of the branch corresponding to the first end of the second transistor, and the current of the first end of the second transistor gradually catches up with the current of the first end of the first transistor, thereby realizing a power-on reset function. The difference between the second voltage difference and the first voltage difference is a voltage quantity which increases along with the increase of temperature, the first voltage difference is a voltage quantity which decreases along with the increase of temperature, so that temperature complementation can be formed between the difference between the first voltage difference and the second voltage difference, and the temperature compensation can fully play a role due to the specific connection relation of the power-on reset circuit, so that the POR threshold value determined by the difference between the first voltage difference and the second voltage difference, the second voltage and the resistance value of the resistor is less influenced by the temperature, and the accuracy of the POR threshold value can be further improved. The POR threshold is realized in a voltage comparison mode, so that the magnitude of current does not influence the judgment of the comparator on the input voltage, and as long as the voltage drop on the first impedance device and the voltage drop on the second impedance device are unequal, the voltage drop on the first impedance device and the voltage drop on the second impedance device can be judged by the comparator, and the power consumption of the power-on reset circuit can be controlled to be very low through the optimal design, the effects of not influencing the precision of the POR threshold and reducing the power consumption are achieved, and the power-on reset circuit with higher POR threshold precision and low power consumption can be obtained.
It should be noted that, in the present description, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different manner from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A power-on reset circuit, the power-on reset circuit comprising: the device comprises a power supply voltage division module, a core module and a comparator module, wherein the power supply voltage division module is connected with the core module, and the core module is connected with the comparator module;
the core module includes: a first resistor, a first impedance device, a second impedance device, a first transistor and a second transistor, the first transistor having a size n times the size of the second transistor, the comparator module comprising: a comparator;
a first end of the first resistor is connected with a first end of the first transistor, and a second end of the first resistor is connected with a first end of the second transistor;
the first end of the first impedance device is connected with the first end of the second impedance device, and the second end of the first impedance device is connected with the second end of the first transistor and the first end of the comparator;
the first end of the second impedance device is connected with the second end of the comparator, and the second end of the second impedance device is connected with the second end of the second transistor and the second end of the comparator;
the second end of the first transistor is connected with the first end of the comparator;
a second end of the second transistor is connected with a second end of the comparator, and a third end of the second transistor is connected with a third end of the first transistor;
the comparator is used for comparing the input voltage of the first end of the comparator with the input voltage of the second end of the comparator;
the power-on reset POR threshold is determined by a difference value between a second voltage difference and a first voltage difference, and a resistance value corresponding to the first voltage difference and the power supply voltage division module; the first voltage difference refers to a voltage difference between a third terminal and a first terminal of the first transistor, and the second voltage difference refers to a voltage difference between the third terminal and the first terminal of the second transistor.
2. The power-on reset circuit of claim 1, wherein the power supply voltage division module comprises: the second resistor, the third resistor, the fourth resistor and the switch;
the first end of the second resistor is connected with the second end of the third resistor and the third end of the first transistor, and the second end of the second resistor is connected with the second end of the first resistor and the first end of the second transistor;
the first end of the third resistor is connected with the second end of the fourth resistor and the second end of the switch, and the second end of the third resistor is connected with the third end of the first transistor;
the first end of the fourth resistor is connected with the first end of the switch and the first end of the first impedance device, and the second end of the fourth resistor is connected with the second end of the switch.
3. The power-on reset circuit of claim 1, wherein the comparator module further comprises: a first inverter and a second inverter;
the third end of the comparator is connected with the first end of the first inverter;
the second end of the first inverter is connected with the first end of the second inverter and the third end of the switch;
the first end of the second inverter is connected with the third end of the third switch, and the second end of the second inverter is used as the output end of the power-on reset circuit.
4. The power-on reset circuit of claim 1, wherein the first transistor is a BJT and the second transistor is a BJT;
the first end of the first transistor is an emitter, the second end of the first transistor is a collector, and the third end of the first transistor is a base;
the first end of the second transistor is an emitter, the second end of the second transistor is a collector, and the third end of the second transistor is a base;
the first voltage difference refers to a voltage difference between a base and an emitter of the first transistor, and the second voltage difference refers to a voltage difference between a base and an emitter of the second transistor.
5. The power-on reset circuit of claim 1, wherein the first transistor is a MOSFET and the second transistor is a MOSFET;
the first end of the first transistor is a source electrode, the second end of the first transistor is a drain electrode, and the third end of the first transistor is a grid electrode;
the first end of the second transistor is a source electrode, the second end of the second transistor is a drain electrode, and the third end of the second transistor is a grid electrode;
the first voltage difference refers to a voltage difference between a gate and a source of the first transistor, and the second voltage difference refers to a voltage difference between a gate and a source of the second transistor.
6. The power-on reset circuit of claim 1, wherein the power-on reset circuit has a power-on process of:
before the power supply voltage rises to the POR threshold value, the input voltage of the first end of the comparator is smaller than the input voltage of the second end of the comparator, the output signal of the comparator is in a low level, and the output signal of the power-on reset circuit is in a low level;
after the power supply voltage rises to the POR threshold value, the input voltage of the first end of the comparator is larger than the input voltage of the second end of the comparator, the output signal of the comparator is in a high level, and the output signal of the power-on reset circuit is in a high level.
7. A power-on-reset circuit as recited in claim 3, wherein the comparator module further comprises: schmitt trigger;
the first end of the Schmitt trigger is connected with the third end of the comparator, and the second end of the Schmitt trigger is connected with the first end of the first inverter.
8. The power-on reset circuit of claim 2, wherein the core module further comprises a fifth resistor;
the first end of the fifth resistor is connected with the second end of the first resistor and the first end of the second transistor, and the second end of the fifth resistor is connected with the second end of the second resistor.
9. The power-on reset circuit of claim 8, wherein the POR threshold is determined by a difference between a second voltage difference and a first voltage difference, the first voltage difference, a resistance of the first resistor, a resistance of the second resistor, a resistance of the third resistor, a resistance of the fourth resistor, and a resistance of the fifth resistor.
10. The power-on reset circuit of claim 1, wherein the comparator module further comprises: a capacitor;
the first end of the capacitor is connected with the first end of the second impedance device, and the second end of the capacitor is connected with the second end of the comparator.
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| CN119483565A (en) * | 2025-01-14 | 2025-02-18 | 宁波奥拉半导体股份有限公司 | Power-on reset circuit and electronic equipment |
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| CN119483565A (en) * | 2025-01-14 | 2025-02-18 | 宁波奥拉半导体股份有限公司 | Power-on reset circuit and electronic equipment |
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