CN117614396A - Current sensing amplifier circuit and input offset voltage correction method - Google Patents

Abstract

A current sensing amplifier circuit and its input offset voltage correction method. The current sensing amplifier circuit includes: an amplifier configured to generate an output voltage related to the current to be sensed according to a first input voltage at a first input terminal and a second input voltage at a second input terminal in a normal operating mode; and The current source circuit is used to generate a correction current according to the first input voltage and the reference voltage in the correction mode, and to provide the correction current to correct the input offset voltage generated by the current sensing amplifier circuit in the normal operation mode; current The source circuit is coupled between: the first resistor and the non-inverting input terminal, the second resistor and the output voltage, the third resistor and the non-inverting input terminal, or the fourth resistor and the inverting input terminal.

Description

Current sensing amplifier circuit and input offset voltage correction method

Technical field

The present invention relates to a current sensing amplifier circuit and an input offset voltage correction method thereof, and in particular to a current sensing amplifier circuit capable of correcting an input offset voltage by providing a correction current and an input offset voltage correction method thereof.

Background technique

Please refer to FIGS. 1A and 1B . FIG. 1A is a step flow chart showing an input offset voltage correction method 10 of a current sensing amplifier circuit in the related art. FIG. 1B is a schematic diagram showing a current sensing amplifier circuit 11 with a function of correcting the input offset voltage in the related art. In the current sensing amplifier circuit 11 of the prior art, the input offset voltage (offset referred to input, RTI) generated by the resistors R11, R21, and R31 during the manufacturing process causes the current sensing amplifier circuit 11 to The gain cannot match and deviates from the design value, causing errors in current sensing results. As shown in FIG. 1A and referring to FIG. 1B , the current sensing amplifier circuit 11 of the prior art has two input terminals Ni1 and Ni2, and a reference voltage Vref is added so that the current sensing amplifier circuit 11 can sense bidirectional current. The current sense amplifier circuit 11 in the prior art adjusts the resistance value of the built-in programmable feedback resistor chain Rcr to correct the input offset voltage; as shown in Figure 1B, after the correction process, the current sense amplifier circuit 11 is The input offset voltage needs to be corrected, and some resistors R41, R42, with relatively small resistance values are selected to be connected in series to the output end to correct the input offset voltage.

Compared with other prior art current sensing amplifier circuits (not shown), the current sensing amplifier circuit 11 further includes a resistor R31 coupled to the reference voltage Vref. One end of the resistor R31 is coupled to the reference voltage Vref, and the other end of the resistor R31 is electrically connected to the reference voltage Vref. Connect to the non-inverting input of the amplifier. The resistor R31 coupled to the reference voltage Vref is provided for the following two reasons.

First, if there is no reference voltage Vref to apply a bias voltage to the non-inverting input terminal of the amplifier through the resistor R31, when the common mode voltage of the inverting input terminal and the non-inverting input terminal of the amplifier is electrically connected to a relatively high voltage, For example, when the current sensing amplifier circuit 11 is applied to the upper bridge circuit in a power conversion circuit and the current sensing amplifier circuit 11 is not provided with a resistor R31 coupled to the reference voltage Vref, the inverting input terminal and the non-inverting input terminal of the amplifier It will be electrically connected to a relatively high voltage, causing damage to the amplifier, or the amplifier must use high-voltage components, which increases manufacturing costs. After setting the resistor R31 coupled to the reference voltage Vref, the common mode voltage of the inverting input terminal and the non-inverting input terminal of the amplifier can be adjusted to a relatively low voltage. In this way, the amplifier can use low-voltage components without using High voltage resistant components to reduce costs and avoid amplifier damage.

Second, in the normal operation mode, the relationship between the input voltage (Vin+ and Vin-) of the current sensing amplifier circuit 11 and the output voltage Vout is as follows:

Vout＝Vref+(Vin ₊ -Vin _- )*k

where k is a preset constant.

When the input voltage Vin+ of the input terminal Ni1 is less than the input voltage Vin- of the input terminal Ni2, if no reference voltage Vref applies a bias voltage to the non-inverting input terminal of the amplifier (that is, the reference voltage Vref=0), the output voltage Vout is in accordance with The above expression should be a negative value, but when the voltage drop from the internal supply voltage to the ground potential is used as the power supply to the amplifier, the amplifier cannot actually generate a negative output voltage Vout. Therefore, if the output voltage Vout should be a negative value, it can only output zero potential. The reference voltage Vref applies a bias voltage to the non-inverting input terminal of the amplifier, which can shift the level of the output voltage Vout to a positive value, which is suitable for the case where the input voltage Vin+ of the input terminal Ni1 is smaller than the input voltage Vin- of the input terminal Ni2.

Specifically, please refer to FIG. 1A . The input offset voltage correction method 10 is used to correct the input offset voltage of the current sense amplifier circuit 11 of the related art, and includes the following steps. In step 101, the programmable feedback resistor chain Rcr (a series resistor including resistors R4a, R41, R42, ,) is short-circuited. In step 101, short-circuiting the programmable feedback resistor chain Rcr means turning on the switch SW4a to short-circuit the output voltage Vout and the inverting input terminal of the amplifier. Next, in step 102, two different common-mode voltages are applied to the input terminals (ie, input terminal Ni1 and input terminal Ni2), and the output voltage Vout of the amplifier at the two different common-mode voltages is measured respectively, and calculated twice. The difference between the output voltages Vout is used to obtain the first output voltage difference. Afterwards, in step 103, the short circuit is removed (meaning to turn off the switch SW4a) and the uncorrected feedback chain resistance value in the programmable feedback resistor chain Rcr is measured. Next, in step 104, under the condition of the uncorrected feedback chain resistance value of the programmable feedback resistor chain Rcr, the two different common mode voltages are applied to the input terminals (i.e., the input terminal Ni1 and the input terminal Ni2), and again Measure the output voltage Vout of the amplifier at two different common-mode voltages, and calculate the difference between the two output voltages to obtain the second output voltage difference. Next, in step 105, a linear equation is derived based on the first output voltage difference, the second output voltage difference and the uncorrected feedback chain resistance value (0 and Rcr). Then, in step 106, the feedback resistance target is obtained based on the aforementioned linear equation. Next, in step 107, the programmable feedback resistance chain Rcr is trimmed to a programmable resistance combination closest to the feedback resistance target for use in the feedback chain. Next, in step 108, during normal operation, the current flowing through the two input terminals of the amplifier is sensed based on the modified feedback chain resistance value of the programmable feedback resistor chain Rcr. The above-mentioned 10 steps of the input offset voltage correction method in the prior art are cumbersome, and if there are two loops, all the cumbersome steps must be repeated again.

Although the current sensing amplifier circuit 11 of the prior art shown in FIG. 1B can sense current in both directions, that is, it can sense current in two situations: the input voltage Vin+ is less than the input voltage Vin- and the input voltage Vin- is less than the input voltage Vin+. , but the equivalent input offset voltage will change as the input voltages Vin+ and Vin- and/or the reference voltage Vref change. Therefore, the current sense amplifier circuit 11 of the prior art corrects the input offset voltage under specific conditions (for example, a combination of an input voltage with a specific level and a reference voltage) to obtain a fixed correction. value, and when adjusting the resistance value of the programmable feedback resistor chain Rcr to the corresponding resistance value according to this combination, it can indeed compensate for the corresponding input offset voltage under this specific condition, so that the actual output voltage is consistent with the corresponding output There is no output offset voltage between the expected voltage values (that is, the output offset voltage is 0).

However, when the input voltage and/or the reference voltage changes (for example, the second combination of the input voltage and the reference voltage), the input offset voltage changes accordingly. Therefore, under another combination, the current sensor of the prior art The output offset voltage between the output voltage of the amplifier circuit 11 and the corresponding expected value of the output voltage cannot be ignored (that is, the output offset voltage is not 0), causing errors in current sensing results. It should be noted that the "output offset voltage" is equal to the "input offset voltage" multiplied by the gain of the amplifier.

It should be noted that the above situation will also occur if other existing technology current sense amplifier circuits are corrected with a fixed correction current. Whether the "output offset voltage" or "input offset voltage" is the same as the input voltage Vin+ and Vin- and/or the reference voltage Vref are related, that is to say, when the input voltages Vin+ and Vin- (that is, the input common mode voltage of the input voltages Vin+ and Vin- change) and/or the reference voltage Vref changes, the "output offset Voltage" or "input offset voltage" will change accordingly, causing current sensing errors. Therefore, if only a fixed correction current is used to correct the input offset voltage (rather than a correction current proportional to the input voltages Vin+ and Vin- and the reference voltage Vref), only a certain input voltage Vin+ and Vin- can be aligned. and the reference voltage Vref (because it is the corrected current obtained under this combination).

Other related existing technologies include P.Horowitz and W.Hill, The Art of Electronics.Cambridge, U.K.: Cambridge Univ.Press, 1989. It is a traditional current detector that uses three groups of operational amplifiers for integration. Using this architecture The advantage is that common instrumentation amplifier circuits that provide high common-mode rejection ratio (CMRR) and balanced high input impedance can be divided into two parts. The input stage is mainly used as a buffer, and the output stage is a differential amplifier that can provide high differential gain. You can also adjust the differential gain of the instrumentation amplifier by adjusting the resistance value of the individual resistors. Because this single resistor is different from the other resistors in the circuit, the resistance value of this single resistor does not need to match any other resistor. However, this architecture is not suitable for system offset and high common-mode voltage input.

Another related prior art is Razvan Puscasu, Pavel Brinzoi, & Laurentiu Creosteanu, "A High Voltage Current Sense Amplifier With Extended Input CommonMode Range Based On A Low Voltage Operational Amplifier Cell". This prior art is designed to overcome the problem of current detectors. A current detection circuit developed under the condition that the input common mode voltage has a wide range of common mode voltage input and can detect the input bidirectional current, and the input common mode voltage has nothing to do with the power supply. However, due to the input offset voltage generated by errors in the resistor manufacturing process, the overall gain cannot match and deviates from the design value, thereby causing errors in the current sensing results.

Another related prior art is R.C.Yen and P.R.Gray, "A MOS switched-capacitor instrumentation amplifier," IEEE J.Solid-State Circuits, vol.SC-17, pp.1008–1013, Dec.1982, published here. The technical current detector architecture can increase the input range of the common-mode voltage, but this indirectly leads to the different input offset voltages of the overall operational amplifier under different common-mode voltage inputs. When considering The phenomenon of process offset will lead to a decrease in the accuracy of its output voltage. In order to overcome this, the current detector uses capacitive switching technology (Chopper) to design input offset voltage suppression.

Other related existing technologies such as "TI: INA213 Voltage Output, Low-or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors", "OnSemiconductor: NCS199A1R, Current-Shunt Monitors, Voltage Output, Bidirectional, Zero- Drift, Low-or High-Side Current Sensing", "SGMICRO: SGM8199 Voltage Output, High-or Low-Side Measurement, Bi-Directional Current Shunt Monitor" and "3PEAK: TP181, Zero-Drift, Bi-directional Current Sense Amplifier ".

In view of this, the present invention aims at the above-mentioned shortcomings of the prior art and proposes a current sensing amplifier circuit and an input offset voltage correction method thereof.

Contents of the invention

In one aspect, the present invention provides a current sensing amplifier circuit for sensing a current to be sensed flowing through a sensing resistor, wherein both ends of the sensing resistor are coupled to the current sensing circuit. A first input terminal and a second input terminal of the amplifier circuit. The current sensing amplifier circuit includes: an amplifier for operating in a normal operating mode according to a first input voltage of the first input terminal and the second input terminal. A second input voltage at the input terminal generates an output voltage related to the current to be sensed; a first resistor is coupled between a reference voltage and a non-inverting input terminal of the amplifier, wherein the first The resistance value of the resistor is a first resistance value plus a first error resistance value; a second resistor is coupled between the output voltage and an inverting input terminal of the amplifier, wherein the resistance value of the second resistor is the first resistance value minus the first error resistance value; a third resistor is coupled between the first input terminal and the non-inverting input terminal, wherein the resistance value of the third resistor is a second resistance minus a second error resistance; a fourth resistor, coupled between the second input terminal and the inverting input terminal, wherein the resistance value of the fourth resistor is the second resistance plus the a second error resistance; and a current source circuit for generating a correction current according to the first input voltage, the second input voltage or an input common mode voltage and the reference voltage in a correction mode, and in In the normal operation mode, the correction current is provided to correct the input offset (offset referred to input, RTI) voltage generated by the first error resistance and the second error resistance; wherein, the current source circuit is coupled Between: the first resistor and the non-inverting input terminal, between the second resistor and the output voltage, between the third resistor and the non-inverting input terminal or between the fourth resistor and the inverting input terminal wherein, in the correction mode, the first input terminal is electrically connected to the second input terminal, so that the first input voltage and the second input voltage have the same potential.

In one embodiment, the current source circuit includes: a first voltage-to-current circuit for converting the first input voltage, the second input voltage or the input common-mode voltage to generate a first current; a second a voltage-to-current circuit for converting the reference voltage to generate a second current; and a correction current generation circuit for generating the correction current according to the first current and the second current in the correction mode, so that the The output voltage is equal to or closest to this reference voltage.

In one embodiment, the modified current generating circuit includes: a first current replicating circuit for replicating the first current to generate a first replicating current; and a second current replicating circuit for replicating the second current. , to generate a second copy current; a first addition circuit for performing a subtraction operation to subtract the second copy current from the first copy current to generate a first subtraction result; a second addition circuit, Used to perform a subtraction operation to subtract the first copy current from the second copy current to generate a second subtraction result; a judgment circuit used to when the first copy current is higher than the second copy current, Generate a first enable signal, and when the second copy current is higher than the first copy current, generate a second enable signal; a first current correction circuit to be enabled by the first enable signal signal to modify the first subtraction result to generate a first correction current; a second current correction circuit to be enabled by the second enable signal to modify the second subtraction result to generate a first two correction currents; and a third addition circuit for performing an addition operation on the first correction current and the second correction current to generate the correction current.

In one embodiment, the first current replication circuit and the second current replication circuit each include at least one current mirror circuit.

In one embodiment, the reference voltage is used to adjust an input common mode voltage of the amplifier so that the current sensing amplifier circuit has a bidirectional current sensing function.

In one embodiment, the current sense amplifier circuit further includes a capacitive switch circuit (chopper) coupled between the non-inverting input terminal and the inverting input terminal for suppressing voltage variation at different input common-mode voltages. The input offset voltage changes caused by the time.

In one embodiment, the input offset voltage corresponds to a compensation term related to the correction current, and the compensation term does not affect the gain error of the amplifier.

In one embodiment, the correction current is proportional to the difference between the first input voltage and the reference voltage, the difference between the second input voltage and the reference voltage, or the difference between the first input voltage and the second input voltage. The difference between an input common-mode voltage and the reference voltage.

In one embodiment, the first error resistance is less than half of the first resistance, and the second error resistance is less than half of the second resistance.

In one embodiment, in the correction mode, the current source circuit generates the correction current using a bisection approximation method, a single slope approximation method or a stepwise approximation method according to the first input voltage and the reference voltage.

In another aspect, the present invention provides an input offset voltage correction method for correcting the input offset (offset referred to input, RTI) voltage of a current sensing amplifier circuit. The input offset voltage correction method includes: electrically connecting a first input terminal and a second input terminal of the current sensing amplifier circuit so that a first input voltage of the first input terminal and a second input voltage of the second input terminal have the same potential; converting the first input voltage, the second input voltage or an input common mode voltage to generate a first current; converting a reference voltage to generate a second current; and generating based on the first current and the second current A current is corrected so that an output voltage of the current sensing amplifier circuit is equal to or closest to the reference voltage; wherein a first resistor of the current sensing amplifier circuit is coupled between the reference voltage and the current sensing amplifier circuit between a non-inverting input terminal of an amplifier; wherein in a normal operating mode, the correction current is provided to correct the input offset voltage generated by the current sense amplifier circuit.

In one embodiment, the step of generating the correction current according to the first current and the second current so that the output voltage of the current sense amplifier circuit is equal to or closest to the reference voltage includes: copying the first current to generate a first copy current; copy the second current to generate a second copy current; perform a subtraction operation to subtract the second copy current from the first copy current to generate a first subtraction result ;Perform a subtraction operation to subtract the first copy current from the second copy current to generate a second subtraction result; when the first copy current is higher than the second copy current, generate a first enable signal , and when the second copy current is higher than the first copy current, a second enable signal is generated; according to the first enable signal, the first subtraction result is corrected to generate a first correction current; according to The second enable signal corrects the second subtraction result to generate a second correction current; and performs an addition operation on the first correction current and the second correction current to generate the correction current.

In one embodiment, the input offset voltage correction method further includes: using a capacitive switch circuit (chopper) coupled between the non-inverting input terminal and an inverting input terminal of the current sense amplifier circuit, It is used to suppress the input offset voltage changes caused by different input common mode voltages.

In one embodiment, the resistance value of the first resistor is a first resistance value plus a first error resistance value; wherein a second resistor of the current sensing amplifier circuit is coupled between the output voltage and the amplifier between an inverting input terminal, wherein the resistance value of the second resistor is the first resistance value minus the first error resistance value; wherein a third resistor of the current sensing amplifier circuit is coupled to the first between an input terminal and the non-inverting input terminal, wherein the resistance value of the third resistor is a second resistance value minus a second error resistance value; wherein a fourth resistor of the current sensing amplifier circuit is coupled to is connected between the second input terminal and the inverting input terminal, wherein the resistance value of the fourth resistor is the second resistance value plus the second error resistance value; wherein the input offset voltage is related to the first error resistance and the second error resistance.

The advantage of the present invention is that the present invention can enable the current sensing amplifier circuit to have a bidirectional current sensing function, and can improve the accuracy of the gain by correcting the current to reduce the resistance mismatch caused by the resistor process.

The following will be described in detail through specific embodiments, which will make it easier to understand the purpose, technical content, characteristics and achieved effects of the present invention.

Description of drawings

FIG. 1A is a step flow chart showing an input offset voltage correction method of a current sensing amplifier circuit in the related art.

FIG. 1B is a schematic diagram showing a current sensing amplifier circuit with a function of correcting the input offset voltage in the related art.

FIG. 2A is a circuit schematic diagram showing a current sensing amplifier circuit according to an embodiment of the present invention.

FIG. 2B is a circuit schematic diagram showing a current sensing amplifier circuit according to another embodiment of the present invention.

FIG. 3 is a block diagram showing a current source circuit according to an embodiment of the present invention.

FIG. 4 is a circuit block diagram showing a current source circuit and a correction current generating circuit therein according to an embodiment of the present invention.

FIG. 5 is a circuit block diagram showing a correction current generating circuit according to another embodiment of the present invention.

FIG. 6 is a circuit block diagram showing a current source circuit according to another embodiment of the present invention.

FIG. 7 is a circuit schematic diagram showing a current correction circuit according to an embodiment of the present invention.

FIG. 8 shows the difference between the reference voltage and the input voltage of the current sensing amplifier circuit of the present invention relative to the input offset voltage and the reference voltage and the input voltage of the known current sensing amplifier circuit according to an embodiment of the present invention. Difference versus input offset voltage plot.

FIG. 9 is a diagram showing the relationship between the difference between the reference voltage and the input voltage and the correction current of the current sensing amplifier circuit of the present invention at different temperatures according to an embodiment of the present invention.

FIG. 10 is a diagram showing the relationship between the difference between the reference voltage and the input voltage and the input offset voltage at different temperatures for the current sensing amplifier circuit of the present invention according to an embodiment of the present invention.

FIG. 11 is a diagram showing the relationship between the correction code used by the current correction circuit of the current sensing amplifier circuit of the present invention and the input offset voltage at different temperatures according to an embodiment of the present invention.

FIG. 12 is a diagram showing the relationship between the correction code used by the current correction circuit of the current sensing amplifier circuit of the present invention and the differential nonlinearity at different temperatures according to an embodiment of the present invention.

FIG. 13 is a diagram showing the relationship between the correction code used by the current correction circuit of the current sensing amplifier circuit of the present invention and the output voltage at different temperatures according to an embodiment of the present invention.

FIG. 14 is a flow chart showing the steps of the input offset voltage correction method of the present invention according to an embodiment of the present invention.

FIG. 15 is a flow chart showing the steps of generating a correction current according to an embodiment of the present invention.

FIG. 16 is a flow chart showing the steps of the capacitive switch circuit of the present invention to suppress input offset voltage changes caused by different input common mode voltages according to an embodiment of the present invention.

Explanation of symbols in the figure

10: Input offset voltage correction method

11: Current sensing amplifier circuit

101～108: Step 20: Current sensing amplifier circuit

201: Current source circuit

2011a, 2011b: Voltage to Current Circuit

2012: Revised current generation circuit

20121, 20121a, 20121b: Current Replication Circuit

20122a, 20122b, 20122c: Adding circuit

20123, 20123a, 20123b: Judgment circuit

20124a, 20124b: Current correction circuit

20125a, 20125b, 20126a, 20126b: Current source

202: Amplifier

203: First resistor

204: Second resistor

205: Third resistor

206: Fourth resistor

207: Capacitor switch circuit

30: Input offset voltage correction method

301～306, 3041～3048: steps

dR1: first error resistance

dR2: second error resistance

En1, En2: enable signal

Idn, Iup: current

-Ig1: negative first current

Ig2: second current

-Ig2: negative second current

Igc1: first copy current

Igc2: second copy current

Imo1: first subtraction result

Imo2: second subtraction result

Is: current to be sensed

Itrim: correct current

Itrim+: First modified current

Itrim-: Second modified current

Nd1: first node

Nd2: second node

Nd3: The third node

Nd4: fourth node

Ni1: (first) input terminal

Ni2: (second) input terminal

Np1, Np2, Np3, Ns: nodes

Q1～Qn, Qj1, Qj2, Qj3: switch

Qm1, Qm2: transistor

R1: first resistance

R1b, R2b, R3b, R4b, RT, R11, R21, R31, R41, R42, R4a: Resistors

R2: second resistance value

Rcr: Programmable feedback resistor chain

Rs: sensing resistance

SW1～SWn-1, SW4a: switch

Vcom: input common mode voltage

VDDA: high potential

Vgs1, Vgs2: gate-source voltage

Vin+: (first) input voltage

Vin-: (second) input voltage

Vout: output voltage

Vref: reference voltage

VSSA: low potential

Detailed ways

The drawings in the present invention are all schematic, and are mainly intended to show the coupling relationship between various circuits and the relationship between various signal waveforms. As for the circuits, signal waveforms and frequencies, they are not drawn to scale.

FIG. 2A is a circuit schematic diagram showing a current sensing amplifier circuit according to an embodiment of the present invention. As shown in FIG. 2A , the current sensing amplifier circuit 20 of the present invention is used to sense the current Is to be sensed flowing through the sensing resistor Rs. Two ends of the sensing resistor Rs are respectively coupled to the first input terminal Ni1 and the second input terminal Ni2 of the current sensing amplifier circuit 20 . The current sensing amplifier circuit 20 includes a current source circuit 201, an amplifier 202, a first resistor 203, a second resistor 204, a third resistor 205 and a fourth resistor 206. The amplifier 202 is used in the normal operation mode to generate an output voltage Vout related to the current Is to be sensed according to the first input voltage Vin+ of the first input terminal Ni1 and the second input voltage Vin- of the second input terminal Ni2.

The first resistor 203 is coupled between the reference voltage Vref and the non-inverting input terminal of the amplifier 202 . The resistance value of the first resistor 203 is the first resistance value R1 plus the first error resistance value dR1. The second resistor 204 is coupled between the output voltage Vout and the inverting input terminal of the amplifier 202 . The resistance value of the second resistor 204 is the first resistance value R1 minus the first error resistance value dR1. The third resistor 205 is coupled between the first input terminal Ni1 and the non-inverting input terminal of the amplifier 202 . The resistance value of the third resistor 205 is the second resistance value R2 minus the second error resistance value dR2. The fourth resistor 206 is coupled between the second input terminal Ni2 and the inverting input terminal of the amplifier 202 . The resistance value of the fourth resistor 206 is the second resistance value R2 plus the second error resistance value dR2.

Please refer to FIG. 2A and FIG. 3 at the same time. The current source circuit 201 is used in the correction mode to generate the correction current Itrim according to the first input voltage Vin+, the second input voltage Vin- or the input common mode voltage Vcom and the reference voltage Vref, and In the normal operation mode, the correction current Itrim is provided to correct the input offset (offset referred to input, RTI) voltage of the current sense amplifier circuit 20 caused by the first error resistance dR1 and the second error resistance dR2. In one embodiment, the current source circuit 201 is coupled to: a first node Nd1 between the first resistor 203 and the non-inverting input terminal, a second node Nd2 between the second resistor 204 and the output voltage Vout, A third node Nd3 between the third resistor 205 and the non-inverting input terminal or a fourth node Nd4 between the fourth resistor 206 and the inverting input terminal.

In one embodiment, as shown in FIG. 2A , resistors R1b, R2b, R3b and R4b can be selectively coupled between the non-inverting input terminal of the amplifier 202 and the current source circuit 201, the output voltage Vout and the current source circuit respectively. 201, between the non-inverting input terminal of the amplifier 202 and the current source circuit 201, and between the inverting input terminal of the amplifier 202 and the current source circuit 201. In the correction mode, the first input terminal Ni1 is electrically connected to the second input terminal Ni2, so that the first input voltage Vin+ and the second input voltage Vin- have the same potential. The reference voltage Vref is used to adjust the input common mode voltage of the amplifier 202 so that the current sensing amplifier circuit 20 has a bidirectional current sensing function.

Referring to FIG. 2A and FIG. 6 , in the correction mode, for example, the current source circuit 201 is coupled to the second node Nd2 between the second resistor 204 and the output voltage Vout, and the resistor R2b is coupled between the output voltage Vout and the current. When the source circuit 201 is between, since the first input voltage Vin+ is equal to the second input voltage Vin-, the output voltage Vout is as shown in equation (1):

Where m is the magnification of all current mirrors and current correction circuits 20124a and 20124b. In formula (1) is the input offset voltage, and/> It is a compensation term for correcting the current Itrim, which is corresponding to the above-mentioned input offset voltage, and this compensation term does not affect the gain error of the amplifier 202.

As mentioned above, it can be seen from the compensation term of the correction current Itrim that the correction current Itrim is proportional to the difference between the first input voltage Vin+ and the reference voltage Vref, for example. Please refer to Figure 7 at the same time. In the correction mode, under specific conditions (that is, selecting a reference voltage Vref and selecting a combination of the first input voltage Vin+), the system is gradually adjusted according to the difference between the output voltage Vout and the reference voltage Vref. (That is, using various approximation methods) The ratio of the respective turned-on transistors in the current correction circuits 20124a and 20124b is used to adjust the m value in equation (1), which is obtained when the output voltage Vout is equal to or closest to the reference voltage Vref The m value is the m value that can make the compensation term of the input offset voltage and the correction current Itrim in equation (1) equal or closest. In the normal operating mode, the obtained m value is used to set the ratio of the respective conductive transistors in the current correction circuits 20124a and 20124b, so that the current source circuit 201 can provide the correction current Itrim to correct the first error resistance dR1 The input offset voltage generated by the second error resistance dR2. And because the current correction circuits 20124a and 20124b configured according to the present invention are for the m value, no matter how the first input voltage Vin+ and the reference voltage Vref change, the current source circuit 201 can provide the correct correction current Itrim to compensate for the input offset voltage. , without entering correction mode again.

It should be noted that the input offset voltage corrected in the present invention refers to the input offset voltage of the current sensing amplifier circuit, rather than the input offset voltage of the amplifier therein. The present invention is particularly concerned with input offset voltages in current sensing amplifier circuits due to errors in the manufacturing process of resistors therein.

In one embodiment, the correction current Itrim is proportional to the difference between the first input voltage Vin+ and the reference voltage Vref, the difference between the second input voltage Vin- and the reference voltage Vref, or the difference between the first input voltage Vin+ and the second input voltage. The difference between an input common mode voltage of Vin- and the reference voltage Vref.

In one embodiment, the first error resistance dR1 is much smaller than the first resistance R1. For example, the first error resistance dR1 is at least less than half of the first resistance R1; and the second error resistance dR2 is much smaller than the second resistance. The value R2, for example, the second error resistance value dR2 is at least less than half of the second resistance value R2. In the ideal current sensing amplifier circuit 20, the first error resistance dR1 and the second error resistance dR2 are zero. That is to say, in the ideal current sensing amplifier circuit 20, the resistance of the first resistor 203 is equal to The second resistor 204 has the same resistance value (ie, the first resistance value R1); the resistance value of the third resistor 205 and the fourth resistor 206 have the same resistance value (ie, the second resistance value R2). Due to the error in the manufacturing process of the first resistor 203 and the second resistor 204, the resistance value of the first resistor 203 is the first resistance value R1 plus the first error resistance value dR1, and the resistance value of the second resistor 204 is the first resistance value R1 plus the first error resistance value dR1. A resistance value R1 minus the first error resistance value dR1. In addition, due to errors in the manufacturing process of the third resistor 205 and the fourth resistor 206, the resistance value of the third resistor 205 is the second resistance value R2 minus the second error resistance value dR2 and the resistance value of the fourth resistor 206. Add the second error resistance dR2 to the second resistance R2.

In one embodiment, in the correction mode, the current source circuit 201 uses a bisection approximation method, a single slope approximation method or a method based on the first input voltage Vin+, the second input voltage Vin- or the input common mode voltage Vcom and the reference voltage Vref. The correction current Itrim is generated by the stepwise approximation method.

It should be noted that the input common mode voltage Vcom is the average of the first input voltage Vin+ and the second input voltage Vin-. In general applications, the first input voltage Vin+, the second input voltage Vin- or the input common mode voltage Vcom The levels are very close, so both can be used to generate the correction current Itrim.

FIG. 2B is a circuit schematic diagram showing a current sensing amplifier circuit according to another embodiment of the present invention. This embodiment is similar to the embodiment of FIG. 2A. The difference is that this embodiment also includes a capacitor switch circuit (chopper) 207, which is coupled between the non-inverting input terminal and the inverting input terminal of the amplifier 202 to suppress Changes in input offset voltage caused by different input common-mode voltages.

FIG. 3 is a block diagram showing a current source circuit according to an embodiment of the present invention. As shown in FIG. 3 , the current source circuit 201 includes a voltage-to-current circuit 2011a, a voltage-to-current circuit 2011b, and a correction current generation circuit 2012. The voltage-to-current circuit 2011a is used to convert the first input voltage Vin+, the second input voltage Vin- or the input common-mode voltage Vcom to generate the first current Ig1. The voltage conversion circuit 2011b is used to convert the reference voltage Vref to generate the second current Ig2. In the correction mode, the correction current generation circuit 2012 generates the correction current Itrim according to the first current Ig1 and the second current Ig2, so that the output voltage Vout is equal to or closest to the reference voltage Vref.

FIG. 4 is a circuit block diagram showing a current source circuit and a correction current generating circuit therein according to an embodiment of the present invention. The voltage-to-current circuits 2011a and 2011b of this embodiment are similar to the voltage-to-current circuits 2011a and 2011b of FIG. 3, so their detailed description is omitted. As shown in FIG. 4 , the correction current generation circuit 2012 includes current copy circuits 20121a and 20121b, an addition circuit 20122a, an addition circuit 20122b, an addition circuit 20122c, a judgment circuit 20123, and current correction circuits 20124a and 20124b. The current copy circuit 20121a is used to copy the first current Ig1 to generate the first copy current Igc1, and the current copy circuit 20121b is used to copy the second current Ig2 to generate the second copy current Igc2. The addition circuit 20122a is used to perform a subtraction operation to subtract the second copy current Igc2 from the first copy current Igc1 to generate a first subtraction result Imo1. The addition circuit 20122b is used to perform a subtraction operation to subtract the first copy current Igc1 from the second copy current Igc2 to generate a second subtraction result Imo2.

The judgment circuit 20123 is used to generate the enable signal En1 when the first copy current Igc1 is higher than the second copy current Igc2, and to generate the enable signal En2 when the second copy current Igc2 is higher than the first copy current Igc1. The current correction circuit 20124a is enabled by the enable signal En1 and corrects the first subtraction result Imo1 to generate the first correction current Itrim+. The current correction circuit 20124b is enabled by the enable signal En2 and corrects the second subtraction result Imo2 to generate the second correction current Itrim-. The addition circuit 20122c is used to perform an addition operation on the first correction current Itrim+ and the second correction current Itrim- to generate the correction current Itrim. In one embodiment, the current replication circuit 20121a and the current replication circuit 20121b each include at least one current mirror circuit. The specific implementation of the judgment circuit 20123 is well known to those skilled in the art and will not be described in detail here.

FIG. 5 is a circuit block diagram showing a correction current generating circuit according to another embodiment of the present invention. The judgment circuit 20123 of this embodiment is similar to the judgment circuit 20123 of Figure 4, so its detailed description is omitted. As shown in FIG. 5 , in this embodiment, the adding circuit 20122a, the adding circuit 20122b and the adding circuit 20122c are respectively implemented in a manner that the circuits are directly coupled to the nodes Np1, Np2 and Np3. A current source 20125a is coupled between one end of the adder circuit 20122a and the ground potential, thereby providing a second current Ig2 flowing from the node Np1 to the ground potential, which is equivalent to a negative second current flowing from the ground potential to the node Np1 -Ig2, and the other end of the adding circuit 20122a is coupled to the current source 20125b, thereby providing a first current Ig1 flowing into the node Np1, and then performing the addition operation through the adding circuit 20122a to obtain the first subtraction result Imo1. A current source 20126a is coupled between one end of the adder circuit 20122b and the ground potential, thereby providing a first current Ig1 flowing from the node Np2 to the ground potential, which is equivalent to the negative first current flowing from the ground potential to the node Np2. -Ig1, and the other end of the adding circuit 20122b is coupled to the current source 20126b, thereby providing a second current Ig2 flowing into the node Np2, and then performing the addition operation through the adding circuit 20122b to obtain the second subtraction result Imo2.

The current replication circuit 20121 in this embodiment is implemented as a current mirror. The current correction circuits 20124a and 20124b in this embodiment are implemented with switches with a correction ratio of 1:1, so the obtained first correction current Itrim+ has the value of the first current Ig1 minus the second current Ig2, and the obtained second The correction current Itrim- has the value of the second current Ig2 minus the first current Ig1 and flows out of the node Np3, which is equivalent to the negative second correction current Itrim- flowing into the node Np3, that is, its value is the second current Ig2 minus the value The negative value of the first current Ig1 is further added by the adder circuit 20122c to generate the correction current Itrim. It should be noted that one or both of the current correction circuits 20124a and 20124b can also be implemented with a combination of multiple switches at any other rate.

FIG. 6 is a circuit block diagram showing a current source circuit according to another embodiment of the present invention. In this embodiment, as shown in FIG. 6 , the voltage-to-current circuit 2011a includes a resistor RT, and the voltage-to-current circuit 2011b includes a resistor RT. The current replication circuits 20121a and 20121b each include at least one current mirror. In this embodiment, the adding circuits 20122a and 20122b are implemented by transistors, and the adding circuit 20122c is implemented by direct circuit coupling. In this embodiment, the judgment circuits 20123a and 20123b include at least one switch Qj1 and Qj2. As shown in Figure 6, the first current Ig1 is shown in formula (2):

Among them, RT is the resistance value of resistor RT, and Vgs1 is the gate-source voltage of transistor Qm1. In the same way, the second current Ig2 is shown in equation (3):

Where Vgs2 is the gate-source voltage of transistor Qm2. As shown in Figure 6, through the subtraction operation of the adder circuit 20122a, the first current Ig1 minus the second current Ig2 is equal to the current Iup. Assuming that the gate-source voltage Vgs1 is equal to the gate-source voltage Vgs2, the current Iup is as follows: (4) shown:

The current Iup is corrected by the current correction circuit 20124a to obtain the first corrected current Itrim+. As shown in Figure 6, through the subtraction operation of the adder circuit 20122b, the second current Ig2 minus the first current Ig1 is equal to the current Idn. Assuming that the gate-source voltage Vgs1 is equal to the gate-source voltage Vgs2, the current Idn is as follows: (5) shown:

The current Idn is corrected by the current correction circuit 20124b to obtain the second corrected current Itrim-. Like the embodiment of FIG. 5 , the first correction current Itrim+ and the second correction current Itrim- are added by the addition circuit 20122c to generate the correction current Itrim. It should be noted that one or both of the current correction circuits 20124a and 20124b may be implemented with a correction ratio of 1:1 or a combination of one or more switches with any other correction ratio. In this embodiment, assuming that the correction magnification is m, and assuming that the magnification of all current mirrors is 1, the first correction current Itrim+ and the second correction current Itrim- are as shown in equations (6) and (7) respectively:

In one embodiment, when the value of the first current Ig1 minus the second current Ig2 is greater than 0, the gate signal of the switch Qj1 is switched to the disabled level and the gate signal of the switch Qj2 is switched to the enabled level. , thereby causing the switch Qj2 to be turned on, thereby causing the first correction current Itrim+ to be generated. Since the gate signal of the switch Qj1 is switched to the inhibit level, the switch Qj1 is not conductive, which causes the node Ns to be coupled to the ground potential, which causes the gate signal of the switch Qj3 to be switched to the inhibit level, causing the switch Qj3 to be non-conductive. , thereby ensuring that when the first correction current Itrim+ is positive, the second correction current Itrim- is zero.

FIG. 7 is a circuit schematic diagram showing a current correction circuit according to an embodiment of the present invention. This embodiment is an exemplary embodiment of the current correction circuit 20124b of FIGS. 4 and 6 . The current correction circuit 20124a of Figures 4 and 6 can also be implemented in a similar manner. As shown in FIG. 7 , the current correction circuit 20124b includes one or more switches Q1˜Qn whose gates are coupled to each other. The current correction circuit 20124b adjusts the number of turned-on switches among the switches SW1 to SWn-1 according to the predetermined correction magnification, and then adjusts the number of active switches among the switches Q1 to Qn-1, so that in the correction mode, The generated correction current Itrim can make the output voltage Vout equal to or closest to the reference voltage Vref. Determine the way to adjust the number of turned-on switches in switches SW1~SWn-1. For example, you can use the bisection approximation method, the single slope approximation method or the step-by-step approximation method to generate the correction current Itrim, which can make the output voltage Vout equal to or closest to the reference Voltage Vref. The bisection approximation method, the single slope approximation method and the stepwise approximation method are well known to those skilled in the art and will not be described in detail here.

FIG. 8 shows the difference between the reference voltage and the input voltage of the current sensing amplifier circuit of the present invention relative to the input offset voltage and the reference voltage and the input voltage of the known current sensing amplifier circuit according to an embodiment of the present invention. Difference versus input offset voltage plot. As can be seen from FIG. 8 , the present invention significantly improves the correction of the input offset voltage compared to the known technology.

FIG. 9 is a diagram showing the relationship between the difference between the reference voltage and the input voltage and the correction current of the current sensing amplifier circuit of the present invention at different temperatures according to an embodiment of the present invention. FIG. 10 is a diagram showing the relationship between the difference between the reference voltage and the input voltage and the input offset voltage at different temperatures for the current sensing amplifier circuit of the present invention according to an embodiment of the present invention. It can be seen from Figures 9 and 10 that the correction current Itrim generated at different temperatures can still correct the input offset voltage stably.

FIG. 11 is a diagram showing the relationship between the correction code used by the current correction circuit of the current sensing amplifier circuit of the present invention and the input offset voltage at different temperatures according to an embodiment of the present invention. FIG. 12 is a diagram showing the relationship between the correction code used by the current correction circuit of the current sensing amplifier circuit of the present invention and the differential nonlinearity at different temperatures according to an embodiment of the present invention. FIG. 13 is a diagram showing the relationship between the correction code used by the current correction circuit of the current sensing amplifier circuit of the present invention and the output voltage at different temperatures according to an embodiment of the present invention. Figures 11 to 13 show the compensation results under different correction currents (represented by correction codes, and different correction codes represent different correction magnifications) when the first input voltage Vin+ is 26V and the reference voltage Vref is 1V.

14 to 16 are step flow charts showing the input offset voltage correction method of the present invention according to embodiments of the present invention. As shown in FIG. 14 , the input offset voltage correction method 30 of the present invention includes, in step 301, electrically connecting a first input terminal and a second input terminal of the current sensing amplifier circuit, so that the first input terminal A first input voltage and a second input voltage of the second input terminal have the same potential. Next, in step 302, the first input voltage is converted to generate a first current. Then, in step 303, a reference voltage is converted to generate a second current. Next, in step 304, a correction current is generated according to the first current and the second current, so that an output voltage of the current sensing amplifier circuit is equal to or closest to the reference voltage. Next, in step 305, in a normal operation mode, the correction current is provided to correct the input offset voltage generated by the current sense amplifier circuit.

In one embodiment, as shown in Figure 15, step 304 includes steps 3041-3048. In step 3041, the first current is copied to generate a first copy current. Then, in step 3042, the second current is copied to generate a second copy current. Next, in step 3043, a subtraction operation is performed to subtract the second copy current from the first copy current to generate a first subtraction result. Then, in step 3044, a subtraction operation is performed to subtract the first copy current from the second copy current to generate a second subtraction result. Next, in step 3045, when the first copy current is higher than the second copy current, a first enable signal is generated, and when the second copy current is higher than the first copy current, a second enable signal is generated. can signal. Then, in step 3046, the first subtraction result is corrected according to the first enable signal to generate a first correction current. Then, in step 3047, the second subtraction result is corrected according to the second enable signal to generate a second correction current. Next, in step 3048, an addition operation is performed on the first correction current and the second correction current to generate the correction current. In one embodiment, the input offset voltage correction method 30 of the present invention may further include step 306, as shown in FIG. 16, using a capacitive switch circuit coupled to the non-inverting input of the current sense amplifier circuit. terminal and an inverting input terminal to suppress changes in the input offset voltage caused by different input common-mode voltages.

As mentioned above, the present invention provides a current sensing amplifier circuit and an input offset voltage correction method thereof, which can enable the current sensing amplifier circuit to have a bidirectional current sensing function, and can improve the accuracy of the gain through the adjustable correction current. Alleviating resistance mismatch caused by resistance process.

The present invention has been described above with reference to the preferred embodiments. However, the above description is only to make it easy for those skilled in the art to understand the content of the present invention, and is not intended to limit the scope of rights of the present invention. The various embodiments described are not limited to single application, but can also be used in combination. For example, two or more embodiments can be used in combination, and part of the components in one embodiment can also be used to replace those in another embodiment. Corresponding components. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or computing according to a certain signal or generating a certain output result", and does not mean It is limited to the signal itself, but also includes performing voltage-to-current conversion, current-to-voltage conversion, and/or ratio conversion on the signal when necessary, and then processing or calculating to produce an output result based on the converted signal. It can be seen from this that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. There are many combinations, and they are not listed here. Accordingly, the scope of the present invention is intended to cover the above and all other equivalent changes.

Claims (19)

1. A current sensing amplifier circuit for sensing a current to be sensed flowing through a sensing resistor, wherein both ends of the sensing resistor are correspondingly coupled to a first input of the current sensing amplifier circuit terminal and a second input terminal, the current sense amplifier circuit includes: An amplifier for generating an output voltage related to the current to be sensed based on a first input voltage of the first input terminal and a second input voltage of the second input terminal in a normal operating mode; a first resistor coupled between a reference voltage and a non-inverting input terminal of the amplifier, wherein the resistance value of the first resistor is a first resistance value plus a first error resistance value; a second resistor coupled between the output voltage and an inverting input terminal of the amplifier, wherein the resistance value of the second resistor is the first resistance value minus the first error resistance value; a third resistor coupled between the first input terminal and the non-inverting input terminal, wherein the resistance value of the third resistor is a second resistance value minus a second error resistance value; a fourth resistor coupled between the second input terminal and the inverting input terminal, wherein the resistance value of the fourth resistor is the second resistance value plus the second error resistance value; and A current source circuit is used to generate a correction current according to the first input voltage, the second input voltage or an input common mode voltage and the reference voltage in a correction mode, and to provide a correction current in the normal operation mode. The correction current is used to correct the input offset voltage generated by the first error resistance and the second error resistance; Wherein, the current source circuit is coupled to: a first node between the first resistor and the non-inverting input terminal, a second node between the second resistor and the output voltage, the third resistor and a third node between the non-inverting input terminal or a fourth node between the fourth resistor and the inverting input terminal; Wherein, in the correction mode, the first input terminal is electrically connected to the second input terminal, so that the first input voltage and the second input voltage have the same potential. 2. The current sense amplifier circuit of claim 1, wherein the current source circuit includes: a first voltage-to-current circuit for converting the first input voltage, the second input voltage or the input common-mode voltage to generate a first current; a second voltage-to-current circuit for converting the reference voltage to generate a second current; and A correction current generating circuit generates the correction current according to the first current and the second current in the correction mode, so that the output voltage is equal to or closest to the reference voltage. 3. The current sensing amplifier circuit of claim 2, wherein the modified current generating circuit includes: a first current replication circuit for replicating the first current to generate a first replication current; a second current replicating circuit for replicating the second current to generate a second replicating current; a first adding circuit for performing a subtraction operation to subtract the second replicating current from the first replicating current to generate a first subtraction result; a second adding circuit for performing a subtraction operation to subtract the first replicating current from the second replicating current to generate a second subtraction result; A judgment circuit for generating a first enable signal when the first copy current is higher than the second copy current, and for generating a second enable signal when the second copy current is higher than the first copy current. energy signal; a first current correction circuit, configured to be enabled by the first enable signal and correct the first subtraction result to generate a first correction current; a second current correction circuit for being enabled by the second enable signal and correcting the second subtraction result to generate a second correction current; and A third addition circuit is used to perform an addition operation on the first correction current and the second correction current to generate the correction current. 4. The current sense amplifier circuit of claim 3, wherein the first current replica circuit and the second current replica circuit each include at least one current mirror circuit. 5. The current sensing amplifier circuit of claim 1, wherein the reference voltage is used to adjust the input common mode voltage of the amplifier so that the current sensing amplifier circuit has a bidirectional current sensing function. 6. The current sensing amplifier circuit as claimed in claim 5, further comprising a capacitive switch circuit coupled between the non-inverting input terminal and the inverting input terminal to suppress changes in voltage between different input terminals. The change in the input offset voltage caused by the common mode voltage. 7. The current sensing amplifier circuit of claim 1, wherein the input offset voltage corresponds to a compensation term related to the correction current, and the compensation term does not affect the gain error of the amplifier. 8. The current sense amplifier circuit of claim 1, wherein the correction current is proportional to the difference between the first input voltage and the reference voltage, the difference between the second input voltage and the reference voltage, or the difference between the second input voltage and the reference voltage. Enter the difference between the input common-mode voltage and this reference voltage. 9. The current sensing amplifier circuit of claim 1, wherein the first error resistance is less than half of the first resistance, and the second error resistance is less than half of the second resistance. 10. The current sense amplifier circuit of claim 1, wherein in the correction mode, the current source circuit uses a bisection approximation method, a single slope approximation method or a stepwise approximation method according to the first input voltage and the reference voltage. The correction current is generated by the method. 11. An input offset voltage correction method for correcting the input offset voltage of a current sensing amplifier circuit. The input offset voltage correction method includes: electrically connecting a first input terminal and a second input terminal of the current sensing amplifier circuit so that a first input voltage of the first input terminal and a second input voltage of the second input terminal have the same potential; converting the first input voltage, the second input voltage or an input common mode voltage to generate a first current; converting a reference voltage to generate a second current; and Generate a correction current according to the first current and the second current so that an output voltage of the current sensing amplifier circuit is equal to or closest to the reference voltage; wherein a first resistor of the current sensing amplifier circuit is coupled between the reference voltage and a non-inverting input terminal of an amplifier of the current sensing amplifier circuit; In a normal operating mode, the correction current is provided to correct the input offset voltage generated by the current sense amplifier circuit. 12. The input offset voltage correction method of claim 11, wherein the correction current is generated according to the first current and the second current so that the output voltage of the current sense amplifier circuit is equal to or the maximum The steps to approach this reference voltage include: copy the first current to generate a first copy current; copy the second current to generate a second copy current; Perform a subtraction operation to subtract the second replica current from the first replica current to generate a first subtraction result; Perform a subtraction operation to subtract the first replica current from the second replica current to generate a second subtraction result; When the first copy current is higher than the second copy current, a first enable signal is generated, and when the second copy current is higher than the first copy current, a second enable signal is generated; Modify the first subtraction result according to the first enable signal to generate a first modified current; Modify the second subtraction result according to the second enable signal to generate a second modified current; and An addition operation is performed on the first correction current and the second correction current to generate the correction current. 13. The input offset voltage correction method of claim 11, wherein the reference voltage is used to adjust the input common mode voltage of the amplifier so that the current sensing amplifier circuit has a bidirectional current sensing function. 14. The input offset voltage correction method of claim 11, further comprising: using a capacitive switch circuit coupled between the non-inverting input terminal and an inverting input terminal of the current sensing amplifier circuit. time to suppress changes in the input offset voltage caused by different input common-mode voltages. 15. The input offset voltage correction method of claim 11, wherein the input offset voltage corresponds to a compensation term related to the correction current, and the compensation term does not affect the gain error of the amplifier. 16. The input offset voltage correction method of claim 11, wherein the resistance value of the first resistor is a first resistance value plus a first error resistance value; wherein a first resistance value of the current sensing amplifier circuit Two resistors, coupled between the output voltage and an inverting input terminal of the amplifier, wherein the resistance value of the second resistor is the first resistance value minus the first error resistance value; wherein the current sensing amplifier A third resistor of the circuit is coupled between the first input terminal and the non-inverting input terminal, wherein the resistance value of the third resistor is a second resistance value minus a second error resistance value; wherein the resistance value of the third resistor is a second resistance value minus a second error resistance value; A fourth resistor of the current sensing amplifier circuit is coupled between the second input terminal and the inverting input terminal, wherein the resistance value of the fourth resistor is the second resistance value plus the second error resistance value. ; wherein the input offset voltage is related to the first error resistance and the second error resistance. 17. The input offset voltage correction method of claim 11, wherein the correction current is proportional to the difference between the first input voltage and the reference voltage, the difference between the second input voltage and the reference voltage, or The difference between the input common-mode voltage and the reference voltage. 18. The input offset voltage correction method of claim 16, wherein the first error resistance is less than half of the first resistance, and the second error resistance is less than half of the second resistance. 19. The input offset voltage correction method of claim 11, wherein a correction current is generated according to the first current and the second current so that an output voltage of the current sense amplifier circuit is equal to or The step closest to the reference voltage is to generate the correction current using the bisection approximation method, the single slope approximation method or the stepwise approximation method.