CN117518637A - Liquid crystal display panel having a light shielding layer - Google Patents
Liquid crystal display panel having a light shielding layer Download PDFInfo
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- CN117518637A CN117518637A CN202311524951.4A CN202311524951A CN117518637A CN 117518637 A CN117518637 A CN 117518637A CN 202311524951 A CN202311524951 A CN 202311524951A CN 117518637 A CN117518637 A CN 117518637A
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 122
- 239000003086 colorant Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 8
- 239000010408 film Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 239000003990 capacitor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000002834 transmittance Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 2
- 101100006548 Mus musculus Clcn2 gene Proteins 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 101150037603 cst-1 gene Proteins 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The embodiment of the application discloses a liquid crystal display panel, which comprises a substrate, a pixel driving circuit, sub-pixels and a data line group. The sub-pixel comprises a pixel electrode, the pixel electrode comprises a main pixel electrode and a sub-pixel electrode, the main pixel electrode comprises a first main part, the sub-pixel electrode comprises a second main part, and the first main part and the second main part are parallel and extend along a first direction. Each data line group comprises a first data line and a second data line which are parallel and extend along a first direction, and the first data line and the second data line are respectively electrically connected with different pixel driving circuits. The first data line at least partially overlaps the first trunk portion, and the second data line at least partially overlaps the second trunk portion. On one hand, the space of the trunk part can be fully utilized, the aperture ratio of the sub-pixel is increased, and on the other hand, DBS electrodes are not required to be arranged above the first data line and the second data line, so that the process is reduced.
Description
Technical Field
The application relates to the field of display, in particular to a liquid crystal display panel.
Background
With the continuous development of liquid crystal displays, the characteristics of wide viewing angle, low energy consumption, high charging rate and the like become important performance indexes for measuring the product advancement. In a high-resolution lcd, both the common electrode and the data line on the tft array substrate are opaque, resulting in a relatively low aperture ratio of the pixel, and a great difficulty in improving the transmittance.
Disclosure of Invention
The embodiment of the application provides a liquid crystal display panel to solve the technical problems of low pixel aperture opening ratio and poor transmittance of a liquid crystal display.
The embodiment of the application provides a liquid crystal display panel, which comprises:
a plurality of sub-pixels distributed in an array, wherein each sub-pixel comprises a pixel electrode, the pixel electrode comprises a main pixel electrode and a sub-pixel electrode, the main pixel electrode comprises a first main part, the sub-pixel electrode comprises a second main part, the first main part and the second main part extend along a first direction, and the central axes of the first main part and the second main part extending along the first direction are parallel or coincident;
the pixel driving circuits are distributed in an array and are electrically connected with the sub-pixels in a one-to-one correspondence manner; and
a plurality of data line groups, each of the data line groups including a first data line and a second data line parallel to each other and extending in the first direction, the first data line and the second data line being electrically connected to different pixel driving circuits, respectively;
the front projection of the first data line on the substrate of the liquid crystal display panel at least overlaps with the front projection part of the first trunk part on the substrate, and the front projection of the second data line on the substrate at least overlaps with the front projection part of the second trunk part on the substrate.
Optionally, in some embodiments of the present application, the width of the first data line is smaller than the width of the first main portion, and the width of the second data line is smaller than the width of the second main portion.
Optionally, in some embodiments of the present application, the liquid crystal display panel further includes a plurality of sharing electrode groups disposed on the same layer as the data line groups, each sharing electrode group including a first sharing electrode and a second sharing electrode that are parallel to each other and extend along the first direction, the first sharing electrode and the first data line being electrically connected to the same pixel driving circuit, the second sharing electrode and the second data line being electrically connected to the same pixel driving circuit;
wherein the first and second sharing electrodes are respectively positioned at opposite sides of the first and second main portions of the corresponding pixel electrode;
the orthographic projections of the first and second shared electrodes on the substrate overlap at least with orthographic projections of edge portions of the pixel electrodes on the substrate.
Optionally, in some embodiments of the present application, the shared electrode group is multiplexed as the first common electrode.
Optionally, in some embodiments of the present application, the main pixel electrode further includes:
a third trunk portion extending in a second direction intersecting the first direction, the first and third trunk portions dividing the main pixel electrode into a plurality of domains,
a plurality of first branch electrodes located in different domains and extending from the first trunk portion and the third trunk portion in different directions; and
a first frame part sequentially connected with the tail ends of the first branch electrodes;
the sub-pixel electrode includes:
a fourth trunk portion extending in the second direction, the second trunk portion and the fourth trunk portion dividing the sub-pixel electrode into a plurality of domains,
a plurality of second branch electrodes located in different domains and extending from the second trunk portion and the fourth trunk portion in different directions; and
the second frame part is sequentially connected with the tail ends of the plurality of second branch electrodes;
the orthographic projection of the first sharing electrode on the substrate is partially overlapped with orthographic projections of the first frame part and the second frame part on the substrate;
and the orthographic projection of the second shared electrode on the substrate is partially overlapped with orthographic projections of the first frame part and the second frame part on the substrate.
Optionally, in some embodiments of the present application, the width of the first common electrode is smaller than the width of the first frame portion and the width of the second frame portion, and the width of the second common electrode is smaller than the width of the first frame portion and the width of the second frame portion.
Optionally, in some embodiments of the present application, an area of overlap between the first data line and the pixel electrode is equal to an area of overlap between the second data line and the pixel electrode.
Optionally, in some embodiments of the present application, the first trunk portion includes a first sub-trunk portion and a second sub-trunk portion that are parallel to each other and extend along the first direction, and the first sub-trunk portion and the second sub-trunk portion are respectively located on opposite sides of the third trunk portion and are connected to the third trunk portion;
the second main part comprises a third sub-main part and a fourth sub-main part which are parallel to each other and extend along the first direction, and the third sub-main part and the fourth sub-main part are respectively positioned at two opposite sides of the fourth main part and are connected with the fourth main part;
the orthographic projection of the first data line on the substrate is overlapped with orthographic projections of the first sub-trunk and the third sub-trunk on the substrate, and orthographic projections of the second data line on the substrate are overlapped with orthographic projections of the second sub-trunk and the fourth sub-trunk on the substrate.
Optionally, in some embodiments of the present application, the first trunk portion includes a first sub-trunk portion and a second sub-trunk portion that each extend along the first direction, the first sub-trunk portion and the second sub-trunk portion are respectively located on opposite sides of the third trunk portion and connected to the third trunk portion, and a central axis of the first sub-trunk portion extending along the first direction coincides with a central axis of the second sub-trunk portion extending along the first direction;
the second main part comprises a third sub main part and a fourth sub main part which extend along the first direction, the third sub main part and the fourth sub main part are respectively positioned at two opposite sides of the fourth main part and are connected with the fourth main part, and the central axis of the third sub main part extending along the first direction coincides with the central axis of the fourth sub main part extending along the first direction;
the orthographic projection of the first data line on the substrate is overlapped with orthographic projections of the first sub-trunk and the second sub-trunk on the substrate, and orthographic projections of the second data line on the substrate are overlapped with orthographic projections of the third sub-trunk and the fourth sub-trunk on the substrate.
Optionally, in some embodiments of the present application, the first stem and the second stem are coincident along a central axis extending in the first direction;
the first main part comprises a first sub-main part and a second sub-main part which are respectively positioned at two opposite sides of the third main part and are connected with the third main part;
the second main part comprises a third sub-main part and a fourth sub-main part which are respectively positioned at two opposite sides of the fourth main part and are connected with the fourth main part;
the third main part comprises a fifth sub main part and a sixth sub main part which are positioned at two opposite sides of the first main part, and the central axes of the fifth sub main part and the sixth sub main part extending along the second direction are parallel;
the fourth main part comprises a seventh sub main part and an eighth sub main part which are positioned at two opposite sides of the second main part, and the central axes of the seventh sub main part and the eighth sub main part extending along the second direction are parallel;
the fifth and seventh sub-trunk portions are located on the same side of the first trunk portion, and the sixth and eighth sub-trunk portions are located on the other same side of the first trunk portion;
The first data line comprises a plurality of first corner parts and a plurality of first extension parts extending along the first direction, and the first corner parts are connected with two adjacent first extension parts;
the second data line comprises a plurality of second corner parts and a plurality of second extension parts extending along the first direction, and the second corner parts are connected with two adjacent second extension parts;
orthographic projections of the plurality of first corner portions on the substrate overlap orthographic projections of the fifth and seventh sub-trunk portions on the substrate, orthographic projections of the plurality of second corner portions on the substrate overlap orthographic projections of the sixth and eighth sub-trunk portions on the substrate;
the orthographic projections of the first extension parts on the substrate are overlapped with the orthographic projections of the first sub-trunk parts and the fourth sub-trunk parts on the substrate, and the orthographic projections of the second extension parts on the substrate are overlapped with the orthographic projections of the second sub-trunk parts and the third sub-trunk parts on the substrate. Optionally, in some embodiments of the present application, the first common electrode includes a first common trunk portion extending along the first direction and a first common branch portion extending along the second direction, an orthographic projection of the first common trunk portion on the substrate overlaps with orthographic projections of the first frame portion and the second frame portion on the substrate, and orthographic projections of the first common branch portion on the substrate overlaps with orthographic projections of the third trunk portion and the fourth trunk portion on the substrate;
The second shared electrode comprises a second shared main part extending along the first direction and a second shared branch part extending along the second direction, the orthographic projection of the second shared main part on the substrate is overlapped with the orthographic projections of the first frame part and the second frame part on the substrate, and the orthographic projection of the second shared branch part on the substrate is overlapped with the orthographic projections of the third main part and the fourth main part on the substrate.
Optionally, in some embodiments of the present application, the width of the first shared branch is smaller than the width of the third trunk and the width of the fourth trunk, and the width of the second shared branch is smaller than the width of the third trunk and the width of the fourth trunk.
Optionally, in some embodiments of the present application, the first direction is taken as a column direction, the second direction is taken as a row direction, the first data line is electrically connected to a plurality of corresponding sub-pixels in the same column, the second data line is electrically connected to the remaining sub-pixels in the column, and a voltage polarity of the first data line is opposite to a voltage polarity of the second data line.
Optionally, in some embodiments of the present application, the plurality of sub-pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel with different colors, where the first sub-pixel, the second sub-pixel, and the third sub-pixel are sequentially and alternately arranged along the second direction;
wherein, every two first data lines corresponding to the sub-pixels with the same color and adjacent to each other in the same row are electrically connected to the same flip-chip film;
two second data lines corresponding to the sub-pixels which have the same color and are adjacent to each other in the same row are electrically connected to the other flip-chip film.
The liquid crystal display panel provided by the embodiment of the application comprises a substrate, a pixel driving circuit, sub-pixels and a data line group. The sub-pixel comprises a pixel electrode, the pixel electrode comprises a main pixel electrode and a sub-pixel electrode, the main pixel electrode comprises a first main part, the sub-pixel electrode comprises a second main part, and the first main part and the second main part are parallel or coincident with each other and extend along a first direction. Each data line group comprises a first data line and a second data line which are parallel to each other and extend along a first direction, and the first data line and the second data line are respectively electrically connected with different pixel driving circuits. The front projection of the first data line on the substrate of the liquid crystal display panel is overlapped with at least the front projection part of the first main part on the substrate, and the front projection of the second data line on the substrate is overlapped with at least the front projection part of the second main part on the substrate. On one hand, the space of the trunk part can be fully utilized, the aperture ratio of the sub-pixel is increased, and on the other hand, DBS electrodes are not required to be arranged above the first data line and the second data line, so that the process is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an area where a subpixel of a liquid crystal display panel provided in an embodiment of the present application is located;
fig. 2 is a schematic diagram of a pixel driving circuit according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a first distribution of a data line group and a shared electrode group according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a first structure of a pixel electrode according to an embodiment of the present application;
fig. 5 is a schematic view of a second structure of a pixel electrode according to an embodiment of the present application;
FIG. 6 is a schematic diagram illustrating distribution of the pixel electrodes, the data lines and the common electrode set in FIG. 5;
FIG. 7 is a second distribution diagram of a data line group and a common electrode group according to an embodiment of the present application
Fig. 8 is a schematic distribution diagram of sub-pixels according to an embodiment of the present application;
Fig. 9 is a schematic structural diagram of a pixel electrode data line set and a shared electrode set according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application. Furthermore, it should be understood that the detailed description is presented herein for purposes of illustration and explanation only and is not intended to limit the present application. In this application, unless otherwise indicated, terms of orientation such as "upper" and "lower" are used to generally refer to the upper and lower positions of the device in actual use or operation, and specifically the orientation of the drawing figures; while "inner" and "outer" are for the outline of the device.
In a conventional liquid crystal display panel, data lines and a first common electrode of a general array substrate are disposed in a gap between adjacent pixel electrodes. A Black Matrix (BM) is required to be disposed on one side of the color film substrate to shield light, and when the array substrate and the color film substrate are shifted in alignment, the position of the BM is shifted (shift) to cause light leakage and color shift. In order to solve the above-mentioned problems, in the related art, a design of reducing a black matrix (DBS) on a Data line is adopted, that is, a DBS electrode having the same layer as a pixel electrode is disposed above the Data line of an array substrate, and a voltage difference state is kept between the DBS electrode and a second common electrode of a color film substrate, so that a liquid crystal between the DBS electrode and the color film substrate is not rotated and is in a black state, so as to replace the black matrix to perform light shielding. In order to prevent a short circuit between the DBS electrode and the pixel electrode, a distance between the DBS electrodes is generally required. However, the above-mentioned designs of the data line, the first common electrode and the DBS electrode may result in a decrease in the aperture ratio of the pixel, which increases the difficulty in increasing the transmittance of the liquid crystal display panel.
For the above-mentioned drawbacks, please refer to fig. 1 and 8, fig. 1 is a schematic structural diagram of an area where a subpixel of a liquid crystal display panel provided in an embodiment of the present application is located, and fig. 8 is a schematic distribution diagram of the subpixel provided in an embodiment of the present application. The embodiment of the application provides a liquid crystal display panel 100, wherein the liquid crystal display panel 100 comprises a substrate 10, a plurality of pixel driving circuits 30, a plurality of sub-pixels 20 and a plurality of data line groups 40, wherein the pixel driving circuits 30, the sub-pixels 20 and the data line groups 40 are arranged on the substrate 10. The plurality of pixel driving circuits 30 are electrically connected to the plurality of sub-pixels 20 in a one-to-one correspondence, and the pixel driving circuits 30 are used for driving the sub-pixels 20 to emit light.
Each of the sub-pixels 20 includes a pixel electrode 50, the pixel electrode 50 includes a main pixel electrode 51 and a sub-pixel electrode 52, the main pixel electrode 50 includes a first main portion 511, the sub-pixel electrode 52 includes a second main portion 521, and the first main portion 511 and the second main portion 521 are parallel to each other and extend along a first direction X. Each of the data line groups 40 includes a first data line 41 and a second data line 42 parallel to each other and extending in the first direction X, the first data line 41 and the second data line 42 being electrically connected to different ones of the pixel driving circuits 30, respectively. Wherein, the front projection of the first data line 41 on the substrate 10 of the liquid crystal display panel 100 is overlapped with at least the front projection of the first main portion 511 on the substrate 10, and the front projection of the second data line 42 on the substrate 10 is overlapped with at least the front projection of the second main portion 521 on the substrate 10.
Since the trunk portion of the pixel electrode 50 is substantially opaque, the embodiments of the present application move the first data line 41 and the second data line 42 into the pixel electrode 50, and make the first data line 41 overlap the first trunk portion 511 of the main pixel electrode 51, and the second data line 42 overlap the second trunk portion 521 of the sub-pixel electrode 52, so that, on one hand, the space in which the trunk portion is located can be fully utilized, and the aperture ratio of the sub-pixel 20 can be increased, and on the other hand, the DBS electrode is not required to be disposed above the first data line 41 and the second data line 42, thereby reducing the process procedure.
The pixel driving circuit 30 may be a 3T (3 transistor) architecture, and the gate, source and drain of the pixel driving circuit 30 may be formed using metal layers of different layers of the liquid crystal display panel 100.
Specifically, in the embodiment of the present application, the liquid crystal display panel 100 includes a first metal layer disposed on the substrate 10 and a second metal layer (not shown in the drawings) disposed on the first metal layer. The pixel electrode 50 is disposed on the second metal layer. It will be appreciated that an insulating layer may be provided between adjacent metal or conductive layers to insulate.
The first metal layer may be used to form a plurality of scan lines 70, gates of the respective thin film transistors, and the like. The second metal layer may be used to form a plurality of data lines (e.g., the first data line 41, the second data line 42), source and drain electrodes of the respective thin film transistors, and the like. The second metal layer may also be used to form a first common electrode that forms a storage capacitance with the pixel electrode 50.
Further, as shown in fig. 1, the liquid crystal display panel 100 further includes a plurality of sharing electrode groups 60 disposed on the same layer as the data line groups 40, each sharing electrode group 60 includes a first sharing electrode 61 and a second sharing electrode 62 parallel to each other and extending along the first direction X, the first sharing electrode 61 and the first data line 41 are electrically connected to the same pixel driving circuit 30, and the second sharing electrode 62 and the second data line 42 are electrically connected to the same pixel driving circuit 30.
The first and second sharing electrodes 61 and 62 are respectively located at opposite sides of the first and second trunk parts 511 and 521 of the corresponding pixel electrode 50. The orthographic projections of the first and second common electrodes 61 and 62 on the substrate 10 overlap at least with the orthographic projections of the edge portions 503 of the pixel electrodes 50 on the substrate 10.
The present embodiment can increase the storage capacitance by disposing the first and second sharing electrodes 61 and 62 from the pixel electrode 50 at the edge of the pixel electrode 50 and overlapping the first and second sharing electrodes 61 and 62 with the pixel electrode 50.
In some embodiments, the shared electrode set 60 may be multiplexed as the first common electrode, and the original first common electrode located on the first metal layer may be removed, thereby simplifying the process.
As shown in fig. 2, the pixel driving circuit 30 includes a first transistor T1, a second transistor T2, and a third transistor T3, wherein the gate of the first transistor T1, the gate of the second transistor T2, and the gate of the third transistor T3 are electrically connected to the corresponding scan line 70, the source of the first transistor T1 and the source of the second transistor T2 are electrically connected to the corresponding data line DL (e.g., the first data line 41 or the second data line 42), the drain of the first transistor T1 is electrically connected to the main pixel electrode 51, the drain of the second transistor T2 is electrically connected to the sub-pixel electrode 52, the drain of the third transistor T3 is electrically connected to the drain of the second transistor T2, and the source of the third transistor T3 is electrically connected to the corresponding shared electrode SHL (e.g., the first shared electrode 61 or the second shared electrode 62).
The main pixel electrode 51 and the shared electrode group 60 form a first storage capacitor Cst1, and the main pixel electrode 51 and the second common electrode CFcom of the color film substrate form a first liquid crystal capacitor Clc1. The sub-pixel electrode 52 and the shared electrode SHL form a second storage capacitor Cst2, and the sub-pixel electrode 52 and the second common electrode CFcom of the color film substrate form a second liquid crystal capacitor Clc2.
The voltage signal input by the shared electrode SHL depends on the voltage division requirement of the third transistor T3, but it should be noted that the voltage signal input by the shared electrode is a constant voltage to maintain a stable voltage signal. In this way, the shared electrode can realize the function of voltage division and can be multiplexed as the first common electrode to form a storage capacitance with the pixel electrode 50.
Referring to fig. 3 and 4, in some embodiments, the width of the first data line 41 is smaller than the width of the first trunk 511, and the width of the second data line 42 is smaller than the width of the second trunk 521. In this way, the first trunk portion 511 may cover the portion of the first data line 41 passing through the pixel electrode 50, and the second trunk portion 521 may cover the portion of the second data line 42 passing through the pixel electrode 50, so as to achieve a good effect of shielding the first data line 41 and the second data line 42.
Referring to fig. 4, in some embodiments, the main pixel electrode 51 further includes a third main portion 512, a plurality of first branch electrodes 513, and a first frame portion 514. The third trunk portion 512 extends in a second direction Y intersecting the first direction X. The first and third main portions 511 and 512 divide the main pixel electrode 51 into a plurality of domains, and the plurality of first branch electrodes 513 are located in different domains and extend from the first and third main portions 511 and 512 in different directions. The first frame 514 is connected to the tail ends of the first branch electrodes 513 in sequence.
The sub-pixel electrode 52 includes a fourth main portion 522, a plurality of second branch electrodes 523, and a second frame portion 524. The fourth stem 522 extends in the second direction Y, and the second and fourth stem 521 and 522 divide the sub-pixel electrode 52 into a plurality of domains. The plurality of second branch electrodes 523 are located in different domains and extend from the second trunk portion 521 and the fourth trunk portion 522 in different directions. The second frame 524 is sequentially connected to the tail ends of the plurality of second branch electrodes 523.
In some embodiments, the front projection of the first common electrode 61 on the substrate 10 is partially overlapped with the front projections of the first frame portion 514 and the second frame portion 524 on the substrate 10. The orthographic projection of the second common electrode 62 on the substrate 10 is partially overlapped with the orthographic projections of the first frame portion 514 and the second frame portion 524 on the substrate 10. This allows an overlap between the first and second sharing electrodes 61 and 62 and the pixel electrode 50, which increases the storage capacitance on the one hand and the aperture ratio of the sub-pixel 20 on the other hand.
In some embodiments, the first data line 41, the second data line 42, the first shared electrode 61 and the second shared electrode 62 are all disposed by using the space where the pixel electrode 50 is located, and the DBS electrode and the first common electrode are removed, so that the data line, the common electrode, the DBS electrode, etc. are not required to be disposed in the gap between the adjacent pixel electrodes 50, which can expand the pixel electrode 50 to increase the aperture ratio of the sub-pixel 20 to the greatest extent.
As shown in fig. 3 and 4, the width of the first sharing electrode 61 is smaller than the width of the first frame portion 514 and the width of the second frame portion 524, and the width of the second sharing electrode 62 is smaller than the width of the first frame portion 514 and the width of the second frame portion 524. In this way, the first frame may cover the portion of the first common electrode 61 passing through the pixel electrode 50, and the second frame may cover the portion of the second common electrode 62 passing through the pixel electrode 50.
Referring to fig. 4, the first main portion 511 includes a first sub-main portion 5111 and a second sub-main portion 5112 that are parallel to each other and extend along the first direction X, and the first sub-main portion 5111 and the second sub-main portion 5112 are respectively located at two opposite sides of the third main portion 512 and are connected to the third main portion 512.
The second trunk portion 521 includes a third sub-trunk portion 5211 and a fourth sub-trunk portion 5212 that are parallel to each other and extend in the first direction X, and the third sub-trunk portion 5211 and the fourth sub-trunk portion 5212 are respectively located at opposite sides of the fourth trunk portion 522 and connected to the fourth trunk portion 522.
In the embodiment of the present application, the overlapping area between the first data line 41 and the pixel electrode 50 is equal to the overlapping area between the second data line 42 and the pixel electrode 50. The design is such that the capacitance formed between the first data line 41 and the pixel electrode 50 is close to or the same as the capacitance formed between the second data line 42 and the pixel electrode 50, avoiding the generation of crosstalk.
In some embodiments, the central axis of the first sub-trunk 5111 extending in the first direction X is parallel to the central axis of the second sub-trunk 5112 extending in the first direction X. The central axis of the third sub-trunk portion 5211 extending in the first direction X is parallel to the central axis of the fourth sub-trunk portion 5212 extending in the first direction X. The central axis of the first sub-trunk 5111 extending in the first direction X coincides with the central axis of the third sub-trunk 5211 extending in the first direction X. The central axis of the second sub-trunk 5112 extending in the first direction X coincides with the central axis of the fourth sub-trunk 5212 extending in the first direction X.
In the embodiment shown in fig. 4, the orthographic projection of the first data line 41 on the substrate 10 overlaps with the orthographic projections of the first sub-trunk 5111 and the third sub-trunk 5211 on the substrate 10. The orthographic projection of the second data line 42 on the substrate 10 overlaps with the orthographic projections of the second sub-trunk 5112 and the fourth sub-trunk 5212 on the substrate 10.
In the present embodiment, the area of the main pixel electrode 51 may be different from the area of the sub-pixel electrode 52.
In the present embodiment, the length of the first sub-trunk extending in the first direction X and the length of the second sub-trunk extending in the first direction X are equal such that the overlapping area between the first data line 41 and the first sub-trunk is the same as the overlapping area between the second data line 42 and the second sub-trunk.
The width of the trunk, branches, etc. structures according to embodiments of the present application should be considered uniform throughout unless specifically indicated, and although there may be minor width errors in the process, the width errors are negligible for the overall width.
The main pixel electrode 51 includes a first domain A1, a second domain A2, a third domain A3 and a fourth domain A4 that are distributed clockwise, wherein the branch electrodes in the first domain A1 and the third domain A3 are distributed in a central symmetry manner, and the branch electrodes in the second domain A2 and the fourth domain A4 are distributed in a central symmetry manner. By such a design, it is ensured that the overlapping area between the first data line 41 and the main pixel electrode 51 is equal to the overlapping area between the second data line 42 and the sub-pixel electrode 52 when the first data line 41 and the second data line 42 pass through the main pixel electrode 51.
Similarly, the sub-pixel electrode 52 is identical in design to the main pixel electrode 51. I.e. the length of the third sub-trunk extending in the first direction X is equal to the length of the fourth sub-trunk extending in the first direction X. The sub-pixel electrode 52 includes a fifth domain A5, a sixth domain A6, a seventh domain A7, and an eighth domain A8 that are distributed clockwise, wherein the branch electrodes in the fifth domain A5 and the seventh domain A7 are distributed in a central symmetry manner, and the branch electrodes in the sixth domain A6 and the eighth domain A8 are distributed in a central symmetry manner. So that the overlapping area between the first data line 41 and the main pixel electrode 51 is equal to the overlapping area between the second data line 42 and the sub pixel electrode 52.
As shown in fig. 5, in some embodiments, the central axis of the first sub-trunk 5111 extending in the first direction X coincides with the central axis of the second sub-trunk 5112 extending in the first direction X. The central axis of the third sub-trunk portion 5211 extending in the first direction X coincides with the central axis of the fourth sub-trunk portion 5212 extending in the first direction X. The central axis of the first sub-trunk 5111 extending in the first direction X is parallel to the central axis of the third sub-trunk 5211 extending in the first direction X.
In the embodiment shown in fig. 5, the orthographic projection of the first data line 41 on the substrate 10 overlaps with the orthographic projections of the first sub-trunk 5111 and the second sub-trunk 5112 on the substrate 10. The orthographic projection of the second data line 42 on the substrate 10 overlaps with the orthographic projections of the third sub-trunk portion 5211 and the fourth sub-trunk portion 5212 on the substrate 10.
In the present embodiment, the length of the first trunk portion 511 extending in the first direction X is the same as the length of the second trunk portion 512 extending in the second direction Y, so that the overlapping area between the first data line 41 and the first trunk portion 511 is equal to the overlapping area between the second data line 42 and the second trunk portion 512.
Since the first data line 41 may further pass through the fifth domain A5 and the eighth domain A8, and the second data line 42 may further pass through the second domain A2 and the third domain A3, the pattern formed by the plurality of second branch electrodes 523 in the fifth domain A5 and the eighth domain A8 may be a mirror image of the pattern formed by the plurality of first branch electrodes 513 in the second domain A2 and the third domain A3, so that an overlapping area between the first data line 41 and the branch electrodes of the main pixel electrode 51 is equal to an overlapping area between the second data line 42 and the branch electrodes of the sub-pixel electrode 52.
In some embodiments, referring to fig. 9, the central axes of the first trunk 511 and the second trunk 521 along the first direction X coincide. Namely, the central axes of the first sub-trunk portion 5111, the second sub-trunk portion 5112, the third sub-trunk portion 5211 and the fourth sub-trunk portion 5212 are all coincident.
As shown in fig. 9, in some embodiments, the third main portion 512 includes a fifth sub-main portion 5121 and a sixth sub-main portion 5122 located at opposite sides of the first main portion 511, and central axes of the fifth sub-main portion 5121 and the sixth sub-main portion 5122 extending along the second direction Y are parallel, that is, the fifth sub-main portion 5121 and the sixth sub-main portion 5122 are offset and parallel.
The fourth main portion 522 includes a seventh sub-main portion 5221 and an eighth sub-main portion 5222 located at opposite sides of the second main portion 521, and central axes of the seventh sub-main portion 5221 and the eighth sub-main portion 5222 extending along the second direction Y are parallel, i.e., the seventh sub-main portion 5221 and the eighth sub-main portion 5222 are staggered and parallel.
The fifth sub-trunk portion 5121 and the seventh sub-trunk portion 5221 are located at the same side of the first trunk portion 511, and the sixth sub-trunk portion 5122 and the eighth sub-trunk portion 5222 are located at the other same side of the first trunk portion 511.
The first data line 41 includes a plurality of first corner portions 411 and a plurality of first extension portions 412 extending along the first direction X, and the first corner portions 411 connect two adjacent first extension portions 412. In some embodiments, the first corner 411 may extend along the second direction Y, and it is understood that the extension length of the first corner 411 in the second direction Y is much smaller than the extension length of the first extension 412 in the first direction X, so that the presence of the first corner 411 has a negligible effect on the direction of the overall extension of the first data line 41 and the extension length, i.e. the overall extension of the first data line 41 is still along the first direction X.
The second data line 42 includes a plurality of second corner portions 421 and a plurality of second extension portions 422 extending in the first direction X, and the second corner portions 421 connect adjacent two of the second extension portions 422. In some embodiments, the second corner 421 may extend along the second direction Y, and it is understood that the length of the second corner 421 in the second direction Y is substantially smaller than the length of the second extension 422 in the first direction X, so that the presence of the second corner 421 has a negligible effect on the direction of the overall extension of the second data line 42 and the length of the extension, i.e. whether the overall second data line 42 extends along the first direction X.
As shown in fig. 9, the orthographic projections of the plurality of first corner portions 411 on the substrate overlap with the orthographic projections of the fifth sub-trunk portion 5121 and the seventh sub-trunk portion 5221 on the substrate, and the orthographic projections of the plurality of second corner portions 421 on the substrate overlap with the orthographic projections of the sixth sub-trunk portion 5122 and the eighth sub-trunk portion 5222 on the substrate. Therefore, the first and second corner portions 411 and 422 are shielded by the lateral trunk (the third and fourth trunk portions 512 and 522) of the pixel electrode 50, and do not occupy the opening area, thereby increasing the aperture ratio of the sub-pixel 20.
With continued reference to fig. 9, the orthographic projections of the first extending portions 412 and the first and fourth sub-trunk portions 5111 and 5212 overlap each other, and the orthographic projections of the second extending portions 422 and the second and third sub-trunk portions 5112 and 5211 overlap each other. Therefore, portions of the plurality of first extension portions 412 and the plurality of second extension portions 422 passing through the region where the pixel electrode is located may be blocked by the first and second trunk portions 511 and 521, and an aperture ratio of the sub-pixel 20 may be increased.
Referring to fig. 7, in some embodiments of the present application, the first common electrode 61 includes a first common trunk portion 611 extending along the first direction X and a first common branch portion 612 extending along the second direction Y, an orthographic projection of the first common trunk portion 611 on the substrate 10 overlaps an orthographic projection of the first frame portion 514 and the second frame portion 524 on the substrate 10, and an orthographic projection of the first common branch portion 612 on the substrate 10 overlaps an orthographic projection of the third trunk portion 512 and the fourth trunk portion 522 on the substrate 10.
The second shared electrode 62 includes a second shared trunk portion 621 extending in the first direction X and a second shared branch portion 621 extending in the second direction Y, wherein an orthographic projection of the second shared trunk portion 621 on the substrate 10 overlaps with an orthographic projection of the first frame portion 514 and the second frame portion 524 on the substrate 10, and an orthographic projection of the second shared branch portion 621 on the substrate 10 overlaps with an orthographic projection of the third trunk portion 512 and the fourth trunk portion 522 on the substrate 10.
The design of the first and second sharing branches can further increase the overlapping area between the sharing electrode group 60 and the pixel electrode 50, thereby further increasing the storage capacitance.
In some implementations, the width of the first sharing portion 612 is smaller than the width of the third main portion 512 and the width of the fourth main portion 522, and the width of the second sharing portion 621 is smaller than the width of the third main portion 512 and the width of the fourth main portion 522, so that the third main portion 512 of the pixel electrode 50 may cover the first sharing portion 612 and the fourth main portion 522 covers the second sharing portion 621, thereby avoiding the influence on the display.
With the first direction X as a column direction and the second direction Y as a row direction, the subpixels 20 of the same column may be driven by two data lines, i.e. the first data line 41 and the second data line 42. That is, the first data line 41 is electrically connected to a plurality of corresponding sub-pixels 20 in the same column, the second data line 42 is electrically connected to the remaining sub-pixels 20 in the column, and the voltage polarity of the first data line 41 is opposite to the voltage polarity of the second data line 42, so as to balance the voltage coupling caused by the positive and negative frame driving.
In the present embodiment, the plurality of sub-pixels 20 includes a first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23, which are different in color. The first sub-pixels 21, the second sub-pixels 22, and the third sub-pixels 23 are alternately arranged in this order along the second direction Y. The sub-pixels 20 of the same column are of the same color.
The two first data lines 41 corresponding to the sub-pixels 20 in the same row, which have the same color and are adjacent to each other, are electrically connected to the same Chip On Film (COF) (not shown). The first data line 41 electrically connected to the first sub-pixel 20 (first sub-pixel 21) arranged from left to right as in the first row and the first data line 41 electrically connected to the third sub-pixel 20 (first sub-pixel 21) arranged from left to right as in the first row are connected to the same flip-chip film.
Two second data lines 42 corresponding to the sub-pixels 20 in the same row, each having the same color and adjacent to each other, are electrically connected to another flip-chip film. The first data line 41 electrically connected to the first sub-pixel 20 (first sub-pixel 21) arranged from left to right as in the third row and the first data line 41 electrically connected to the third sub-pixel 20 (first sub-pixel 21) arranged from left to right as in the third row are connected to the same flip-chip film. Thus, the problem of increasing the number of flip chip films caused by the introduction of two data lines into one sub-pixel 20 can be solved.
The driving timings of the sub-pixels 20 of every two rows are the same, that is, the potential timings of the two scan lines 70 connected to the sub-pixels 20 of every two rows are the same, and are at the high potential or at the low potential at the same time, so that the sub-pixels 20 of every two rows can be driven at the same time, thereby reducing the driving cost.
Correspondingly, one data line connects every two adjacent rows of sub-pixels 20, for example, a first data line 41 connects the sub-pixels 20 corresponding to the first row and the second row, a second data line 42 connects the sub-pixels 20 corresponding to the third row and the fourth row, a first data line 41 connects the sub-pixels 20 corresponding to the fifth row and the sixth row (not shown in the figure), and so on.
As shown in fig. 8, in the present embodiment, the polarities of the sub-pixels 20 of the adjacent two columns are opposite. In other embodiments, the polarities of the sub-pixels 20 of two adjacent columns may be the same. There is no limitation in this regard.
In summary, the embodiment of the present application provides a liquid crystal display panel 100, which includes a substrate 10, a pixel driving circuit 30, a sub-pixel 20, and a data line group 40. Each sub-pixel 20 includes a pixel electrode 50, the pixel electrode 50 includes a main pixel electrode 51 and a sub-pixel electrode 52, the sub-pixel electrode 52 includes a second main portion 521, and the first main portion 511 and the second main portion 521 are parallel to each other and extend in the first direction X. Each of the data line groups 40 includes a first data line 41 and a second data line 42 parallel to each other and extending in the first direction X, the first data line 41 and the second data line 42 being electrically connected to different pixel driving circuits 30, respectively. The front projection of the first data line 41 on the substrate 10 of the liquid crystal display panel 100 overlaps at least the front projection portion of the first trunk portion 511 on the substrate 10, and the front projection of the second data line 42 on the substrate 10 overlaps at least the front projection portion of the second trunk portion 521 on the substrate 10. On the one hand, the space of the trunk portion can be fully utilized, and the aperture ratio of the sub-pixel 20 can be increased, on the other hand, the DBS electrode is not required to be arranged above the first data line 41 and the second data line 42, so that the process is reduced.
The foregoing has described in detail a liquid crystal display panel provided by embodiments of the present application, and specific examples have been applied herein to illustrate the principles and embodiments of the present application, where the foregoing examples are provided to assist in understanding the methods and core ideas of the present application; meanwhile, those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, and the present description should not be construed as limiting the present application in view of the above.
Claims (14)
1. A liquid crystal display panel, comprising:
a plurality of sub-pixels distributed in an array, wherein each sub-pixel comprises a pixel electrode, the pixel electrode comprises a main pixel electrode and a sub-pixel electrode, the main pixel electrode comprises a first main part, the sub-pixel electrode comprises a second main part, the first main part and the second main part extend along a first direction, and the central axes of the first main part and the second main part extending along the first direction are parallel or coincide with each other;
the pixel driving circuits are distributed in an array and are electrically connected with the sub-pixels in a one-to-one correspondence manner; and
A plurality of data line groups, each of the data line groups including a first data line and a second data line parallel to each other and extending in the first direction, the first data line and the second data line being electrically connected to different pixel driving circuits, respectively;
the front projection of the first data line on the substrate of the liquid crystal display panel at least overlaps with the front projection part of the first trunk part on the substrate, and the front projection of the second data line on the substrate at least overlaps with the front projection part of the second trunk part on the substrate.
2. The liquid crystal display panel according to claim 1, wherein the first data line has a width smaller than a width of the first main portion, and the second data line has a width smaller than a width of the second main portion.
3. The liquid crystal display panel according to claim 1, further comprising a plurality of shared electrode groups arranged in the same layer as the data line groups, each of the shared electrode groups including a first shared electrode and a second shared electrode which are parallel to each other and extend in the first direction, the first shared electrode and the first data line being electrically connected to the same pixel driving circuit, the second shared electrode and the second data line being electrically connected to the same pixel driving circuit;
Wherein the first and second sharing electrodes are respectively positioned at opposite sides of the first and second main portions of the corresponding pixel electrode;
the orthographic projections of the first and second shared electrodes on the substrate overlap at least with orthographic projections of edge portions of the pixel electrodes on the substrate.
4. The liquid crystal display panel according to claim 3, wherein the common electrode group is multiplexed as a first common electrode, and a storage capacitance is formed between the common electrode group and the pixel electrode.
5. The liquid crystal display panel according to claim 3, wherein,
the main pixel electrode further includes:
a third trunk portion extending in a second direction intersecting the first direction, the first and third trunk portions dividing the main pixel electrode into a plurality of domains,
a plurality of first branch electrodes located in different domains and extending from the first trunk portion and the third trunk portion in different directions; and
a first frame part sequentially connected with the tail ends of the first branch electrodes;
the sub-pixel electrode includes:
a fourth trunk portion extending in the second direction, the second trunk portion and the fourth trunk portion dividing the sub-pixel electrode into a plurality of domains,
A plurality of second branch electrodes located in different domains and extending from the second trunk portion and the fourth trunk portion in different directions; and
the second frame part is sequentially connected with the tail ends of the plurality of second branch electrodes;
the orthographic projection of the first sharing electrode on the substrate is partially overlapped with orthographic projections of the first frame part and the second frame part on the substrate;
and the orthographic projection of the second shared electrode on the substrate is partially overlapped with orthographic projections of the first frame part and the second frame part on the substrate.
6. The liquid crystal display panel according to claim 5, wherein a width of the first common electrode is smaller than a width of the first frame portion and a width of the second frame portion, and a width of the second common electrode is smaller than a width of the first frame portion and a width of the second frame portion.
7. The liquid crystal display panel according to claim 5, wherein an overlapping area between the first data line and the pixel electrode is equal to an overlapping area between the second data line and the pixel electrode.
8. The liquid crystal display panel according to claim 7, wherein,
The first main part comprises a first sub-main part and a second sub-main part which are parallel to each other and extend along the first direction, and the first sub-main part and the second sub-main part are respectively positioned at two opposite sides of the third main part and are connected with the third main part;
the second main part comprises a third sub-main part and a fourth sub-main part which are parallel to each other and extend along the first direction, and the third sub-main part and the fourth sub-main part are respectively positioned at two opposite sides of the fourth main part and are connected with the fourth main part;
the orthographic projection of the first data line on the substrate is overlapped with orthographic projections of the first sub-trunk and the third sub-trunk on the substrate, and orthographic projections of the second data line on the substrate are overlapped with orthographic projections of the second sub-trunk and the fourth sub-trunk on the substrate.
9. The liquid crystal display panel according to claim 7, wherein,
the first main part comprises a first sub main part and a second sub main part which extend along the first direction, the first sub main part and the second sub main part are respectively positioned at two opposite sides of the third main part and are connected with the third main part, and the central axis of the first sub main part extending along the first direction coincides with the central axis of the second sub main part extending along the first direction;
The second main part comprises a third sub main part and a fourth sub main part which extend along the first direction, the third sub main part and the fourth sub main part are respectively positioned at two opposite sides of the fourth main part and are connected with the fourth main part, and the central axis of the third sub main part extending along the first direction coincides with the central axis of the fourth sub main part extending along the first direction;
the orthographic projection of the first data line on the substrate is overlapped with orthographic projections of the first sub-trunk and the second sub-trunk on the substrate, and orthographic projections of the second data line on the substrate are overlapped with orthographic projections of the third sub-trunk and the fourth sub-trunk on the substrate.
10. The liquid crystal display panel according to claim 7, wherein,
the first main part and the second main part are overlapped along the central axis extending in the first direction;
the first main part comprises a first sub-main part and a second sub-main part which are respectively positioned at two opposite sides of the third main part and are connected with the third main part;
the second main part comprises a third sub-main part and a fourth sub-main part which are respectively positioned at two opposite sides of the fourth main part and are connected with the fourth main part;
The third main part comprises a fifth sub main part and a sixth sub main part which are positioned at two opposite sides of the first main part, and the central axes of the fifth sub main part and the sixth sub main part extending along the second direction are parallel;
the fourth main part comprises a seventh sub main part and an eighth sub main part which are positioned at two opposite sides of the second main part, and the central axes of the seventh sub main part and the eighth sub main part extending along the second direction are parallel;
the fifth and seventh sub-trunk portions are located on the same side of the first trunk portion, and the sixth and eighth sub-trunk portions are located on the other same side of the first trunk portion;
the first data line comprises a plurality of first corner parts and a plurality of first extension parts extending along the first direction, and the first corner parts are connected with two adjacent first extension parts;
the second data line comprises a plurality of second corner parts and a plurality of second extension parts extending along the first direction, and the second corner parts are connected with two adjacent second extension parts;
orthographic projections of the plurality of first corner portions on the substrate overlap orthographic projections of the fifth and seventh sub-trunk portions on the substrate, orthographic projections of the plurality of second corner portions on the substrate overlap orthographic projections of the sixth and eighth sub-trunk portions on the substrate;
The orthographic projections of the first extension parts on the substrate are overlapped with the orthographic projections of the first sub-trunk parts and the fourth sub-trunk parts on the substrate, and the orthographic projections of the second extension parts on the substrate are overlapped with the orthographic projections of the second sub-trunk parts and the third sub-trunk parts on the substrate.
11. The liquid crystal display panel according to claim 5, wherein,
the first sharing electrode comprises a first sharing main part extending along the first direction and a first sharing branch part extending along the second direction, the orthographic projection of the first sharing main part on the substrate is overlapped with the orthographic projections of the first frame part and the second frame part on the substrate, and the orthographic projection of the first sharing branch part on the substrate is overlapped with the orthographic projections of the third main part and the fourth main part on the substrate;
the second shared electrode comprises a second shared main part extending along the first direction and a second shared branch part extending along the second direction, the orthographic projection of the second shared main part on the substrate is overlapped with the orthographic projections of the first frame part and the second frame part on the substrate, and the orthographic projection of the second shared branch part on the substrate is overlapped with the orthographic projections of the third main part and the fourth main part on the substrate.
12. The liquid crystal display panel according to claim 11, wherein a width of the first sharing branch portion is smaller than a width of the third and fourth trunk portions, and a width of the second sharing branch portion is smaller than a width of the third and fourth trunk portions.
13. The liquid crystal display panel according to claim 5, wherein the first direction is a column direction and the second direction is a row direction, the first data line is electrically connected to a plurality of sub-pixels in a corresponding same column, the second data line is electrically connected to the remaining sub-pixels in the column, and a voltage polarity of the first data line is opposite to a voltage polarity of the second data line.
14. The liquid crystal display panel according to claim 13, wherein the plurality of sub-pixels includes first, second, and third sub-pixels of different colors, the first, second, and third sub-pixels being alternately arranged in order along the second direction;
wherein, every two first data lines corresponding to the sub-pixels with the same color and adjacent to each other in the same row are electrically connected to the same flip-chip film;
Two second data lines corresponding to the sub-pixels which have the same color and are adjacent to each other in the same row are electrically connected to the other flip-chip film.
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