Disclosure of Invention
In order to solve the technical problems, the present disclosure provides a transconductance amplifier, a filter and a chip.
In a first aspect of the present disclosure, there is provided a transconductance amplifier comprising:
The switching circuit comprises a first transistor and a second transistor, wherein the body end of the first transistor is used for receiving a first voltage, the grid electrode of the first transistor is electrically connected with the first end of the first transistor, the body end of the second transistor is used for receiving a second voltage, the grid electrode of the second transistor is electrically connected with the first end of the second transistor, and the second end of the first transistor is electrically connected with the second end of the second transistor and is used for receiving input current;
the first input end of the amplifying circuit is electrically connected with the first end of the first transistor, the second input end of the amplifying circuit is electrically connected with the first end of the second transistor, and the amplifying circuit is used for amplifying and outputting the current flowing through the first transistor and the second transistor.
In some embodiments of the present disclosure, the amplifying circuit includes:
a third transistor, a first end of the third transistor is electrically connected with a first end of the first transistor, a first end of the third transistor is electrically connected with a grid electrode of the third transistor, and a second end of the third transistor is electrically connected with a grounding end;
A gate of the fourth transistor is electrically connected to the gate of the third transistor, a first end of the fourth transistor is electrically connected to the ground terminal, and a second end of the fourth transistor is used for outputting a first output current;
A fifth transistor, a first end of which is electrically connected to the first end of the second transistor, a first end of which is electrically connected to the gate of the fifth transistor, and a second end of which is electrically connected to a ground terminal;
And a sixth transistor, wherein the gate of the sixth transistor is electrically connected with the gate of the fifth transistor, the first end of the sixth transistor is used for being electrically connected with the grounding end, and the second end of the sixth transistor is used for outputting a second output current.
In some embodiments of the present disclosure, the superimposing circuit includes:
The transconductance amplifier further includes:
A seventh transistor, a first end of which is used for being electrically connected with a power supply, and a second end of which is electrically connected with a second end of the fourth transistor;
And an eighth transistor, wherein a first end of the eighth transistor is electrically connected with the power supply, a second end of the eighth transistor is electrically connected with a second end of the sixth transistor, and a gate of the eighth transistor is electrically connected with a gate of the seventh transistor.
In some embodiments of the present disclosure, the transconductance amplifier further comprises an input current generating circuit comprising:
a current input circuit for receiving a bias current;
The current mirror circuit comprises a plurality of current mirror branches, each current mirror branch is connected in parallel and is electrically connected with the current input circuit, and at least one current mirror branch can be controlled to be switched on and off;
The current output circuit is electrically connected with each current mirror branch and the conversion circuit, and is used for converting the current of at least part of the current mirror branches into the input current after superposition.
In some embodiments of the present disclosure, the current input circuit includes:
A ninth transistor, a first terminal of the ninth transistor being for receiving the bias current, a second terminal of the ninth transistor being for electrical connection to ground, a gate of the ninth transistor being for electrical connection to the first terminal of the ninth transistor;
The current mirror circuit includes:
a tenth transistor, a first end of which is electrically connected to the ground, and a gate of which is electrically connected to a gate of the ninth transistor;
an eleventh transistor having a first terminal for electrically connecting to the ground terminal, the eleventh transistor having a gate for receiving a first control signal;
A twelfth transistor having a first terminal electrically connected to the second terminal of the eleventh transistor, a gate electrically connected to the gate of the ninth transistor;
a thirteenth transistor, a first terminal of which is electrically connected to the ground terminal, and a gate of which is configured to receive a second control signal;
A fourteenth transistor, a first terminal of the fourteenth transistor being electrically connected to a second terminal of the thirteenth transistor, a gate of the fourteenth transistor being electrically connected to a gate of the ninth transistor;
a fifteenth transistor, a first end of the fifteenth transistor being configured to be electrically connected to the ground, a gate of the fifteenth transistor being configured to receive a third control signal;
A sixteenth transistor having a first terminal electrically connected to the second terminal of the fifteenth transistor, and a gate electrically connected to the gate of the ninth transistor;
the current output circuit includes:
a seventeenth transistor, a first end of the seventeenth transistor being electrically connected to a power supply, a second end of the seventeenth transistor being electrically connected to the second end of the tenth transistor, the second end of the twelfth transistor, the second end of the fourteenth transistor, and the second end of the sixteenth transistor, a gate of the seventeenth transistor being electrically connected to the second end of the seventeenth transistor;
An eighteenth transistor, wherein a first end of the eighteenth transistor is electrically connected to the power supply, a second end of the eighteenth transistor is electrically connected to both the second end of the first transistor and the second end of the second transistor, and a gate of the eighteenth transistor is electrically connected to a gate of the seventeenth transistor.
In some embodiments of the present disclosure, the transconductance amplifier further comprises:
and the common mode feedback circuit is electrically connected with the first output end and the second output end of the amplifying circuit.
In some embodiments of the present disclosure, the common mode feedback circuit includes:
a nineteenth transistor having a gate electrically connected to the second output terminal of the amplifying circuit;
A twentieth transistor having a first terminal electrically connected to the first terminal of the nineteenth transistor and a second terminal for electrically connecting to ground;
A twenty-first transistor, a first terminal of the twenty-first transistor being electrically connected to a first terminal of the twentieth transistor, a gate of the twenty-first transistor being for receiving a common mode reference voltage;
a twenty-second transistor, a gate of which is electrically connected to a first output terminal of the amplifying circuit, and a first terminal of which is electrically connected to a second terminal of the nineteenth transistor;
A twenty-third transistor, a first terminal of the twenty-third transistor being electrically connected to a second terminal of the twenty-second transistor, a second terminal of the twenty-third transistor being for electrically connecting to the ground terminal;
A twenty-fourth transistor, a first terminal of the twenty-fourth transistor being electrically connected to the first terminal of the twenty-third transistor, a second terminal of the twenty-fourth transistor being electrically connected to the second terminal of the twenty-first transistor, a gate of the twenty-fourth transistor being for receiving the common-mode reference voltage;
A twenty-fifth transistor, a first end of the twenty-fifth transistor being configured to be electrically connected to a power supply, a second end of the twenty-fifth transistor being electrically connected to a gate of the twenty-fifth transistor and to both the second end of the twenty-first transistor and the second end of the twenty-fourth transistor;
And a twenty-sixth transistor, wherein a first end of the twenty-sixth transistor is used for being electrically connected with the power supply, and a second end of the twenty-sixth transistor is electrically connected with a grid electrode of the twenty-sixth transistor and is electrically connected with a second end of the nineteenth transistor and a first end of the twenty-second transistor.
In a second aspect of the present disclosure, there is provided a filter comprising a transconductance amplifier as described above.
In some embodiments of the present disclosure, the body terminal of the first transistor is used as a first input terminal of the transconductance amplifier, the body terminal of the second transistor is used as a second input terminal of the transconductance amplifier, the first output terminal of the amplifying circuit is used as a first output terminal of the transconductance amplifier, and the second output terminal of the amplifying circuit is used as a second output terminal of the transconductance amplifier;
The first input end of the first transconductance amplifier is electrically connected with the second output end of the second transconductance amplifier, the second output end of the third transconductance amplifier and the second input end of the fourth transconductance amplifier, the second input end of the first transconductance amplifier is electrically connected with the first output end of the second transconductance amplifier, the first output end of the third transconductance amplifier and the first input end of the fourth transconductance amplifier, the first output end of the first transconductance amplifier is electrically connected with the first input end of the second transconductance amplifier and is used for receiving a first input voltage, and the second output end of the first transconductance amplifier is electrically connected with the second input end of the second transconductance amplifier and is used for receiving a second input voltage;
The first input end of the third transconductance amplifier is electrically connected with the second output end of the fourth transconductance amplifier, the first input end of the fifth transconductance amplifier and the second output end of the fifth transconductance amplifier, and the second input end of the third transconductance amplifier is electrically connected with the first input end of the fourth transconductance amplifier, the second input end of the fifth transconductance amplifier and the first output end of the fifth transconductance amplifier;
The first capacitor is arranged between the first input end of the first transconductance amplifier and the second output end of the second transconductance amplifier;
the second capacitor is arranged between the second input end of the third transconductance amplifier and the second output end of the fourth transconductance amplifier;
The third capacitor is connected in series between the second output end of the fourth transconductance amplifier and the first input end of the fifth transconductance amplifier;
The fourth capacitor is connected in series between the first output end of the fourth transconductance amplifier and the second input end of the fifth transconductance amplifier;
the first end of the fifth capacitor is electrically connected with the second output end of the fifth transconductance amplifier, and the second end of the fifth capacitor outputs a first output voltage;
the first end of the sixth capacitor is electrically connected with the first output end of the fifth transconductance amplifier, and the second end of the sixth capacitor outputs a second output voltage.
In a third aspect of the present disclosure, there is provided a chip comprising a filter as described above.
The transconductance amplifier of the present disclosure includes a conversion circuit and an amplification circuit, the conversion circuit being electrically connected to the amplification circuit. Since the first voltage and the second voltage are input to the body terminal of the first transistor and the body terminal of the second transistor, respectively, the transconductance of the first transistor and the second transistor is reduced. Since the second terminal of the first transistor and the second terminal of the second transistor are electrically connected, the transconductance of the first transistor and the second transistor can be further reduced. Since the gate of the first transistor is electrically connected to the first end of the first transistor and the gate of the second transistor is electrically connected to the first end of the second transistor, the transconductance of the first transistor and the second transistor can be further reduced. By reducing the transconductance of the first transistor and the second transistor a plurality of times, the first voltage and the second voltage can keep the transconductance of the transconductance amplifier substantially unchanged in a wider voltage range, thereby stabilizing the amplification performance of the transconductance amplifier. By stabilizing the amplification performance of the transconductance amplifier, the filter adopting the transconductance amplifier can filter out signals with unnecessary frequencies, thereby improving the filtering effect of the filter.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure, illustrate and explain the disclosure, and do not constitute a limitation on the disclosure. In the drawings:
Fig. 1 is a schematic diagram of a transconductance amplifier according to an exemplary embodiment of the present disclosure;
fig. 2 is a schematic diagram of a transconductance amplifier according to an exemplary embodiment of the present disclosure;
Fig. 3 is a schematic diagram of a transconductance amplifier according to another exemplary embodiment of the present disclosure;
fig. 4 is a schematic diagram of a transconductance amplifier according to another exemplary embodiment of the present disclosure;
fig. 5 is a schematic diagram of a transconductance amplifier according to another exemplary embodiment of the present disclosure;
fig. 6 is a schematic diagram of a transconductance amplifier according to another exemplary embodiment of the present disclosure;
FIG. 7 is a schematic diagram of transconductance simulation results of a transconductance amplifier according to an exemplary embodiment of the present disclosure;
fig. 8 is a schematic diagram of a filter shown in an exemplary embodiment of the present disclosure;
Fig. 9 is a schematic diagram of a filter shown in another exemplary embodiment of the present disclosure;
fig. 10 is a frequency response graph of a filter shown in another exemplary embodiment of the present disclosure.
In the figure:
10. A conversion circuit; 20, an amplifying circuit; 30, an input current generating circuit; a current input circuit, a 32 current mirror circuit, a 33 current input circuit, a 40 common mode feedback circuit, GND, a ground terminal, VDD, a power supply, VCM, a common mode reference voltage, T1, a first transistor, T2, a second transistor, T3, a third transistor, T4, a fourth transistor, T5, a fifth transistor, T6, a sixth transistor, T7, a seventh transistor, T8, an eighth transistor, T9, a ninth transistor, T10, a tenth transistor, T11, an eleventh transistor, T12, a twelfth transistor, T13, a thirteenth transistor, T14, a fourteenth transistor, T15, a fifteenth transistor, T16, a sixteenth transistor, T17, a seventeenth transistor, T18, an eighteenth transistor, T19, a nineteenth transistor, T20, a third transistor, T21, a twenty first transistor, T22, a twenty third transistor, T23, a twenty fourth transistor, a twenty third transistor, T24, a fourth transistor, a fifth transistor, a C8, a capacitor, a C6, a capacitor, a C5, a capacitor, a C12, a capacitor, a C5, a capacitor, a C5, a transistor, a auxiliary amplifier, a TT, a C5, a C, a capacitor, a C5, a C5 transistor, a C5, a C5 transistor, a C5, a fifth transistor, a C5, a C5, a fifth transistor, a C, a fourth transistor, a fifth transistor, a C5 transistor, a C, conductance, V+, first voltage, V-, second voltage, vin, signal input voltage, vout, signal output voltage, IBAS, bias current, iin, input current.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person of ordinary skill in the art would obtain without making any inventive effort are within the scope of protection of this disclosure. It should be noted that, without conflict, the embodiments of the present disclosure and features of the embodiments may be arbitrarily combined with each other.
Currently, the filters in the chip process the signals based on the frequency of the signals, and may be configured with transconductance amplifiers (Operational Transconductance Amplifier, OTA) and passive devices to filter out unwanted frequency signals. For example, in the data conversion process, the filter is used to eliminate the influence of signal distortion in the analog-to-digital conversion system. The filters may be classified into low-pass filters, high-pass filters, band-stop filters, and the like. Among them, the band-pass filter transmits a signal between two frequencies by filtering a low frequency signal and a high frequency signal, and is commonly used in a wireless transmitter and a receiver. For a transconductance amplifier, the transconductance amplifier is used to convert and amplify an input differential voltage into a current for output. However, the transconductance amplifier has a problem of unstable amplification performance in the process of converting and amplifying the differential voltage into current. When the power supply of the transconductance amplifier is low, the transconductance of the transconductance amplifier is greatly changed by the change of the differential voltage. The transconductance of the transconductance amplifier changes along with the change of the input voltage, nonlinear distortion is introduced by the change of the transconductance, so that the output current and the input voltage are not in linear relation any more, the waveform of the output signal of the transconductance amplifier is distorted, and finally the amplification performance of the transconductance amplifier is unstable. The filter has poor filtering effect due to unstable amplification performance of the transconductance amplifier.
Based on this, the present disclosure provides a transconductance amplifier that can maintain the transconductance of the transconductance amplifier unchanged over a wide voltage range by reducing the transconductance of the first transistor and the second transistor in the transconductance amplifier for receiving the differential voltage multiple times. This is because the transconductance of the transconductance amplifier is related to the transconductance of the transistors, and when the transconductance of the first transistor and the second transistor for receiving the differential voltage is reduced, the variation of the input voltage corresponding to the variation of the output current of the transconductance amplifier is also reduced, thereby stabilizing the transconductance of the transconductance amplifier. And the transconductance of the transconductance amplifier is stable, so that the filtering effect of the filter is improved.
An exemplary embodiment of the present disclosure provides a transconductance amplifier, as shown in fig. 1, including a conversion circuit 10 and an amplification circuit 20. The conversion circuit 10 includes a first transistor T1 and a second transistor T2. The body terminal of the first transistor T1 is for receiving a first voltage v+, the gate of the first transistor T1 is electrically connected to the first terminal of the first transistor T1, the body terminal of the second transistor T2 is for receiving a second voltage V-, the gate of the second transistor T2 is electrically connected to the first terminal of the second transistor T2, and the second terminal of the first transistor T1 is electrically connected to the second terminal of the second transistor T2 and is for receiving an input current Iin. The first input terminal of the amplifying circuit 20 is electrically connected to the first terminal of the first transistor T1, the second input terminal of the amplifying circuit 20 is electrically connected to the first terminal of the second transistor T2, and the amplifying circuit 20 is configured to amplify and output the current flowing through the first transistor T1 and the second transistor T2.
In this embodiment, the transconductance amplifier includes a conversion circuit and an amplifying circuit, and the conversion circuit is electrically connected to the amplifying circuit. Since the first voltage and the second voltage are input to the body terminal of the first transistor and the body terminal of the second transistor, respectively, the transconductance of the first transistor and the second transistor is reduced. Since the second terminal of the first transistor and the second terminal of the second transistor are electrically connected, the transconductance of the first transistor and the second transistor can be further reduced. Since the gate of the first transistor is electrically connected to the first end of the first transistor and the gate of the second transistor is electrically connected to the first end of the second transistor, the transconductance of the first transistor and the second transistor can be further reduced. By reducing the transconductance of the first transistor and the second transistor a plurality of times, the first voltage and the second voltage can keep the transconductance of the transconductance amplifier substantially unchanged in a wider voltage range, thereby stabilizing the amplification performance of the transconductance amplifier. By stabilizing the amplification performance of the transconductance amplifier, the filter adopting the transconductance amplifier can filter out signals with unnecessary frequencies, thereby improving the filtering effect of the filter.
The first voltage and the second voltage may be differential voltages input to the transconductance amplifier, for example.
Illustratively, when a voltage is input from the gate of a transistor, a change in the gate voltage directly affects the channel of the transistor, changing the carrier concentration in the channel to increase the transconductance of the transistor. When a voltage is input from the body terminal of the transistor, a current flowing through the transistor passes through the body terminal, so that the transconductance of the transistor is reduced. For example, if the first transistor T1 is a P-type field effect transistor, when the first voltage v+ is received by the body terminal (well-tab) of the first transistor T1, the transconductance of the first transistor T1 is reduced relative to the first voltage v+ received by the gate of the first transistor T1. If the first transistor T1 is an N-type field effect transistor, when the body (buck-tab) of the first transistor T1 is used to receive the first voltage v+, the transconductance of the first transistor T1 is reduced relative to the first voltage v+ received by the gate of the first transistor T1.
In one embodiment, as shown in fig. 2, the amplifying circuit 20 includes a third transistor T3, a fourth transistor T4, a fifth transistor T5 and a sixth transistor T6. The first terminal of the third transistor T3 is electrically connected to the first terminal of the first transistor T1, the first terminal of the third transistor T3 is electrically connected to the gate of the third transistor T3, and the second terminal of the third transistor T3 is electrically connected to the ground GND. The gate of the fourth transistor T4 is electrically connected to the gate of the third transistor T3, the first terminal of the fourth transistor T4 is electrically connected to the ground GND, and the second terminal of the fourth transistor T4 is for outputting the first output current. The first end of the fifth transistor T5 is electrically connected to the first end of the second transistor T2, the first end of the fifth transistor T5 is electrically connected to the gate of the fifth transistor T5, and the second end of the fifth transistor T5 is electrically connected to the ground GND. The gate of the sixth transistor T6 is electrically connected to the gate of the fifth transistor T5, the first terminal of the sixth transistor T6 is electrically connected to the ground GND, and the second terminal of the sixth transistor T6 is for outputting the second output current.
In this embodiment, since the first end of the third transistor is electrically connected to the gate of the third transistor, the transconductance of the third transistor is reduced, and the transconductance of the transconductance amplifier is further stabilized to stabilize the amplification performance of the transconductance amplifier. The gate of the third transistor is connected to the first end of the third transistor and the gate of the fourth transistor, and the third transistor and the fourth transistor form a current mirror, thereby realizing the function of amplifying the current flowing through the first transistor. Similarly, since the first end of the fifth transistor is electrically connected with the gate of the fifth transistor, the transconductance of the fifth transistor is reduced, and the transconductance of the transconductance amplifier is further stabilized to stabilize the amplification performance of the transconductance amplifier. The gate of the fifth transistor is connected to the first end of the fifth transistor and the gate of the sixth transistor, and the fifth transistor and the sixth transistor form a current mirror, thereby realizing the function of amplifying the current flowing through the second transistor.
Illustratively, the first input terminal of the amplifying circuit 20 may be the first terminal of the third transistor T3, the second input terminal of the amplifying circuit 20 may be the first terminal of the fifth transistor T5, the first output terminal of the amplifying circuit 20 may be the second terminal of the sixth transistor T6, and the second output terminal of the amplifying circuit 20 may be the second terminal of the fourth transistor T4.
Illustratively, in the amplifying circuit 20, the ratio of the channel width-to-length ratio of the fourth transistor T4 to the channel width-to-length ratio of the third transistor T3 is to amplify the current flowing through the first transistor T1 to the amplification factor of the first output current, and the ratio of the channel width-to-length ratio of the sixth transistor T6 to the channel width-to-length ratio of the fifth transistor T5 is to amplify the current flowing through the second transistor T2 to the amplification factor of the second output current. The ratio of the channel width-to-length ratio of the fourth transistor T4 to the channel width-to-length ratio of the third transistor T3 may be 2:1, 5:1, 10:1, 15:1, 20:1, etc., and the ratio of the channel width-to-length ratio of the sixth transistor T6 to the channel width-to-length ratio of the fifth transistor T5 may be 2:1, 5:1, 10:1, 15:1, 20:1, etc.
In one embodiment, the transconductance amplifier further includes a balancing circuit for balancing the first output current and the second output current output by the amplifying circuit 20. The balancing circuit may include a seventh transistor T7 and an eighth transistor T8. The first terminal of the seventh transistor T7 is electrically connected to the power supply VDD, and the second terminal of the seventh transistor T7 is electrically connected to the second terminal of the fourth transistor T4. The first end of the eighth transistor T8 is electrically connected to the power supply VDD, the second end of the eighth transistor T8 is electrically connected to the second end of the sixth transistor T6, and the gate of the eighth transistor T8 is electrically connected to the gate of the seventh transistor T7.
In the present embodiment, by the balance circuit including the seventh transistor and the eighth transistor, the first output current and the second output current can be balanced, thereby stabilizing the amplification performance of the transconductance amplifier.
Illustratively, the voltages of the gates of the seventh transistor T7 and the eighth transistor T8 may be bias voltages generated by bias circuits in the chip.
In one embodiment, as shown in fig. 3, the transconductance amplifier further includes an input current generating circuit 30, and the input current generating circuit 30 includes a current input circuit 31, a current mirror circuit 32, and a current output circuit 33. The current input circuit 31 is configured to receive the bias current IBAS. The current mirror circuit 32 includes a plurality of current mirror branches, each of which is connected in parallel and electrically connected to the current input circuit 31, and at least one of which is controllable to be turned on and off. The current output circuit 33 is electrically connected to each current mirror branch and the conversion circuit 10, and the current output circuit 33 is configured to convert the current of at least part of the current mirror branches into the input current Iin after superimposing.
In this embodiment, each current mirror branch may amplify an input bias current, and then superimpose and convert the amplified currents into an input current through a current output circuit. The magnitude of the input current can be specifically adjusted by adjusting the on-off of each current mirror branch, so that the flexibility and controllability of the input current are improved. And the transconductance of the transconductance amplifier can be adjusted by adjusting the magnitude of the input current, so that the controllability of the amplification performance of the transconductance amplifier is improved.
Illustratively, by adjusting the magnitude of the input current Iin, the transconductance of the transconductance amplifier may be adjusted, since the transconductance of the transistor is calculated as follows:
Where g mt is the transconductance of the transistor, φ t is the thermal voltage, k is the threshold index coefficient, and I DS is the current through the transistor. Wherein, thermal voltage phi t =kt/q, K is boltzmann constant, T is thermodynamic temperature, q is electron charge quantity. The transconductance of the first transistor T1 and the second transistor T2 can be adjusted by varying the input current Iin to adjust the transconductance of the transconductance amplifier.
In one embodiment, as shown in fig. 4, the current input circuit 31 includes a ninth transistor T9. The first terminal of the ninth transistor T9 is for receiving the bias current IBAS, the second terminal of the ninth transistor T9 is for being electrically connected to the ground GND, and the gate of the ninth transistor T9 is electrically connected to the first terminal of the ninth transistor T9. The current mirror circuit 32 includes a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, a thirteenth transistor T13, a fourteenth transistor T14, a fifteenth transistor T15, and a sixteenth transistor T16. The first terminal of the tenth transistor T10 is electrically connected to the ground GND, and the gate of the tenth transistor T10 is electrically connected to the gate of the ninth transistor T9. The first terminal of the eleventh transistor T11 is electrically connected to the ground GND, and the gate of the eleventh transistor T11 is configured to receive the first control signal. The first terminal of the twelfth transistor T12 is electrically connected to the second terminal of the eleventh transistor T11, and the gate of the twelfth transistor T12 is electrically connected to the gate of the ninth transistor T9. The first terminal of the thirteenth transistor T13 is electrically connected to the ground GND, and the gate of the thirteenth transistor T13 is configured to receive the second control signal. The first terminal of the fourteenth transistor T14 is electrically connected to the second terminal of the thirteenth transistor T13, and the gate of the fourteenth transistor T14 is electrically connected to the gate of the ninth transistor T9. The first terminal of the fifteenth transistor T15 is electrically connected to the ground GND, and the gate of the fifteenth transistor T15 is configured to receive the third control signal. The first terminal of the sixteenth transistor T16 is electrically connected to the second terminal of the fifteenth transistor T15, and the gate of the sixteenth transistor T16 is electrically connected to the gate of the ninth transistor T9. The current output circuit 33 includes a seventeenth transistor T17 and an eighteenth transistor T18. The first terminal of the seventeenth transistor T17 is electrically connected to the power supply VDD, the second terminal of the seventeenth transistor T17 is electrically connected to the second terminal of the tenth transistor T10, the second terminal of the twelfth transistor T12, the second terminal of the fourteenth transistor T14, and the second terminal of the sixteenth transistor T16, and the gate of the seventeenth transistor T17 is electrically connected to the second terminal of the seventeenth transistor T17. The first terminal of the eighteenth transistor T18 is electrically connected to the power supply VDD, the second terminal of the eighteenth transistor T18 is electrically connected to both the second terminal of the first transistor T1 and the second terminal of the second transistor T2, and the gate of the eighteenth transistor T18 is electrically connected to the gate of the seventeenth transistor T17. The body terminals of the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16 are all configured to be electrically connected to the ground GND.
In this embodiment, since the gate of the ninth transistor is electrically connected to the first end of the ninth transistor and the gates of the ninth transistor are respectively connected to the gates of the tenth transistor, the twelfth transistor, the fourteenth transistor and the sixteenth transistor, the ninth transistor and the tenth transistor, the twelfth transistor, the fourteenth transistor and the sixteenth transistor form a current mirror, respectively. By setting the channel width-to-length ratios of the tenth transistor, the twelfth transistor, the fourteenth transistor, and the sixteenth transistor, respectively, the multiple by which each current mirror branch amplifies the bias current can be adjusted, respectively. And since the gates of the eleventh transistor, the thirteenth transistor and the fifteenth transistor are respectively used for receiving the first control signal, the second control signal and the third control signal, the number of turned-on current mirror branches can be selected according to the specific situation. Thus, the input current can be accurately regulated, the regulating range of the input current is enlarged to regulate the transconductance of the transconductance amplifier, and the power consumption of the transconductance amplifier can be reduced. And the amplified current of each current mirror branch is added to the branch where the seventeenth transistor is located, and since the seventeenth transistor and the eighteenth transistor also form a current mirror, the channel width-to-length ratio of the eighteenth transistor and the channel width-to-length ratio of the seventeenth transistor can be set, and the magnitude of the input current can be adjusted again, so that the transconductance of the transconductance amplifier can be further adjusted. The transconductance of the transconductance amplifier can be adjusted according to the need by selecting the opened current mirror branch, so that the amplification performance of the transconductance amplifier is improved.
Illustratively, the ratio of the channel width to length ratio of the tenth transistor T10 to the channel width to length ratio of the ninth transistor T9 may be 2:1, 5:1, 10:1, 15:1, 20:1, etc., the ratio of the channel width to length ratio of the twelfth transistor T12 to the channel width to length ratio of the ninth transistor T9 may be 2:1, 5:1, 10:1, 15:1, 20:1, etc., the ratio of the channel width to length ratio of the fourteenth transistor T14 to the channel width to length ratio of the ninth transistor T9 may be 2:1, 5:1, 10:1, 15:1, 20:1, etc., and the ratio of the channel width to length ratio of the sixteenth transistor T16 to length ratio of the channel width to length ratio of the ninth transistor T9 may be 2:1, 5:1, 10:1, 15:1, 20:1, etc. The ratio of the channel width-to-length ratio of the eighteenth transistor T18 to the channel width-to-length ratio of the seventeenth transistor T17 may be 1:1, 2:1, 5:1, 10:1, 15:1, 20:1, etc.
Illustratively, the current mirror circuit 32 also includes a first auxiliary transistor TT1. The first end of the first auxiliary transistor TT1 is electrically connected to the ground GND, the second end of the first auxiliary transistor TT1 is electrically connected to the first end of the tenth transistor T10, the gate of the first auxiliary transistor TT1 is configured to receive the fourth control signal, and the body end of the first auxiliary transistor TT1 is configured to be electrically connected to the ground GND. The fourth control signal may be provided by the power supply VDD. When the transconductance amplifier is powered up, the first auxiliary transistor TT1 is turned on. When the transconductance amplifier is powered down, the first auxiliary transistor TT1 is turned off. In this way, a more reliable operation of the current mirror circuit 32 can be ensured.
Illustratively, the current input circuit 31 further includes a second auxiliary transistor TT2, a third auxiliary transistor TT3, a fourth auxiliary transistor TT4, and a fifth auxiliary transistor TT5. A first terminal of the second auxiliary transistor TT2 is electrically connected to a first terminal of the ninth transistor T9, a second terminal of the second auxiliary transistor TT2 is configured to receive the bias current IBAS, and a gate of the second auxiliary transistor TT2 is configured to receive the fifth control signal. The fifth control signal may be a power down signal (power down). Thus, when the transconductance amplifier is not used or is required to be commissioned, the transconductance amplifier can be turned off by turning off the second auxiliary transistor TT2 by the fifth control signal. The first end of the third auxiliary transistor TT3 is electrically connected to the second end of the ninth transistor T9, the second end of the third auxiliary transistor TT3 is electrically connected to the ground GND, the gate of the third auxiliary transistor TT3 is configured to receive a sixth control signal, the sixth control signal may be provided by the power supply VDD, and the body end of the third auxiliary transistor TT3 is configured to be electrically connected to the ground GND. The first end of the fourth auxiliary transistor TT4 is electrically connected to the gate of the ninth transistor T9 and the gate of the tenth transistor T10, the second end of the fourth auxiliary transistor TT4 is electrically connected to the ground GND, the gate of the fourth auxiliary transistor TT4 is configured to receive the seventh control signal, and the body end of the fourth auxiliary transistor TT4 is electrically connected to the ground GND. The seventh control signal may be a power-off signal. The gate of the fifth auxiliary transistor TT5 is electrically connected to the gate of the ninth transistor T9, the first terminal of the fourth auxiliary transistor TT4, and the gate of the tenth transistor T10, and the first terminal, the second terminal, and the body terminal of the fifth auxiliary transistor TT5 are electrically connected to the ground GND. The fifth auxiliary transistor TT5 functions as a capacitor for filtering and voltage stabilization.
Illustratively, the current output circuit 33 further includes a sixth auxiliary transistor TT6, a seventh auxiliary transistor TT7, and an eighth auxiliary transistor TT8. The first terminal of the sixth auxiliary transistor TT6 is electrically connected to the second terminal of the tenth transistor T10, the second terminal of the twelfth transistor T12, the second terminal of the fourteenth transistor T14 and the second terminal of the sixteenth transistor T16, the first terminal of the sixth auxiliary transistor TT6 is also electrically connected to the gate of the seventeenth transistor T17, the second terminal of the sixth auxiliary transistor TT6 is electrically connected to the second terminal of the seventeenth transistor T17, and the body terminal of the sixth auxiliary transistor TT6 is electrically connected to the body terminal of the seventeenth transistor T17 and the power supply VDD. The first terminal of the seventh auxiliary transistor TT7 is electrically connected to the power supply VDD, and the second terminal of the seventh auxiliary transistor TT7 is electrically connected to the gate of the seventeenth transistor T17 and the first terminal of the sixth auxiliary transistor TT 6. The gate of the eighth auxiliary transistor TT8 is electrically connected to the second terminal of the seventh auxiliary transistor TT7, the gate of the seventeenth transistor T17, and the first terminal of the sixth auxiliary transistor TT6, and the first terminal, the second terminal, and the body terminal of the eighth auxiliary transistor TT8 are all electrically connected to the power supply VDD. The eighth auxiliary transistor TT8 functions as a capacitor for voltage stabilizing filtering. The eighth auxiliary transistor TT8 achieves the purpose of stabilizing the input current Iin by stabilizing the voltage output from the gate of the seventeenth transistor T17, so as to stabilize the amplification performance of the transconductance amplifier.
Illustratively, the gates of the sixth and seventh auxiliary transistors TT6, TT7 may receive different control signals to improve the reliability of the transconductance amplifier.
In one embodiment, as shown in fig. 5, the transconductance amplifier further includes a common mode feedback circuit 40, and the common mode feedback circuit 40 is electrically connected to both the first output terminal and the second output terminal of the amplifying circuit 20.
In this embodiment, the common mode feedback circuit is electrically connected to the first output terminal and the second output terminal of the amplifying circuit, so that the common mode signals in the first output current and the second output current can be adjusted, thereby stabilizing the amplifying performance of the transconductance amplifier.
In one embodiment, as shown in fig. 6, the common mode feedback circuit 40 includes a nineteenth transistor T19, a twentieth transistor T20, a twenty first transistor T21, a twenty second transistor T22, a twenty third transistor T23, a twenty fourth transistor T24, a twenty fifth transistor T25, and a twenty sixth transistor T26. A gate of the nineteenth transistor T19 is electrically connected to the second output terminal of the amplifying circuit 20. The first terminal of the twentieth transistor T20 is electrically connected to both the first terminal and the body terminal of the nineteenth transistor T19, and the second terminal and the body terminal of the twentieth transistor T20 are electrically connected to the ground terminal GND. The first terminal and the body terminal of the twenty-first transistor T21 are electrically connected to the first terminal of the twentieth transistor T20, and the gate of the twenty-first transistor T21 is configured to receive the common mode reference voltage VCM. The gate of the twenty-second transistor T22 is electrically connected to the first output terminal of the amplifying circuit 20, and the first terminal of the twenty-second transistor T22 is electrically connected to the second terminal of the nineteenth transistor T19. The first terminal of the twenty-third transistor T23 is electrically connected to both the second terminal and the body terminal of the twenty-third transistor T22, and the second terminal and the body terminal of the twenty-third transistor T23 are electrically connected to the ground terminal GND. The first terminal and the body terminal of the twenty-fourth transistor T24 are electrically connected to the first terminal of the twenty-third transistor T23, the second terminal of the twenty-fourth transistor T24 is electrically connected to the second terminal of the twenty-first transistor T21, and the gate of the twenty-fourth transistor T24 is configured to receive the common mode reference voltage VCM. The first end and the body end of the twenty-fifth transistor T25 are electrically connected to the power supply VDD, and the second end of the twenty-fifth transistor T25 is electrically connected to the gate of the twenty-fifth transistor T25 and to the second end of the twenty-first transistor T21 and the second end of the twenty-fourth transistor T24. The first terminal and the body terminal of the twenty-sixth transistor T26 are electrically connected to the power supply VDD, and the second terminal of the twenty-sixth transistor T26 is electrically connected to the gate of the twenty-sixth transistor T26 and to the second terminal of the nineteenth transistor T19 and the first terminal of the twenty-second transistor T22.
In this embodiment, when the first voltage and the second voltage are amplified by the transconductance amplifier, a common mode signal is generated in the first output current and the second output current. By electrically connecting the common mode feedback circuit with the first output terminal and the second output terminal of the amplifying circuit, the first output current and the second output current can be stabilized, thereby stabilizing the amplifying performance of the transconductance amplifier.
Illustratively, the common mode feedback circuit 40 also includes a ninth auxiliary transistor TT9. The gate of the ninth auxiliary transistor TT9 is electrically connected to the gate of the twenty-fifth transistor T25, the second terminal of the twenty-fifth transistor T25, the gate of the seventh transistor T7, and the gate of the eighth transistor T8, and the first terminal, the second terminal, and the body terminal of the ninth auxiliary transistor TT9 are all connected to the power supply VDD. The ninth auxiliary transistor TT9 corresponds to a capacitor for voltage stabilizing filtering.
The transistors in the transconductance amplifier may be N-type transistors or P-type transistors, for example. Each transistor in the transconductance amplifier may be a field effect transistor, an insulated gate bipolar transistor, or the like. The first end of each transistor in the transconductance amplifier may be a source or a drain. The second end of each transistor in the transconductance amplifier may be a drain electrode or a source electrode. The first and second ends of different transistors may be different electrodes.
Illustratively, the first transistor T1 may be a P-type field effect transistor, the first terminal of the first transistor T1 may be a drain, and the second terminal of the first transistor T1 may be a source. The second transistor T2 may be a P-type field effect transistor, the first terminal of the second transistor T2 may be a drain, and the second terminal of the second transistor T2 may be a source. The third transistor T3 may be an N-type field effect transistor, a first terminal of the third transistor T3 may be a drain, and a second terminal of the third transistor T3 may be a source. The fourth transistor T4 may be an N-type field effect transistor, the first terminal of the fourth transistor T4 may be a source, and the second terminal of the fourth transistor T4 may be a drain. the fifth transistor T5 may be an N-type field effect transistor, the first terminal of the fifth transistor T5 may be a drain, and the second terminal of the fifth transistor T2 may be a source. The sixth transistor T6 may be an N-type field effect transistor, the first terminal of the sixth transistor T6 may be a source, and the second terminal of the sixth transistor T6 may be a drain. The seventh transistor T7 may be a P-type field effect transistor, a first terminal of the seventh transistor T7 may be a source, and a second terminal of the seventh transistor T7 may be a drain. The eighth transistor T8 may be a P-type field effect transistor, the first terminal of the eighth transistor T8 may be a source, and the second terminal of the eighth transistor T8 may be a drain. The ninth transistor T9 may be an N-type field effect transistor, a first terminal of the ninth transistor T9 may be a drain, and a second terminal of the ninth transistor T9 may be a source. The tenth transistor T10 may be an N-type field effect transistor, a first terminal of the tenth transistor T10 may be a source, and a second terminal of the tenth transistor T10 may be a drain. The eleventh transistor T11 may be an N-type field effect transistor, a first terminal of the eleventh transistor T11 may be a source, and a second terminal of the eleventh transistor T11 may be a drain. The twelfth transistor T12 may be an N-type field effect transistor, a first terminal of the twelfth transistor T12 may be a source, and a second terminal of the twelfth transistor T12 may be a drain. The thirteenth transistor T13 may be an N-type field effect transistor, a first terminal of the thirteenth transistor T13 may be a source, and a second terminal of the thirteenth transistor T13 may be a drain. The fourteenth transistor may be an N-type field effect transistor, the first terminal of the fourteenth transistor T14 may be a source, and the second terminal of the fourteenth transistor T14 may be a drain. The fifteenth transistor T15 may be an N-type field effect transistor, a first terminal of the fifteenth transistor T15 may be a source, and a second terminal of the fifteenth transistor T15 may be a drain. The sixteenth transistor may be an N-type field effect transistor, the first terminal of the sixteenth transistor T16 may be a source, and the second terminal of the sixteenth transistor T16 may be a drain. the seventeenth transistor T17 may be a P-type field effect transistor, a first terminal of the seventeenth transistor T17 may be a source, and a second terminal of the seventeenth transistor T17 may be a drain. The eighteenth transistor T18 may be a P-type field effect transistor, the first terminal of the eighteenth transistor T18 may be a source, and the second terminal of the eighteenth transistor T18 may be a drain. The nineteenth transistor T19 may be an N-type field effect transistor, a first terminal of the nineteenth transistor T19 may be a source, and a second terminal of the nineteenth transistor T19 may be a drain. The twentieth transistor T20 may be an N-type field effect transistor, the first terminal of the twentieth transistor T20 may be a drain, and the second terminal of the twentieth transistor T20 may be a source. The twenty-first transistor T21 may be an N-type field effect transistor, a first terminal of the twenty-first transistor T21 may be a source, and a second terminal of the twenty-first transistor T21 may be a source. The twenty-second transistor T22 may be an N-type field effect transistor, a first terminal of the twenty-second transistor T22 may be a drain, and a second terminal of the twenty-second transistor T22 may be a source. The twenty-third transistor T23 may be an N-field effect transistor, a first terminal of the twenty-third transistor T23 may be a drain, and a second terminal of the twenty-third transistor T23 may be a source. The twenty-fourth transistor T24 may be an N-type field effect transistor, the first terminal of the twenty-fourth transistor T24 may be a source, and the second terminal of the twenty-fourth transistor T24 may be a drain. The twenty-fifth transistor T25 may be a P-type field effect transistor, a first terminal of the twenty-fifth transistor T25 may be a source, and a second terminal of the twenty-fifth transistor T25 may be a drain. The twenty-sixth transistor T26 may be a P-type field effect transistor, the first terminal of the twenty-sixth transistor T26 may be a source, and the second terminal of the twenty-fifth transistor T25 may be a drain.
The first auxiliary transistor TT1 may be an N-type field effect transistor, a first terminal of the first auxiliary transistor TT1 may be a source, and a second terminal of the first auxiliary transistor TT1 may be a drain. The second auxiliary transistor TT2 may be a P-type transistor, a first terminal of the second auxiliary transistor TT2 may be a drain, and a second terminal of the second auxiliary transistor TT2 may be a source. The third auxiliary transistor TT3 may be an N-type field effect transistor, a first terminal of the third auxiliary transistor TT3 may be a drain, and a second terminal of the third auxiliary transistor TT3 may be a source. The fourth auxiliary transistor TT4 may be an N-type field effect transistor, a first terminal of the fourth auxiliary transistor TT4 may be a drain, and a second terminal of the fourth auxiliary transistor TT4 may be a source. The fifth transistor TT5 may be an N-type field effect transistor, and the first and second terminals of the fifth auxiliary transistor TT5 may be a drain and a source, respectively. The sixth auxiliary transistor TT6 may be a P-type field effect transistor, a first terminal of the sixth auxiliary transistor TT6 may be a drain, and a second terminal of the sixth auxiliary transistor TT6 may be a source. The seventh auxiliary transistor TT7 may be a P-type field effect transistor, the first end of the seventh auxiliary transistor TT7 may be a source, the second end of the seventh auxiliary transistor TT7 may be a drain, the eighth auxiliary transistor TT8 may be a P-type transistor, and the first and second ends of the eighth auxiliary transistor TT8 may be a source and a drain, respectively. The ninth auxiliary transistor TT9 may be a P-type transistor, and the first and second terminals of the ninth auxiliary transistor TT9 may be a source and a drain, respectively.
Illustratively, as shown in fig. 7, a simulation test was performed on the performance of the transconductance amplifier of the present disclosure. The power supply VDD is set to 1V. From the graph, when the voltage of the power supply VDD is smaller, the transconductance value of the transconductance amplifier basically keeps unchanged within the range of 0V-0.4V, and the transconductance deviation is lower than 1%. That is, the transconductance amplifier of the present disclosure can keep the transconductance change small in a larger differential voltage range even under the voltage of the smaller power supply VDD, so as to stabilize the transconductance of the transconductance amplifier. Where the abscissa is the input differential voltage (i.e., the difference between the first voltage V + and the second voltage V-and the ordinate is the transconductance of the transconductance amplifier.
An exemplary embodiment of the present disclosure provides a filter comprising a transconductance amplifier as described above.
In this embodiment, since the amplification performance of the transconductance amplifier is stable, it can be ensured that the filter filters out signals of unnecessary frequencies, thereby improving the filtering effect of the filter.
In one embodiment, as shown in fig. 8, the body of the first transistor T1 is used as the first input terminal of the transconductance amplifier, the body of the second transistor T2 is used as the second input terminal of the transconductance amplifier, the first output terminal of the amplifying circuit 20 is used as the first output terminal of the transconductance amplifier, and the second output terminal of the amplifying circuit 20 is used as the second output terminal of the transconductance amplifier. The plurality of transconductance amplifiers includes a first transconductance amplifier OTA1, a second transconductance amplifier OTA2, a third transconductance amplifier OTA3, a fourth transconductance amplifier OTA4, and a fifth transconductance amplifier OTA5. The filter further includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6. The first input end of the first transconductance amplifier OTA1 is electrically connected with the second output end of the second transconductance amplifier OTA2, the second output end of the third transconductance amplifier OTA3 and the second input end of the fourth transconductance amplifier OTA4, the second input end of the first transconductance amplifier OTA1 is electrically connected with the first output end of the second transconductance amplifier OTA2, the first output end of the third transconductance amplifier OTA3 and the first input end of the fourth transconductance amplifier OTA4, the first output end of the first transconductance amplifier OTA1 is electrically connected with the first input end of the second transconductance amplifier OTA2 and is used for receiving a first input voltage, and the second output end of the first transconductance amplifier OTA1 is electrically connected with the second input end of the second transconductance amplifier OTA2 and is used for receiving a second input voltage. The first input terminal of the third transconductance amplifier OTA3 is electrically connected to the second output terminal of the fourth transconductance amplifier OTA4, the first input terminal of the fifth transconductance amplifier OTA5, and the second output terminal of the fifth transconductance amplifier OTA5, and the second input terminal of the third transconductance amplifier OTA3 is electrically connected to the first input terminal of the fourth transconductance amplifier OTA4, the second input terminal of the fifth transconductance amplifier OTA5, and the first output terminal of the fifth transconductance amplifier OTA5. The first capacitor C1 is disposed between the first input terminal of the first transconductance amplifier OTA1 and the second output terminal of the second transconductance amplifier OTA 2. The second capacitor C2 is disposed between the second input terminal of the third transconductance amplifier OTA3 and the second output terminal of the fourth transconductance amplifier OTA 4. The third capacitor C3 is connected in series between the second output terminal of the fourth transconductance amplifier OTA4 and the first input terminal of the fifth transconductance amplifier OTA5. The fourth capacitor C4 is connected in series between the first output terminal of the fourth transconductance amplifier OTA4 and the second input terminal of the fifth transconductance amplifier OTA5. The first end of the fifth capacitor C5 is electrically connected to the second output end of the fifth transconductance amplifier OTA5, and the second end of the fifth capacitor C5 outputs the first output voltage. A first end of the sixth capacitor C6 is electrically connected to the first output end of the fifth transconductance amplifier OTA5, and a second end of the sixth capacitor C6 outputs a second output voltage.
In this embodiment, the second-order band-pass filter is formed by five transconductance amplifiers and six capacitors, and signals with required frequencies are selected to be reserved, so that the filtering effect of the filter is improved.
Illustratively, as shown in fig. 9, the first transconductance amplifier OTA1, the second transconductance amplifier OTA2, the third transconductance amplifier OTA3, and the fourth transconductance amplifier OTA4, and the first capacitor C1 are equivalent to the conductance L. The fifth transconductance amplifier OTA5 is equivalent to a resistor R. The signal input voltage of the filter is Vin, which is the difference between the first input voltage and the second input voltage. The signal output voltage of the filter is Vout, which is the difference between the first output voltage and the second output voltage. Assuming that the transconductance of the first transconductance amplifier OTA1, the second transconductance amplifier OTA2, the third transconductance amplifier OTA3, and the fourth transconductance amplifier OTA4 are g m, the transconductance of the fifth transconductance amplifier OTA5 is g m5, the capacitance of the first capacitor C1 is C 1, the capacitance of the second capacitor C2 is C 2, the capacitance of the third capacitor C3 and the fourth capacitor C4 is C 3, and the capacitance of the fifth capacitor C5 and the sixth capacitor C6 is C 4. Since the capacitance values of the third capacitor C3 and the fourth capacitor C4 are the same, the equivalent capacitor is denoted as a seventh capacitor C7. Since the capacitance values of the fifth capacitor C5 and the sixth capacitor C6 are the same, the equivalent capacitor is denoted as an eighth capacitor C8. The conductance values of the conductance L equivalent to the first transconductance amplifier OTA1, the second transconductance amplifier OTA2, the third transconductance amplifier OTA3, the fourth transconductance amplifier OTA4 and the first capacitor C1 areThe equivalent resistance R of the fifth transconductance amplifier OTA5 is 1/g m5, and the transfer function of the filter is:
wherein R load is the load resistance to which the filter is connected.
The filter has two zero points and four poles, and the four poles are respectively:
Then f L=p3≈p4,fH=p1,2 (where f L is the lowest frequency value that the filter can pass and f H is the highest frequency value that the filter can pass) can be made to implement the bandpass function of the bandpass filter by adjusting the transconductance of the transconductance amplifier and the capacitance of the filter. The frequency response curves of the filters are shown in FIG. 10, and the attenuation levels of the low frequency signal to f L and f H to the high frequency signal are-40 dB/decade. The filter passes the frequency range of 10 6 to 10 8, and attenuates other frequencies, thereby realizing the function of the band-pass filter. And the smaller the transconductance of the filter is, the larger the corresponding frequency pole is, so that the problems of high power consumption caused by the fact that high-current drive is required to be used for high frequency in an operational amplifier+RC and high-inductance drive is required to be used for high frequency in an inductance-capacitance filter are avoided. Wherein, the abscissa is frequency, and the ordinate is signal input voltage. Since the transconductance of the transconductance amplifier is related to the input current Iin, which can be adjusted by the bias current IBIAS and the input current generating circuit 30, digital controllability of the passband range of the filter can be achieved by the transconductance amplifier. In addition, due to the low power consumption characteristic of the transconductance amplifier, the advantages of small circuit area and low power consumption of the filter can be realized. An exemplary embodiment of the present disclosure provides a chip including a filter as described above.
The above descriptions may be implemented alone or in various combinations, and these modifications are within the scope of the present disclosure.
In this disclosure, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising" does not exclude the presence of additional identical elements in an article or apparatus that includes the element.
While the preferred embodiments of the present disclosure have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the disclosure.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present disclosure without departing from the spirit or scope of the disclosure. Thus, given that such modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the intent of the present disclosure is to encompass such modifications and variations as well.