CN117250416B - Multiphase signal scanning detection circuit and detection method - Google Patents
Multiphase signal scanning detection circuit and detection method Download PDFInfo
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- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The invention provides a multiphase signal scanning detection circuit and a multiphase signal scanning detection method. The multiphase signal scanning detection circuit includes: a signal detection circuit configured to perform a plurality of scanning periods, each of the scanning periods including a first phase scanning and a second phase scanning performed sequentially; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration; and the differential circuit is connected with the output end of the signal detection circuit and is used for carrying out differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning. The multiphase signal scanning detection circuit of the invention greatly reduces non-ideal factors under the condition of almost not increasing hardware circuits, thereby increasing the dynamic range of effective signals and the effective signal-to-noise ratio.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a multiphase signal scanning detection circuit and a multiphase signal scanning detection method.
Background
Conventional signal detection, especially capacitive charge signal detection, usually employs a method of amplifying a signal by a charge amplifier, then accumulating the signal by an integrator, and finally delivering the output of the integrator to an ADC for quantization. This conventional signal detection process is a scan process of precharge (stimulus) -reset-integration, and the corresponding timing diagram is shown in fig. 1. However, the flow of such single-phase scanning generally introduces some non-ideal factors due to charge injection, nonlinear on-resistance, etc. of the switch, resulting in a reduced dynamic range of the effective signal and a lower effective signal-to-noise ratio of the system.
Disclosure of Invention
The invention aims to provide a multiphase signal scanning detection circuit and a multiphase signal scanning detection method, which have the advantages of reducing non-ideal factors, increasing the dynamic range of effective signals, improving the effective signal to noise ratio and the like.
To solve the problems in the prior art, in a first aspect, the present invention provides a multi-phase signal scanning detection circuit, comprising:
a signal detection circuit configured to perform a plurality of scanning periods, each of the scanning periods including a first phase scanning and a second phase scanning performed sequentially; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration;
and the differential circuit is connected with the output end of the signal detection circuit and is used for carrying out differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning.
Optionally, the signal detection circuit includes a plurality of signal detection units and a charge amplifier circuit, the signal detection units and the charge amplifier circuit include:
the positive input end of the charge amplifier is connected with a reference voltage, and the output end of the charge amplifier is the output end of the signal detection unit and the charge amplifier circuit;
The first polar plate of the grounding capacitor is grounded;
one end of the first reset switch is connected with the negative input end of the charge amplifier, and the other end of the first reset switch is connected with the output of the charge amplifier;
the sampling integration circuit comprises a first end, a second end and a third end; the first end of the sampling integration circuit is connected with the second pole plate of the grounding capacitor; the second end of the sampling integration circuit is connected with one end of the first reset switch, which is far away from the negative input end of the charge amplifier, and the negative input end of the charge amplifier is connected with the second end of the sampling integration circuit; the third input end of the sampling integration circuit is connected with one end of the first reset switch, which is far away from the negative input end of the charge amplifier, and the output end of the charge amplifier;
and the pre-charging circuit is connected with the sampling integrating circuit in parallel.
Optionally, the sampling integration circuit includes:
one end of the first sampling switch is connected with the second pole plate of the grounding capacitor;
one end of the first loop connection switch is connected with one end of the first sampling switch, which is far away from the grounding capacitor, and the other end of the first loop connection switch is connected with the negative input end of the charge amplifier;
The first polar plate of the first integrating capacitor is connected with the second polar plate of the grounding capacitor;
one end of the second sampling switch is connected with a second pole plate of the first integrating capacitor;
and one end of the second loop connecting switch is connected with one end of the second sampling switch, which is far away from the first integrating capacitor, and the other end of the second loop connecting switch is connected with the output end of the charge amplifier.
Optionally, the precharge circuit includes:
one end of the first pre-charging switch is connected with the first polar plate of the integrating capacitor, and the other end of the first pre-charging switch is connected with charging voltage;
and one end of the second pre-charging switch is connected with one end of the second sampling switch, which is far away from the first integrating capacitor, and the other end of the second pre-charging switch is connected with the charging voltage.
Optionally, the differential circuit includes:
the first input end is connected with the output end of the signal detection circuit;
the second input end is connected with the output signal of the compensation charge amplifier;
the first output end is used for outputting a first output signal;
and the second output end is used for outputting a second output signal.
Optionally, the differential circuit includes:
a differential integrator;
the first polar plate of the first coupling capacitor is a first input end of the differential circuit; the second polar plate of the first coupling capacitor is connected with the negative input end of the differential integrator;
the first polar plate of the second coupling capacitor is a second input end of the differential circuit, and the second polar plate of the second coupling capacitor is connected with the positive input end of the differential integrator;
one end of the second reset switch is connected with the negative input end of the differential integrator, and the other end of the second reset switch is connected with the first output end of the differential integrator;
one end of the first integral switch is connected with the negative input end of the differential integrator;
the first polar plate of the second integrating capacitor is connected with one end, far away from the first negative input end of the differential integrator, of the first integrating switch, and the second polar plate of the second integrating capacitor is connected with the first output end of the differential integrator; the second polar plate of the second integrating capacitor, the other end of the second reset switch and the first output end of the differential integrator are connected and then are used as the first output end of the differential circuit together;
One end of the third reset switch is connected with the positive input end of the differential integrator, and the other end of the third reset switch is connected with the second output end of the differential integrator;
one end of the second integral switch is connected with the positive input end of the differential integrator;
the first polar plate of the third integrating capacitor is connected with one end, far away from the first positive input end of the differential integrator, of the second integrating switch, and the second polar plate of the second integrating capacitor is connected with the second output end of the differential integrator; the second polar plate of the third integrating capacitor, the other end of the third reset switch and the second output end of the differential integrator are connected and then are used as the second output end of the differential circuit together.
Optionally, the multi-phase signal scanning detection circuit further includes an analog-to-digital converter circuit, and an input end of the analog-to-digital converter circuit is connected to the first output end of the differential circuit and the second output end of the differential circuit, and is configured to sample and quantize an output result of the differential circuit after all the scanning periods are executed.
Optionally, the multiphase signal scanning detection circuit further comprises a chopper circuit, the chopper circuit is located between the signal detection circuit and the differential circuit, and an input end of the differential circuit is connected with an output end of the signal detection circuit through the chopper circuit.
Optionally, the chopper circuit includes:
the first input end of the chopper circuit is connected with the output end of the signal detection circuit;
the second input end of the chopper circuit is connected with the output signal of the compensation charge amplifier;
the third input end of the chopper circuit is connected with the first control signal;
the fourth input end of the chopper circuit is connected with the second control signal;
the first output end and the second output end of the chopper circuit are connected with the differential circuit;
the chopper circuit is configured to switch a first input terminal of the chopper circuit to the second input terminal when the second phase scanning is performed, compared to when the reset and integration of the first phase scanning are performed, based on the first control signal and the second control signal.
In a second aspect, the present invention also provides a multiphase signal scanning detection method, which is performed based on the multiphase signal scanning detection circuit as described in the first aspect; the multi-phase signal scanning detection method comprises the following steps:
executing a plurality of scanning periods, wherein each scanning period comprises a first phase scanning and a second phase scanning which are sequentially executed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration;
and carrying out differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning.
Optionally, after performing the differential processing on the scan result of the first phase scan and the scan result of the second phase scan, the method further includes:
and after all the scanning periods are executed, sampling and quantizing the output result of the differential circuit.
Optionally, the multiphase signal scan detection circuit further comprises a chopper circuit, the chopper circuit comprising: the first input end of the chopper circuit is connected with the output end of the signal detection circuit; the second input end of the chopper circuit is connected with the output signal of the compensation charge amplifier; the third input end of the chopper circuit is connected with the first control signal; the fourth input end of the chopper circuit is connected with the second control signal; the first output end and the second output end of the chopper circuit are connected with the differential circuit; when the second phase scan is performed, the first input terminal and the second input terminal of the chopper circuit are switched compared with when reset and integration of the first phase scan are performed.
As described above, the multiphase signal scanning detection circuit and the multiphase signal scanning detection method have the following beneficial effects: in the multiphase signal scanning detection circuit of the present invention, each scanning period of the signal detection circuit is set to include a first phase scanning and a second phase scanning which are sequentially performed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration. Because the second phase scanning is not pre-charged, the result of the first phase scanning comprises an effective signal and non-ideal factors, and the result of the second phase scanning only comprises the non-ideal factors, after the differential processing of the differential circuit, the effective signal and the non-ideal factors after the differential circuit output, under the condition of almost not increasing a hardware circuit, the non-ideal factors are greatly reduced, thereby increasing the dynamic range and the effective signal-to-noise ratio of the effective signal.
Drawings
Fig. 1 is a timing diagram of a conventional signal detection process.
Fig. 2 and 3 are circuit diagrams of a multi-phase signal scan detection circuit according to various examples of the first embodiment of the present invention.
Fig. 4 is a circuit diagram of a signal detection unit and a charge amplifier circuit in the multi-phase signal scanning detection circuit according to the first embodiment of the present invention.
Fig. 5 is a timing diagram of a multi-phase signal scanning detection system according to a first embodiment of the present invention.
Fig. 6 and fig. 7 are flowcharts of a multi-phase signal scanning detection method according to a second embodiment of the present invention.
Description of element numbers: 10. a signal detection circuit; 101. a signal detection unit and a charge amplifier circuit; 20. a differential circuit; 30. an analog-to-digital converter circuit; 40. a chopper circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The preferred embodiments in the following description are by way of example only and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the invention.
It will be appreciated by those skilled in the art that in the present disclosure, the terms "longitudinal," "transverse," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," etc. refer to an orientation or positional relationship based on that shown in the drawings, which is merely for convenience of description and to simplify the description, and do not indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore the above terms should not be construed as limiting the present invention.
Example 1
Referring to fig. 2, the present invention provides a multi-phase signal scanning detection circuit, which may include:
a signal detection circuit 10, wherein the signal detection circuit 10 is configured to perform a plurality of scanning periods, each of which includes a first phase scanning and a second phase scanning that are sequentially performed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration;
and a differential circuit 20, wherein the differential circuit 20 is connected to the output end of the signal detection circuit 10, and the differential circuit 20 is used for performing differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning.
In the multiphase signal scanning detection circuit of the present invention, each scanning period of the signal detection circuit 10 is set to include a first phase scanning and a second phase scanning that are sequentially performed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration. Because there is no pre-charge in the second phase scanning, the result of the first phase scanning contains effective signals and non-ideal factors, while the result of the second phase scanning contains only non-ideal factors, after differential processing of the differential circuit, the differential circuit outputs effective signals and non-ideal factors after differential, and the amplitude of the differential component is generally considered to be less than or equal to 10% of the original quantity.
As an example, referring to fig. 4 in conjunction with fig. 2, the signal detection circuit 10 includes a plurality of signal detection units and charge amplifier circuits 101, and the signal detection units and charge amplifier circuits 101 may include:
a charge amplifier amp0, wherein a positive input end of the charge amplifier amp0 is connected with a reference voltage VREF, and an output end of the charge amplifier amp0 is an output end of the signal detection unit and the charge amplifier circuit 101 and is used for outputting an output signal ca_out of the signal detection unit and the charge amplifier circuit 101;
The first polar plate of the grounding capacitor Cf is grounded;
a first reset switch sw_rst, one end of which is connected with the negative input end of the charge amplifier amp0, and the other end of which is connected with the output of the charge amplifier amp 0;
a sampling integration circuit (not shown) including a first end, a second end, and a third end; the first end of the sampling integration circuit is connected with the second pole plate of the grounding capacitor Cf; the second end of the sampling integration circuit is connected with one end of the first reset switch Sw_rst far away from the negative input end of the charge amplifier amp0, and the negative input end of the charge amplifier amp0 is connected with the second end of the sampling integration circuit; the third input end of the sampling integration circuit is connected with one end of the first reset switch Sw_rst far away from the negative input end of the charge amplifier amp0 and the output end of the charge amplifier amp 0;
a precharge circuit (not shown) connected in parallel with the sampling integration circuit.
As an example, the sampling integration circuit may include:
a first sampling switch Sw_smp0, wherein one end of the first sampling switch Sw_smp0 is connected with a second plate of the grounding capacitor Cf;
A first loop connection switch sw_top, wherein one end of the first loop connection switch sw_top is connected with one end of the first sampling switch sw_smp0, which is far away from the grounding capacitor Cf, and the other end of the first loop connection switch sw_smp0 is connected with the negative input end of the charge amplifier amp 0;
the first polar plate of the first integrating capacitor Cu is connected with the second polar plate of the grounding capacitor Cf;
a second sampling switch Sw_smp1, wherein one end of the second sampling switch Sw_smp1 is connected with a second plate of the first integrating capacitor Cu;
and one end of the second loop connection switch Sw_bot is connected with one end of the second sampling switch Sw_smp1, which is far away from the first integrating capacitor Cu, and the other end of the second loop connection switch Sw_bot is connected with the output end of the charge amplifier amp 0.
As an example, the precharge circuit may include:
one end of the first pre-charge switch Sw_prg0 is connected with a first polar plate of the integration capacitor Cu, and the other end of the first pre-charge switch Sw_prg0 is connected with a charging voltage VHV;
and one end of the second pre-charging switch Sw_prg1 is connected with one end of the second sampling switch Sw_smp1 far away from the first integrating capacitor Cu, and the other end of the second pre-charging switch Sw_prg1 is connected with the charging voltage VHV.
As an example, the signal detection unit and the charge amplifier circuit design a detection unit of a capacitive fingerprint sensor, wherein an upper polar plate and a lower polar plate of the capacitive fingerprint sensor form the first integrating capacitor Cu, and a capacitance of the upper polar plate of the capacitive sensor to the ground is the grounding capacitor Cf; the grounding capacitor Cf corresponds to different capacitance values along with the difference of finger fingerprint peaks and valleys; the invention collects the capacitance value of the grounding capacitance Cf corresponding to the peak and the valley of the finger fingerprint, thereby forming a fingerprint image. In the present invention, the six switches of the first sampling switch sw_smp0, the second sampling switch sw_smp1, the first loop connection switch sw_top, the second loop connection switch sw_bot, the first precharge switch sw_prg0 and the second precharge switch sw_prg1 are part of a signal detection unit for sampling and integrating the charge of the ground capacitor Cf in cooperation with the charge amplifier circuit. The first reset switch sw_rst, the first integrating capacitor Cu and the charge amplifier amp0 together form a charge amplifier circuit. Wherein the first precharge switch sw_prg0 and the second precharge switch sw_prg1 are precharge switches for precharging upper and lower plates of a sensor. The first sampling switch sw_smp0 and the second sampling switch sw_smp1 are sampling switches for sampling the charge of the upper and lower plates of the sensor. The first loop connection switch sw_top and the second loop connection switch sw_bot are loop connection switches for connecting upper and lower plates of the sensor. In addition, the charge amplifier amp0 needs a reset switch, namely the first reset switch sw_rst.
The signal detection unit and the charge amplifier circuit 101 constitute a signal detection analog front end. The signal detection unit and the charge amplifier circuit 101 operate according to the following principles in the precharge, reset and integration phases: a precharge phase, in which the first precharge switch sw_prg0, the second precharge switch sw_prg1, and the first reset switch sw_rst are closed, and other switches, such as the first sampling switch sw_smp0, the second sampling switch sw_smp1, the first loop connection switch sw_top, and the second loop connection switch sw_bot are opened, the sensor upper and lower plates are precharged to a target potential; after the priming is completed, the first priming switch Sw_prg0 and the second priming switch Sw_prg1 are disconnected. Next, in the reset phase, the first loop connection switch sw_top and the second loop connection switch sw_bot are closed, the sensor bottom plate is reset to the reference voltage VREF, and the net parasitic capacitance from the feedback loop of the operational amplifier negative terminal (i.e., the charge amplifier amp 0) to the first sampling switch sw_smp0 is reset to the reference voltage VREF. The advantage of adding the first loop connection switch sw_top and the second loop connection switch sw_bot is that the switches at the effective capacitance connection point can be the smallest size of the first sampling switch sw_smp0 and the second sampling switch sw_smp1, the parasitic capacitance is the smallest, and the common modulus of the grounding capacitance Cf is the smallest. And in the integration stage, the first reset switch Sw_rst is opened, the first sampling switch Sw_smp0 is closed, and at the moment, the pre-charged charge on the grounding resistor Cf is integrated to the output end of the charge amplifier amp 0. This is a complete first phase scan detection process. The operation of the switches in the two phases of reset and integration in the detection process of the second phase scan is referred to the detection process of the first phase scan, and will not be described again here.
As an example, the differential circuit 20 may include:
a first input (not shown) of the differential circuit 20 is connected to the output of the signal detection circuit 10;
a second input (not shown) connected to the compensation charge amplifier output signal VBL;
a first output terminal (not shown) for outputting a first output signal VON;
a second output (not shown) for outputting a second output signal VOP.
As an example, with continued reference to fig. 2, the differential circuit 20 may include:
a differential integrator amp1;
a first coupling capacitor Cg1, where a first polar plate of the first coupling capacitor Cg1 is a first input end of the differential circuit 20; the second polar plate of the first coupling capacitor Cg1 is connected with the negative input end of the differential integrator amp1;
a second coupling capacitor Cg2, where a first polar plate of the second coupling capacitor Cg2 is a second input end of the differential circuit 20, and a second polar plate of the second coupling capacitor Cg2 is connected with a positive input end of the differential integrator amp1;
A second reset switch sw_rst1, wherein one end of the second reset switch sw_rst1 is connected with the negative input end of the differential integrator amp1, and the other end of the second reset switch sw_rst1 is connected with the first output end of the differential integrator amp 1;
a first integrating switch Sw_cint1, wherein one end of the first integrating switch Sw_cint1 is connected with the negative input end of the differential integrator amp 1;
a first polar plate of the second integrating capacitor CI1 is connected with one end of the first integrating switch sw_cint1, which is far away from the first negative input end of the differential integrator amp1, and a second polar plate of the second integrating capacitor CI1 is connected with the first output end of the differential integrator amp 1; the second polar plate of the second integrating capacitor CI1, the other end of the second reset switch sw_rst1, and the first output end of the differential integrator amp1 are connected and then jointly used as the first output end of the differential circuit 20;
one end of the third reset switch Sw_rst2 is connected with the positive input end of the differential integrator amp1, and the other end of the third reset switch Sw_rst2 is connected with the second output end of the differential integrator amp 1;
A second integrating switch Sw_cint2, wherein one end of the second integrating switch Sw_cint2 is connected with the positive input end of the differential integrator amp 1;
a first polar plate of the third integrating capacitor CI2 is connected with one end of the second integrating switch sw_cint2, which is far away from the first positive input end of the differential integrator amp1, and a second polar plate of the second integrating capacitor CI2 is connected with the second output end of the differential integrator amp 1; the second plate of the third integrating capacitor CI2, the other end of the third reset switch sw_rst2, and the second output end of the differential integrator amp1 are connected and then jointly used as the second output end of the differential circuit 20.
By way of example, the signal detection circuit 10 may be formed by a plurality of signal detection units and charge amplifier circuits 101 in fig. 4 in a duplicated combination, and a sensor array of a specific combination may be formed according to different application fields, such as a common sensor array、/>Or->Etc. In the multiphase signal scanning detection circuit, the signal detection circuit 10 is a first oneThe second stage may be the differential circuit 20, the positive end of the differential integrator amp1 is connected to the output VBL of the compensation charge amplifier through the second coupling capacitor Cg2, and the negative end of the differential integrator amp1 is connected to the output of the charge amplifier amp0 in the signal detection circuit through the first coupling capacitor Cg 1. In addition, the positive and negative input ends of the differential integrator amp1 further comprise respective reset switches, integration switches and integration capacitors. For example, the reset switch, the integrating switch and the integrating capacitor of the negative input end of the differential integrator amp1 are respectively a second reset switch sw_rst1, a first integrating switch sw_cint1 and a second integrating capacitor CI1; the reset switch, the integrating switch and the integrating capacitor of the positive input end of the differential integrator amp1 are respectively a third reset switch sw_rst2, a second integrating switch sw_cint2 and a third integrating capacitor CI2. The outputs of the differential integrator amp1 are VOP and VON, respectively.
As an example, referring to fig. 2, the multi-phase signal scan detection circuit further includes an analog-to-digital converter circuit (ADC cell) 30, an input terminal of the analog-to-digital converter circuit 30 is connected to the first output terminal of the differential circuit 20 and the second output terminal of the differential circuit 20, and the analog-to-digital converter circuit 30 is configured to sample and quantize the output result of the differential circuit after all scan cycles are performed.
As an example, the output of the differential integrator amp1 is sent to the analog-to-digital converter circuit 30 for quantization. In the first phase scanning and the second phase scanning, the pre-charging stage is mainly to pre-charge voltages of upper and lower polar plates of the sensor unit, the reset stage is mainly to reset the charge amplifier amp0 in the sensor unit and reset the differential integrator amp1 at the later stage, a corresponding reset switch in the reset stage is closed, and a negative end of the charge amplifier amp0 is connected with a corresponding output end. The integration stage is that a reset switch is turned off, and the charge of the corresponding upper polar plate of the sensor is integrated to the output of a charge amplifier. The output of the charge amplifier amp0 compensates the charge of the charge amplifier VBL coupled to the input terminal of the differential integrator amp1 through the first coupling capacitor Cg1 and the second coupling capacitor Cg2, and is finally integrated to the output terminal of the differential integrator amp1 and quantized by the corresponding analog-to-digital converter circuit 30. When the sensor does not scan, the signal detection unit and the corresponding charge amplifier, and the detection front ends of the differential integrator amp1 and the like are in a disable state, namely an idle state in a time sequence diagram, at the moment, the switch does not open or close, and meanwhile, the units do not consume any power.
The timing diagram of the multiphase signal scanning detection circuit in the scanning process is shown in fig. 5; after the system starts scanning, the signal detection front-end circuit finishes one scanning according to the pre-charging, resetting, integrating, resetting and integrating actions in the time sequence diagram, and after one scanning is finished, the scanning is repeated until the set scanning times are reached, and then the scanning action is finished. After the scan is completed, the analog-to-digital converter circuit 30 begins sampling and quantization.
As an example, referring to fig. 3 in conjunction with fig. 2 and 4, the multiphase signal scanning detection circuit may further include a chopper circuit 40, the chopper circuit 40 is located between the signal detection circuit 10 and the differential circuit 20, and an input terminal of the differential circuit 20 is connected to an output terminal of the signal detection circuit 10 via the chopper circuit 30.
As an example, the chopper circuit 40 may include:
a first input terminal (not shown) of the chopper circuit 40 is connected to the output terminal of the signal detection circuit 10;
a second input (not shown) connected to the compensation charge amplifier output signal VBL;
A third input (not shown) connected to the first control signal sw_ph1;
a fourth input (not shown) connected to the second control signal sw_ph2;
a first output terminal (not shown) and a second output terminal (not shown), wherein the first output terminal and the second output terminal of the chopper circuit 40 are connected to the differential circuit 20;
the chopper circuit 40 is configured to switch a first input terminal and the second input terminal of the chopper circuit 40 when the second phase scanning is performed, compared with when reset and integration of the first phase scanning are performed, based on the first control signal sw_ph1 and the second control signal sw_ph2.
As an example, the multi-phase scan detection circuit of the present invention adds one more non-signal integration action without priming (i.e., the second phase scan) per scan, i.e., one more reset and integration actions on the basis of the conventional priming-reset-integration. This added reset and integration action does not contain an active signal, but only switches in the scan path and parasitic non-idealities. In addition, compared to the multiphase signal scanning detection circuit in fig. 2, the chopper circuit (chopper module) 40 is added between the signal detection circuit 10 and the differential circuit 20, and the chopper circuit 40 is used for switching the connection port of the front-end charge integrator and the output VBL of the compensation integrator during two reset-integration actions. Thus, for a signal only one phase is present, whereas for a signal corresponding to a non-ideal effect in the signal detection unit and in the charge amplifier circuit 101 the opposite phases are present in the two actions, i.e. the non-ideal effect is due to the two integrating actions and the presence of the switch of the chopper circuit 40, a differential effect is achieved in the differential integrator amp 1. The effective detection signal is only present in the first scanning operation including the precharge-reset-integration and not present in the second reset-integration, so that the effective detection signal is not differentiated by the chopper circuit 40, and the non-ideal effects in the signal detection unit and the switch charge amplifier 101 path are differentiated by the port switching of the chopper circuit 40 and the presence of the differential integrator amp 1. By adding a small chopper circuit 40 to the non-precharge scan action and hardware added in the time sequence, the low frequency noise and the non-ideal effect in the scan are greatly reduced under the condition of almost no hardware cost increase, thereby greatly improving the signal-to-noise ratio.
The invention aims to solve the problems of signal scanning, in particular to the phenomena of signal dynamic range reduction, signal-to-noise ratio reduction and the like caused by non-ideal factors (irrational factors of a switch and low-frequency noise) in micro signal scanning such as fingerprints. The specific implementation is shown in fig. 2, 3 and 5. The multi-phase signal scanning detection circuit adopts a scanning mode of multi-phase scanning, wherein the first phase scanning comprises actions such as pre-charging, resetting, integration and the like, and the second phase scanning does not comprise the pre-charging action, only resetting, integration and the like. Whereas conventional signal scanning involves scanning of only the first phase and then repeating the scanning operation of the first phase, conventional scanning cannot achieve cancellation and suppression of switching non-idealities and low frequency noise. Compared with the traditional scanning, the scanning mode of the multiphase signal scanning detection circuit provided by the invention comprises a phase of null scanning without effective signals. The two-phase scan is then differentially processed, and the effective signal is preserved in the resulting signal, while non-ideal factors and low frequency noise are largely cancelled. Thereby achieving excellent signal-to-noise ratio. Fig. 3 shows only a typical implementation, but the invention is not limited to this specific implementation, as long as the implementation ideas are similar to the invention and fall within the protection scope of the invention.
The specific implementation is as follows:
specifically, the multi-phase signal scanning detection circuit provided by the invention has more than one-phase no-signal blank scanning (namely, second-phase scanning) compared with the traditional signal scanning. The second phase sweep is only for accumulating and collecting low frequency noise and non-idealities in the signal detection circuit and not for detecting the signal. After the scanning is completed, a differential integrator is used in the subsequent differential circuit 20 to retain the effective signal in the two-phase scanning, and the noise and ineffective signal are mostly cancelled due to the differential operation. This multiphase scanning approach has very excellent performance in the low frequency signal detection field with little increase in hardware cost. The multiphase signal scanning detection circuit provided by the invention improves the signal-to-noise ratio of the signal detection and identification circuit on the premise of hardly increasing the hardware cost, improves the precision and the range of signal detection, and is very suitable for being applied to the detection application field of high-precision low-frequency sensors. The method is successfully applied to a fingerprint detection chip, and can be expanded to other similar signal detection fields, and is not limited to a certain signal detection or signal identification application.
Example two
Referring to fig. 6 in conjunction with fig. 2 to 5, a multi-phase signal scanning detection method is further provided in the present embodiment, and the multi-phase signal scanning detection method is performed based on the multi-phase signal scanning detection circuit described in the first embodiment; the multi-phase signal scanning detection method comprises the following steps:
s10: executing a plurality of scanning periods, wherein each scanning period comprises a first phase scanning and a second phase scanning which are sequentially executed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration;
s11: and carrying out differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning.
In the multi-phase signal scanning detection method, each scanning period comprises a first phase scanning and a second phase scanning which are sequentially executed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration. Because the second phase scanning is not pre-charged, the result of the first phase scanning comprises an effective signal and non-ideal factors, the result of the second phase scanning only comprises the non-ideal factors, after differential processing, the output is the effective signal and the non-ideal factors after differential, and the amplitude of the differential is generally considered to be less than or equal to 10% of the original amplitude.
As an example, referring to fig. 7, after performing the difference processing on the scan result of the first phase scan and the scan result of the second phase scan, the method further includes:
s13: and after all the scanning periods are executed, sampling and quantizing the output result of the differential circuit.
As an example, the multiphase signal scan detection circuit further includes a chopper circuit, and the chopper circuit 40 may include: a first input terminal (not shown) of the chopper circuit 40 is connected to the output terminal of the signal detection circuit 10; a second input (not shown) connected to the compensation charge amplifier output signal VBL; a third input (not shown) connected to the first control signal sw_ph1; a fourth input (not shown) connected to the second control signal sw_ph2; a first output terminal (not shown) and a second output terminal (not shown), wherein the first output terminal and the second output terminal of the chopper circuit 40 are connected to the differential circuit 20; when the second phase scan is performed, the first input terminal and the second input terminal of the chopper circuit are switched compared with when reset and integration of the first phase scan are performed.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art.
Claims (12)
1. A multiphase signal scan detection circuit, comprising:
A signal detection circuit configured to perform a plurality of scanning periods, each of the scanning periods including a first phase scanning and a second phase scanning performed sequentially; the first phase scanning comprises pre-charging, resetting and integration, the result of the first phase scanning comprises a valid signal and non-ideal factors, and the result of the second phase scanning only comprises the non-ideal factors; the second phase scan includes reset and integration, and no precharge action;
and the differential circuit is connected with the output end of the signal detection circuit and is used for carrying out differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning.
2. The multiphase signal scan detection circuit of claim 1, wherein the signal detection circuit comprises a plurality of signal detection cells and charge amplifier circuits, the signal detection cells and charge amplifier circuits comprising:
the positive input end of the charge amplifier is connected with a reference voltage, and the output end of the charge amplifier is the output end of the signal detection unit and the charge amplifier circuit;
the first polar plate of the grounding capacitor is grounded;
one end of the first reset switch is connected with the negative input end of the charge amplifier, and the other end of the first reset switch is connected with the output of the charge amplifier;
The sampling integration circuit comprises a first end, a second end and a third end; the first end of the sampling integration circuit is connected with the second pole plate of the grounding capacitor; the second end of the sampling integration circuit is connected with one end of the first reset switch, which is far away from the negative input end of the charge amplifier, and the negative input end of the charge amplifier is connected with the second end of the sampling integration circuit; the third input end of the sampling integration circuit is connected with one end of the first reset switch, which is far away from the negative input end of the charge amplifier, and the output end of the charge amplifier;
and the pre-charging circuit is connected with the sampling integrating circuit in parallel.
3. The multiphase signal scan detection circuit of claim 2 wherein said sampling integration circuit comprises:
one end of the first sampling switch is connected with the second pole plate of the grounding capacitor;
one end of the first loop connection switch is connected with one end of the first sampling switch, which is far away from the grounding capacitor, and the other end of the first loop connection switch is connected with the negative input end of the charge amplifier;
the first polar plate of the first integrating capacitor is connected with the second polar plate of the grounding capacitor;
One end of the second sampling switch is connected with a second pole plate of the first integrating capacitor;
and one end of the second loop connecting switch is connected with one end of the second sampling switch, which is far away from the first integrating capacitor, and the other end of the second loop connecting switch is connected with the output end of the charge amplifier.
4. The multiphase signal scan detection circuit of claim 3 wherein said precharge circuit comprises:
one end of the first pre-charging switch is connected with the first polar plate of the integrating capacitor, and the other end of the first pre-charging switch is connected with charging voltage;
and one end of the second pre-charging switch is connected with one end of the second sampling switch, which is far away from the first integrating capacitor, and the other end of the second pre-charging switch is connected with the charging voltage.
5. The multiphase signal scan detection circuit of claim 1 wherein said differential circuit comprises:
the first input end is connected with the output end of the signal detection circuit;
the second input end is connected with the output signal of the compensation charge amplifier;
the first output end is used for outputting a first output signal;
and the second output end is used for outputting a second output signal.
6. The multi-phase signal scan detection circuit according to claim 5, wherein said differential circuit comprises:
a differential integrator;
the first polar plate of the first coupling capacitor is a first input end of the differential circuit; the second polar plate of the first coupling capacitor is connected with the negative input end of the differential integrator;
the first polar plate of the second coupling capacitor is a second input end of the differential circuit, and the second polar plate of the second coupling capacitor is connected with the positive input end of the differential integrator;
one end of the second reset switch is connected with the negative input end of the differential integrator, and the other end of the second reset switch is connected with the first output end of the differential integrator;
one end of the first integral switch is connected with the negative input end of the differential integrator;
the first polar plate of the second integrating capacitor is connected with one end, far away from the first negative input end of the differential integrator, of the first integrating switch, and the second polar plate of the second integrating capacitor is connected with the first output end of the differential integrator; the second polar plate of the second integrating capacitor, the other end of the second reset switch and the first output end of the differential integrator are connected and then are used as the first output end of the differential circuit together;
One end of the third reset switch is connected with the positive input end of the differential integrator, and the other end of the third reset switch is connected with the second output end of the differential integrator;
one end of the second integral switch is connected with the positive input end of the differential integrator;
the first polar plate of the third integrating capacitor is connected with one end, far away from the first positive input end of the differential integrator, of the second integrating switch, and the second polar plate of the second integrating capacitor is connected with the second output end of the differential integrator; the second polar plate of the third integrating capacitor, the other end of the third reset switch and the second output end of the differential integrator are connected and then are used as the second output end of the differential circuit together.
7. The multi-phase signal scan detection circuit of claim 1 further comprising an analog-to-digital converter circuit having an input coupled to the first output of the differential circuit and the second output of the differential circuit for sampling and quantizing the output of the differential circuit after all scan cycles have been performed.
8. The multiphase signal scan detection circuit of any one of claims 1 to 7 further comprising a chopper circuit located between said signal detection circuit and said differential circuit, an input of said differential circuit being connected to an output of said signal detection circuit via said chopper circuit.
9. The multiphase signal scan detection circuit of claim 8 wherein the chopper circuit comprises:
the first input end of the chopper circuit is connected with the output end of the signal detection circuit;
the second input end of the chopper circuit is connected with the output signal of the compensation charge amplifier;
the third input end of the chopper circuit is connected with the first control signal;
the fourth input end of the chopper circuit is connected with the second control signal;
the first output end and the second output end of the chopper circuit are connected with the differential circuit;
the chopper circuit is configured to switch a first input terminal of the chopper circuit to the second input terminal when the second phase scanning is performed, compared to when the reset and integration of the first phase scanning are performed, based on the first control signal and the second control signal.
10. A multiphase signal scan detection method, characterized in that the multiphase signal scan detection method is performed based on the multiphase signal scan detection circuit according to any one of claims 1 to 9; the multi-phase signal scanning detection method comprises the following steps:
executing a plurality of scanning periods, wherein each scanning period comprises a first phase scanning and a second phase scanning which are sequentially executed; the first phase scan includes precharge, reset and integration; the second phase scan includes reset and integration;
and carrying out differential processing on the scanning result of the first phase scanning and the scanning result of the second phase scanning.
11. The multiphase signal scanning detection method of claim 10, wherein after differentiating the scanning result of the first phase scanning with the scanning result of the second phase scanning, further comprising:
and after all the scanning periods are executed, sampling and quantizing the output result of the differential circuit.
12. The multiphase signal scan detection method of claim 10 or 11, wherein the multiphase signal scan detection circuit further comprises a chopper circuit, the chopper circuit comprising: the first input end of the chopper circuit is connected with the output end of the signal detection circuit; the second input end of the chopper circuit is connected with the output signal of the compensation charge amplifier; the third input end of the chopper circuit is connected with the first control signal; the fourth input end of the chopper circuit is connected with the second control signal; the first output end and the second output end of the chopper circuit are connected with the differential circuit; when the second phase scan is performed, the first input terminal and the second input terminal of the chopper circuit are switched compared with when reset and integration of the first phase scan are performed.
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