CN1172337C - chip type multi-connection electronic device - Google Patents

Abstract

The multiple electronic chip parts are constituted by incorporating four electric elements, such as capacitors, etc., in an elemental body 10 formed by laminating sheets upon another and arranging the external electrodes 13a and 13b on the surface of the body 10. The widths b of the internally arranged electrodes 13b are made larger than those a of the electrodes 13a at both ends so as to increase the probability that the electrodes 13b come into contact with a conductive medium used at plating. To obtain multiple electronic chip parts which can correct the variation of the plated thicknesses of external electrodes, particularly, can prevent the plated thicknesses of internally arranged external electrodes from being thinner and, in its turn, can eliminate defective mounting of the parts on a board.

Description

chip type multi-connection electronic device

technical field

The invention relates to a chip-type multi-connection electronic device, in particular to a chip-type multi-connection electronic device in which a plurality of capacitors, inductors, resistors and other electronic components are built in a unit body made of ceramics.

Background technique

In the past, as shown in FIG. 4, internal electrodes are arranged on the unit body 1 composed of laminated sheets to form a plurality of electronic components such as capacitors, inductors, and resistors (not shown in FIG. 4, but 4 components are built in), There are various chip-type multiple electronic devices in which external electrodes 2 electrically connected to elements are formed on the surface of unit body 1 at regular intervals.

The unit body 1 is formed by stacking ceramic sheets of dielectric, magnetic, non-magnetic or insulator. The external electrode 2 is formed by electroplating Cu, Ni, Sn and other plating layers on the baked base layer after smearing or copying the conductive glue. The width a, b of each electrode 2 is the same.

However, in the conventional chip-type multi-connected electronic device shown in FIG. 4, when forming the plating layer of the external electrode 2, as shown in FIG. 3 Put into the electroplating apparatus (not shown) and mix, and electroplate through the medium 3.

However, the diameter of the medium 3 is relatively large, so the contact between the inner electrode 2 and the medium 3 is worse than that of the electrodes 2 at both ends, and the thickness of the plating layer of the inner electrode 2 is always relatively thin. Solderability deteriorates, leading to poor mounting problems. Especially in recent years, along with the miniaturization of electronic circuits, miniaturization of electronic devices has also been demanded, and the arrangement intervals of the external electrodes 2 have become smaller. Therefore, in order to prevent the short circuit of the electrode 2 and suppress the growth of the plating layer, the plating time and current density tend to be suppressed, and the overall thickness of the plating layer tends to be reduced. In such a tendency, the problem that the plating thickness of the inner electrode 2 becomes thinner becomes more prominent.

Contents of the invention

An object of the present invention is to provide a chip-type multi-circuit electronic device capable of correcting uneven plating thickness of external electrodes, particularly preventing thinning of plating thickness of external electrodes arranged inside and eliminating poor mounting on a substrate.

In order to achieve the above object, the present invention is characterized in that it comprises a unit body composed of laminated sheets, three or more electronic components contained in the unit body, and a unit connected to the electronic component and arranged on the unit body. In a chip-type multi-junction electronic device with external electrodes on the surface of the array, the width of the external electrodes located on the inner side within both ends in the arrangement direction is wider than the width of the external electrodes located at both ends.

The external electrodes are formed by forming a plating layer on the base layer. When forming this plating layer, the width of the external electrodes located on the inner side is wider than that of the external electrodes located on both ends, so the probability of contact between the external electrodes located on the inner side and the conductive medium increases, thereby almost contacting the external electrodes located on both ends. The electrodes have the same probability of contact. Therefore, it is possible to prevent uneven plating thicknesses of the external electrodes located at both ends and inside.

Description of drawings

The accompanying drawings are briefly described below.

FIG. 1 is a perspective view showing the appearance of a chip-type multi-connected capacitor according to an embodiment of the present invention.

Fig. 2 is a perspective view of a disassembled state of the capacitor sheet.

Fig. 3 is a plan view showing lands of the substrate on which the capacitor is mounted.

FIG. 4 is a perspective view showing the appearance of a conventional chip-type multiple electronic device.

FIG. 5 is an explanatory view showing the relationship between the above-mentioned electronic device and a medium used in plating.

In the figure, 10: ceramic unit body, 11: ceramic sheet, 12: internal electrode, 13a, 13b: external electrode, a, b: electrode width.

Detailed ways

Next, embodiments of chip-type multi-connected electronic devices related to the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a perspective view showing the appearance of a chip-type multi-connected capacitor according to an embodiment of the present invention. Also, Fig. 2 shows its disassembled state.

In Figures 1 and 2, internal electrodes 12 of a predetermined shape are formed on ceramic sheets 11 composed of dielectrics, and these sheets 11 are stacked with a plurality of protective sheets 11 made of the same material at the top and bottom, dried and sintered. Cut out one unit shown in Figures 1 and 2 to form a chip-type multi-connected capacitor. A quadruple capacitor array is formed by means of internal electrodes 12 overlapping one above the other.

Four pairs of external electrodes 13a, 13b are formed on the surface of the unit body 10 formed by laminating the sheets 11 corresponding to the respective capacitive elements. First, these external electrodes 13a, 13b are baked after smearing or duplicating Ag, Ag-Pd, Cu and other conductive adhesives as the base layer, and then electroplate Cu, Ni, Sn, etc. by well-known barrel plating methods to form an electroplated layer. layer.

The feature in this embodiment is that the width b of the external electrodes 13 b positioned on the inner side is set wider than the width a of the external electrodes 13 a positioned at both ends.

Usually, the diameter of the conductive medium used in the barrel plating method is larger than the interval of the external electrodes, and the contact probability to the internal external electrodes 13b is always low. The width b of the electrode 13b can be increased to almost the same contact probability as the external electrodes 13a located at both ends.

Therefore, in this embodiment, it is possible to form a film under the condition that the plating thickness of the inner electrode 13b is almost the same as the plating thickness of the outer electrodes 13a at both ends, and problems such as poor connection during mounting on the substrate can be eliminated.

In terms of size, by the way, as an example, the size of the unit body 10 is 2.0mm long, 1.0mm wide, and 0.5mm high, the width a of the external electrode 13a is 0.23mm, the width b of the external electrode 13b is 0.25mm, and the electrode interval is 0.5 mm. mm. In addition, the diameter of the conductive medium used in the barrel plating method is 0.8 mm.

On the other hand, as shown in FIG. 3 , it is possible to form lands 21a corresponding to the electrodes 13a at both ends on the substrate 20 on which the chip-type multi-connected electronic device is mounted, which is more than the connection lands 21a corresponding to the electrodes 13b on the inner side. The disk 21b is large. When using such a board|substrate 20, the solder amount of the land 21b is reduced compared with the land 21a. However, in this embodiment, the width of the external electrode 13b corresponding to the land 21b is set to be large, so that solderability to the land 21b with a small amount of solder can be ensured.

Another example

In addition, the chip-type multi-connection electronic device related to this embodiment is not limited to the above-described embodiment, and various changes can be made within the scope of the gist thereof.

In particular, as electronic components, various components such as inductors and resistors can be used in addition to the above-mentioned capacitors, and various materials such as magnetic materials, insulators, etc. can be used for ceramic sheets in addition to dielectrics depending on the type of components s material. Also, materials and methods other than those described in the above-mentioned embodiments may be used for the external electrodes, and a three-layer structure may also be used.

As can be seen from the above description, according to the present invention, the width of the external electrode located on the inner side except both ends is widened, so that the plating layer of this electrode can be prevented from becoming thinner, and the plating layer of the electrode positioned at both ends can be obtained. The same thickness can also eliminate problems such as poor mounting to the substrate. In addition, sufficient solderability can be ensured even for small-area lands.

Claims (2)

1. A chip-type multi-connected electronic device, which is provided with a unit body composed of laminated sheets, three or more electronic components embedded in the unit body, and connected to the electronic components and arranged on the unit body The external electrodes on the surface of , wherein the width of the external electrodes located on the inner side within the both ends in the arrangement direction is wider than the width of the external electrodes located at both ends. 2. The chip-type multi-connection electronic device according to claim 1, characterized in that the above-mentioned external electrode is a base layer formed by baking conductive glue formed on the surface of the above-mentioned unit body and is electroplated on the base layer The electroplating layer composition.

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