CN117169593B - Indirect measurement method, system, equipment and medium for step length of time-to-digital converter - Google Patents
Indirect measurement method, system, equipment and medium for step length of time-to-digital converter Download PDFInfo
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- 238000004590 computer program Methods 0.000 claims description 13
- 238000004364 calculation method Methods 0.000 claims description 11
- 238000005070 sampling Methods 0.000 claims description 7
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- 238000007781 pre-processing Methods 0.000 claims description 4
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Abstract
The invention discloses a time-to-digital converter step length indirect measurement method, a system, equipment and a medium, wherein the method comprises the following steps: s1, setting a target output frequency of a voltage-controlled oscillator in a phase-locked loop through a frequency control word, and opening the phase-locked loop and stopping updating after the phase-locked loop is locked to a corresponding frequency, namely the actual output frequency of the voltage-controlled oscillator; s2, timing is carried out through the time-to-digital converter, the occurrence times of the code value are recorded, and then the step length of the time-to-digital converter is calculated by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period. The invention calculates the step length of the time-to-digital converter based on the number of times of occurrence of the code value and the effective range of the time-to-digital converter and combines the frequency control word and the reference clock period, can accurately measure the step length of the time-to-digital converter without using measuring instruments such as oscilloscopes, and has less dependent conditions and no need of additional resources, power consumption, equipment and the like.
Description
Technical Field
The invention relates to the technical field of electric digital data processing, in particular to a method, a system, equipment and a medium for indirectly measuring a step length of a time-to-digital converter.
Background
In an all-digital phase-locked loop (AllDigitalPhaseLockedLoop, ADPLL) circuit, a Time-to-DigitalConverter, TDC (Time-to-Time) is typically used to measure the phase difference. Since the step size of the time-to-digital converter is difficult to measure, it is difficult to locate the chip problem when it is greatly different from the design target value. When measuring instruments such as an oscilloscope are absent, the step length of the time-to-digital converter cannot be measured basically, and the problem positioning of the chip is affected.
Disclosure of Invention
In order to solve the above problems, the present invention provides a method, a system, a device and a medium for indirectly measuring the step size of a time-to-digital converter, which can calculate the step size of the time-to-digital converter based on the number of occurrences of the code value and the effective range of the time-to-digital converter and by combining a frequency control word and a reference clock period, without depending on measuring instruments such as an oscilloscope.
The technical scheme adopted by the invention is as follows:
a method for indirectly measuring a step size of a time-to-digital converter, comprising the steps of:
s1, setting a target output frequency of a voltage-controlled oscillator in a phase-locked loop through a frequency control word, and opening the phase-locked loop and stopping updating after the phase-locked loop is locked to a corresponding frequency, namely the actual output frequency of the voltage-controlled oscillator;
and S2, timing by the time-to-digital converter, recording the occurrence times of the code value, and calculating the step length of the time-to-digital converter by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period.
Further, in step S2, the code value variation range of the time-to-digital converter is 0 to N, where N is the full scale range of the time-to-digital converter; the length of the code value from 1 to N-1 is x, and the length of the code value from 1 to the next 1 is y, i.e. one reference clock period, the corresponding delay T of the code value from 1 to N-1 increases 0 The method comprises the following steps:
T 0 =x/y*fref*fcw
where fref is the reference clock frequency and fcw is the frequency control word.
Further, in step S2, the number of occurrences of the single code value of the time-lapse digitizer is M, and the total number of occurrences of the code value of 1-N-1 is M, and the single code value is delayed by T 0 The duty ratio of (a) is M/M, and the step size of the time digitizer is:
step=m/M*T 0 =m/M*x/y*fref*fcw。
further, the method for calculating the times m comprises the following steps: the average number of occurrences of all code values of the time-to-digital converter is calculated as m using a multi-sampling method.
A time-to-digital converter step size indirect measurement system, comprising:
the preprocessing module is configured to set a target output frequency of the voltage-controlled oscillator in the phase-locked loop through the frequency control word, and after the phase-locked loop is locked to a corresponding frequency, namely the actual output frequency of the voltage-controlled oscillator, the phase-locked loop is opened and updating is stopped;
and the calculating module is configured to count the time through the time-to-digital converter and record the occurrence number of the code value, and then calculate the step length of the time-to-digital converter by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period.
Further, in the calculation module, the code value variation range of the time-to-digital converter is 0-N, wherein N is the full range of the time-to-digital converter; the length of the code value from 1 to N-1 is x, and the length of the code value from 1 to the next 1 is y, i.e. one reference clock period, the corresponding delay T of the code value from 1 to N-1 increases 0 The method comprises the following steps:
T 0 =x/y*fref*fcw
where fref is the reference clock frequency and fcw is the frequency control word.
Further, in the calculation module, the number of occurrences of the single code value of the time-counting digitizer is M, and the total number of occurrences of the code value of 1-N-1 is M, and the single code value is delayed by T 0 The duty ratio of (a) is M/M, and the step size of the time digitizer is:
step=m/M*T 0 =m/M*x/y*fref*fcw。
further, the method for calculating the times m comprises the following steps: the calculation module calculates the average number of occurrences of all code values of the time-to-digital converter as m by adopting a multi-sampling method.
A computer device comprising a memory storing a computer program and a processor implementing the steps of the above-described time-to-digital converter step indirect measurement method when the computer program is executed.
A computer readable storage medium storing a computer program which when executed by a processor performs the steps of the above-described time-to-digital converter step size indirect measurement method.
The invention has the beneficial effects that:
the invention calculates the step length of the time-to-digital converter based on the number of times of occurrence of the code value and the effective range of the time-to-digital converter and combines the frequency control word and the reference clock period, can accurately measure the step length of the time-to-digital converter without using measuring instruments such as oscilloscopes, and has less dependent conditions and no need of additional resources, power consumption, equipment and the like.
Drawings
Fig. 1 is a flow chart of a time-to-digital converter step indirect measurement method of embodiment 1.
Detailed Description
Specific embodiments of the present invention will now be described in order to provide a clearer understanding of the technical features, objects and effects of the present invention. It should be understood that the particular embodiments described herein are illustrative only and are not intended to limit the invention, i.e., the embodiments described are merely some, but not all, of the embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
Example 1
When the phase-locked loop is opened, the actual output frequency of the voltage-controlled oscillator and the target output frequency have frequency deviation, so that the phase difference is accumulated all the time, and the time-to-digital converter can traverse to measure different phase differences. Because the maximum range of the time-to-digital converter is smaller than one period of the output frequency of the voltage-controlled oscillator, when the range of the time-to-digital converter is exceeded, the code value result of the time-to-digital converter is 0 or N, so that the range represented by 0 and N is larger and cannot be accurately estimated.
Considering that the code value of the time-to-digital converter traverses from 1 to N-1, i.e. the phase difference is measured from the beginning of the time-to-digital converter to the full scale, the code value of the time-to-digital converter increases from 1 to N and back to 0 and then to 1 corresponds to the period of the output frequency of the voltage-controlled oscillator, and the time-to-digital converter increases from 1 to N-1, i.e. the delay of the time-to-digital converter increases from 1 to N-1, because the sampling time interval is fixed each time.
Based on this, the embodiment provides a method for indirectly measuring the step size of a time-to-digital converter, as shown in fig. 1, including the following steps:
s1, setting a target output frequency of a voltage-controlled oscillator in a phase-locked loop through a frequency control word, and opening the phase-locked loop and stopping updating after the phase-locked loop is locked to a corresponding frequency, namely the actual output frequency of the voltage-controlled oscillator;
and S2, timing by the time-to-digital converter, recording the occurrence times of the code value, and calculating the step length of the time-to-digital converter by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period.
Preferably, in step S2, the code value variation range of the time-to-digital converter is 0 to N, where N is the full scale range of the time-to-digital converter; the length of the code value from 1 to N-1 is x, and the length of the code value from 1 to the next 1 is y, i.e. one reference clock period, the corresponding delay T of the code value from 1 to N-1 increases 0 The method comprises the following steps:
T 0 =x/y*fref*fcw
where fref is the reference clock frequency and fcw is the frequency control word.
The single code value of the time-counting digital converter appears M times and the total number of times of the code values is 1-N-1 is M, then the single code value is delayed by T 0 The duty ratio of (a) is M/M, and the step size of the time digitizer is:
step=m/M*T 0 =m/M*x/y*fref*fcw。
preferably, the method for calculating the number m includes: the average number of occurrences of all code values of the time-to-digital converter is calculated as m by adopting a multi-sampling method, and the average value of the multi-measurement is more accurate.
Example 2
The embodiment provides a time-to-digital converter step length indirect measurement system, which comprises a preprocessing module and a calculation module, wherein the preprocessing module is configured to set a target output frequency of a voltage-controlled oscillator in a phase-locked loop through a frequency control word, and after the phase-locked loop is locked to a corresponding frequency, namely an actual output frequency of the voltage-controlled oscillator, the phase-locked loop is opened and updating is stopped. The calculating module is configured to count time by the time-to-digital converter and record the number of times of occurrence of the code value, and then calculate the step size of the time-to-digital converter by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period.
Preferably, in the calculation module, the code value variation range of the time-to-digital converter is 0 to N, where N is the full scale range of the time-to-digital converter; the length of the code value from 1 to N-1 is x, and the length of the code value from 1 to the next 1 is y, i.e. one reference clock period, the corresponding delay T of the code value from 1 to N-1 increases 0 The method comprises the following steps:
T 0 =x/y*fref*fcw
where fref is the reference clock frequency and fcw is the frequency control word.
The single code value of the time-counting digital converter appears M times and the total number of times of the code values is 1-N-1 is M, then the single code value is delayed by T 0 The duty ratio of (a) is M/M, and the step size of the time digitizer is:
step=m/M*T 0 =m/M*x/y*fref*fcw。
preferably, the method for calculating the number m includes: the calculation module calculates the average number of occurrences of all code values of the time-to-digital converter by adopting a multi-sampling method as m, and the average value of the multi-measurement is more accurate.
Example 3
This example is based on example 1:
the present embodiment provides a computer device comprising a memory storing a computer program and a processor implementing the steps of the time-to-digital converter step indirect measurement method of embodiment 1 when the computer program is executed. Wherein the computer program may be in source code form, object code form, executable file or some intermediate form, etc.
Example 4
This example is based on example 1:
the present embodiment provides a computer-readable storage medium storing a computer program which, when executed by a processor, implements the steps of the time-to-digital converter step indirect measurement method of embodiment 1. Wherein the computer program may be in source code form, object code form, executable file or some intermediate form, etc. The storage medium includes: any entity or device capable of carrying computer program code, recording medium, computer memory, read-only memory, random access memory, electrical carrier signals, telecommunications signals, software distribution media, and the like. It should be noted that the content of the storage medium may be appropriately increased or decreased according to the requirements of jurisdictions in which the legislation and the patent practice, such as in some jurisdictions, the storage medium does not include electrical carrier signals and telecommunication signals according to the legislation and the patent practice.
It should be noted that, for the sake of simplicity of description, the foregoing method embodiments are expressed as a series of combinations of actions, but it should be understood by those skilled in the art that the present application is not limited by the order of actions described, as some steps may be performed in other order or simultaneously according to the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required in the present application.
Claims (6)
1. A method for indirectly measuring a step size of a time-to-digital converter, comprising the steps of:
s1, setting a target output frequency of a voltage-controlled oscillator in a phase-locked loop through a frequency control word, and opening the phase-locked loop and stopping updating after the phase-locked loop is locked to a corresponding frequency, namely the actual output frequency of the voltage-controlled oscillator;
s2, timing is carried out through the time-to-digital converter, the occurrence times of code values are recorded, and then the step length of the time-to-digital converter is calculated by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period;
in step S2, the code value variation range of the time-to-digital converter is 0-N, wherein N is the full scale range of the time-to-digital converter; the length of the code value from 1 to N-1 is x, and the length of the code value from 1 to the next 1 is y, i.e. one reference clock period, the corresponding delay T of the code value from 1 to N-1 increases 0 The method comprises the following steps:
T 0 =x/y*fref*fcw
wherein fref is the reference clock frequency, fcw is the frequency control word;
in step S2, the single code value of the time-counting digitizer occurs M times and the total number of times of the code values is 1-N-1 is M, and the single code value is delayed by T 0 The duty ratio of (a) is M/M, and the step size of the time digitizer is:
step=m/M*T 0 =m/M*x/y*fref*fcw。
2. the indirect measurement method of the step size of the time-to-digital converter according to claim 1, wherein the calculation method of the number m comprises: the average number of occurrences of all code values of the time-to-digital converter is calculated as m using a multi-sampling method.
3. A time-to-digital converter step-size indirect measurement system, comprising:
the preprocessing module is configured to set a target output frequency of the voltage-controlled oscillator in the phase-locked loop through the frequency control word, and after the phase-locked loop is locked to a corresponding frequency, namely the actual output frequency of the voltage-controlled oscillator, the phase-locked loop is opened and updating is stopped;
the calculating module is configured to count time and record the occurrence number of the code value through the time-to-digital converter, and then calculate the step length of the time-to-digital converter by combining the effective range of the time-to-digital converter, the frequency control word and the reference clock period;
in the calculation module, the code value change range of the time-to-digital converter is 0-N, wherein N is the full range of the time-to-digital converter; the length of the code value from 1 to N-1 is x, and the length of the code value from 1 to the next 1 is y, i.e. one reference clock period, the corresponding delay T of the code value from 1 to N-1 increases 0 The method comprises the following steps:
T 0 =x/y*fref*fcw
wherein fref is the reference clock frequency, fcw is the frequency control word;
in the calculation module, the number of occurrences of a single code value of the time-counting digitizer is M, and the total number of occurrences of the code value is 1-N-1 is M, and the single code value is delayed by T 0 The duty ratio of (a) is M/M, and the step size of the time digitizer is:
step=m/M*T 0 =m/M*x/y*fref*fcw。
4. a time to digital converter step indirect measurement system according to claim 3, characterized in that the calculation method of the number m comprises: the calculation module calculates the average number of occurrences of all code values of the time-to-digital converter as m by adopting a multi-sampling method.
5. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the time-to-digital converter step indirect measurement method of any of claims 1-2 when the computer program is executed.
6. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the time-to-digital converter step indirect measurement method of any of claims 1-2.
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