CN117147441A - Gas detector and preparation method thereof - Google Patents

Abstract

The invention discloses a gas detector and a preparation method thereof, which includes: a semiconductor substrate, a pixel unit located on the surface of the semiconductor substrate; a gas chamber cavity located in the semiconductor substrate, which corresponds to each pixel in the pixel unit The projection position of the unit in the semiconductor substrate; the embedded laser located in the semiconductor substrate, the semiconductor substrate on its side has a waveguide light path leading to the air chamber cavity for light transmission. The present invention uses semiconductor The process integrates the light source, optical path, gas chamber, and detector into the same semiconductor structure, providing process compatibility and device accuracy.

Description

Gas detector and preparation method

Technical field

The invention relates to the field of photoelectric technology, and in particular to a gas detector and a preparation method thereof.

Background technique

Gas sensors are one of the most effective ways to obtain gas information in real time and in situ, playing an irreplaceable and important role in environmental protection, security alarms, process industries and other fields. The methane gas sensor based on tunable semiconductor laser absorption spectroscopy (TDLAS) is based on the near-infrared spectrum selective absorption characteristics of different gas molecules, and uses the relationship between gas concentration and absorption intensity (Lambert-Beer's law) to identify gas components and determine their concentration. gas sensing device. The current tunable semiconductor laser absorption spectroscopy (TDLAS) methane sensor infrared gas sensor is usually composed of discrete components such as light source, optical path, gas chamber, detector; at the same time, according to the measurement principle, the sensor’s sensitivity, detection limit, range and other indicators All depend on the size of the air chamber. Therefore, low integration and poor measurement accuracy have become the main problems restricting the application of infrared gas sensors.

Contents of the invention

In order to solve the above device performance problems, the present invention proposes a gas detector and a preparation method thereof, providing a first semiconductor substrate, the first semiconductor substrate including a semiconductor substrate and a pixel unit;

Provide a first carrier, bond the first semiconductor substrate to the first carrier, and thin the semiconductor substrate;

Form shallow trenches and through holes connected to the shallow trenches on the surface of the semiconductor substrate;

Bonding a second carrier to the surface of the semiconductor substrate;

forming an opening in the second slide exposing the shallow trench;

remove the first slide;

A deep trench is formed in the semiconductor substrate of the first semiconductor substrate and the second carrier, and the deep trench is connected to the shallow trench;

A laser is embedded within the deep trench.

The invention also provides a gas detector, including:

semiconductor substrate,

a pixel unit located on the surface of the semiconductor substrate;

The air chamber cavity located in the semiconductor substrate corresponds to the projected position of the pixel unit in the semiconductor substrate;

The embedded laser located in the semiconductor substrate has a waveguide light path leading to the air chamber cavity in the semiconductor substrate on its side for light transmission.

This solution uses semiconductor technology to integrate the light source, optical path, gas chamber, and detector into the same semiconductor structure, providing process compatibility and device accuracy.

Description of the drawings

Figure 1 is a schematic structural diagram of the gas detector of the present invention;

2 to 7 are schematic diagrams of an embodiment of a method for preparing a gas detector according to the present invention.

Detailed ways

The present invention will now be described with reference to the accompanying drawings, wherein like reference numerals are used to refer to like elements throughout and the structures shown are not necessarily to scale. It is to be understood that the detailed description and corresponding drawings do not limit the scope of the invention in any way, but rather provide examples to illustrate some of the ways in which the inventive concept may be manifested.

The invention provides many different embodiments or examples for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present invention. Of course, these are merely examples and are not intended to limit the invention. For example, in the following description, forming the first component above the second component or on the second component may include an embodiment in which the first component and the second component are formed in direct contact, and may also include an embodiment where the first component and the second component are in direct contact. Additional components may be formed between the two components, thereby enabling embodiments in which the first component and the second component are not in direct contact. Furthermore, the present invention may repeat reference numbers and/or characters in various instances. This repetition is for simplicity and clarity and does not by itself indicate a relationship between the various embodiments and/or configurations discussed.

Furthermore, for ease of description, spatially relative terms such as “below,” “under,” “lower,” “on,” “upper,” and the like may be used herein to describe an element or component as shown in the figures. Relationship to another (or other) elements or components. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

An embodiment of the present invention provides a gas detector, with reference to Figure 1, including:

semiconductor substrate 100,

The pixel unit 110 located on the surface of the semiconductor substrate 100;

The air chamber cavity 120 located in the semiconductor substrate 100 corresponds to the projected position of the pixel unit 110 in the semiconductor substrate 100;

The embedded laser 140 located in the semiconductor substrate 100 has a waveguide light path 141 leading to the air chamber cavity 120 in the semiconductor substrate 100 on its side for light transmission.

It also includes a reflective component 130 located on the surface of the semiconductor substrate 100, which has a reflective layer 131 facing the pixel unit, and the bottom semiconductor substrate 100 has a waveguide light path 132 leading to the air chamber cavity for light transmission.

Correspondingly, the present invention also provides a preparation method for the above-mentioned gas detector. The preparation method of the present application includes:

A first semiconductor substrate 300 is provided, including a semiconductor substrate 310 and a pixel unit 320.

Specifically, referring to Figure 2, in this embodiment, the substrate includes a semiconductor substrate 310 and a pixel unit 320. The material of the semiconductor substrate may be semiconductor materials such as Si, Ge, SiGe, SiC, SiGeC, etc. The pixel units 320 are distributed in an array on the substrate. Each pixel unit may include a readout circuit (ROIC) array 330 and a signal processing circuit array (not shown), as well as a photoelectric conversion conductively interconnected with the readout circuit and the signal processing circuit. Layer 340, the readout circuit array is responsible for providing a stable and reliable voltage bias for the subsequently formed pixel unit, converting the input current integral into a voltage signal, and amplifying and buffering it into an appropriate output voltage for use by subsequent modules, the photoelectric conversion layer The optical signal is converted into an electrical signal, and the signal processing circuit processes the electrical signal for imaging.

Next, a first carrier is provided, the first semiconductor substrate is bonded to the first carrier, and the semiconductor substrate is thinned.

Specifically, referring to Figure 3, in this embodiment, the first carrier 400 is a silicon wafer die, and a bonding dielectric material 410 is formed on the surface of the pixel unit of the first semiconductor substrate 300. For example, the bonding dielectric material can be dioxide. Silicon, silicon nitride or photoresist materials can also form bonding dielectric materials on the surface of the first carrier 400 . The bonding dielectric material 410 covers the pixel unit 320 on the surface of the first semiconductor substrate 300 and the surface of the semiconductor substrate, and is processed by chemical mechanical polishing or other methods to make the surface flat, and then the first slide 400 and The bonding dielectric material 410 on the surface of the first semiconductor substrate is bonded and heated, for example, heated to a molten state of the bonding dielectric material or otherwise chemically treated, so that the first carrier chip 400 and the first semiconductor substrate 300 are bonded to each other. Together, the specific bonding dielectric material and bonding method used in this embodiment are any one of germanium, aluminum, gold, tin, copper or their alloys. For example, the formation method can be physical vapor deposition. deposition, chemical vapor deposition, electroplating, 3D printing, etc. In this embodiment, the etching pattern layer is first formed through deposition, photolithography, and etching, and then the physical vapor deposition method is used. The material is tin, and the machine vacuum is used. Under the conditions of 10-7-10-2Pa, the DC power is 50-800W, the RF power is 200-800W, and the argon gas flow is 50-350sccm. Then the etching pattern layer is removed, and the thickness of the bonding material layer is 50-300um. Then perform heat treatment, bonding temperature 250-800 degrees, pressure 0.3mpa-200mpa, time 3-80min, protective gas nitrogen or hydrogen or nitrogen-hydrogen mixture to bond. In other embodiments, methods well known to those skilled in the art can be used, which will not be described again.

Then, relying on the first carrier 400, the other surface of the semiconductor substrate 310 of the first semiconductor substrate 300 is thinned, for example, by chemical mechanical polishing. For example, the method of mechanical grinding after bonding the carrier chip can be used. The grinding pressure is 1-5bar, the grinding wheel particle selection is 20um-70um, and the thickness after thinning is 50-250um.

Next, a shallow trench 510 and a through hole 520 connected to the shallow trench are formed on the surface of the semiconductor substrate 310 .

Specifically, referring to FIG. 4 , in the implementation, the bonding structure formed in the above steps is first turned over, with the thinned side of the semiconductor substrate 310 facing up, and then an etching pattern is formed on the surface of the thinned semiconductor substrate 310 For example, a photoresist layer is first formed. After exposure and cleaning, a row of hardened first etching pattern layer is formed on the surface of the semiconductor substrate. The first etching pattern layer forms openings at corresponding positions of the pixel unit. , the opening exposes the surface of the semiconductor substrate. Next, etching, such as plasma etching or other etching methods, is used to form a shallow trench 510 on the surface of the semiconductor substrate 310. The depth of the shallow trench 510 may be 1/5, 1/4, or 1 of the depth of the semiconductor substrate. /3, 1/2, for example, the thickness of the semiconductor substrate is 200um-1000um, the depth of the shallow trench can be 50um-250um, and the shape of the shallow trench 510 is a rectangle, and the rectangle corresponds to the projection of the vertical semiconductor substrate surface located at The peripheral area of the pixel unit, in other words, the projection range of the shallow trench surrounds the projection range of the pixel unit to ensure that the pixel unit is located above the air chamber.

Next, a second etching pattern layer is formed on the surface of the semiconductor substrate 310. The formation method will not be described in detail. The second etching pattern layer forms an opening at the edge of the shallow trench, and uses plasma etching to form an opening in the opening area. A via hole 520 is formed through the semiconductor substrate to expose the bonding dielectric layer.

Next, the second carrier chip 600 is bonded to the surface of the semiconductor substrate 310 .

Specifically, referring to Figure 5, in this embodiment, the second carrier 600 is a silicon wafer bare chip, and a bonding dielectric material is formed on the surface of the second carrier. For example, the bonding dielectric material can be silicon dioxide or silicon nitride. or photoresist material, and is processed by chemical mechanical polishing (CMP) or other methods, such as dry etching, liquid etching, ion implantation/etching, etc. to make the surface flat, and then the second slide 600 is The bonding dielectric material is adhered to one side of the shallow trench 510 of the structure formed in the above steps, and is heated or otherwise chemically treated to bond the second carrier 600 and the first semiconductor substrate 300 together. The specific bonding process is The bonding dielectric material and bonding method used in this embodiment are any one of germanium, aluminum, gold, tin, copper or their alloys. For example, the formation method can be physical vapor deposition, chemical vapor deposition deposition, electroplating, 3D printing, etc. In this embodiment, the etching pattern layer is first formed through deposition, photolithography, and etching, and then the physical vapor deposition method is used. The material is tin, and the machine vacuum is selected at 10-7-10 Under -2Pa conditions, the DC power is 50-800W, the RF power is 200-800W, and the argon gas flow is 50-350sccm. Then the etching pattern layer is removed, and the thickness of the bonding material layer is 50-300um. Then perform heat treatment, bonding temperature 250-800 degrees, pressure 0.3mpa-200mpa, time 3-80min, protective gas nitrogen or hydrogen or nitrogen-hydrogen mixture to bond. In other embodiments, methods well known to those skilled in the art can be used, which will not be described again.

In an optional embodiment of the present invention, the second carrier 600 includes a second semiconductor substrate 605, and a reflective structure 620 located on the surface of the second semiconductor substrate 605. The reflective structure 620 has a specific structure similar to the surface of the semiconductor substrate 605. The reflective layer 630 has an angle, and the height of the reflective structure 620 is smaller than the depth of the shallow trench. In the step of bonding the second carrier to the surface of the semiconductor substrate, the reflective structure is located at the interface of the shallow trench and the through hole. The reflective layer of the reflective structure is at an angle of 45° to the surface of the semiconductor substrate, thereby ensuring that light is fully reflected at the corners without loss during transmission along the optical transmission path formed by through holes and shallow trenches.

The reflective structure can be formed by 3D printing or chemical vapor deposition, and the material is metal, such as any one of copper, gold, aluminum or an alloy. In this embodiment, after the dielectric layer is etched to form the dielectric layer, one side wall is first etched during the etching process, and then shielded, and then the other side wall is etched, and the etching angle is gradually adjusted during the etching process. The gas flow rate and concentration gradually reduce the etching intensity, thereby forming a triangle that gradually increases from top to bottom, and then the metal reflective layer is vapor deposited.

Next, an opening 610 exposing the shallow trench is formed in the second slide 600 .

Specifically, referring to Figure 6, a third etching pattern layer is formed on the surface of the second carrier 600. The formation method will not be described again. The third etching pattern layer has an opening, and the opening opens to the semiconductor substrate. The projection area is smaller than the shallow trench area. In other words, the opening is formed under the pixel unit corresponding to the shallow trench. Plasma etching is used to form a deep trench 610 penetrating the second carrier, and the deep trench 610 is connected to the shallow trench.

The third etching pattern layer is removed by cleaning, that is, a cavity connected from the deep trench 610 of the second carrier 600 to the semiconductor shallow trench 510 is formed.

Next, the first slide 400 is removed.

Specifically, the method of heating and softening or chemical cleaning can be used to remove, and the bonding medium material can be removed. In this embodiment, Lift off (stripping method) is used to remove. The specific process parameters: select TMAH (tetramethylmethane) as the glue removal liquid. ammonium hydroxide), the ultrasonic power is 200-600 watts, and the glue removal time is 5-80 minutes. Then the first semiconductor substrate is turned over so that one side of the pixel unit faces upward.

Next, an embedded deep trench 640 is formed in the semiconductor substrate 310 of the first semiconductor substrate 300 and the second carrier 600 , and the embedded deep trench 640 is connected to the shallow trench 510 .

Specifically, referring to FIG. 7 , a fourth etching pattern layer is formed on the side of the pixel unit 320 of the first substrate 300 , that is, the fourth etching pattern layer covers the pixel unit 320 and the semiconductor substrate 310 around the pixel unit, and There is an opening exposing the semiconductor substrate 310 .

Then, plasma etching is used to form a laser trench in the semiconductor substrate 310 and the second carrier 600. The laser trench penetrates the semiconductor substrate 310, and then the fourth etching pattern layer is cleaned and removed.

Next, a laser is embedded in the laser trench.

Specifically, referring to FIG. 7 , the embedded laser 650 is placed in the laser trench 640 . This embodiment also includes continuing to form a reflective component 130 on the surface of the semiconductor substrate 100 on the side of the pixel unit on the surface of the semiconductor substrate 310, which has a reflective layer 131 facing the pixel unit. In this embodiment, etching is specifically used. After the dielectric layer is formed, one side wall is first etched during the etching process, and then blocked, and then the other side wall is etched. During the etching process, the flow rate and concentration of the etching gas are gradually adjusted to gradually reduce the etching efficiency. Strength, thereby forming a triangle that gradually increases from top to bottom, and then a metal reflective layer is vapor deposited. The semiconductor substrate 100 at the bottom of the reflective component has a waveguide light path 132 leading to the air chamber cavity for light transmission.

This solution uses semiconductor technology to integrate the light source, optical path, gas chamber, and detector into the same semiconductor structure, providing process compatibility and device accuracy.

The above are only preferred embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the description and drawings of the present invention, or directly or indirectly applied to other related Technical fields are all equally included in the scope of patent protection for inventions.

Claims (10)

1. A method for preparing a gas detector, characterized in that it includes: providing a first semiconductor substrate, the first semiconductor substrate including a semiconductor substrate and a pixel unit; Provide a first carrier, bond the first semiconductor substrate to the first carrier, and thin the semiconductor substrate; Form shallow trenches and through holes connected to the shallow trenches on the surface of the semiconductor substrate; Bonding a second carrier to the surface of the semiconductor substrate; forming an opening in the second slide exposing the shallow trench; remove the first slide; A deep trench is formed in the semiconductor substrate of the first semiconductor substrate and the second carrier, and the deep trench is connected to the shallow trench; A laser is embedded within the deep trench. 2. The method for preparing a gas detector according to claim 1, further comprising the step of: forming a reflective component located on the surface of the semiconductor substrate on the side of the pixel unit on the surface of the semiconductor substrate, which has a reflective component facing the pixel unit. The reflective layer has a waveguide light path leading to the air chamber cavity in the bottom semiconductor substrate for light transmission. 3. The method of preparing a gas detector according to claim 1, characterized in that the second carrier includes a second semiconductor substrate and a reflective structure located on the surface of the second semiconductor substrate, the reflective structure having a semiconductor The surface of the substrate is a reflective layer at a specific angle, and the height of the reflective structure is smaller than the depth of the shallow trench. 4. The method for preparing a gas detector according to claim 3, wherein in the step of bonding the second chip on the surface of the semiconductor substrate, the reflective structure is located between the shallow trench and the via junction. 5. The method for preparing a gas detector according to claim 4, wherein the reflective layer of the reflective structure and the surface of the semiconductor substrate form an angle of 45°. 6. A gas detector, characterized in that it includes: semiconductor substrate, a pixel unit located on the surface of the semiconductor substrate; The air chamber cavity located in the semiconductor substrate corresponds to the projected position of the pixel unit in the semiconductor substrate; The embedded laser located in the semiconductor substrate has a waveguide light path leading to the air chamber cavity in the semiconductor substrate on its side for light transmission. 7. The gas detector according to claim 6, further comprising a reflective component located on the surface of the semiconductor substrate, which has a reflective layer facing the pixel unit, and has a cavity in the bottom semiconductor substrate leading to the gas chamber. The waveguide optical path is used for the transmission of light. 8. The gas detector according to claim 7, characterized in that the second carrier includes a second semiconductor substrate and a reflective structure located on the surface of the second semiconductor substrate, the reflective structure has an A reflective layer at a specific angle, the height of the reflective structure is smaller than the depth of the shallow trench. 9. The gas detector according to claim 8, wherein the reflective structure is located at the interface of the shallow groove and the through hole. 10. The gas detector according to claim 9, wherein the reflective layer of the reflective structure and the surface of the semiconductor substrate form an angle of 45°.