CN117076225A

CN117076225A - Backboard and daughter card

Info

Publication number: CN117076225A
Application number: CN202311099292.4A
Authority: CN
Inventors: 周鸿飞; 管金库
Original assignee: Xinhuazhang Intelligent Technology Shanghai Co ltd
Current assignee: Xinhuazhang Intelligent Technology Shanghai Co ltd
Priority date: 2023-08-29
Filing date: 2023-08-29
Publication date: 2023-11-17
Anticipated expiration: 2043-08-29
Also published as: CN117076225B

Abstract

The application provides a backboard and a daughter card. A first interface is arranged on the first side of the backboard, the first interface comprises a first port, a first connecting area is arranged at a first position, associated with the first port, of the first side, the backboard is further provided with a common ground connecting area, and the common ground connecting area is electrically connected with the first connecting area; the first interface is used for connecting a daughter card, a first connector is arranged at a position corresponding to the first connecting area of the daughter card, and the daughter card further comprises a first detection point electrically connected with the first connector; when the first interface is effectively connected with the daughter card, the first connection area is electrically connected with the first connector.

Description

Backboard and daughter card

Technical Field

The application relates to the technical field of chip verification, in particular to a backboard and a daughter card.

Background

A hardware simulation tool (e.g., a prototype verification board or hardware simulator) may prototype (prototype) and debug a logic system design that includes one or more modules. The logic System design may be, for example, a design for an integrated circuit (Application Specific Integrated Circuit, ASIC for short) or a System-On-Chip (SOC) for special applications. Thus, the logic system design under test in the simulation tool may also be referred to as a design under test (Design Under Test, DUT for short). The simulation tool may simulate the design under test by one or more configurable components, such as a field programmable gate array (Field Programmable Gate Array, FPGA for short), including performing various operations on the design under test to test and verify the functionality of the various modules of the design under test prior to fabrication. The design to be tested and various peripherals can be tested to be used as a complete system to run by externally connecting various peripheral daughter cards on the simulation tool.

Thus, the peripheral daughter card needs to be connected to the backplane of the hardware emulation tool using a high-speed connector. Because the back plane of hardware simulation tools is typically very space-efficient, high-speed connectors of most products are currently interconnected under invisible conditions. The problem of plugging in place is to rely on whether the spanner is pushed to the bottom to detect whether the connection is in place, however, once the processing error of the spanner is large or the abrasion of the spanner is large, whether the high-speed connector is in place or not can not be judged according to the spanner.

Thus, there is a need for a technique that accurately determines whether a high-speed connector of a backplane of a hardware simulation tool is plugged into place under invisible conditions.

Disclosure of Invention

A first aspect of the present application provides a back plate, where a first side of the back plate is provided with a first interface, the first interface includes a first port, a first connection area is provided at a first position where the first side is associated with the first port, the back plate is further provided with a common ground connection area, and the common ground connection area is electrically connected with the first connection area; the first interface is used for connecting a daughter card, a first connector is arranged at a position corresponding to the first connecting area of the daughter card, and the daughter card further comprises a first detection point electrically connected with the first connector; when the first interface is effectively connected with the daughter card, the first connection area is electrically connected with the first connector.

A second aspect of the application provides a sub-card. The daughter card is used for being connected to the backboard, and comprises a first connection end which is configured to be connected with a first port of a first interface of the backboard, and the first interface is arranged on a first side of the backboard; the backboard is provided with a first connecting area at a first position, which is related to the first port, of the first side, and is also provided with a common ground connecting area, and the common ground connecting area is electrically connected with the first connecting area; the first connecting head is arranged at a position corresponding to the first connecting area, the daughter card further comprises a first detecting point electrically connected with the first connecting head, and when the first connecting end of the daughter card is effectively connected with the first port of the backboard, the first connecting head is electrically connected with the first connecting area.

According to the back plate and the sub-card, the first connection area and the common ground connection area are arranged at the first position, which is related to the first port, of the back plate, the sub-card is provided with the first connection head which is arranged at the position corresponding to the first connection area, and the sub-card further comprises a first detection point which is electrically connected with the first connection head. After the back plate and the daughter card are connected, whether the back plate and the daughter card are inserted into place or not can be detected by using whether the first connecting area and the first connecting head are electrically connected. It is possible to accurately determine whether the high-speed connector of the back plate is inserted in place under invisible conditions.

Drawings

In order to more clearly illustrate the technical solutions of the present application or related art, the drawings that are required to be used in the description of the embodiments or related art will be briefly described below, and it is apparent that the drawings in the following description are only embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort to those of ordinary skill in the art.

FIG. 1 illustrates a schematic diagram of an exemplary host in accordance with an embodiment of the present application;

FIG. 2 shows a schematic diagram of a simulation system in accordance with an embodiment of the present application;

FIG. 3A shows a schematic structural view of a back plate according to an embodiment of the present application;

FIG. 3B shows a schematic side view of the structure of a back plate and daughter card in accordance with an embodiment of the present application;

fig. 4A shows a schematic structural view of a first connector provided according to an embodiment of the present application;

fig. 4B is a schematic structural diagram of a pin between a first connection end and a first port according to an embodiment of the present application.

Detailed Description

The present application will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present application more apparent.

It is to be noted that unless otherwise defined, technical or scientific terms used herein should be taken in a general sense as understood by one of ordinary skill in the art to which the present application belongs. The terms "first," "second," and the like, as used herein, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" and the like means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof without precluding other elements or items. The term "coupled" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

Fig. 1 shows a schematic structure of a host 100 according to an embodiment of the present application. The host 100 may be an electronic device running an emulation system. As shown in fig. 1, the host 100 may include: processor 102, memory 104, network interface 106, peripheral interface 108, and bus 110. Wherein the processor 102, the memory 104, the network interface 106, and the peripheral interface 108 are communicatively coupled to each other within the electronic device via a bus 110.

The processor 102 may be a central processing unit (Central Processing Unit, CPU), an image processor, a neural Network Processor (NPU), a Microcontroller (MCU), a programmable logic device, a Digital Signal Processor (DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits. The processor 102 may be used to perform functions related to the techniques described herein. In some embodiments, processor 102 may also include multiple processors integrated as a single logical component. As shown in fig. 1, the processor 102 may include a plurality of processors 102a, 102b, and 102c.

The memory 104 may be configured to store data (e.g., instruction sets, computer code, intermediate data, etc.). In some embodiments, the simulation test system used to simulate the test design may be a computer program stored in memory 104. As shown in fig. 1, the data stored by the memory may include program instructions (e.g., program instructions for implementing the error localization method of the present application) as well as data to be processed (e.g., the memory may store temporary code generated during compilation). The processor 102 may also access program instructions and data stored in the memory and execute the program instructions to perform operations on the data to be processed. The memory 104 may include volatile storage or nonvolatile storage. In some embodiments, memory 104 may include Random Access Memory (RAM), read Only Memory (ROM), optical disks, magnetic disks, hard disks, solid State Disks (SSD), flash memory, memory sticks, and the like.

The network interface 106 may be configured to provide communication with other external devices to the host 100 via a network. The network may be any wired or wireless network capable of transmitting and receiving data. For example, the network may be a wired network, a local wireless network (e.g., bluetooth, wiFi, near Field Communication (NFC), etc.), a cellular network, the internet, or a combination of the foregoing. It will be appreciated that the type of network is not limited to the specific examples described above. In some embodiments, network interface 106 may include any combination of any number of Network Interface Controllers (NICs), radio frequency modules, receivers, modems, routers, gateways, adapters, cellular network chips, etc.

The peripheral interface 108 may be configured to connect the host 100 with one or more peripheral devices to enable information input and output. For example, the peripheral devices may include input devices such as keyboards, mice, touchpads, touch screens, microphones, various types of sensors, and output devices such as displays, speakers, vibrators, and indicators.

Bus 110 may be configured to transfer information between the various components of host 100 (e.g., processor 102, memory 104, network interface 106, and peripheral interface 108), such as an internal bus (e.g., processor-memory bus), an external bus (USB port, PCI-E bus), etc.

It should be noted that, although the above electronic device architecture only shows the processor 102, the memory 104, the network interface 106, the peripheral interface 108, and the bus 110, in a specific implementation, the electronic device architecture may also include other components necessary to achieve proper operation. Furthermore, it will be understood by those skilled in the art that the electronic device architecture may include only the components necessary for implementing the embodiments of the present application, and not all the components shown in the drawings.

FIG. 2 shows a schematic diagram of a simulation system 200 according to an embodiment of the application.

As shown in FIG. 2, the simulation system 200 may include a simulation tool 220 and a host 100 coupled to the simulation tool 220.

Simulation tool 220 is a hardware system for simulating a Design Under Test (DUT). The simulation tool 220 may be a prototype verification board or a hardware simulator (simulator). One design under test may include multiple modules. The design under test may be combinational logic, sequential logic, or a combination of the two. Simulation tool 220 may include one or more configurable circuits (e.g., FPGAs) for simulating a design under test.

A backplane 222 may be included on the simulation tool 220, the backplane 222 being for connecting and supporting communication and data transfer between the simulation tool 220 and other modules (e.g., daughter cards, hosts 100, etc.). The backplate 222 may be a PCB board. The backplate 222 typically contains a plurality of interface units 2022 for communicatively coupling with other modules for communication between the other modules and the simulation tool 220. In some embodiments, interface unit 2022 may include one or more interfaces with electrical connection capabilities. For example, the interface unit 2022 may include an RS232 interface, a USB interface, a LAN interface, an optical fiber interface, IEEE1394 (firewire interface), and the like. In some embodiments, the interface unit 2022 may be a wireless network interface. For example, the interface unit 2022 may be a WIFI interface, a bluetooth interface, or the like.

The host 100 may transmit the compiled DUT, debug instructions, etc. to the simulation tool 220 via the interface unit 2022. The simulation tool 220 may also transmit simulation data or the like to the host 100 via the interface unit 2022.

The simulation tool 220 may also include a memory 2024 for storing simulation data (e.g., various signal values) generated by the design under test during the simulation process. In some embodiments, the signal values generated by the design under test during the simulation process may be directly read by the host 100. It will be appreciated that the memory 2024 may also be provided by the stand-alone simulation tool 220, for example, using an external memory.

The simulation tool 220 may also include an FPGA2026 for hardware implementation of the logic system design onto the FPGA. It is to be understood that the simulation tool 220 may include a plurality of FPGAs, which are only examples.

In addition to being connected to the host 100, the emulation tool 220 can also be connected to one or more daughter cards 240 via an interface unit 2022.

The daughter card is used to provide peripherals to the DUT to build a complete electronic system when prototype verification is performed using simulation tool 220. Prototype verification refers to a verification mode for restoring the actual use scene of a chip as far as possible before chip streaming, and verifying whether the chip functions are accurate and complete. The daughter cards 240 may include memory daughter cards (e.g., providing DDR memory interfaces), communication daughter cards (e.g., providing various network interfaces or wireless network card interfaces), and the like.

The host 100 may be used to configure the simulation tool 220 to simulate a design under test. The design under test may be a complete logic system design or one or more modules of a complete logic system design. In some embodiments, host 100 may be a virtual host in a cloud computing system. The logic System design (e.g., ASIC or System-On-Chip) may be designed by a hardware description language (e.g., verilog, VHDL, system C, or System Verilog).

The host 100 may receive a request from a user to debug a design under test. As described above, the design under test may include one or more modules. Description of the design under test may be accomplished in a hardware description language. The host 100 may synthesize based on the description of the design under test to generate, for example, a gate level netlist (not shown) of the design under test. The gate level circuit netlist of the design under test may be loaded into simulation tool 220 for operation, and a circuit structure corresponding to the design under test may be formed in simulation tool 220. Accordingly, the circuit structure of the design under test can be obtained from this description, and accordingly, the circuit structure of each block in the design under test can also be obtained similarly.

As described above, the back plate 222 needs to communicate with a plurality of external modules, and thus the need for high-speed connector plugging is unavoidable. Hardware emulation places high demands on the communication rate across boards. The high-speed connector on the backboard 222 is not plugged in place, the communication rate is not up to standard when the high-speed connector is light, and the situation of no communication at all when the high-speed connector is heavy is generated. The backplate 222 typically requires multiple interfaces to be accommodated in a limited area, thus adding additional difficulty to the user's inspection of the connection. How to facilitate the user to properly achieve the correct connection of the high-speed connector is a technical problem to be solved.

Fig. 3A shows a schematic structural diagram of a backplate 222 according to an embodiment of the present application.

In some embodiments, as shown in fig. 3A, a first side of the backplate 222 is provided with a first interface 2222. First interface 2222 may include therein a first port 2224A. In some embodiments, one interface may include more ports.

A first connection area 2226A is provided at a first location on a first side of the backplate 222 associated with the first port 2224A. The first location may generally be a location proximate to the first port 2224A.

The backplate 222 is not planar during insertion because the high speed connector has an insertion force during mating with the first interface 2222, which results in some deformation of the backplate 222. This causes the distance of the high speed connector from the backplate 222 to be different at different locations. For example, a larger deformation of a location may result in a greater distance of that location from the high-speed connector of the daughter card 240.

Thus, the first position of the first connection area 2226A may be determined according to the deformation of the backplate 222 when the first port 2224A is connected with the daughter card 240.

In some embodiments, stress-strain simulation may be performed in a simulated environment for the process of plugging the backplate 222 and the daughter card 240, using a computer to simulate and analyze the process of stress and strain generated by the backplate 222 with the daughter card 240 plugged. By establishing a model, defining boundary conditions and loading conditions, the distribution conditions of stress and strain are solved by a numerical calculation method, so that the deformation position produced by the backboard 222 in the plugging process is predicted. Further, one or more positions having larger deformation can be selected as the first position of the first connection region 2226A.

The backplate 222 is also provided with a common ground connection region 2228.

In some embodiments, the common ground connection region 2228 is disposed on a second side of the backplate 222 opposite the first side.

The common connection region 2228 is electrically connected to the first connection region 2226A. Typically, the common connection area 2228 and the first connection area 2226A may be electrically connected by PCB internal wiring in the backplate 222. The PCB internal trace connection refers to a line electrically connecting between the common ground connection area 2228 and the first connection area 2226A of the printed circuit board (Printed Circuit Board, PCB for short). These lines are typically implemented by conductive materials such as metal wires, copper foil on circuit boards, and the like. Interference and noise to other circuitry in the backplate 222 can be reduced by the PCB internal cabling. It should be noted that the number of the first connection regions 2226A is not limited in some embodiments of the present application.

In some embodiments, the first side may typically be the side to which the daughter card is connected.

Both the first connection region 2226A and the common connection region 2228 are capable of conducting electricity. For example, the first connection region 2226A and the common connection region 2228 may be composed of a metallic conductive material, such as copper, silver, aluminum, iron, zinc, or the like; the first connection region 2226A and the common connection region 2228 may also be composed of non-metallic conductive materials, such as graphite, carbon fiber, and the like.

Fig. 3B shows a schematic side view of the structure of the back plate 222 and the daughter card 240 according to an embodiment of the application.

In some embodiments, an interface may have multiple ports. As shown in fig. 3B, the first interface 2222 of the backplate 222 may include a second port 2224B in addition to the first port 2224A. Similarly, a second connection area 2226B is also provided at a second location associated with the vicinity of second port 2224B. The first connection region 2226A and the second connection region 2226B may be both electrically connected to the common connection region 2228.

In some embodiments, the daughter card 240 corresponding to the first interface 2222 may be provided with a corresponding interface. Depending on whether the first interface 2222 is a female or male end of a connector, the interface of the daughter card 240 may be a male or female end of a corresponding connector. In some embodiments, the first port 2224A and the second port 2224B may be connector male ends and the first connection end 248A and the second connection end 248B may be connector female ends.

Corresponding to the back plate 222, the daughter card 240 has a first connection end 248A corresponding to the first port 2224A and a second connection end 248B corresponding to the second port 2224B. The first port 2224A and the second port 2224B may be connected to the first connection terminal 248A and the second connection terminal 248B, respectively.

Also provided in the daughter card 240 are a first connector 244A, a second connector 244B, a first test point 246A, and a second test point 246B. The first connection terminal 244A is disposed at a position of the sub-card 240 corresponding to the first connection area 2226A. The second connection head 244B is disposed at a position of the sub-card 240 corresponding to the second connection area 2226B. The first connector 244A and the second connector 244B are electrically connected to the first detecting point 246A and the second detecting point 246B, respectively.

The first connector 244A and the second connector 244B may be electrically connected to the first detecting point 246A and the second detecting point 246B through wires, respectively. The first connector 244A and the second connector 244B are also typically made of a conductive material (e.g., a metallic conductive material or a non-metallic conductive material as described above). The first connector 244A and the second connector 244B may also be electrically connected to the first detecting point 246A and the second detecting point 246B respectively by way of internal wiring of the PCB in the daughter card 240.

In some embodiments, the number and location of the first connection points 244A and the first detection points 246A need to correspond to the first connection areas 2226A. The number of connection regions (e.g., 2226A and 2226B) on the backplate 222 is not limiting in some embodiments of the application, and may be one or more. Accordingly, the number and location of the connectors (e.g., 244A and 244B) and the detection points (e.g., 246A and 246B) of the daughter card 240 need to correspond to the connection areas on the backplane 222.

In general, the connections between connectors (e.g., the connection between 2224A and 248A, the connection between 2224B and 248B) can be divided into: full connection, active connection, low speed connection.

By fully connected is meant that the male and female ends are in full contact, leaving no or very little gap. For example, there is no gap between the first connection end 248A and the first port 2224A.

A low speed connection means that the connection rate cannot reach the design specification of the connector despite the existence of a connection between the male and female terminals. That is, at this time, there is an electrical connection between the male terminal and the female terminal, but the data transmission rate has not yet reached the design index. In the embodiment of the present application, the maximum distance for electrical connection between the male terminal and the female terminal (e.g., between the first interface 2222 and the daughter card 240) is referred to as T.

The effective connection means that the connection rate between the male end and the female end reaches the design index of the connector. In some embodiments, the connection rate between the male and female ends may be up to the design specification of the connector after the distance between the male and female ends reaches T/2.

When the daughter card 240 and the backplane 222 are operatively connected (i.e., the first connection end 248A and the second connection end 248B of the daughter card 240 are operatively connected to the first port 2224A and the second port 2224B of the backplane 222, respectively), the first connection terminal 244A is electrically connected to the first connection area 2226A and the second connection terminal 244B is electrically connected to the second connection area 2226B. An exemplary structure of the first connector 244A is described in detail below.

Fig. 4A shows a schematic structural diagram of a first connector 244A according to an embodiment of the present application.

In some embodiments, the first connector 244A may include an electrically conductive spring mechanism 304 and a probe 302 coupled to the spring mechanism 304. Thus, after the back plate 222 and the daughter card 240 are connected, the probe 302 is disposed in electrical connection with the first connection area 2226A with the first connection end 248A and the first port 2224A operatively connected. In the case where the first connection end 248A and the first port 2224A are completely connected, the elastic mechanism 304 is deformed due to the existence of the elastic mechanism 304, and the first connection area 2226A is electrically connected to the probe 302, and the first connection area 2226A is not damaged. The elastic mechanism 304 may be a damper, a spring, or the like capable of elastic deformation.

Fig. 4B is a schematic diagram illustrating the structure of the pins between the first connection end 248A and the first port 2224A according to the embodiment of the present application.

In some embodiments, as shown in fig. 4B, a plurality of first connection pins 306 may be included in the first connection end 248A, with a first gold thick region 402 disposed on each first connection pin 306. The first port 2224A may include a plurality of first port pins 308, with a second thick gold region 404 disposed on each first port pin 308. The thick gold area is an area where the surface of the pointer pin is plated with a metal layer with larger thickness. Thick gold regions are typically used in contact portions of connectors to provide better electrical connection and higher wear resistance.

Typically, when first thick gold region 402 and second thick gold region 404 are just in contact, it may be determined that first connection end 248A has been connected with first port 2224A (the connection may be a low speed connection). At this time, the distance between the first interface 2222 and the daughter card 240 is the maximum distance T for achieving the electrical connection.

When the first thick gold region 402 and the second thick gold region 404 contact the predetermined area, it can be determined that the first connection end 248A and the first port 2224A are effectively connected. The distance between the first interface 2222 and the daughter card 240 may be a distance to achieve an effective connection when the first thick gold region 402 and the second thick gold region 404 are determined to contact a predetermined area. In some embodiments, to ensure that the backplate 222 and the daughter card 240 are effectively connected, the length of the spring mechanism 304 in the uncompressed state may be set to 1/2 of the maximum distance (i.e., T/2) that the first interface 2222 can be electrically connected to the daughter card 240. When the elastic mechanism 304 is in the non-compressed state, the probe 302 contacts the first connection area 2226A, so that the first detection point 246A and the common connection area 2228 are electrically connected. At this point, it may be determined that the distance between the first interface 2222 and the daughter card 240 has reached the requirements of an effective connection. In this way, by detecting whether the first detection point 246A and the common connection area 2228 are electrically connected, it can be determined whether the first interface 2222 and the daughter card 240 are effectively connected. Note that, the second connector 244B and the first connector 244A have the same structure, and the description thereof will not be repeated here.

In some exemplary embodiments, T is set to 1.98mm.

In some embodiments, the first detecting point 246A and the common connection area 2228 are electrically connected to a detecting device for detecting whether the first detecting point 246A and the common connection area 2228 are electrically connected. The detection device can be an internal chip, an external multimeter or an indicator light and the like. The first detecting point 246A and the common connection area 2228 may be electrically connected to the detecting device, and when the first connecting end 248A and the first port 2224A are inserted in place, the first connection area 2226A is electrically connected to the first connecting end 244A, and the first detecting point 246A, the common connection area 2228 and the detecting device form a loop. The detection means may detect that a connection has been made between the first detection point 246A and the common ground connection 2228 and may then determine that the backplate 222 and the daughter card 240 are in place. And when the detection means does not detect a conduction between the first detection point 246A and the common ground connection area 2228, it may be determined that the backplate 222 and the daughter card 240 are not connected in place.

In some embodiments, typically where the backplane 222 and daughter card 240 are mounted in a server or chassis, to facilitate testing, the common ground connection area 2228 may be located on a second side of the backplane 222 opposite the first side and near the edge of the backplane 222. This can facilitate connection of the detection device when the detection device is used for detection. In addition, the first detection point 246A and the second detection point 246B may be disposed at the edge position of the daughter card 240. And the connection of the detection device is also facilitated.

In this way, a first connection area and a common ground connection area are arranged in the backboard at a first position associated with the first port, and a first connection point arranged at a position corresponding to the first connection area is also arranged in the sub-card, and the sub-card further comprises a first detection point electrically connected with the first connection point. After the back plate and the daughter card are connected, whether the back plate and the daughter card are inserted into place or not can be detected by using whether the first connecting area and the first connecting head are electrically connected. It is possible to accurately determine whether the high-speed connector of the back plate is inserted in place under invisible conditions.

Embodiments of the present application also provide a backplate (e.g., backplate 222 in FIG. 3B). A first side of the back plate is provided with a first interface (e.g., first interface 2222 in fig. 3B). The first interface includes a first port (e.g., first port 2224A in fig. 3B). A first connection region (e.g., first connection region 2226A in fig. 3B) is provided at a first location of the first side associated with the first port (e.g., first port 2224A in fig. 3B).

The backplate is also provided with a common ground connection region (e.g., common ground connection region 2228 in fig. 3B). The common ground connection region is electrically connected with the first connection region.

The first interface is for connecting a daughter card (e.g., daughter card 240 in fig. 3B).

The daughter card is provided with a first connection (e.g., first connection 244A in fig. 3B) at a location corresponding to the first connection region.

The daughter card also includes a first detection point (e.g., first detection point 246A in fig. 3B) electrically connected to the first connection point (e.g., first connection point 244A in fig. 3B). When the first interface is effectively connected with the daughter card, the first connection area is electrically connected with the first connector.

In some embodiments, the first interface further comprises a second port (e.g., second port 2224B in fig. 3B), a second connection region (e.g., second connection region 2226B in fig. 3B) is provided at a second location of the first side associated with the second port, the common ground connection region further being electrically connected to the second connection region. The daughter card is provided with a second connector (e.g., second connector 244B in fig. 3B) at a position corresponding to the second connection region, and further includes a second detection point (e.g., second detection point 246B in fig. 3B) electrically connected to the second connector.

In some embodiments, the first position is determined from deformation of the back plate when the first interface is connected with the daughter card (e.g., daughter card 240 in fig. 3B).

In some embodiments, the first connector includes an electrically conductive spring mechanism (e.g., spring mechanism 304 in fig. 4A) and a probe (e.g., probe 302 in fig. 4A) coupled to the spring mechanism. The length of the elastic mechanism in the non-compressed state is 1/2 of the maximum distance that the first interface (e.g., the first interface 2222 in fig. 3A and 3B) and the daughter card (e.g., the daughter card 240 in fig. 3B) are electrically connected.

In some embodiments, the first detection point (e.g., first detection point 246A in fig. 3B) and the common ground connection region (e.g., common ground connection region 2228 in fig. 3B) are electrically connected to a detection device for detecting whether the first detection point and the common ground connection region are electrically connected.

In some embodiments, the common ground connection region (e.g., common ground connection region 2228 in fig. 3B) is disposed on a second side of the back plate opposite the first side and is located near an edge in the back plate.

Embodiments of the present application also provide a daughter card (e.g., daughter card 240 in fig. 3B). The daughter card is for connection to a backplane (e.g., backplane 222 in fig. 3B).

The daughter card includes a first connection end (e.g., first connection end 248A in fig. 3B). The first connection end is configured to connect with a first port (e.g., first port 2224A in fig. 3B) of a first interface (e.g., first interface 2222 in fig. 3B) of the backplane (e.g., backplane 222 in fig. 3B).

The first interface is disposed on a first side of the back plate.

A first connection region (e.g., first connection region 2226A in fig. 3B) is provided in the back plate at a first location on the first side associated with the first port. A common ground connection region (e.g., common ground connection region 2228 in fig. 3B) is also provided in the backplate. The common ground connection region is electrically connected with the first connection region.

The daughter card is provided with a first connection (e.g., first connection 244A in fig. 3B) at a location corresponding to the first connection region. The daughter card also includes a first detection point (e.g., first detection point 246A in fig. 3B) electrically connected to the first connector. When the first connection end of the daughter card is effectively connected with the first port of the backboard, the first connector is electrically connected with the first connection area.

In some embodiments, the daughter card further includes a second connection (e.g., second connection 248B in fig. 3B) that connects with a second port (e.g., second port 2224B in fig. 3B) of the first interface in the backplane; the back plate is provided with a second connection region (e.g., second connection region 2226B in fig. 3B) at a second location of the first side associated with the second port; the second connection region is electrically connected with the common ground connection region; the daughter card is provided with a second connector (e.g., second connector 244B in fig. 3B) at a position corresponding to the second connection region, and further includes a second detection point (e.g., second detection point 246B in fig. 3B) electrically connected to the second connector.

In some embodiments, the first connector (e.g., first connector 244A in fig. 4A) includes an electrically conductive spring mechanism (e.g., spring mechanism 304 in fig. 4A) and a probe (e.g., probe 302 in fig. 4A) coupled to the spring mechanism, the spring mechanism having a length in an uncompressed state that is 1/2 of a maximum distance that the daughter card and the first interface (e.g., first interface 2222 in fig. 3B) achieve electrical connection.

The foregoing describes some embodiments of the present application. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

Those of ordinary skill in the art will appreciate that: the discussion of any of the embodiments above is merely exemplary and is not intended to suggest that the scope of the application (including the claims) is limited to these examples; the technical features of the above embodiments or in the different embodiments may also be combined within the idea of the application, the steps may be implemented in any order and there are many other variations of the different aspects of the application as described above, which are not provided in detail for the sake of brevity.

While the application has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of those embodiments will be apparent to those skilled in the art in light of the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

The present application is intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the present application should be included in the scope of the present application.

Claims

1. The backboard is characterized in that a first interface is arranged on a first side of the backboard, the first interface comprises a first port, a first connection area is arranged at a first position, associated with the first port, of the first side, and a common ground connection area is further arranged on the backboard and is electrically connected with the first connection area;

the first interface is used for connecting a daughter card, a first connector is arranged at a position corresponding to the first connecting area of the daughter card, and the daughter card further comprises a first detection point electrically connected with the first connector;

when the first interface is effectively connected with the daughter card, the first connection area is electrically connected with the first connector.

2. The back plate of claim 1, wherein the first interface further comprises a second port, a second connection area is disposed at a second position of the first side associated with the second port, the common ground connection area is further electrically connected to the second connection area, the daughter card is disposed with a second connector at a position corresponding to the second connection area, and the daughter card further comprises a second detection point electrically connected to the second connector.

3. The back plate of claim 1, wherein the back plate is,

the first position is determined according to deformation of the back plate when the first interface is connected with the daughter card.

4. The back plate of claim 1, wherein the first connector comprises an electrically conductive elastic mechanism and a probe connected to the elastic mechanism, and the length of the elastic mechanism in the non-compressed state is 1/2 of the maximum distance that the first connector and the daughter card are electrically connected.

5. The back plate of claim 1, wherein the first detection point and the common ground connection area are electrically connected to a detection device for detecting whether the first detection point and the common ground connection area are electrically connected.

6. The back panel of claim 1, wherein the common ground connection region is disposed on a second side of the back panel opposite the first side and is located in the back panel proximate an edge.

7. A daughter card for connection to a backplane, the daughter card comprising a first connection end configured to connect with a first port of a first interface of the backplane, the first interface disposed on a first side of the backplane;

the backboard is provided with a first connecting area at a first position, which is related to the first port, of the first side, and is also provided with a common ground connecting area, and the common ground connecting area is electrically connected with the first connecting area;

the sub-card is provided with a first connecting head at a position corresponding to the first connecting area, the sub-card also comprises a first detecting point electrically connected with the first connecting head,

when the first connection end of the daughter card is effectively connected with the first port of the backboard, the first connector is electrically connected with the first connection area.

8. The daughter card of claim 7, further comprising a second connection terminal coupled to a second port of the first interface in the backplane; the backboard is provided with a second connection area at a second position of the first side, which is associated with the second port; the second connection region is electrically connected with the common ground connection region;

the sub-card is provided with a second connector at a position corresponding to the second connection area, and the sub-card further comprises a second detection point electrically connected with the second connector.

9. The daughter card of claim 7, wherein the first connector comprises an electrically conductive spring mechanism and a probe coupled to the spring mechanism, the spring mechanism having a length in the uncompressed state of 1/2 of a maximum distance that the daughter card and the first interface are electrically coupled.

10. The daughter card of claim 9, wherein the first test point and the common ground connection region are electrically connected to a test device for testing whether the first test point and the common ground connection region are electrically connected.