CN117060344B

CN117060344B - Power supply control circuit

Info

Publication number: CN117060344B
Application number: CN202311046466.0A
Authority: CN
Inventors: 柴文君; 朱启傲; 王硕; 王东元
Original assignee: Hefei Kaimeng Technology Co ltd
Current assignee: Hefei Kaimeng Technology Co ltd
Priority date: 2023-08-18
Filing date: 2023-08-18
Publication date: 2024-05-24
Anticipated expiration: 2043-08-18
Also published as: CN117060344A

Abstract

The invention provides a power supply control circuit which is used for supplying power to a device to be tested. The power supply control circuit comprises a first control circuit and a second control circuit. The first control circuit is used for receiving a first voltage from a power supply and outputting a second voltage through the electrostatic protection circuit, the overvoltage protection circuit and the overcurrent protection circuit in sequence. The second control circuit is used for providing a second voltage to the device under test when the device under test is connected to the power control circuit. After the device under test is removed from the power control circuit, the second control circuit is further configured to release the accumulated charge in the power control circuit. Therefore, the safety and stability of the device to be tested in power supply can be effectively improved, and the extra power consumption waste can be reduced when the device to be tested is not connected.

Description

Power supply control circuit

Technical Field

The present invention relates to a power control circuit, and more particularly, to a power control circuit for supplying power to a device under test.

Background

With rapid development of information technology and rapid increase of data processing amount, data storage devices are rapidly developed. Among them, an Embedded multimedia card (Embedded Multi MEDIA CARD, EMMC) chip is widely used with its various features of integrating a memory device and a controller.

In order to improve the usability and reliability of the eMMC, multiple functions such as control, data transmission, data storage and the like of the eMMC need to be tested according to test cases set by multiple application scenes; including testing eMMC for data handling and self-protection capability in a sudden power-Off Recovery (SPOR) scenario.

In the related art, the eMMC test board only adds a fuse at the front end of each interface (port) power supply, but when the test is performed in a factory, the fuse may be burned out due to the problems of overvoltage and overcurrent of the power supply, surge, electrostatic discharge (electrostatic discharge, ESD), or reverse connection of the positive and negative poles of the power supply of the operator. Therefore, how to protect the test board is a problem that the skilled person has focused on.

Disclosure of Invention

The invention provides a power supply control circuit which can improve the safety and stability when a device to be tested is powered.

Embodiments of the present invention provide a power control circuit for powering at least one device under test. The power supply control circuit comprises a first control circuit and a second control circuit. The second control circuit is connected to the first control circuit. The first control circuit comprises an electrostatic protection circuit, an overvoltage protection circuit and an overcurrent protection circuit. The first control circuit is used for receiving a first voltage from a power supply and outputting a second voltage through the electrostatic protection circuit, the overvoltage protection circuit and the overcurrent protection circuit in sequence. The second control circuit is configured to provide the second voltage to the at least one device under test if the at least one device under test is already connected to the power control circuit. After the at least one device under test is removed from the power control circuit, the second control circuit is further configured to release accumulated charges in the power control circuit.

Based on the above, the power control circuit can receive the first voltage and output the second voltage through the electrostatic protection circuit, the overvoltage protection circuit and the overcurrent protection circuit in the first control circuit in sequence. Then, in the case that the device under test is connected to the power control circuit, the power control circuit may provide the second voltage to the device under test through the second control circuit to supply power to the device under test. In addition, the second control circuit may actively discharge accumulated charge in the power control circuit after the device under test is removed from the power control circuit. Therefore, the safety and stability of the device to be tested in power supply can be effectively improved, and the extra power consumption waste can be reduced when the device to be tested is not connected.

Drawings

FIG. 1 is a schematic diagram of a power control circuit shown in accordance with an embodiment of the present invention;

FIG. 2 is a schematic diagram of a first control circuit shown in accordance with an embodiment of the present invention;

fig. 3 is a schematic diagram of a second control circuit shown in accordance with an embodiment of the present invention.

Detailed Description

Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.

Fig. 1 is a schematic diagram of a power control circuit shown in accordance with an embodiment of the present invention. Referring to fig. 1, a power control circuit 10 is configured to supply power to devices under test 102 (1) to 102 (n) according to a power provided by a current source 101. For example, the power control circuit 10 may be disposed on a test board, and a plurality of mounting bases may be disposed on the test board, and the devices under test 102 (1) to 102 (n) may be mounted on the mounting bases to be connected to the power control circuit 10. After the devices under test 102 (1) -102 (n) are installed, the devices under test 102 (1) -102 (n) may receive power provided by the power control circuit 10 through the test board. In addition, the total number of devices under test 102 (1) -102 (n) may be one or more, and the invention is not limited thereto.

In one embodiment, at least one of the devices under test 102 (1) -102 (n) is a memory chip. The memory chip may be used to control the memory module. For example, the memory module may include a flash (flash) memory module or the like, a rewritable nonvolatile memory module. The test board can be used to perform various tests on the devices under test 102 (1) to 102 (n), such as access control, data transmission, and sudden power failure Recovery (SPOR), to detect performance and/or operational stability of the devices under test 102 (1) to 102 (n). It should be noted that, in one embodiment, at least one of the devices under test 102 (1) -102 (n) may be another type of electronic device, which is not limited by the present invention.

The power supply control circuit 10 includes a first control circuit 11 and a second control circuit 12. An input of the first control circuit 11 is connected to a current source 101. An output of the first control circuit 11 is connected to an input of the second control circuit 12. The output of the second control circuit 12 may be connected to the devices under test 102 (1) -102 (n).

The first control circuit 11 includes an electrostatic protection circuit 111, an overvoltage protection circuit 112, and an overcurrent protection circuit 113. During the period of supplying power to the devices to be tested 102 (1) to 102 (n), the electrostatic protection circuit 111 can provide electrostatic protection functions for the devices to be tested 102 (1) to 102 (n), the overvoltage protection circuit 112 can provide overvoltage protection functions for the devices to be tested 102 (1) to 102 (n), and the overcurrent protection circuit 113 can provide overcurrent protection functions for the devices to be tested 102 (1) to 102 (n), so that the problem that the test board is damaged due to overlarge current caused by overcurrent, overvoltage and the like can be avoided.

Specifically, the first control circuit 11 may receive the first voltage V1 output by the power supply 101, where the first voltage V1 is modulated by the electrostatic protection circuit 111, the overvoltage protection circuit 112, and the overcurrent protection circuit 113 in the first control circuit 11 in order to obtain the second voltage V2 and output the second voltage V2 to the second control circuit 12. The power supply 101 may be a programmable power supply, and outputs a corresponding voltage according to a voltage requirement of the device to be tested, so as to ensure normal operation of the device to be tested. Due to the arrangement of the first control circuit 11, the voltage output by the power supply 101 can be modulated, so that the problems of overhigh voltage, overhigh current and the like in the process of transmitting the voltage to the device to be tested are avoided.

In one embodiment, the second control circuit 12 may provide the second voltage V2 to the devices under test 102 (1) to 102 (n) to power the devices under test 102 (1) to 102 (n) in case the devices under test 102 (1) to 102 (n) are already connected to the power control circuit 10. In an embodiment, in the case where the devices under test 102 (1) to 102 (n) are not connected to the power control circuit 10, the control circuit 12 does not supply power to the devices under test 102 (1) to 102 (n) to reduce the power consumption generated during the test.

In one embodiment, after powering the devices under test 102 (1) -102 (n) for a period of time, if the devices under test 102 (1) -102 (n) are removed from the power control circuit 10, the second control circuit 12 may release the charge accumulated in the power control circuit 10 during the previous powering process. In an embodiment, by actively discharging the accumulated charges in the power control circuit 10, not only the discharging efficiency of the power control circuit 10 can be improved, but also the accumulated charges in the power control circuit 10 can be prevented from affecting the operation efficiency of the power control circuit 10.

Fig. 2 is a schematic diagram of a first control circuit shown in accordance with an embodiment of the present invention. Referring to fig. 1 and 2, a power supply 101 includes a power supply 201. The electrostatic protection circuit 111 includes an electrostatic protection circuit 21. The overvoltage protection circuit 112 includes an overvoltage protection circuit 22. The overcurrent protection circuit 113 includes an overcurrent protection circuit 23.

In one embodiment, the electrostatic protection circuit 21 is also referred to as an electrostatic discharge (electrostatic discharge, ESD) protector. The electrostatic protection circuit 21 is connected to a power supply 201. The electrostatic protection circuit 21 may include a first rectifying element D1. For example, the first rectifying element D1 may include a first Zener diode (Zener diode).

The first rectifying element D1 is connected to the power source 201 and can be used to perform electrostatic filtering (i.e. electrostatic protection function) on the first voltage V1. For example, when an external electrostatic impact is received, the first rectifying element D1 may be turned on to discharge static electricity to the ground. Thus, the connected devices under test 102 (1) to 102 (n) can be protected against static electricity. In one embodiment, the electrostatic protection circuit 21 may further include one or more resistors. The resistor can be connected in series with the first rectifying element D1 and used as a protection resistor to reduce the peak value of voltage surge generated by external static electricity and reduce the influence of static electricity impact.

In one embodiment, the overvoltage protection circuit 22 may include a reactive circuit 221 and a first switch circuit 222. The reaction circuit 221 is connected to the electrostatic protection circuit 21. The first switch circuit 222 is connected to the electrostatic protection circuit 21, the overcurrent protection circuit 23, and the reaction circuit 221.

In one embodiment, in response to the voltage value of the first voltage V1 being higher than a preset voltage value, the response circuit 221 may control the first switch circuit 222 to cut off the first power transmission path between the power source 201 and the over-current protection circuit 23, so as to stop transmitting the first voltage V1 to the over-current protection circuit 23. Thus, overvoltage protection can be achieved for the devices under test 102 (1) -102 (n). In addition, in the case that the voltage value of the first voltage V1 is not higher than the preset voltage value, the reaction circuit 221 may control the first switch circuit 222 to turn on the first power transmission path, so as to continuously transmit the first voltage V1 to the over-current protection circuit 23 through the first power transmission path.

In one embodiment, the reactive circuit 221 includes a second rectifying element D2 and resistors R11, R12, and R13. The second rectifying element D2 may be connected to the electrostatic protection circuit 21 and the first switching circuit 222 through resistors R11, R12 and R13. For example, the second rectifying element D2 may include a second zener diode.

In one embodiment, the second rectifying element D2 may enter the on (turned-on) state in response to the voltage value of the first voltage V1 being higher than the preset voltage value. In response to the second rectifying element D2 being in the on state, the first switching circuit 222 may cut off the first power transmission path to stop transmitting the first voltage V1 to the overcurrent protection circuit 23. Furthermore, in the case where the voltage value of the first voltage V1 is not higher than this preset voltage value, the second rectifying element D2 may be in a cut-off state. In response to the second rectifying element D2 being in the off state, the first switching circuit 222 may turn on the first power transfer path to transfer the first voltage V1 to the overcurrent protection circuit 23 through the first power transfer path.

In an embodiment, the preset voltage value may be set according to a rated voltage of the second rectifying element D2 (e.g., the second zener diode). For example, the preset voltage value may be positively related to the rated voltage of the second rectifying element D2. That is, the higher the rated voltage of the second rectifying element D2, the higher the preset voltage value may be. In response to the voltage value of the first voltage V1 being higher than the preset voltage value, the second rectifying element D2 may be turned on. In addition, if the voltage value of the first voltage V1 is not higher than the preset voltage value, the second rectifying element D2 may not be turned on.

In one embodiment, the first switching circuit 222 includes a first switching element Q1 and a second switching element Q2. In an embodiment, the second switching element Q2 may enter the conductive state in response to the second rectifying element D2 being in the conductive state. The first switching element Q1 may enter an off state in response to the second switching element Q2 being in an on state. In the off state, the first switching element Q1 may cut off the first power transmission path. Further, in response to the second rectifying element D2 being in the off state, the second switching element Q2 may enter the off state. The first switching element Q1 may enter an on state in response to the second switching element Q2 being in an off state. In the on state, the first switching element Q1 may turn on the first power transmission path. For example, the turned-on first power transmission path may pass through the first switching element Q1 to transmit the first voltage V1 to the overcurrent protection circuit 23.

In an embodiment, the first switching element Q1 comprises a first transistor and the second switching element Q2 comprises a second transistor. In the embodiment of fig. 2, the first transistor and the second transistor are PNP bipolar junction transistors (bipolar junction transistor, BJTs). However, in an embodiment, the first transistor and/or the second transistor may be replaced with other types of transistors, and the invention is not limited.

In one embodiment, the over-current protection circuit 23 includes a power chip 231 and resistors R21 and R22. The power chip 231 is configured to output the second voltage V2 and control a current value corresponding to the second voltage V2. For example, the voltage V1 from the overvoltage protection circuit 22 may be input to the IN pin of the power chip 231. The EN pin of the power chip 231 may be connected to the overvoltage protection circuit 22 through a resistor R21 to be activated according to the first voltage V1. The OUT pin of the power chip 231 may generate an output signal (i.e., the second voltage V2) according to the signal (i.e., the first voltage V1) received by the IN pin. The SET pin of the power chip 231 may control (or adjust) the current value corresponding to the output second voltage V2 according to the resistance value of the connected resistor R22. Accordingly, the power chip 231 is matched with the resistor R22 which is set appropriately, so that the current value corresponding to the second voltage V2 can be controlled effectively, and the connected devices to be tested 102 (1) to 102 (n) are prevented from being damaged due to the fact that the current value corresponding to the second voltage V2 is too high. Thus, the devices under test 102 (1) -102 (n) can be over-current protected.

In an embodiment, the control circuit 11 further comprises a first filter circuit 24. The first filter circuit 24 is configured to filter the second voltage V2 output by the power chip 231 to filter the ac portion of the second voltage V2. For example, the first filter circuit 24 may include capacitive elements C11, C12, and C13 connected in parallel. The first terminals of the capacitive elements C11, C12 and C13 may be connected to the output terminal of the power chip 231 (or the control circuit 11). The second terminals of the capacitive elements C11, C12 and C13 are grounded.

Fig. 3 is a schematic diagram of a second control circuit shown in accordance with an embodiment of the present invention. Referring to fig. 1 and 3, the second control circuit 12 includes a monitor circuit 31. The monitor circuit 31 is connected to the pins 301, 302 and the first control circuit 11. The monitor circuit 31 can be used to detect whether the device under test 102 (i) is connected to the power control circuit 10 via the pins 301 and 302. For example, the device under test 102 (i) is one of the devices under test 102 (1) to 102 (n). In one embodiment, when the device under test 102 (i) is mounted to the mounting base, the ground pin of the device under test 102 (i) is connected to the pins 301 and 302.

In an embodiment, the monitoring circuit 31 includes a second switching circuit 311, third rectifying elements D31 and D32, and resistors R31, R32, and R33. The third rectifying elements D31 and D32 may each include a diode. The third rectifying elements D31 and D32 are connected to the pins 301 and 302, respectively. In addition, the third rectifying elements D31 and D32 may be connected to the third voltage V3 through resistors R31 and R32, respectively.

In one embodiment, the third rectifying elements D31 and D32 may enter the off state in response to the device under test 102 (i) being connected to the power control circuit 10 (i.e., the ground pin of the device under test 102 (i) is connected to pins 301 and 302). In response to the third rectifying elements D31 and D32 being in the off state, the second switching circuit 311 may turn on a second power transmission path between the second control circuit 12 and the device under test 102 (i) to provide the second voltage V2 to the device under test 102 (i) through the second power transmission path. In addition, in the case where the device under test 102 (i) is not connected to the power control circuit 10, the third rectifying elements D31 and D32 may be in a conductive state. In response to the third rectifying elements D31 and D32 being in the on state, the second switching circuit 311 may cut off the second power transmission path to stop transmitting the second voltage V2 to the device under test 102 (i).

In an embodiment, the second switching circuit 311 includes a third switching element Q3, a fourth switching element Q4, a fifth switching element Q5, resistors R41, R42, R43, and a capacitor C21. The third switching element Q3 is connected to the third rectifying elements D31 and D32. The fourth switching element Q4 is connected to the third switching element Q3. The fifth switching element Q5 is connected to the fourth switching element Q4. It should be noted that the output terminal of the fifth switching element Q5 is configured to output the second voltage V2 (i). The connection manner of these electronic components can be adjusted according to the practical requirements with reference to fig. 3.

In one embodiment, in response to the third rectifying elements D31 and D32 being in the off state, the third switching element Q3 may enter the off state. In response to the third switching element Q3 being in the off state, the fourth switching element Q4 enters the on state. In response to the fourth switching element Q4 being in the on state, the fifth switching element Q5 enters the on state to turn on the second power supply transfer path. After the second power transmission path is turned on, the second voltage V2 may be provided to the device under test 102 (i) through the fifth switching element Q5 to power the device under test 102 (i) and perform subsequent testing operations. Further, in response to the third rectifying elements D31 and D32 being in the on state, the third switching element Q3 may enter the on state. In response to the third switching element Q3 being in an on state, the fourth switching element Q4 enters an off state. In response to the fourth switching element Q4 being in the off state, the fifth switching element Q5 also enters the off state to cut off the second power supply transfer path. After the second power supply transmission path is cut off, no current passes through the second power supply transmission path, so that the power consumption of the test board can be reduced.

In an embodiment, the third switching element Q3 includes a third transistor, the fourth switching element Q4 includes a fourth transistor, and the fifth switching element Q5 includes a fifth transistor. In the embodiment of fig. 3, the third and fourth transistors are N-type Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), and the fifth transistor is a P-type MOSFET. However, in one embodiment, the third transistor, the fourth transistor and/or the fifth transistor may be replaced by other types of transistors, which is not limited by the present invention.

In an embodiment, the second control circuit 12 further includes a second filter circuit 32 and a discharge circuit 33. The second filter circuit 32 is connected to the monitor circuit 31. The discharging circuit 33 is connected to the monitoring circuit 31 and the second filter circuit 32.

The second filter circuit 32 is used for filtering the voltage waveform of the second voltage V2 (i) to be output. For example, the second filter circuit 32 may include capacitive elements C31, C32, and C33 connected in parallel. The first terminals of the capacitive elements C31, C32 and C33 may be connected to the output terminal of the monitoring circuit 31 (or the fifth switching element Q5). The second terminals of the capacitive elements C31, C32, and C33 are grounded.

The discharging circuit 33 is used for discharging the charge accumulated in the second filter circuit 32 when the device under test 102 (i) is not connected to the power control circuit 10. For example, in response to removal of the device under test 102 (i) from the power control circuit 10 (or pins 301, 302), the discharge circuit 32 may release charge in the second filter circuit 32 that was accumulated during previous powering of the device under test 102 (i).

In one embodiment, the discharging circuit 33 includes a sixth switching element Q6 and resistors R51 and R52. The sixth switching element Q6 is connected to the monitoring circuit 31 (or the fourth switching element Q4) through a resistor R51. Further, the sixth switching element Q6 is connected to the second filter circuit 32 through a resistor R52. In one embodiment, the sixth switching element Q6 includes a sixth transistor. For example, the sixth transistor may be a P-type MOSFET. In one embodiment, the sixth transistor may be replaced with another type of transistor, which is not a limitation of the present invention.

In one embodiment, during the power supply of the device under test 102 (i), a portion of the charge is accumulated in the second filter circuit 32. These accumulated charges may affect the efficiency of the second filter circuit 32 in the subsequent operation. In one embodiment, the sixth switching element Q6 may enter the conductive state in response to the device under test 102 (i) being removed from the power control circuit 10 (or pins 301, 302). In the on state, the sixth switching element Q6 may turn on a discharging path between the second filter circuit 32 and the ground to release the accumulated charges in the second filter circuit 32 through the discharging path.

In an embodiment, the second voltage V2 (i) output by the second control circuit 12 may be provided to the device under test 102 (i) to power the device under test 102 (i). In one embodiment, the total number of the second control circuits 12 (and the first control circuits 11) may be matched with the total number of the devices under test 102 (1) to 102 (n) to supply power to the devices under test 102 (1) to 102 (n), respectively.

It should be noted that the selection and connection manners of the electronic components in the circuit structures shown in fig. 2 and 3 are examples, and are not meant to limit the present invention. In addition, at least some of the electronic components in the circuit structures shown in fig. 2 and 3 may be replaced by other types of electronic components with similar functions according to the practical requirements, which is not limited by the present invention. Further, more useful electronic components may be added to the circuit structures shown in fig. 2 and 3, and the invention is not limited thereto.

In summary, the power control circuit provided by the invention can sequentially perform electrostatic protection, overvoltage protection and overcurrent protection on the device to be tested through the electrostatic protection circuit, the overvoltage protection circuit and the overcurrent protection circuit in the process of supplying power to the device to be tested. In addition, after the device to be tested is removed from the power control circuit (or the mounting seat on the test board), the power control circuit can also perform active discharge so as to accelerate the discharge efficiency. Therefore, the safety and stability of the device to be tested in power supply can be effectively improved, and the extra power consumption waste can be reduced when the device to be tested is not connected.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims

1. A power control circuit for powering at least one device under test, the power control circuit comprising:

A first control circuit; and

A second control circuit connected to the first control circuit,

Wherein the first control circuit comprises an electrostatic protection circuit, an overvoltage protection circuit and an overcurrent protection circuit,

The first control circuit is used for receiving a first voltage from a power supply and outputting a second voltage through the electrostatic protection circuit, the overvoltage protection circuit and the overcurrent protection circuit in sequence,

The second control circuit is configured to provide the second voltage to the at least one device under test when the at least one device under test is connected to the power control circuit, and

After the at least one device under test is removed from the power control circuit, the second control circuit is further configured to discharge accumulated charge,

Wherein the second control circuit includes:

The monitoring circuit is connected to at least one pin and the first control circuit;

a second filter circuit connected to the monitoring circuit; and

A discharging circuit connected to the output ends of the monitoring circuit and the second filter circuit,

The second filter circuit includes at least one capacitive element,

The monitoring circuit is used for detecting whether the at least one device to be tested is connected to the power supply control circuit through the at least one pin,

The discharging circuit is used for forming a discharging path between the monitoring circuit and the output end of the second filter circuit, and

In response to the at least one device under test being removed from the power control circuit, the discharge circuit is to discharge the accumulated charge in the second filter circuit through the output of the second filter circuit and the discharge path;

Wherein the monitoring circuit comprises:

The anodes of the third rectifying element and the fourth rectifying element are respectively connected to the first pin and the second pin and are respectively connected to a third voltage through a first resistor and a second resistor, and the cathodes of the third rectifying element and the fourth rectifying element are connected to a ground end through a third resistor; and

A second switching circuit connected to the first control circuit and the cathodes of the third rectifying element and the fourth rectifying element,

In response to the at least one device under test being connected to the power control circuit, the third rectifying element and the fourth rectifying element enter an off state,

In response to the third and fourth rectifying elements being in the off state, the second switching circuit turns on a second power transfer path to provide the second voltage to the at least one device under test through the second power transfer path.

2. The power supply control circuit of claim 1, wherein the electrostatic protection circuit comprises:

The first rectifying element is connected to the power supply and used for performing electrostatic filtering on the first voltage.

3. The power control circuit of claim 2, wherein the first rectifying element comprises a first zener diode.

4. The power control circuit of claim 1, wherein the overvoltage protection circuit comprises:

a reaction circuit connected to the electrostatic protection circuit; and

A first switch circuit connected to the electrostatic protection circuit, the overcurrent protection circuit and the reaction circuit,

And in response to the voltage value of the first voltage being higher than a preset voltage value, the reaction circuit controls the first switch circuit to cut off a first power supply transmission path so as to stop transmitting the first voltage to the overcurrent protection circuit.

5. The power control circuit of claim 4, wherein the reactive circuit comprises:

a second rectifying element connected to the electrostatic protection circuit and the first switching circuit,

In response to the voltage value of the first voltage being higher than the preset voltage value, the second rectifying element enters a conductive state, and

In response to the second rectifying element being in the on state, the first switching circuit cuts off the first power supply transfer path to stop transferring the first voltage to the overcurrent protection circuit.

6. The power supply control circuit according to claim 5, wherein the preset voltage value is set according to a rated voltage of the second rectifying element.

7. The power control circuit of claim 5, wherein the second rectifying element comprises a second zener diode.

8. The power control circuit of claim 5, wherein the first switching circuit comprises:

A first switching element connected to the electrostatic protection circuit and the overcurrent protection circuit; and

A second switching element connected to the electrostatic protection circuit, the second rectifying element, and the first switching element,

In response to the second rectifying element being in the on state, the second switching element enters the on state, and

In response to the second switching element being in the on state, the first switching element enters an off state to shut off the first power supply transfer path.

9. The power supply control circuit of claim 1, wherein the over-current protection circuit comprises:

A power chip connected to the overvoltage protection circuit,

The power chip is used for outputting the second voltage and controlling a current value corresponding to the second voltage.

10. The power control circuit of claim 1, wherein the first control circuit further comprises:

a first filter circuit connected to the overcurrent protection circuit,

The first filter circuit is used for filtering the second voltage to filter alternating current parts in the second voltage.

11. The power control circuit of claim 1, wherein the second switching circuit comprises:

a third switching element connected to the third rectifying element and the fourth rectifying element;

A fourth switching element connected to the third switching element; and

A fifth switching element connected to the fourth switching element,

In response to the third rectifying element and the fourth rectifying element being in the off state, the third switching element enters an off state,

In response to the third switching element being in the off state, the fourth switching element enters an on state,

In response to the fourth switching element being in the on state, the fifth switching element enters an on state to turn on the second power supply transfer path.

12. The power control circuit of claim 1, wherein the discharge circuit comprises:

a sixth switching element connected to the monitoring circuit and the second filter circuit,

In response to the at least one device under test being removed from the power control circuit, the sixth switching element turns on the discharge path to discharge the accumulated charge in the second filter circuit through the discharge path.